2061 lines
130 KiB
Plaintext
2061 lines
130 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: LH7A400 On-Chip Peripherals
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; @Props: Released
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; @Author: PHI
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; @Changelog: 2003-02-12 PHI
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; @Manufacturer: SHARP - SHARP
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; @Core: ARM922T
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; @Chip: LH7A400
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perlh7a400.per 7609 2017-02-20 14:58:04Z askoncej $
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config 16. 8.
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width 8.
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TREE "Static Memory Controller (SMC)"
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group sd:0x80002000--0x80002043
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line.long 0x00 "SMCBCR0, SMC Bank Configuration Register 0"
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bitfld.long 0x00 0x00--0x03 " IDCY , Idle Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0x05--0x09 " WST1 , Wait State 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0x0b--0x0f " WST2 , Wait State 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0x19 " WPERR ,Write Protect Error flag" "0,1"
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bitfld.long 0x00 0x1a " WP ,Write Protect, select memory access protection level" "SRAM,ROM"
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bitfld.long 0x00 0x1b " PageMode, Page Mode Enable " " dis, ena"
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bitfld.long 0x00 0x1c--0x1d " MemWidth, Memory Width " " 8, 16, 32, 32"
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line.long 0x04 "SMCBCR1, SMC Bank Configuration Register 1"
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bitfld.long 0x04 0x00--0x03 " IDCY , Idle Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0x05--0x09 " WST1 , Wait State 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 0x0b--0x0f " WST2 , Wait State 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 0x19 " WPERR ,Write Protect Error flag" "0,1"
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bitfld.long 0x04 0x1a " WP ,Write Protect, select memory access protection level" "SRAM,ROM"
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bitfld.long 0x04 0x1b " PageMode, Page Mode Enable" " dis, ena"
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bitfld.long 0x04 0x1c--0x1d " MemWidth, Memory Width " " 8, 16, 32, 32"
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line.long 0x08 "SMCBCR2, SMC Bank Configuration Register 2"
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bitfld.long 0x08 0x00--0x03 " IDCY , Idle Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x08 0x05--0x09 " WST1 , Wait State 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x08 0x0b--0x0f " WST2 , Wait State 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x08 0x19 " WPERR ,Write Protect Error flag" "0,1"
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bitfld.long 0x08 0x1a " WP ,Write Protect, select memory access protection level" "SRAM,ROM"
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bitfld.long 0x08 0x1b " PageMode, Page Mode Enable " " dis, ena"
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bitfld.long 0x08 0x1c--0x1d " MemWidth " " 8, 16, 32, 32"
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line.long 0x0c "SMCBCR3, SMC Bank Configuration Register 3"
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bitfld.long 0x0c 0x00--0x03 " IDCY , Idle Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0c 0x05--0x09 " WST1 , Wait State 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x0c 0x0b--0x0f " WST2 , Wait State 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0x19 " WPERR ,Write Protect Error flag" "0,1"
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bitfld.long 0x0c 0x1a " WP ,Write Protect, select memory access protection level" "SRAM,ROM"
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bitfld.long 0x0c 0x1b " PageMode, Page Mode Enable " " dis, ena"
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bitfld.long 0x0c 0x1c--0x1d " MemWidth " " 8, 16, 32, 32"
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line.long 0x18 "SMCBCR6, SMC Bank Configuration Register 6"
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bitfld.long 0x18 0x00--0x03 " IDCY , Idle Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x18 0x05--0x09 " WST1 , Wait State 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 0x0b--0x0f " WST2 , Wait State 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 0x19 " WPERR ,Write Protect Error flag" "0,1"
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bitfld.long 0x18 0x1a " WP ,Write Protect, select memory access protection level" "SRAM,ROM"
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bitfld.long 0x18 0x1b " PageMode, Page Mode Enable " " dis, ena"
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bitfld.long 0x18 0x1c--0x1d " MemWidth " " 8, 16, 32, 32"
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line.long 0x1c "SMCBCR7, SMC Bank Configuration Register 7"
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bitfld.long 0x1c 0x00--0x03 " IDCY , Idle Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x1c 0x05--0x09 " WST1 , Wait State 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 0x0b--0x0f " WST2 , Wait State 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 0x19 " WPERR ,Write Protect Error flag" "0,1"
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bitfld.long 0x1c 0x1a " WP ,Write Protect, select memory access protection level" "SRAM,ROM"
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bitfld.long 0x1c 0x1b " PageMode, Page Mode Enable " " dis, ena"
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bitfld.long 0x1c 0x1c--0x1d " MemWidth " " 8, 16, 32, 32"
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line.long 0x20 "PC1ATTR, PC Card 1 Attribute Space Configuration"
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hexmask.long.byte 0x20 0x00--0x07 1. 0. " Pre-Charge , Pre-Charge Delay Time for Attribute Space "
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hexmask.long.byte 0x20 0x08--0x0b 1. 0. " Hold Time , Hold Time between data Signal Release and Chip Selection Signal Release"
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hexmask.long.byte 0x20 0x10--0x17 1. 0. " Access Time ,Access Time for Attribute Space"
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bitfld.long 0x20 0x1f " Width , Width of Attribute Address Space" " 8, 16"
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line.long 0x24 "PC1COM ,PC Card 1 Common Memory Space Configuration"
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hexmask.long.byte 0x24 0x00--0x07 1. 0. " Pre-Charge , Pre-Charge Delay Time for Common Memory "
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hexmask.long.byte 0x24 0x08--0x0b 1. 0. " Hold Time , Hold Time between data Signal Release and Chip Selection Signal Release"
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hexmask.long.byte 0x24 0x10--0x17 1. 0. " Access Time ,Access Time for Common Memory"
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bitfld.long 0x24 0x1f " Width , Width of Common Memory Address Space" " 8, 16"
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line.long 0x28 "PC1IO ,PC Card 1 I/O Space Configuration"
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hexmask.long.byte 0x24 0x00--0x07 1. 0. " Pre-Charge , Pre-Charge Delay Time for I/O Space "
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hexmask.long.byte 0x24 0x08--0x0b 1. 0. " Hold Time , Hold Time between data Signal Release and Chip Selection Signal Release"
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hexmask.long.byte 0x24 0x10--0x17 1. 0. " Access Time ,Access Time for I/O Space"
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bitfld.long 0x24 0x1f " Width , Width of I/O Address Space" " 8, 16"
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line.long 0x30 "PC2ATTR, PC Card 2 Attribute Space Configuration"
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hexmask.long.byte 0x30 0x00--0x07 1. 0. " Pre-Charge , Pre-Charge Delay Time for Attribute Space "
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hexmask.long.byte 0x30 0x08--0x0b 1. 0. " Hold Time , Hold Time between data Signal Release and Chip Selection Signal Release"
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hexmask.long.byte 0x30 0x10--0x17 1. 0. " Access Time ,Access Time for Attribute Space"
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bitfld.long 0x30 0x1f " Width , Width of Attribute Address Space" " 8, 16"
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line.long 0x34 "PC2COM ,PC Card 2 Common Memory Space Configuration"
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hexmask.long.byte 0x34 0x00--0x07 1. 0. " Pre-Charge , Pre-Charge Delay Time for Common Memory "
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hexmask.long.byte 0x34 0x08--0x0b 1. 0. " Hold Time , Hold Time between data Signal Release and Chip Selection Signal Release"
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hexmask.long.byte 0x34 0x10--0x17 1. 0. " Access Time ,Access Time for Common Memory"
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bitfld.long 0x34 0x1f " Width , Width of Common Memory Address Space" " 8, 16"
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line.long 0x38 "PC2IO ,PC Card 2 I/O Space Configuration"
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hexmask.long.byte 0x34 0x00--0x07 1. 0. " Pre-Charge , Pre-Charge Delay Time for I/O Space "
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hexmask.long.byte 0x34 0x08--0x0b 1. 0. " Hold Time , Hold Time between data Signal Release and Chip Selection Signal Release"
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hexmask.long.byte 0x34 0x10--0x17 1. 0. " Access Time ,Access Time for I/O Space"
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bitfld.long 0x34 0x1f " Width , Width of I/O Address Space" " 8, 16"
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line.long 0x40 "PCMCIAC ,PCMCIA Control"
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bitfld.long 0x40 0x00--0x01 " PC12EN , PC Card 1 and 2 Enable " "0 cards,1 CF,1 PCMCIA,2 cards"
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bitfld.long 0x40 0x02 " PC1RST , PC Card 1 Reset " " -, reset"
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bitfld.long 0x40 0x03 " PC2RST , PC Card 2 Reset " " -, reset"
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textline " "
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bitfld.long 0x40 0x04 " WEN1 , Wait State Enable for Card 1" " dis, ena"
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bitfld.long 0x40 0x05 " WEN2 , Wait State Enable for Card 2" " dis, ena"
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bitfld.long 0x40 0x08 " MPREG , Manual Control of PCREG " " Auto, Manual"
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TREE.END
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TREE "Synchronous Dynamic RAM (SDRAM) Controller"
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group sd:0x80002400--0x8000241f
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line.long 0x04 "GLOBAL ,Global Information,control and report status of SDRC"
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bitfld.long 0x04 0x1f "CKE ,Clock Enable" "low,high"
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bitfld.long 0x04 0x1e " CKSD ,Clock Shutdown" "free,dyn"
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bitfld.long 0x04 0x06 " LCR ,Load Command Register" "norm,read"
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bitfld.long 0x04 0x05 " SMEMBST ,Synchronous Memory Busy State" "dis,ena"
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bitfld.long 0x04 0x01 " MRS ,Mode Register in Synchronous Device" "norm,read"
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bitfld.long 0x04 0x00 " INIT ,Initialize; Issue a NOP or PRECHARGE ALL Command" "no,yes"
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line.long 0x08 "RFSHTMR ,Refresh Timer"
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line.long 0x0c "BOOTSTA ,Boot Status"
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bitfld.long 0x0c 0x02 "MEDCHG ,Media Change" "syn,asyn"
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bitfld.long 0x0c 0x00--0x01 " BOOTMWA ,Boot Memory Width for Asynchronous Memory" "8,16,32,32"
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bitfld.long 0x0c 0x00--0x01 " BOOTMWS ,Boot Memory Width for Synchronous Ext. Memory" "16,16,32,32"
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line.long 0x10 "SDCS0 ,Synchronous Domain Chip Selects Configuration (CS0)"
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bitfld.long 0x10 0x18 "AUTPRCH ,AutoPrecharge" "dis,ena"
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bitfld.long 0x10 0x14--0x15 " RASTCAS ,Row Adress Strobe to Column Adress Strobe" "-,-,2,3"
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bitfld.long 0x10 0x13 " WBL ,Write Burst Length" "rd len,single"
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bitfld.long 0x10 0x10--0x12 " CASL ,Column Adress Strobe Latency" "-,2,3,4,5,6,7,8"
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bitfld.long 0x10 0x06 " 2KPAGE ,2K Page Depth" "no,yes"
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textline " "
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bitfld.long 0x10 0x05 "SROMLL ,SROM Lookalike;Swap SB0 and SB1" "no,yes"
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bitfld.long 0x10 0x04 " SROM512 ,SROM Page Depth is 512" "no,yes"
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bitfld.long 0x10 0x03 " BANKCNT ,Bank Count" "2,4"
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bitfld.long 0x10 0x02 " EBW ,External Bus Width" "32,512"
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line.long 0x14 "SDCS1 ,Synchronous Domain Chip Selects Configuration (CS1)"
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bitfld.long 0x14 0x18 "AUTPRCH ,AutoPrecharge" "dis,ena"
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bitfld.long 0x14 0x14--0x15 " RASTCAS ,Row Adress Strobe to Column Adress Strobe" "-,-,2,3"
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bitfld.long 0x14 0x13 " WBL ,Write Burst Length" "rd len,single"
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bitfld.long 0x14 0x10--0x12 " CASL ,Column Adress Strobe Latency" "-,2,3,4,5,6,7,8"
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bitfld.long 0x14 0x06 " 2KPAGE ,2K Page Depth" "no,yes"
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textline " "
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bitfld.long 0x14 0x05 "SROMLL ,SROM Lookalike;Swap SB0 and SB1" "no,yes"
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bitfld.long 0x14 0x04 " SROM512 ,SROM Page Depth is 512" "no,yes"
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bitfld.long 0x14 0x03 " BANKCNT ,Bank Count" "2,4"
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bitfld.long 0x14 0x02 " EBW ,External Bus Width" "32,512"
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line.long 0x18 "SDCS2 ,Synchronous Domain Chip Selects Configuration (CS2)"
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bitfld.long 0x18 0x18 "AUTPRCH ,AutoPrecharge" "dis,ena"
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bitfld.long 0x18 0x14--0x15 " RASTCAS ,Row Adress Strobe to Column Adress Strobe" "-,-,2,3"
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bitfld.long 0x18 0x13 " WBL ,Write Burst Length" "rd len,single"
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bitfld.long 0x18 0x10--0x12 " CASL ,Column Adress Strobe Latency" "-,2,3,4,5,6,7,8"
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bitfld.long 0x18 0x06 " 2KPAGE ,2K Page Depth" "no,yes"
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textline " "
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bitfld.long 0x18 0x05 "SROMLL ,SROM Lookalike;Swap SB0 and SB1" "no,yes"
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bitfld.long 0x18 0x04 " SROM512 ,SROM Page Depth is 512" "no,yes"
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bitfld.long 0x18 0x03 " BANKCNT ,Bank Count" "2,4"
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bitfld.long 0x18 0x02 " EBW ,External Bus Width" "32,512"
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line.long 0x1c "SDCS3 ,Synchronous Domain Chip Selects Configuration (CS3)"
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bitfld.long 0x1c 0x18 "AUTPRCH ,AutoPrecharge" "dis,ena"
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bitfld.long 0x1c 0x14--0x15 " RASTCAS ,Row Adress Strobe to Column Adress Strobe" "-,-,2,3"
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bitfld.long 0x1c 0x13 " WBL ,Write Burst Length" "rd len,single"
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bitfld.long 0x1c 0x10--0x12 " CASL ,Column Adress Strobe Latency" "-,2,3,4,5,6,7,8"
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bitfld.long 0x1c 0x06 " 2KPAGE ,2K Page Depth" "no,yes"
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textline " "
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bitfld.long 0x1c 0x05 "SROMLL ,SROM Lookalike;Swap SB0 and SB1" "no,yes"
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bitfld.long 0x1c 0x04 " SROM512 ,SROM Page Depth is 512" "no,yes"
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bitfld.long 0x1c 0x03 " BANKCNT ,Bank Count" "2,4"
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bitfld.long 0x1c 0x02 " EBW ,External Bus Width" "32,512"
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TREE.END
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TREE "Clock and State Controller (CSC)"
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group sd:0x80000400--0x8000044f
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line.long 0x00 "PWRSR, Power Reset Register"
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hexmask.long.byte 0x00 0x18--0x1f 1. 0. " CHIPMAN , Chip Manufacturer ID"
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hexmask.long.byte 0x00 0x10--0x17 1. 0. " CHIPID , Chip Identification"
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textline " "
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bitfld.long 0x00 0x0e " LCKFLG , PLL2 Lock Status" "off,on"
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bitfld.long 0x00 0x0d " CLDFLG , Cold Start Status Flag" "off,on"
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bitfld.long 0x00 0x0c " PFFLG , Power Fail Status Flag" "off,on"
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bitfld.long 0x00 0x0b " RSTFLG , User Reset Status Flag" "off,on"
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bitfld.long 0x00 0x0a " NBFLG , New Battery Status Flag" "off,on"
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textline " "
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bitfld.long 0x00 0x09 " WUON ,Wake Up On" "off,on"
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bitfld.long 0x00 0x08 " WUDR , Wake Up Direct" "off,on"
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bitfld.long 0x00 0x07 " DCDET , Direct Current Detect" "off,on"
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bitfld.long 0x00 0x06 " MCDR , Media Change Direct Read" "off,on"
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hexmask.long.byte 0x00 0x00--0x05 1. 0. " RTCDIV , Real Time Clock Divisor"
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textline " "
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bitfld.long 0x00 0x05 " RTCD5 , RTCDIV Bit 5 = 2 Hz Output" "0,1"
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bitfld.long 0x00 0x04 " RTCD4 , RTCDIV Bit 4 = 4 Hz Output" "0,1"
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bitfld.long 0x00 0x03 " RTCD3 , RTCDIV Bit 3 = 8 Hz Output" "0,1"
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bitfld.long 0x00 0x02 " RTCD2 , RTCDIV Bit 2 = 16 Hz Output" "0,1"
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bitfld.long 0x00 0x01 " RTCD1 , RTCDIV Bit 1 = 32 Hz Output" "0,1"
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bitfld.long 0x00 0x00 " RTCD0 , RTCDIV Bit 0 = 64 Hz Output" "0,1"
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line.long 0x04 "PWRCNT, Power Control Register"
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bitfld.long 0x04 0x19 " DMAAAC2TX , AC97 Transmit on DMA Channel 2" "dis,ena"
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bitfld.long 0x04 0x18 " DMAAAC2RX , AC97 Receive on DMA Channel 2" "dis,ena"
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bitfld.long 0x04 0x17 " DMAAAC1TX , AC97 Transmit on DMA Channel 1" "dis,ena"
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bitfld.long 0x04 0x16 " DMAAAC1RX , AC97 Receive on DMA Channel 1" "dis,ena"
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bitfld.long 0x04 0x15 " DMAAAC0TX , AC97 Transmit on DMA Channel 0" "dis,ena"
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bitfld.long 0x04 0x14 " DMAAAC0RX , AC97 Receive on DMA Channel 0" "dis,ena"
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textline " "
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bitfld.long 0x04 0x13 " DMAMMCTX , MMC Transmit on DMA Channel" "dis,ena"
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bitfld.long 0x04 0x13 " DMAMMCTX , MMC Transmit on DMA Channel" "dis,ena"
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bitfld.long 0x04 0x11 " DMAUSBTX , USB Transmit on DMA Channel" "dis,ena"
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bitfld.long 0x04 0x10 " DMAUSBRX ,USB Receive on DMA Channel" "dis,ena"
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textline " "
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bitfld.long 0x04 0x01 " WAKEDIS ,Wakeup Disable" "ena,dis"
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hexmask.long.byte 0x04 0x08--0x0f 1. 0. " PGMCLK ,Program Clock Divisor"
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line.long 0x08 "HALT, Halt Read-to-Enter Registers"
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line.long 0x0c "STBY, Standby Read-to-Enter Register"
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line.long 0x10 "BLEOI, Written to BLEOI clears the Battery Low Interrupt"
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line.long 0x14 "MCEOI, Written to MCEOI clears the Media Change Interrupt"
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line.long 0x18 "TEOI, Written to TEOI clears the Tick Interrupt"
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line.long 0x1c "STFCLR, Written to STFCLR clears the NBFLG,RSTFLG,PFFLG and CLDFLG"
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line.long 0x20 "CLKSET, Clock Set Register"
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bitfld.long 0x20 0x1f " PLL , PLL Type, enable direct access to PLL" "dis,ena"
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bitfld.long 0x20 0x18 " SMCROM , HCLK Gate to SMC Enable Flag" "dis,ena"
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bitfld.long 0x20 0x12--0x13 " PS , PS Divisor" " 1, 2, 4, 8"
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bitfld.long 0x20 0x10--0x11 " PCLKDIV , PCLK Divisor" " 2, 4, 4, 8"
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textline " "
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bitfld.long 0x20 0x0b--0x0f " MAINDIV2 , Main Divisor 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x20 0x07--0x0a " MAINDIV1 , Main Divisor 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x20 0x02--0x06 " PREDIV , Predivisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x20 0x00--0x01 " HCLKDIV , HCLK Divisor" " 1, 2, 3, 4"
|
|
line.long 0x40 "SCRREG0, Scratch Register 0"
|
|
line.long 0x44 "SCRREG1, Scratch Register 1"
|
|
line.long 0x4c "USBRESET, USB Reset Register"
|
|
bitfld.long 0x4c 0x01 " APBRES ,APB Reset Register, Reset the USB Control Side" "no,yes"
|
|
bitfld.long 0x4c 0x00 " IORES ,I/O Reset Register, Reset the USB I/O Side" "no,yes"
|
|
TREE.END
|
|
TREE "Interrupt Controller"
|
|
group sd:0x80000500--0x8000051c
|
|
line.long 0x00 "INTSR, Interrupt Status Register"
|
|
bitfld.long 0x00 0x1b " BMINTR , Battery Monitor Interface" "dis,ena"
|
|
bitfld.long 0x00 0x15 " DMAINTR , Direct Memory Access" "dis,ena"
|
|
bitfld.long 0x00 0x14 " USBINTR , Universal Serial Bus" "dis,ena"
|
|
bitfld.long 0x00 0x13 " MMCINTR , MultiMediaCard" "dis,ena"
|
|
bitfld.long 0x00 0x12 " AACINTR , AC97 Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x11 " SCIINTR , Smart Card Interface" "dis,ena"
|
|
bitfld.long 0x00 0x0f " SSEOTI , Synchronous Serial Interface" "dis,ena"
|
|
bitfld.long 0x00 0x0e " LCDINTR , Liquid Crystal Display" "dis,ena"
|
|
bitfld.long 0x00 0x0b " TINTR , 64 Hz Tick" "dis,ena"
|
|
bitfld.long 0x00 0x0a " RTCMI , Real Time Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x03 " MCINT , Media Change" "dis,ena"
|
|
bitfld.long 0x00 0x02 " WEINT , Watchdog Timer" "dis,ena"
|
|
bitfld.long 0x00 0x01 " BLINT , Battery Low" "dis,ena"
|
|
bitfld.long 0x00 0x04 " CSINT , Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x10 " UART3 , UART3" "dis,ena"
|
|
bitfld.long 0x00 0x0d " UART2 , UART2" "dis,ena"
|
|
bitfld.long 0x00 0x0c " UART1 , UART1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x16 " TC3OI , Timer3" "dis,ena"
|
|
bitfld.long 0x00 0x09 " TC2OI , Timer2" "dis,ena"
|
|
bitfld.long 0x00 0x08 " TC1OI , Timer1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x1a " GPIO7 , Configurable External IRQ Interrupt on GPIO Port F7" "dis,ena"
|
|
bitfld.long 0x00 0x19 " GPIO6 , Configurable External IRQ Interrupt on GPIO Port F6" "dis,ena"
|
|
bitfld.long 0x00 0x18 " GPIO5 , Configurable External IRQ Interrupt on GPIO Port F5" "dis,ena"
|
|
bitfld.long 0x00 0x17 " GPIO4 , Configurable External IRQ Interrupt on GPIO Port F4" "dis,ena"
|
|
bitfld.long 0x00 0x07 " GPIO3 , Configurable External IRQ Interrupt on GPIO Port F3" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x07 " GPIO2 , Configurable External IRQ Interrupt on GPIO Port F2" "dis,ena"
|
|
bitfld.long 0x00 0x06 " GPIO1 , Configurable External IRQ Interrupt on GPIO Port F1" "dis,ena"
|
|
bitfld.long 0x00 0x00 " GPIO0FIQ , GPIO External Interrupt" "dis,ena"
|
|
line.long 0x04 "INTRSR, Interrupt Raw Status Register"
|
|
bitfld.long 0x04 0x1b " BMINTR , Battery Monitor Interface" "dis,ena"
|
|
bitfld.long 0x04 0x15 " DMAINTR , Direct Memory Access" "dis,ena"
|
|
bitfld.long 0x04 0x14 " USBINTR , Universal Serial Bus" "dis,ena"
|
|
bitfld.long 0x04 0x13 " MMCINTR , MultiMediaCard" "dis,ena"
|
|
bitfld.long 0x04 0x12 " AACINTR , AC97 Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 0x11 " SCIINTR , Smart Card Interface" "dis,ena"
|
|
bitfld.long 0x04 0x0f " SSEOTI , Synchronous Serial Interface" "dis,ena"
|
|
bitfld.long 0x04 0x0e " LCDINTR , Liquid Crystal Display" "dis,ena"
|
|
bitfld.long 0x04 0x0b " TINTR , 64 Hz Tick" "dis,ena"
|
|
bitfld.long 0x04 0x0a " RTCMI , Real Time Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 0x03 " MCINT , Media Change" "dis,ena"
|
|
bitfld.long 0x04 0x02 " WEINT , Watchdog Timer" "dis,ena"
|
|
bitfld.long 0x04 0x01 " BLINT , Battery Low" "dis,ena"
|
|
bitfld.long 0x04 0x04 " CSINT , Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 0x10 " UART3 , UART3" "dis,ena"
|
|
bitfld.long 0x04 0x0d " UART2 , UART2" "dis,ena"
|
|
bitfld.long 0x04 0x0c " UART1 , UART1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 0x16 " TC3OI , Timer3" "dis,ena"
|
|
bitfld.long 0x04 0x09 " TC2OI , Timer2" "dis,ena"
|
|
bitfld.long 0x04 0x08 " TC1OI , Timer1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 0x1a " GPIO7 , Configurable External IRQ Interrupt on GPIO Port F7" "dis,ena"
|
|
bitfld.long 0x04 0x19 " GPIO6 , Configurable External IRQ Interrupt on GPIO Port F6" "dis,ena"
|
|
bitfld.long 0x04 0x18 " GPIO5 , Configurable External IRQ Interrupt on GPIO Port F5" "dis,ena"
|
|
bitfld.long 0x04 0x17 " GPIO4 , Configurable External IRQ Interrupt on GPIO Port F4" "dis,ena"
|
|
bitfld.long 0x04 0x07 " GPIO3 , Configurable External IRQ Interrupt on GPIO Port F3" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 0x07 " GPIO2 , Configurable External IRQ Interrupt on GPIO Port F2" "dis,ena"
|
|
bitfld.long 0x04 0x06 " GPIO1 , Configurable External IRQ Interrupt on GPIO Port F1" "dis,ena"
|
|
bitfld.long 0x04 0x00 " GPIO0FIQ , GPIO External Interrupt" "dis,ena"
|
|
line.long 0x08 "INTENS, Interrupt Enable Set Registers"
|
|
bitfld.long 0x08 0x1b " BMINTR , Battery Monitor Interface" "dis,ena"
|
|
bitfld.long 0x08 0x15 " DMAINTR , Direct Memory Access" "dis,ena"
|
|
bitfld.long 0x08 0x14 " USBINTR , Universal Serial Bus" "dis,ena"
|
|
bitfld.long 0x08 0x13 " MMCINTR , MultiMediaCard" "dis,ena"
|
|
bitfld.long 0x08 0x12 " AACINTR , AC97 Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 0x11 " SCIINTR , Smart Card Interface" "dis,ena"
|
|
bitfld.long 0x08 0x0f " SSEOTI , Synchronous Serial Interface" "dis,ena"
|
|
bitfld.long 0x08 0x0e " LCDINTR , Liquid Crystal Display" "dis,ena"
|
|
bitfld.long 0x08 0x0b " TINTR , 64 Hz Tick" "dis,ena"
|
|
bitfld.long 0x08 0x0a " RTCMI , Real Time Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 0x03 " MCINT , Media Change" "dis,ena"
|
|
bitfld.long 0x08 0x02 " WEINT , Watchdog Timer" "dis,ena"
|
|
bitfld.long 0x08 0x01 " BLINT , Battery Low" "dis,ena"
|
|
bitfld.long 0x08 0x04 " CSINT , Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 0x10 " UART3 , UART3" "dis,ena"
|
|
bitfld.long 0x08 0x0d " UART2 , UART2" "dis,ena"
|
|
bitfld.long 0x08 0x0c " UART1 , UART1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 0x16 " TC3OI , Timer3" "dis,ena"
|
|
bitfld.long 0x08 0x09 " TC2OI , Timer2" "dis,ena"
|
|
bitfld.long 0x08 0x08 " TC1OI , Timer1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 0x1a " GPIO7 , Configurable External IRQ Interrupt on GPIO Port F7" "dis,ena"
|
|
bitfld.long 0x08 0x19 " GPIO6 , Configurable External IRQ Interrupt on GPIO Port F6" "dis,ena"
|
|
bitfld.long 0x08 0x18 " GPIO5 , Configurable External IRQ Interrupt on GPIO Port F5" "dis,ena"
|
|
bitfld.long 0x08 0x17 " GPIO4 , Configurable External IRQ Interrupt on GPIO Port F4" "dis,ena"
|
|
bitfld.long 0x08 0x07 " GPIO3 , Configurable External IRQ Interrupt on GPIO Port F3" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 0x07 " GPIO2 , Configurable External IRQ Interrupt on GPIO Port F2" "dis,ena"
|
|
bitfld.long 0x08 0x06 " GPIO1 , Configurable External IRQ Interrupt on GPIO Port F1" "dis,ena"
|
|
bitfld.long 0x08 0x00 " GPIO0FIQ , GPIO External Interrupt" "dis,ena"
|
|
line.long 0x0c "INTENC, Interrupt Enable Clear Register"
|
|
bitfld.long 0x0c 0x1b " BMINTR , Battery Monitor Interface" "dis,ena"
|
|
bitfld.long 0x0c 0x15 " DMAINTR , Direct Memory Access" "dis,ena"
|
|
bitfld.long 0x0c 0x14 " USBINTR , Universal Serial Bus" "dis,ena"
|
|
bitfld.long 0x0c 0x13 " MMCINTR , MultiMediaCard" "dis,ena"
|
|
bitfld.long 0x0c 0x12 " AACINTR , AC97 Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 0x11 " SCIINTR , Smart Card Interface" "dis,ena"
|
|
bitfld.long 0x0c 0x0f " SSEOTI , Synchronous Serial Interface" "dis,ena"
|
|
bitfld.long 0x0c 0x0e " LCDINTR , Liquid Crystal Display" "dis,ena"
|
|
bitfld.long 0x0c 0x0b " TINTR , 64 Hz Tick" "dis,ena"
|
|
bitfld.long 0x0c 0x0a " RTCMI , Real Time Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 0x03 " MCINT , Media Change" "dis,ena"
|
|
bitfld.long 0x0c 0x02 " WEINT , Watchdog Timer" "dis,ena"
|
|
bitfld.long 0x0c 0x01 " BLINT , Battery Low" "dis,ena"
|
|
bitfld.long 0x0c 0x04 " CSINT , Audio Codec" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 0x10 " UART3 , UART3" "dis,ena"
|
|
bitfld.long 0x0c 0x0d " UART2 , UART2" "dis,ena"
|
|
bitfld.long 0x0c 0x0c " UART1 , UART1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 0x16 " TC3OI , Timer3" "dis,ena"
|
|
bitfld.long 0x0c 0x09 " TC2OI , Timer2" "dis,ena"
|
|
bitfld.long 0x0c 0x08 " TC1OI , Timer1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 0x1a " GPIO7 , Configurable External IRQ Interrupt on GPIO Port F7" "dis,ena"
|
|
bitfld.long 0x0c 0x19 " GPIO6 , Configurable External IRQ Interrupt on GPIO Port F6" "dis,ena"
|
|
bitfld.long 0x0c 0x18 " GPIO5 , Configurable External IRQ Interrupt on GPIO Port F5" "dis,ena"
|
|
bitfld.long 0x0c 0x17 " GPIO4 , Configurable External IRQ Interrupt on GPIO Port F4" "dis,ena"
|
|
bitfld.long 0x0c 0x07 " GPIO3 , Configurable External IRQ Interrupt on GPIO Port F3" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 0x07 " GPIO2 , Configurable External IRQ Interrupt on GPIO Port F2" "dis,ena"
|
|
bitfld.long 0x0c 0x06 " GPIO1 , Configurable External IRQ Interrupt on GPIO Port F1" "dis,ena"
|
|
bitfld.long 0x0c 0x00 " GPIO0FIQ , GPIO External Interrupt" "dis,ena"
|
|
TREE.END
|
|
TREE "Direct Memory Access (DMA) Controller"
|
|
group sd:0x80002800--0x8000283f "USB Rx Channel"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002840--0x8000287f "USB Tx Channel"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002880--0x800028bf "MMC Rx Channel"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x800028c0--0x800028ff "MMC Tx Channel"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002a00--0x80002a3f "AC97 Receive Channel"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002a40--0x80002a7f "AC97 Transmit Channel 0"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002a80--0x80002abf "AC97 Receive Channel 1"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002ac0--0x80002aff "AC97 Transmit Channel 1"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002b00--0x80002b3f "AC97 Receive Channel 2"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002b40--0x80002b7f "AC97 Transmit Channel 2"
|
|
line.long 0x00 "CONTROL, DMA Channel Control Register"
|
|
bitfld.long 0x00 0x06 " ICE ,Interrupt Control Enable" "dis,ena"
|
|
bitfld.long 0x00 0x05 " ABORT , Specifies the DMA channel state machine in NEXT state" "on,stall"
|
|
bitfld.long 0x00 0x04 " ENABLE , Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 0x03 " CHERRINT , Channel Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0x01 " NFBINT , New FIFO Buffer Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0x00 " CHERRINT , Stall Interrupt Enable" "dis,ena"
|
|
line.long 0x04 "INT, DMA Interrupt Register"
|
|
bitfld.long 0x04 0x03 " CHERRINT , Channel Error Interrupt " "none,err"
|
|
bitfld.long 0x04 0x01 " NFBINT , New FIFO Buffer Interrupt, new buffer required " "no,yes"
|
|
bitfld.long 0x04 0x00 " CHERRINT , Stall Interrupt, channel stalled or active" "stalled,active"
|
|
line.long 0x0c "STATUS, DMA Channel Status Register"
|
|
hexmask.long.byte 0x0c 0x07--0x0c 1. 1. " BYTES , Valid DMA Data Bytes"
|
|
bitfld.long 0x0c 0x06 " NEXTBUF ,Next Buffer (BASEx or MOUNTx register pair) for update" "MC0/B0, MC1/B1"
|
|
bitfld.long 0x0c 0x04--0x05 " CURRSTATE , Current Channel State" "idle,stall,on,next"
|
|
bitfld.long 0x0c 0x02 " CHERR , Channel Error" "no,yes"
|
|
bitfld.long 0x0c 0x01 " NFB , Next Free Buffer is available" "no,yes"
|
|
bitfld.long 0x0c 0x00 " STALL , The Channel is Stalled" "no,yes"
|
|
line.long 0x14 "REMAIN, DMA Channel Bytes Remaining Register"
|
|
line.long 0x20 "MAXCNT0, DMA Channel 0 Maximum Count Register"
|
|
line.long 0x24 "BASE0, DMA Channel 0 Transfer Base Address Register"
|
|
line.long 0x28 "CURRENT0, DMA Channel 0 Current Address Register"
|
|
line.long 0x30 "MAXCNT1, DMA Channel 1 Maximum Count Register"
|
|
line.long 0x34 "BASE1, DMA Channel 1 Transfer Base Address Register"
|
|
line.long 0x38 "CURRENT1, DMA Channel 1 Current Address Register"
|
|
group sd:0x80002bc0--0x80002bff "DMA Global Interrupt"
|
|
line.long 0x00 "GLOBINT, DMA Global Interrupt Register"
|
|
bitfld.long 0x00 0x09 " AC97TX2 ,AC97 Channel 2 Transmit Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x08 " AC97RX2 ,AC97 Channel 2 Receive Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x07 " AC97TX1 ,AC97 Channel 1 Transmit Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x06 " AC97RX1 ,AC97 Channel 1 Receive Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x05 " AC97TX0 ,AC97 Channel 0 Transmit Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x04 " AC97RX0 ,AC97 Channel 0 Receive Interrupt Asserted Flag" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 0x03 " MMCRX ,MMC Receive Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x02 " MMCTX ,MMC Transmit Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x01 " USBRX ,USB Reveive Interrupt Asserted Flag" "no,yes"
|
|
bitfld.long 0x00 0x00 " USBTX ,USB Transmit Interrupt Asserted Flag" "no,yes"
|
|
TREE.END
|
|
TREE "Color LCD Controller"
|
|
group sd:0x80003000--0x800033ff
|
|
line.long 0x00 "TIM0, Horizontal Axis Panel Control"
|
|
hexmask.long.byte 0x00 0x18--0x1f 1. 0. " HPB , Horizontal Back Porch"
|
|
hexmask.long.byte 0x00 0x10--0x17 1. 0. " HFP , Horizontal Front Porch"
|
|
hexmask.long.byte 0x00 0x08--0x0f 1. 0. " HSW , Horizontal Synchronization Pule Width"
|
|
hexmask.long.byte 0x00 0x00--0x07 1. 0. " PPL , Pixels-Per-Line"
|
|
line.long 0x04 "TIM1, Vertical Axis Panel Control"
|
|
hexmask.long.byte 0x04 0x18--0x1f 1. 0. " VBP , Vertical Back Porch"
|
|
hexmask.long.byte 0x04 0x10--0x17 1. 0. " VFP , Vertical Front Porch"
|
|
hexmask.long.byte 0x04 0x08--0x0f 1. 0. " VSW , Vertical Synchronization Pule Width"
|
|
hexmask.long.byte 0x04 0x00--0x07 1. 0. " LPL , Lines Per Panel"
|
|
line.long 0x08 "TIM2, LCD Timing 2 Register"
|
|
bitfld.long 0x08 0x1a " BCD , Bypass Pixel Clock Divider Flag" "no,yes"
|
|
hexmask.long.word 0x08 0x10--0x19 1. 0. " CPL , Clocks per Line"
|
|
bitfld.long 0x08 0x0e " IOE , Invert Output Enable" "high,low"
|
|
bitfld.long 0x08 0x0d " IPC , Invert Panel Clock" "rising,falling"
|
|
bitfld.long 0x08 0x0c " IHS , Invert Horizontal Synchronization" "low,high"
|
|
bitfld.long 0x08 0x0b " IVS , Invert Vertical Synchronization" "low,high"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0x06--0x0a 1. 0. " ACB , AC Bias Signal Frequency"
|
|
bitfld.long 0x08 0x05 " CSEL , Reference Clock Select" "HCLK,14.75MHz"
|
|
hexmask.long.byte 0x08 0x00--0x04 1. 0. " PCD , Panel Clock Divisor"
|
|
line.long 0x10 "UPBASE, Upper Panel Base Address Register"
|
|
line.long 0x14 "LPBASE, Lower Panel Frame Base Address"
|
|
line.long 0x18 "INTREN, Interrupt Enable Mask"
|
|
bitfld.long 0x18 0x04 " BUSEREN , AHB Master Bus Error Enable Flag" "dis,ena"
|
|
bitfld.long 0x18 0x03 " VCOMEM , Vertical Compare Interrupt Enable Flag" "dis,ena"
|
|
bitfld.long 0x18 0x02 " NBUEN , Next Base Update Interrupt Enable Flag" "dis,ena"
|
|
bitfld.long 0x18 0x01 " FUFLEN , FIFO Underflow Lower Panel Interrupt Enable Flag" "dis,ena"
|
|
bitfld.long 0x18 0x00 " FUFUEN , FIFO Underflow Upper Panel Interrupt Enable Flag" "dis,ena"
|
|
line.long 0x1c "CONTROL, LCD Panel Pixel Parameters"
|
|
bitfld.long 0x1c 0x10 " WATERM , LCD DMA FIFO Watermark Level " ">= 8,>= 4"
|
|
bitfld.long 0x1c 0x0c--0x0d " LCDVCOMP , LCD Vertical Compare, generates interrupt at start of " "vert syn,back porch,act video,front porch"
|
|
bitfld.long 0x1c 0x0b " LCDPWR , LCD Power Enable Flag" "dis,ena"
|
|
bitfld.long 0x1c 0x08 " BGR , RGB or BGR Format Selection Flag" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x1c 0x07 " LCDDUAL , Dual LCD Panel Select" "single,dual"
|
|
bitfld.long 0x1c 0x06 " LCDMONO8 , LCD Monochrome Interface Mode " "4,8"
|
|
bitfld.long 0x1c 0x05 " LCDTFT , LCD TFT Select" "STN,TFT"
|
|
bitfld.long 0x1c 0x04 " LCDBW , LCD Color/Monochrome Select" "color,mono"
|
|
bitfld.long 0x1c 0x01--0x03 " LCDBPP , LCD Bits-Per-Pixel" " 1, 2, 4, 8,16,24,?..."
|
|
bitfld.long 0x1c 0x00 " LCDEN , LCD Controller Enable Flag" "dis,ena"
|
|
line.long 0x20 "STATUS, Raw Interrupt Status, "
|
|
bitfld.long 0x20 0x04 " BUSER , AHB Master Bus Error Status Interrupt Flag" "no,yes"
|
|
bitfld.long 0x20 0x03 " VCOM , Vertical Compare Interrupt Flag" "no,yes"
|
|
bitfld.long 0x20 0x02 " NBU , LCD Next Address Base Update Interrupt Flag" "no,yes"
|
|
bitfld.long 0x20 0x01 " FUFL , FIFO Underflow Lower Panel Interrupt Flag" "no,yes"
|
|
bitfld.long 0x20 0x00 " FUFU , FIFO Underflow Upper Panel Interrupt Flag" "no,yes"
|
|
line.long 0x24 "INTRPT, Interrupt Register"
|
|
bitfld.long 0x24 0x04 " BERINTR , AHB Master Error Interrupt Status Bit" "dis,ena"
|
|
bitfld.long 0x24 0x03 " VCOMINTR , Vertical Compare Interrupt Status Bit" "dis,ena"
|
|
bitfld.long 0x24 0x02 " NBUINTR , LCD Next Base Address Update Interrupt Statis Bot" "dis,ena"
|
|
bitfld.long 0x24 0x01 " FUFLINTR , FIFO Lower Panel Underflow Interrupt Status Bit" "dis,ena"
|
|
bitfld.long 0x24 0x00 " FUFUINTR , FIFO Upper Panel Underflow Interrupt Status Bit" "dis,ena"
|
|
line.long 0x28 "UPCURR, LCD Upper Panel Current Address Value"
|
|
line.long 0x2c "LPCURR, LCD Lower Panel Current Address Value"
|
|
line.long 0x30 "OVERFL, LCD Overflow Register"
|
|
;Color palette not included, not useful
|
|
TREE.END
|
|
TREE "Timer"
|
|
group sd:0x80000c00--0x80000c8f
|
|
line.long 0x00 "LOAD1, Timer1 Load Register"
|
|
line.long 0x04 "VALUE1, Timer1 Value Register"
|
|
line.long 0x0c "EOI1, Timer1 End-of-Interrupt Register"
|
|
line.long 0x08 "CNTRL1, Timer1 Control Register"
|
|
bitfld.long 0x08 0x07 " ENABLE , Enable Timer" "dis,ena"
|
|
bitfld.long 0x08 0x06 " MODE , Operation Mode" "free,periodic"
|
|
bitfld.long 0x08 0x03 " CLKSEL , Clock Select in kHz" " 2,508ena"
|
|
line.long 0x20 "LOAD2, Timer2 Load Register"
|
|
line.long 0x24 "VALUE2, Timer2 Value Register"
|
|
line.long 0x2c "EOI2, Timer2 End-of-Interrupt Register"
|
|
line.long 0x28 "CNTRL2, Timer1 Control Register"
|
|
bitfld.long 0x28 0x07 " ENABLE , Enable Timer" "dis,ena"
|
|
bitfld.long 0x28 0x06 " MODE , Operation Mode" "free,periodic"
|
|
bitfld.long 0x28 0x03 " CLKSEL , Clock Select in kHz" " 2,508ena"
|
|
line.long 0x80 "LOAD3, Timer3 Load Register"
|
|
line.long 0x84 "VALUE3, Timer3 Value Register"
|
|
line.long 0x8c "EOI3, Timer3 End-of-Interrupt Register"
|
|
line.long 0x88 "CNTRL3, Timer1 Control Register"
|
|
bitfld.long 0x88 0x07 " ENABLE , Enable Timer" "dis,ena"
|
|
bitfld.long 0x88 0x06 " MODE , Operation Mode" "free,periodic"
|
|
line.long 0x40 "BZCON, Timer Buzzer Count Register"
|
|
bitfld.long 0x40 0x01 " BZMOD , Buzzer Mode" "Timer0,SW"
|
|
bitfld.long 0x40 0x00 " BZTOG , Buzzer Toggle" "low,high"
|
|
TREE.END
|
|
TREE "Watchdog Timer (WDT)"
|
|
group sd:0x80001400--0x8000140b
|
|
line.long 0x00 "CTL, Watchdog Control Register"
|
|
bitfld.long 0x00 0x04--0x07 " TOC , Timeout Code;" "16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0x03 " FRZ , Freeze Flag" " dis,ena"
|
|
bitfld.long 0x00 0x01--0x02 " IF , Interrupt First" "00,01,10,11"
|
|
bitfld.long 0x00 0x00 " EN , Enable WDT Bit" " dis,ena"
|
|
line.long 0x04 "RST, Watchdog Counter Register"
|
|
line.long 0x08 "STATUS, Watchdog Status Register"
|
|
bitfld.long 0x00 0x07 " FIQ , FIQ Interrupt Occured Flag" " yes,no"
|
|
bitfld.long 0x00 0x06 " RST , Reset Occured Flag" " yes,no"
|
|
bitfld.long 0x00 0x04--0x05 " IF , Interrupt First" "00,01,10,11"
|
|
TREE.END
|
|
TREE "Real Time Clock (RTC)"
|
|
group sd:0x80000d00--0x80000d17
|
|
line.long 0x00 "RTCDR ,RTC Data Register Value"
|
|
line.long 0x04 "RTCLR ,RTC Load Register"
|
|
line.long 0x08 "RTCMR ,RTC Match Register"
|
|
line.long 0x10 "RTCSTAT ,RTC Interrupt Status and Interrupt Clear Register"
|
|
bitfld.long 0x10 0x00 " RTCINTR , TRCINTR asserted?" "no,yes"
|
|
line.long 0x10 "RTCEOI ,RTC End of Interrupt"
|
|
line.long 0x14 "RTCCR ,RTC Control Register"
|
|
bitfld.long 0x14 0x00 " MIE , Match Interrupt Enable" "dis,ena"
|
|
TREE.END
|
|
TREE "Synchronous Serial Port (SSP)"
|
|
group sd:0x80000b00--0x80000b17
|
|
line.long 0x00 "CR0 ,Control Register 0"
|
|
hexmask.long.byte 0x00 0x08--0x0f 1 0 " SCR , Serial Clock Rate"
|
|
bitfld.long 0x00 0x07 " SSE , SSP Enable Flag" "dis,ena"
|
|
bitfld.long 0x00 0x04--0x05 " FRF , Frame Format" "SPI,TI,MICROWIRE,-"
|
|
bitfld.long 0x00 0x00--0x03 " DSS , Data Size Selection" "-,-,-,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "CR1 ,Control Register 1"
|
|
bitfld.long 0x04 0x07 " TXIIEN , Transmitter Idle Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x04 0x06 " FEN , FIFO Enable" "dis,ena"
|
|
bitfld.long 0x04 0x05 " RXOIEN , Receive Overrun Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x04 0x04 " SPH , SPI Phase " "toggle,remain"
|
|
textline " "
|
|
bitfld.long 0x04 0x03 " SPO , SPI Polarity" "0,1"
|
|
bitfld.long 0x04 0x02 " LBM , Loopback Mode Enable" "dis,ena"
|
|
bitfld.long 0x04 0x01 " TXSIEN , Transmit FIFO Service Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x04 0x00 " RXSIEN , Receive FIFO Service Interrupt Enable" "dis,ena"
|
|
line.long 0x08 "IIR ,Interrupt Identification Register"
|
|
bitfld.long 0x08 0x07 " TXII , Transmit idel Interrupt" "assert,deassert"
|
|
bitfld.long 0x08 0x06 " RXOI , Receive FIFO Overrun Interrupt" "assert,deassert"
|
|
bitfld.long 0x08 0x01 " TXSI , Transmit FIFO Service Request Interrupt" "assert,deassert"
|
|
bitfld.long 0x08 0x00 " RXSI , Receive FIFO Service Request Interrupt" "assert,deassert"
|
|
line.long 0x08 "ROEOI ,Receive Overrun End-of-Interrupt"
|
|
line.long 0x0c "DR , Data Register"
|
|
line.long 0x10 "CPR ,Clock Prescale Register"
|
|
line.long 0x14 "SR ,SSP Status Register"
|
|
bitfld.long 0x14 0x08 " RFF , Receive FIFO Full" "not full,full"
|
|
bitfld.long 0x14 0x07 " TFE , Transmit FIFO Empty" "not empty,empty"
|
|
bitfld.long 0x14 0x06 " RCR , Receive Overrun" "deass,ass"
|
|
bitfld.long 0x14 0x05 " RHF , Receive FIFO Half Full" "<3,>3"
|
|
bitfld.long 0x14 0x04 " THE , Transmit FIFO Half Empty" ">5,<4"
|
|
textline " "
|
|
bitfld.long 0x14 0x03 " BSY , Busy" "idle,busy"
|
|
bitfld.long 0x14 0x02 " RNE , Receive FIFO not empty" "empty,not empty"
|
|
bitfld.long 0x14 0x01 " TNF , Transmit FIFO not full" "full,not full"
|
|
TREE.END
|
|
TREE "Universal Asynchronous Receiver/Transmitter (UART)"
|
|
group sd:0x80000600--0x8000061f "UART 1"
|
|
line.long 0x00 "DATA , Data Register"
|
|
bitfld.long 0x00 0x0b "BE ,Break Error " "no,yes"
|
|
bitfld.long 0x00 0x0a " OE ,Overrun Error " "no,yes"
|
|
bitfld.long 0x00 0x09 " PE ,Parity Error" "no,yes"
|
|
bitfld.long 0x00 0x08 " FE ,Framing Error" "no,yes"
|
|
hexmask.long 0x00 0x00--0x07 1 0 " Data ,Data to be transmitted"
|
|
line.long 0x04 "FCON , FIFO Control Register"
|
|
bitfld.long 0x04 0x05--0x06 "WLEN , Word Length" "5,6,7,8"
|
|
bitfld.long 0x04 0x04 " FEN ,FIFO Enable" "dis,ena"
|
|
bitfld.long 0x04 0x03 " STP2 ,Stop 2" "1,2"
|
|
bitfld.long 0x04 0x02 " EPS ,Even Parity Set" "odd,even"
|
|
bitfld.long 0x04 0x01 " PEN ,Parity Enalbe ," "dis,ena"
|
|
bitfld.long 0x04 0x00 " BRK ,Break, Assert Break" "deass,ass"
|
|
line.long 0x08 "BRCON , Baud Rate Control Register"
|
|
line.long 0x0c "CON , Control Register"
|
|
bitfld.long 0x0c 0x07 "SIRBD ,Serial Infrared Blanking Disable" "ena,dis"
|
|
bitfld.long 0x0c 0x06 " LBE ,Loopback Enable" "dis,ena"
|
|
bitfld.long 0x0c 0x05 " MXP ,Modem Transfer Polarity" "low,high"
|
|
bitfld.long 0x0c 0x04 " TXP ,Transmit Polarity, UARTTXx polarity" "high,low"
|
|
textline " "
|
|
bitfld.long 0x0c 0x03 "RXP ,Receive Polarity" "high,low"
|
|
bitfld.long 0x0c 0x02 " SIRLP ,Serial Infrared Low Power" "dis,ena"
|
|
bitfld.long 0x0c 0x01 " SIRD ,Serial Infrared Disable" "ena,dis"
|
|
bitfld.long 0x0c 0x00 " UARTEN ,UART Enable" "dis,ena"
|
|
line.long 0x10 "STATUS ,Status Register"
|
|
bitfld.long 0x10 0x07 "TXFE ,Transmit FIFO Empty" "not empty,empty"
|
|
bitfld.long 0x10 0x06 " RXFF ,Receive FIFO Full" "not full,full"
|
|
bitfld.long 0x10 0x05 " TXFF ,Transmit FIFO Full" "not full,full"
|
|
bitfld.long 0x10 0x04 " RXFE ,Receive FIFO Empty" "not empty,empty"
|
|
textline " "
|
|
bitfld.long 0x10 0x03 "BUSY ,Busy" "yes,no"
|
|
bitfld.long 0x10 0x02--0x02 " DCD ,Data Carrier Detect" "0,1"
|
|
bitfld.long 0x10 0x01--0x01 " DSR ,Data Set Ready" "0,1"
|
|
bitfld.long 0x10 0x00--0x00 " CTS ,Data Clear to Send" "0,1"
|
|
line.long 0x14 "RAWISR ,Raw Interrupt Status Register"
|
|
bitfld.long 0x14 0x03 "RTI ,Receive Timeout Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x02 " MI ,Modem Status Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x01 " TI ,Transmit Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x00 " RI ,Receive Interrupt" "deass,ass"
|
|
line.long 0x18 "INTEN ,Interrupt Enable Register"
|
|
bitfld.long 0x18 0x03 "RTI ,Receive Timeout Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x02 " MI ,Modem Status Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x01 " TI ,Transmit Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x00 " RI ,Reveive Interrupt" "dis,ena"
|
|
line.long 0x1c "ISR ,Interrupt Status Register"
|
|
bitfld.long 0x1c 0x03 "RTI ,Receive Timeout Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x02 " MI ,Modem Status Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x01 " TI ,Transmit Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x00 " RI ,Reveive Interrupt" "dis,ena"
|
|
group sd:0x80000700--0x8000071f "UART 2"
|
|
line.long 0x00 "DATA , Data Register"
|
|
bitfld.long 0x00 0x0b "BE ,Break Error " "no,yes"
|
|
bitfld.long 0x00 0x0a " OE ,Overrun Error " "no,yes"
|
|
bitfld.long 0x00 0x09 " PE ,Parity Error" "no,yes"
|
|
bitfld.long 0x00 0x08 " FE ,Framing Error" "no,yes"
|
|
hexmask.long 0x00 0x00--0x07 1 0 " Data ,Data to be transmitted"
|
|
line.long 0x04 "FCON , FIFO Control Register"
|
|
bitfld.long 0x04 0x05--0x06 "WLEN , Word Length" "5,6,7,8"
|
|
bitfld.long 0x04 0x04 " FEN ,FIFO Enable" "dis,ena"
|
|
bitfld.long 0x04 0x03 " STP2 ,Stop 2" "1,2"
|
|
bitfld.long 0x04 0x02 " EPS ,Even Parity Set" "odd,even"
|
|
bitfld.long 0x04 0x01 " PEN ,Parity Enalbe ," "dis,ena"
|
|
bitfld.long 0x04 0x00 " BRK ,Break, Assert Break" "deass,ass"
|
|
line.long 0x08 "BRCON , Baud Rate Control Register"
|
|
line.long 0x0c "CON , Control Register"
|
|
bitfld.long 0x0c 0x07 "SIRBD ,Serial Infrared Blanking Disable" "ena,dis"
|
|
bitfld.long 0x0c 0x06 " LBE ,Loopback Enable" "dis,ena"
|
|
bitfld.long 0x0c 0x05 " MXP ,Modem Transfer Polarity" "low,high"
|
|
bitfld.long 0x0c 0x04 " TXP ,Transmit Polarity, UARTTXx polarity" "high,low"
|
|
textline " "
|
|
bitfld.long 0x0c 0x03 "RXP ,Receive Polarity" "high,low"
|
|
bitfld.long 0x0c 0x02 " SIRLP ,Serial Infrared Low Power" "dis,ena"
|
|
bitfld.long 0x0c 0x01 " SIRD ,Serial Infrared Disable" "ena,dis"
|
|
bitfld.long 0x0c 0x00 " UARTEN ,UART Enable" "dis,ena"
|
|
line.long 0x10 "STATUS ,Status Register"
|
|
bitfld.long 0x10 0x07 "TXFE ,Transmit FIFO Empty" "not empty,empty"
|
|
bitfld.long 0x10 0x06 " RXFF ,Receive FIFO Full" "not full,full"
|
|
bitfld.long 0x10 0x05 " TXFF ,Transmit FIFO Full" "not full,full"
|
|
bitfld.long 0x10 0x04 " RXFE ,Receive FIFO Empty" "not empty,empty"
|
|
textline " "
|
|
bitfld.long 0x10 0x03 "BUSY ,Busy" "yes,no"
|
|
bitfld.long 0x10 0x02--0x02 " DCD ,Data Carrier Detect" "0,1"
|
|
bitfld.long 0x10 0x01--0x01 " DSR ,Data Set Ready" "0,1"
|
|
bitfld.long 0x10 0x00--0x00 " CTS ,Data Clear to Send" "0,1"
|
|
line.long 0x14 "RAWISR ,Raw Interrupt Status Register"
|
|
bitfld.long 0x14 0x03 "RTI ,Receive Timeout Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x02 " MI ,Modem Status Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x01 " TI ,Transmit Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x00 " RI ,Receive Interrupt" "deass,ass"
|
|
line.long 0x18 "INTEN ,Interrupt Enable Register"
|
|
bitfld.long 0x18 0x03 "RTI ,Receive Timeout Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x02 " MI ,Modem Status Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x01 " TI ,Transmit Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x00 " RI ,Reveive Interrupt" "dis,ena"
|
|
line.long 0x1c "ISR ,Interrupt Status Register"
|
|
bitfld.long 0x1c 0x03 "RTI ,Receive Timeout Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x02 " MI ,Modem Status Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x01 " TI ,Transmit Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x00 " RI ,Reveive Interrupt" "dis,ena"
|
|
group sd:0x80000800--0x8000081f "UART 3"
|
|
line.long 0x00 "DATA , Data Register"
|
|
bitfld.long 0x00 0x0b "BE ,Break Error " "no,yes"
|
|
bitfld.long 0x00 0x0a " OE ,Overrun Error " "no,yes"
|
|
bitfld.long 0x00 0x09 " PE ,Parity Error" "no,yes"
|
|
bitfld.long 0x00 0x08 " FE ,Framing Error" "no,yes"
|
|
hexmask.long 0x00 0x00--0x07 1 0 " Data ,Data to be transmitted"
|
|
line.long 0x04 "FCON , FIFO Control Register"
|
|
bitfld.long 0x04 0x05--0x06 "WLEN , Word Length" "5,6,7,8"
|
|
bitfld.long 0x04 0x04 " FEN ,FIFO Enable" "dis,ena"
|
|
bitfld.long 0x04 0x03 " STP2 ,Stop 2" "1,2"
|
|
bitfld.long 0x04 0x02 " EPS ,Even Parity Set" "odd,even"
|
|
bitfld.long 0x04 0x01 " PEN ,Parity Enalbe ," "dis,ena"
|
|
bitfld.long 0x04 0x00 " BRK ,Break, Assert Break" "deass,ass"
|
|
line.long 0x08 "BRCON , Baud Rate Control Register"
|
|
line.long 0x0c "CON , Control Register"
|
|
bitfld.long 0x0c 0x07 "SIRBD ,Serial Infrared Blanking Disable" "ena,dis"
|
|
bitfld.long 0x0c 0x06 " LBE ,Loopback Enable" "dis,ena"
|
|
bitfld.long 0x0c 0x05 " MXP ,Modem Transfer Polarity" "low,high"
|
|
bitfld.long 0x0c 0x04 " TXP ,Transmit Polarity, UARTTXx polarity" "high,low"
|
|
textline " "
|
|
bitfld.long 0x0c 0x03 "RXP ,Receive Polarity" "high,low"
|
|
bitfld.long 0x0c 0x02 " SIRLP ,Serial Infrared Low Power" "dis,ena"
|
|
bitfld.long 0x0c 0x01 " SIRD ,Serial Infrared Disable" "ena,dis"
|
|
bitfld.long 0x0c 0x00 " UARTEN ,UART Enable" "dis,ena"
|
|
line.long 0x10 "STATUS ,Status Register"
|
|
bitfld.long 0x10 0x07 "TXFE ,Transmit FIFO Empty" "not empty,empty"
|
|
bitfld.long 0x10 0x06 " RXFF ,Receive FIFO Full" "not full,full"
|
|
bitfld.long 0x10 0x05 " TXFF ,Transmit FIFO Full" "not full,full"
|
|
bitfld.long 0x10 0x04 " RXFE ,Receive FIFO Empty" "not empty,empty"
|
|
textline " "
|
|
bitfld.long 0x10 0x03 "BUSY ,Busy" "yes,no"
|
|
bitfld.long 0x10 0x02--0x02 " DCD ,Data Carrier Detect" "0,1"
|
|
bitfld.long 0x10 0x01--0x01 " DSR ,Data Set Ready" "0,1"
|
|
bitfld.long 0x10 0x00--0x00 " CTS ,Data Clear to Send" "0,1"
|
|
line.long 0x14 "RAWISR ,Raw Interrupt Status Register"
|
|
bitfld.long 0x14 0x03 "RTI ,Receive Timeout Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x02 " MI ,Modem Status Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x01 " TI ,Transmit Interrupt" "deass,ass"
|
|
bitfld.long 0x14 0x00 " RI ,Receive Interrupt" "deass,ass"
|
|
line.long 0x18 "INTEN ,Interrupt Enable Register"
|
|
bitfld.long 0x18 0x03 "RTI ,Receive Timeout Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x02 " MI ,Modem Status Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x01 " TI ,Transmit Interrupt" "dis,ena"
|
|
bitfld.long 0x18 0x00 " RI ,Reveive Interrupt" "dis,ena"
|
|
line.long 0x1c "ISR ,Interrupt Status Register"
|
|
bitfld.long 0x1c 0x03 "RTI ,Receive Timeout Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x02 " MI ,Modem Status Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x01 " TI ,Transmit Interrupt" "dis,ena"
|
|
bitfld.long 0x1c 0x00 " RI ,Reveive Interrupt" "dis,ena"
|
|
TREE.END
|
|
TREE "GPIO and External Interrupts"
|
|
group sd:0x80000E00--0x80000E87
|
|
line.long 0x00 "PAD , GPIO Data Register for Port A"
|
|
bitfld.long 0x00 0x07 "PA7 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x06 " PA6 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x05 " PA5 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x04 " PA4 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x03 " PA3 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x02 " PA2 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x01 " PA1 ,Data Bit for Port A" "0,1"
|
|
bitfld.long 0x00 0x00 " PA0 ,Data Bit for Port A" "0,1"
|
|
line.long 0x68 "PAPD , GPIO Pin Data Register for Port A"
|
|
bitfld.long 0x68 0x07 "PA7 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x06 " PA6 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x05 " PA5 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x04 " PA4 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x03 " PA3 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x02 " PA2 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x01 " PA1 ,Pin Data Bit for Port A" "0,1"
|
|
bitfld.long 0x68 0x00 " PA0 ,Pin Data Bit for Port A" "0,1"
|
|
line.long 0x10 "PADD , GPIO Data Direction Register for Port A"
|
|
bitfld.long 0x10 0x07 "PA7D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x06 " PA6D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x05 " PA5D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x04 " PA4D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x03 " PA3D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x02 " PA2D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x01 " PA1D ,Pin Data Direction Bit for Port A" "0,1"
|
|
bitfld.long 0x10 0x00 " PA0D ,Pin Data Direction Bit for Port A" "0,1"
|
|
line.long 0x04 "PBD , GPIO Data Register for Port B"
|
|
bitfld.long 0x04 0x07 "PB7 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x06 " PB6 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x05 " PB5 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x04 " PB4 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x03 " PB3 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x02 " PB2 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x01 " PB1 ,Data Bit for Port B" "0,1"
|
|
bitfld.long 0x04 0x00 " PB0 ,Data Bit for Port B" "0,1"
|
|
line.long 0x6c "PBPD , GPIO Pin Data Register for Port B"
|
|
bitfld.long 0x6c 0x07 "PB7 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x06 " PB6 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x05 " PB5 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x04 " PB4 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x03 " PB3 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x02 " PB2 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x01 " PB1 ,Pin Data Bit for Port B" "0,1"
|
|
bitfld.long 0x6c 0x00 " PB0 ,Pin Data Bit for Port B" "0,1"
|
|
line.long 0x14 "PBDD , GPIO Data Direction Register for Port B"
|
|
bitfld.long 0x14 0x07 "PB7D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x06 " PB6D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x05 " PB5D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x04 " PB4D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x03 " PB3D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x02 " PB2D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x01 " PB1D ,Pin Data Direction Bit for Port B" "0,1"
|
|
bitfld.long 0x14 0x00 " PB0D ,Pin Data Direction Bit for Port B" "0,1"
|
|
line.long 0x08 "PCD , GPIO Data Register for Port C"
|
|
bitfld.long 0x08 0x07 "PC7 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x06 " PC6 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x05 " PC5 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x04 " PC4 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x03 " PC3 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x02 " PC2 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x01 " PC1 ,Data Bit for Port C" "0,1"
|
|
bitfld.long 0x08 0x00 " PC0 ,Data Bit for Port C" "0,1"
|
|
line.long 0x70 "PCPD , GPIO Pin Data Register for Port C"
|
|
bitfld.long 0x70 0x07 "PC7 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x06 " PC6 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x05 " PC5 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x04 " PC4 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x03 " PC3 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x02 " PC2 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x01 " PC1 ,Pin Data Bit for Port C" "0,1"
|
|
bitfld.long 0x70 0x00 " PC0 ,Pin Data Bit for Port C" "0,1"
|
|
line.long 0x18 "PCDD , GPIO Data Direction Register for Port C"
|
|
bitfld.long 0x18 0x07 "PC7D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x06 " PC6D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x05 " PC5D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x04 " PC4D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x03 " PC3D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x02 " PC2D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x01 " PC1D ,Pin Data Direction Bit for Port C" "0,1"
|
|
bitfld.long 0x18 0x00 " PC0D ,Pin Data Direction Bit for Port C" "0,1"
|
|
line.long 0x0c "PDD , GPIO Data Register for Port D"
|
|
bitfld.long 0x0c 0x07 "PD7 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x06 " PD6 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x05 " PD5 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x04 " PD4 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x03 " PD3 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x02 " PD2 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x01 " PD1 ,Data Bit for Port D" "0,1"
|
|
bitfld.long 0x0c 0x00 " PD0 ,Data Bit for Port D" "0,1"
|
|
line.long 0x74 "PDPD , GPIO Pin Data Register for Port D"
|
|
bitfld.long 0x74 0x07 "PD7 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x06 " PD6 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x05 " PD5 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x04 " PD4 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x03 " PD3 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x02 " PD2 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x01 " PD1 ,Pin Data Bit for Port D" "0,1"
|
|
bitfld.long 0x74 0x00 " PD0 ,Pin Data Bit for Port D" "0,1"
|
|
line.long 0x1c "PDDD , GPIO Data Direction Register for Port D"
|
|
bitfld.long 0x1c 0x07 "PD7D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x06 " PD6D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x05 " PD5D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x04 " PD4D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x03 " PD3D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x02 " PD2D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x01 " PD1D ,Pin Data Direction Bit for Port D" "0,1"
|
|
bitfld.long 0x1c 0x00 " PD0D ,Pin Data Direction Bit for Port D" "0,1"
|
|
line.long 0x20 "PED , GPIO Data Register for Port E"
|
|
bitfld.long 0x20 0x03 "PE3 ,Data Bit for Port E" "0,1"
|
|
bitfld.long 0x20 0x02 " PE2 ,Data Bit for Port E" "0,1"
|
|
bitfld.long 0x20 0x01 " PE1 ,Data Bit for Port E" "0,1"
|
|
bitfld.long 0x20 0x00 " PE0 ,Data Bit for Port E" "0,1"
|
|
line.long 0x78 "PEPD , GPIO Pin Data Register for Port E"
|
|
bitfld.long 0x78 0x03 "PE3 ,Pin Data Bit for Port E" "0,1"
|
|
bitfld.long 0x78 0x02 " PE2 ,Pin Data Bit for Port E" "0,1"
|
|
bitfld.long 0x78 0x01 " PE1 ,Pin Data Bit for Port E" "0,1"
|
|
bitfld.long 0x78 0x00 " PE0 ,Pin Data Bit for Port E" "0,1"
|
|
line.long 0x24 "PEDD , GPIO Data Direction Register for Port E"
|
|
bitfld.long 0x24 0x03 "PE3 ,Data Bit for Port E" "0,1"
|
|
bitfld.long 0x24 0x02 " PE2 ,Data Bit for Port E" "0,1"
|
|
bitfld.long 0x24 0x01 " PE1 ,Data Bit for Port E" "0,1"
|
|
bitfld.long 0x24 0x00 " PE0 ,Data Bit for Port E" "0,1"
|
|
line.long 0x30 "PFD , GPIO Data Register for Port F"
|
|
bitfld.long 0x30 0x07 "PF7 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x06 " PF6 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x05 " PF5 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x04 " PF4 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x03 " PF3 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x02 " PF2 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x01 " PF1 ,Data Bit for Port F" "0,1"
|
|
bitfld.long 0x30 0x00 " PF0 ,Data Bit for Port F" "0,1"
|
|
line.long 0x7c "PFPD , GPIO Pin Data Register for Port F"
|
|
bitfld.long 0x7c 0x07 "PF7 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x06 " PF6 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x05 " PF5 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x04 " PF4 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x03 " PF3 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x02 " PF2 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x01 " PF1 ,Pin Data Bit for Port F" "0,1"
|
|
bitfld.long 0x7c 0x00 " PF0 ,Pin Data Bit for Port F" "0,1"
|
|
line.long 0x34 "PFDD , GPIO Data Direction Register for Port F"
|
|
bitfld.long 0x34 0x07 "PF7D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x06 " PF6D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x05 " PF5D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x04 " PF4D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x03 " PF3D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x02 " PF2D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x01 " PF1D ,Pin Data Direction Bit for Port F" "0,1"
|
|
bitfld.long 0x34 0x00 " PF0D ,Pin Data Direction Bit for Port F" "0,1"
|
|
line.long 0x38 "PGD , GPIO Data Register for Port G"
|
|
bitfld.long 0x38 0x07 "PG7 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x06 " PG6 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x05 " PG5 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x04 " PG4 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x03 " PG3 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x02 " PG2 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x01 " PG1 ,Data Bit for Port G" "0,1"
|
|
bitfld.long 0x38 0x00 " PG0 ,Data Bit for Port G" "0,1"
|
|
line.long 0x80 "PGPD , GPIO Pin Data Register for Port G"
|
|
bitfld.long 0x80 0x07 "PG7 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x06 " PG6 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x05 " PG5 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x04 " PG4 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x03 " PG3 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x02 " PG2 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x01 " PG1 ,Pin Data Bit for Port G" "0,1"
|
|
bitfld.long 0x80 0x00 " PG0 ,Pin Data Bit for Port G" "0,1"
|
|
line.long 0x3c "PGDD , GPIO Data Direction Register for Port G"
|
|
bitfld.long 0x3c 0x07 "PG7D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x06 " PG6D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x05 " PG5D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x04 " PG4D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x03 " PG3D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x02 " PG2D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x01 " PG1D ,Pin Data Direction Bit for Port G" "0,1"
|
|
bitfld.long 0x3c 0x00 " PG0D ,Pin Data Direction Bit for Port G" "0,1"
|
|
line.long 0x40 "PHD , GPIO Data Register for Port H"
|
|
bitfld.long 0x40 0x07 "PH7 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x06 " PH6 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x05 " PH5 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x04 " PH4 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x03 " PH3 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x02 " PH2 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x01 " PH1 ,Data Bit for Port H" "0,1"
|
|
bitfld.long 0x40 0x00 " PH0 ,Data Bit for Port H" "0,1"
|
|
line.long 0x84 "PHPD , GPIO Pin Data Register for Port H"
|
|
bitfld.long 0x84 0x07 "PH7 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x06 " PH6 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x05 " PH5 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x04 " PH4 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x03 " PH3 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x02 " PH2 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x01 " PH1 ,Pin Data Bit for Port H" "0,1"
|
|
bitfld.long 0x84 0x00 " PH0 ,Pin Data Bit for Port H" "0,1"
|
|
line.long 0x44 "PHDD , GPIO Data Direction Register for Port H"
|
|
bitfld.long 0x44 0x07 "PH7D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x06 " PH6D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x05 " PH5D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x04 " PH4D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x03 " PH3D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x02 " PH2D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x01 " PH1D ,Pin Data Direction Bit for Port H" "0,1"
|
|
bitfld.long 0x44 0x00 " PH0D ,Pin Data Direction Bit for Port H" "0,1"
|
|
line.long 0x28 "KBDCTL , GPIO Keyboard Control Register"
|
|
bitfld.long 0x28 0x00--0x03 "CSTATE , Column State" "0,1,2,3,4,5,6,7,8,9,10,11,12,12,14,15"
|
|
line.long 0x2c "PINMUX , GPIO Pin Multiplexing Register"
|
|
bitfld.long 0x2c 0x05 "CLK0EN , Clock 0 Enable " "CS7,SCKE0"
|
|
bitfld.long 0x2c 0x04 " CLK1_EN , Clock 1 and 2 Enable " "CS6,SCKE1_2"
|
|
bitfld.long 0x2c 0x03 " UART3CON , UART3 Control" "0,1"
|
|
bitfld.long 0x2c 0x02 " CODECON , Codec Control" "0,1"
|
|
bitfld.long 0x2c 0x01 " PDOCON , PD Output Control" "0,1"
|
|
bitfld.long 0x2c 0x00 " PEOCON , Port E Output Control" "0,1"
|
|
line.long 0x4c "INTTYP1 , Interrupt Type 1 Register"
|
|
bitfld.long 0x4c 0x07 "F7 , Port F7 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x06 " F6 , Port F6 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x05 " F5 , Port F5 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x04 " F4 , Port F4 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x03 " F3 , Port F3 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x02 " F2 , Port F2 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x01 " F1 , Port F1 Edge or Level Trigger Control" "level,sens"
|
|
bitfld.long 0x4c 0x00 " F0 , Port F0 Edge or Level Trigger Control" "level,sens"
|
|
line.long 0x50 "INTTYP2 , Interrupt Type 1 Register"
|
|
bitfld.long 0x50 0x07 "F7 , Port F7 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x06 " F6 , Port F6 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x05 " F5 , Port F5 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x04 " F4 , Port F4 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x03 " F3 , Port F3 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x02 " F2 , Port F2 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x01 " F1 , Port F1 Trigger Type Control" "ris ,fal"
|
|
bitfld.long 0x50 0x00 " F0 , Port F0 Trigger Type Control" "ris ,fal"
|
|
line.long 0x54 "GPIOFOI , GPIO Port F End-of-Interrupt Register"
|
|
bitfld.long 0x54 0x07 "F7 , PF7 Interrupt Handling" "keep ,deass"
|
|
bitfld.long 0x54 0x06 " F6 , PF6 Interrupt Handling" "keep ,deass"
|
|
bitfld.long 0x54 0x05 " F5 , PF5 Interrupt Handling" "keep ,deass"
|
|
bitfld.long 0x54 0x04 " F4 , PF4 Interrupt Handling" "keep ,deass"
|
|
bitfld.long 0x54 0x03 " F3 , PF3 Interrupt Handling" "keep ,deass"
|
|
bitfld.long 0x54 0x02 " F2 , PF2 Interrupt Handling" "keep ,deass"
|
|
bitfld.long 0x54 0x01 " F1 , PF1 Interrupt Handling" "keep ,deass"
|
|
line.long 0x58 "GPIOINE, GPIO Port F End-of-Interrupt Register"
|
|
bitfld.long 0x58 0x07 "F7 , PF7 Disable/Configure External Interrupt" "dis ,conf"
|
|
bitfld.long 0x58 0x06 " F6 , PF6 Disable/Configure External Interrupt" "dis ,conf"
|
|
bitfld.long 0x58 0x05 " F5 , PF5 Disable/Configure External Interrupt" "dis ,conf"
|
|
bitfld.long 0x58 0x04 " F4 , PF4 Disable/Configure External Interrupt" "dis ,conf"
|
|
bitfld.long 0x58 0x03 " F3 , PF3 Disable/Configure External Interrupt" "dis ,conf"
|
|
bitfld.long 0x58 0x02 " F2 , PF2 Disable/Configure External Interrupt" "dis ,conf"
|
|
bitfld.long 0x58 0x01 " F1 , PF1 Disable/Configure External Interrupt" "dis ,conf"
|
|
line.long 0x5c "INTSTAT, GPIO Port F Interrupt Status Register"
|
|
bitfld.long 0x5c 0x07 "F7 , PF7 Reports Status of PF7 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x06 " F6 , PF6 Reports Status of PF6 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x05 " F5 , PF5 Reports Status of PF5 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x04 " F4 , PF4 Reports Status of PF4 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x03 " F3 , PF3 Reports Status of PF3 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x02 " F2 , PF2 Reports Status of PF2 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x01 " F1 , PF1 Reports Status of PF1 Interrupt" "dis ,ena"
|
|
bitfld.long 0x5c 0x00 " F0 , PF1 Reports Status of PF0 Interrupt" "dis ,ena"
|
|
line.long 0x60 "RINTST, GPIO Port F Raw Interrupt Status Register"
|
|
bitfld.long 0x60 0x07 "F7 , PF7 Reports Status of PF7 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x06 " F6 , PF6 Reports Status of PF6 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x05 " F5 , PF5 Reports Status of PF5 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x04 " F4 , PF4 Reports Status of PF4 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x03 " F3 , PF3 Reports Status of PF3 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x02 " F2 , PF2 Reports Status of PF2 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x01 " F1 , PF1 Reports Status of PF1 Interrupt" "dis ,ena"
|
|
bitfld.long 0x60 0x00 " F0 , PF1 Reports Status of PF0 Interrupt" "dis ,ena"
|
|
line.long 0x64 "GPIODB, GPIO Port F Debounce Register"
|
|
bitfld.long 0x64 0x07 "F7 , PF7 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x06 " F6 , PF6 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x05 " F5 , PF5 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x04 " F4 , PF4 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x03 " F3 , PF3 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x02 " F2 , PF2 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x01 " F1 , PF1 Pin Debounce Enable" "dis ,ena"
|
|
bitfld.long 0x64 0x00 " F0 , PF1 Pin Debounce Enable" "dis ,ena"
|
|
TREE.END
|
|
TREE "MultiMediaCard (MMC)"
|
|
group sd:0x80000100--0x8000014f
|
|
line.long 0x00 "STRTCLK ,MMC Start and Stop Clock Register"
|
|
bitfld.long 0x00 0x01 "STRTCLK , Start Clock" "-,start"
|
|
bitfld.long 0x00 0x00 " STOPCLK , Stop Clock" "-,stop"
|
|
line.long 0x04 "STRTCLK ,MMC Start and Stop Clock Register"
|
|
bitfld.long 0x04 0x13 "EMDCMD ,End Command Response" "exe,end"
|
|
bitfld.long 0x04 0x12 " PRGDONE , Program Done" "no,yes"
|
|
bitfld.long 0x04 0x11 " TRANSDO , Data Transfer Done" "no,yes"
|
|
bitfld.long 0x04 0x08 " CLKEN , Clock Enabled" "no,yes"
|
|
bitfld.long 0x04 0x07 " FIFOFUL , FIFO Full" "no,yes"
|
|
bitfld.long 0x04 0x06 " FIFOEMP , FIFO Empty" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x04 0x05 "CRCERR , CRC Error Occured" "no,yes"
|
|
bitfld.long 0x04 0x04 " SPIERR , SPI Read Error Token" "no,yes"
|
|
bitfld.long 0x04 0x03 " CRCRERR , CRC Read Error" "no,yes"
|
|
bitfld.long 0x04 0x02 " CRCWERR , CRC Write Error" "no,yes"
|
|
bitfld.long 0x04 0x01 " TIMEOUT , Timeout Response;Number of MMCCLK cycles is < or >than value in RES_TO" "<,>"
|
|
bitfld.long 0x04 0x00 " TIMEOUR , Timeout Read;Number of cycles between cmd and error is < or > than value in READ_TO" "<,>"
|
|
line.long 0x08 "CLKRATE ,MMC Clock Rate Register"
|
|
bitfld.long 0x08 0x00--0x02 "CLKRATE ,Clock Rate Divisor " "0,1/2,1/4,1/8,1/16,1/32,1/64,-"
|
|
line.long 0x0c "PREDIV ,MMC Clock Gating and Predivide Register"
|
|
bitfld.long 0x0c 0x05 "APBRDE , APB Read Enable" "APB,DMA"
|
|
bitfld.long 0x0c 0x04 " MMC_EN , Clock Rate Divisor Enable" "no,yes"
|
|
bitfld.long 0x0c 0x00--0x03 " PREDIV ,Predivide " "-,1,/2,/3,/4,/5,/6,/7,/8,?..."
|
|
line.long 0x10 "SPI,MMC SPI Register"
|
|
bitfld.long 0x10 0x03 "CSADDR , Chip Select Address" "0,1"
|
|
bitfld.long 0x10 0x02 " CRCON , Chip Select Enable" "dis,ena"
|
|
bitfld.long 0x10 0x01 " CSEN , Cyclic Redundancy Checking On" "dis,ena"
|
|
bitfld.long 0x10 0x00 " SPIEN , SPI Enable" "dis,ena"
|
|
line.long 0x14 "CMDCNTL ,MMC Command Control Register"
|
|
bitfld.long 0x14 0x06 "INIT , Initialization Sequence Enable" "dis,ena"
|
|
bitfld.long 0x14 0x05 " BUSY , Busy Signal expected after current command" "no,yes"
|
|
bitfld.long 0x14 0x04 " STREAM , Stream or Block Transfer Mode" "stream,block"
|
|
bitfld.long 0x14 0x03 " WRITE , Data Direction is a Read or a Write" "read,write"
|
|
bitfld.long 0x14 0x02 " DATAEN , Data Enable i.e. Command includes a Data Transfer" "no,yes"
|
|
bitfld.long 0x14 0x00--0x01 " RESP , Response Format" "no,R1,R2,R3"
|
|
line.long 0x18 "RESTO ,MMC Response Timeout Register"
|
|
hexmask.long.byte 0x18 0x00--0x07 1. 0. "RES_TO , Response Timeout"
|
|
line.long 0x1c "RESTO ,MMC Read Timeout Register"
|
|
hexmask.long.byte 0x1c 0x00--0x0f 1. 0. "READ_TO , Read Timeout"
|
|
line.long 0x20 "BLKLEN ,MMC Block Length Register"
|
|
hexmask.long.word 0x20 0x00--0x09 1. 0. "BLLEN , Block Length"
|
|
line.long 0x24 "NOB ,MMC Number Of Blocks Register"
|
|
hexmask.long.byte 0x24 0x00--0x0f 1. 0. "NOB , Number of Blocks"
|
|
line.long 0x28 "INTSTAT ,MMC Interrupt Status Register"
|
|
bitfld.long 0x28 0x04 "BCSTOP , Bus Clock Stopped" "no,yes"
|
|
bitfld.long 0x28 0x03 " BUFRDY , Buffer Ready" "no,yes"
|
|
bitfld.long 0x28 0x02 " ENDCMD , End Command" "no,yes"
|
|
bitfld.long 0x28 0x01 " PRGDONE , Program Done " "no,yes"
|
|
bitfld.long 0x28 0x00 " DTRDONE , Data Transfer Done" "no,yes"
|
|
line.long 0x2c "INTSTAT ,MMC Interrupt Status Register"
|
|
bitfld.long 0x2c 0x04 "BCSTOP , Bus Clock Stopped" "no,yes"
|
|
bitfld.long 0x2c 0x03 " BUFRDY , Buffer Ready" "no,yes"
|
|
bitfld.long 0x2c 0x02 " ENDCMD , End Command" "no,yes"
|
|
bitfld.long 0x2c 0x01 " PRGDONE , Program Done " "no,yes"
|
|
bitfld.long 0x2c 0x00 " DTRDONE , Data Transfer Done" "no,yes"
|
|
line.long 0x34 "INTMASK ,MMC Interrupt Mask Register"
|
|
bitfld.long 0x34 0x04 "BCSTOP , Bus Clock Stopped" "no,yes"
|
|
bitfld.long 0x34 0x03 " BUFRDY , Buffer Ready" "no,yes"
|
|
bitfld.long 0x34 0x02 " ENDCMD , End Command" "no,yes"
|
|
bitfld.long 0x34 0x01 " PRGDONE , Program Done " "no,yes"
|
|
bitfld.long 0x34 0x00 " DTRDONE , Data Transfer Done" "no,yes"
|
|
line.long 0x38 "CMD ,MMC Command Number Register"
|
|
hexmask.long.byte 0x38 0x00--0x05 1. 0. "CMDNUM , Command Number"
|
|
line.long 0x3C "ARG ,MMC Command Argument Register"
|
|
line.long 0x40 "RESFIFO ,MMC Response FIFO Register"
|
|
hexmask.long.byte 0x40 0x00--0x0f 1. 0. "RESP , Response FIFO"
|
|
line.long 0x48 "DATFIFO ,MMC Data FIFO Register"
|
|
hexmask.long.byte 0x48 0x00--0x0f 1. 0. "DATA , Data to be Transferred to the Data FIFO"
|
|
line.long 0x4c "BUFPFUL ,MMC Buffer Partially Full Register"
|
|
bitfld.long 0x4c 0x00 "BUFPFUL ,Parial FIFO Buffer Written Flag" "no,yes"
|
|
TREE.END
|
|
TREE "Universal Serial Bus (USB) Client"
|
|
group sd:0x8000044c--0x800004a7
|
|
line.long 0x00 "USBRES ,USB Reset Register"
|
|
bitfld.long 0x00 0x01 "APBRES , USB ABP Bus Reset Request" "no,yes"
|
|
bitfld.long 0x00 0x00 " IORES , USB I/O Reset Request" "no,yes"
|
|
group sd:0x80000200--0x8000025b
|
|
line.long 0x00 "FAR , USB Function Address Register"
|
|
bitfld.long 0x00 0x07 "ADDRUP , Address Update" "no,yes"
|
|
line.long 0x04 "PMR , USB Power Management Register"
|
|
bitfld.long 0x04 0x04 "USBENA , USB Enable Flag" "dis,ena"
|
|
bitfld.long 0x04 0x03 " USBRES , USB Reset is Asserted on the USB Bus" "no,yes"
|
|
bitfld.long 0x04 0x02 " UCRESM , UC Resume Flag" "no,yes"
|
|
bitfld.long 0x04 0x01 " SUSPEND , Suspend Mode" "no,yes"
|
|
bitfld.long 0x04 0x00 " SUSPENA , Suspend Enable Flag" "dis,ena"
|
|
line.long 0x08 "IIR , IN Interrupt Register"
|
|
bitfld.long 0x08 0x03 "EP3IN , End Point 3 IN Interrupt" " clr,pend"
|
|
bitfld.long 0x08 0x01 " EP1IN , End Point 1 IN Interrupt" " clr,pend"
|
|
bitfld.long 0x08 0x00 " EP0 , End Point 0 IN Interrupt" " clr,pend"
|
|
line.long 0x10 "OIR , OUT Interrupt Register"
|
|
bitfld.long 0x10 0x02 "EP2OUT , End Point 2 IN Interrupt" "clr,ready"
|
|
line.long 0x18 "UIR , USB Interrupt Register"
|
|
bitfld.long 0x18 0x02 "URINT , USB Reset Interrupt" "clr,set"
|
|
bitfld.long 0x18 0x01 " RESINT , Resume Interrupt" "clr,set"
|
|
bitfld.long 0x18 0x00 " SUSINT , Suspend Interrupt" "clr,set"
|
|
line.long 0x1c "IIE , IN Interrupt Enable Register"
|
|
bitfld.long 0x1c 0x03 "EP3INEN , End Point 3 IN Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1c 0x01 " EP1INEN , End Point 1 IN Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1c 0x00 " EP0INEN , End Point 0 IN Interrupt Enable" "dis,ena"
|
|
line.long 0x24 "OIE ,OUT Interrupt Enable Register"
|
|
bitfld.long 0x24 0x02 "EP2OUTE , End Point 2 OUT Interrupt Enable" "dis,ena"
|
|
line.long 0x2c "UIE , USB Interrupt Enable Register"
|
|
bitfld.long 0x2c 0x02 "URINT , USB Reset Interrupt" "dis,ena"
|
|
bitfld.long 0x2c 0x01 " RESINT , Resume Interrupt" "dis,ena"
|
|
bitfld.long 0x2c 0x00 " SUSINT , Suspend Interrupt" "dis,ena"
|
|
line.long 0x30 "FRAME1 , Frame Number Register 1"
|
|
line.long 0x34 "FRAME2 , Frame Number Register 2"
|
|
line.long 0x38 "INDEX , Index Register"
|
|
bitfld.long 0x38 0x00--0x01 "INDEX , End Point Index" "EP0,EP1,EP2,EP3"
|
|
line.long 0x40 "MAXP , Maximum Packet Size Register (IN)"
|
|
bitfld.long 0x40 0x00--0x03 "MAXP , Maximum Packet Size" "-,8,16,24,32,40,48,56,64,?..."
|
|
line.long 0x4c "MAXP , Maximum Packet Size Register (OUT)"
|
|
bitfld.long 0x4c 0x00--0x03 "MAXP , Maximum Packet Size" "-,8,16,24,32,40,48,56,64,?..."
|
|
line.long 0x44 "INCSR1 , IN Control and Status Register"
|
|
bitfld.long 0x44 0x06 "CLRTOG ,Clear Data Toggle " "clr,keep"
|
|
bitfld.long 0x44 0x05 " STSTALL , STALL Send Acknowledge" "norm,stall"
|
|
bitfld.long 0x44 0x04 " SDSTALL , Send STALL handshake to USB" "end,hand"
|
|
bitfld.long 0x44 0x03 " FIFOFL , FIFO Flush Request" "comp,req"
|
|
bitfld.long 0x44 0x01 " FIFONE , FIFO Not Empty, at least 1 packet in FIFO" "1,2"
|
|
bitfld.long 0x44 0x00 " INPKT , IN Packet Ready" "avbl,unsent"
|
|
line.long 0x48 "INCSR2 ,IN Control and Status Register"
|
|
bitfld.long 0x48 0x07 "AUTOSET , Auto Set IN_PKT_RDV Bit" "man,auto"
|
|
bitfld.long 0x48 0x04 " USBDMAE , USB DMA Enable" "DMA,direct"
|
|
line.long 0x50 "OUTCSR1 , OUT Control and Status Register"
|
|
bitfld.long 0x50 0x06 "CLRTOG ,Clear Data Toggle " "clr,keep"
|
|
bitfld.long 0x50 0x05 " STSTALL , STALL Send Acknowledge" "norm,stall"
|
|
bitfld.long 0x50 0x04 " SDSTALL , Send STALL handshake to USB" "end,hand"
|
|
bitfld.long 0x50 0x03 " FIFOFL , FIFO Flush Request" "comp,req"
|
|
bitfld.long 0x50 0x01 " FIFONE , FIFO Not Empty, at least 1 packet in FIFO" "1,2"
|
|
bitfld.long 0x50 0x00 " OUTPKT , OUT Packet Ready" "avbl,unsent"
|
|
line.long 0x54 "OUTCSR2 ,OUT Control and Status Register"
|
|
bitfld.long 0x54 0x07 "AUTOCLR , Auto Set IN_PKT_RDV Bit" "man,auto"
|
|
bitfld.long 0x54 0x04 " USBDMAE , USB DMA Enable" "DMA,direct"
|
|
line.long 0x58 "COUNT, Out FIFO Write Count Register"
|
|
TREE.END
|
|
TREE "AC97 Controller"
|
|
group sd:0x80000000--0x800000ab
|
|
line.long 0x00 "DR1 , Data Register 1"
|
|
line.long 0x20 "DR2 , Data Register 2"
|
|
line.long 0x40 "DR3 , Data Register 3"
|
|
line.long 0x60 "DR4 , Data Register 4"
|
|
line.long 0x04 "RXCR1 , Receive Control Register 1"
|
|
hexmask.long.byte 0x04 0x11--0x1c 1. 0. "TOC , Time Out Count"
|
|
bitfld.long 0x04 0x10 " FDIS , FIFO Disable" "ena,dis"
|
|
bitfld.long 0x04 0x0f " CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x04 0x0d--0x0e " RSIZE , Receive Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x04 0x0c "RX12 , FIFO Stores Slot 12 Data" "no,yes"
|
|
bitfld.long 0x04 0x0b " RX11 , FIFO Stores Slot 11 Data" "no,yes"
|
|
bitfld.long 0x04 0x0a " RX10 , FIFO Stores Slot 10 Data" "no,yes"
|
|
bitfld.long 0x04 0x09 " RX9 , FIFO Stores Slot 9 Data" "no,yes"
|
|
bitfld.long 0x04 0x08 " RX8 , FIFO Stores Slot 8 Data" "no,yes"
|
|
bitfld.long 0x04 0x07 " RX7 , FIFO Stores Slot 7 Data" "no,yes"
|
|
bitfld.long 0x04 0x06 " RX6 , FIFO Stores Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x04 0x05 "RX5 , FIFO Stores Slot 5 Data" "no,yes"
|
|
bitfld.long 0x04 0x04 " RX4 , FIFO Stores Slot 4 Data" "no,yes"
|
|
bitfld.long 0x04 0x03 " RX3 , FIFO Stores Slot 3 Data" "no,yes"
|
|
bitfld.long 0x04 0x02 " RX2 , FIFO Stores Slot 2 Data" "no,yes"
|
|
bitfld.long 0x04 0x01 " RX1 , FIFO Stores Slot 1 Data" "no,yes"
|
|
bitfld.long 0x04 0x00 " REN , Receive Enable" "dis,ena"
|
|
line.long 0x24 "RXCR2 , Receive Control Register 2"
|
|
hexmask.long.byte 0x24 0x11--0x1c 1. 0. "TOC , Time Out Count"
|
|
bitfld.long 0x24 0x10 " FDIS , FIFO Disable" "ena,dis"
|
|
bitfld.long 0x24 0x0f " CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x24 0x0d--0x0e " RSIZE , Receive Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x24 0x0c "RX12 , FIFO Stores Slot 12 Data" "no,yes"
|
|
bitfld.long 0x24 0x0b " RX11 , FIFO Stores Slot 11 Data" "no,yes"
|
|
bitfld.long 0x24 0x0a " RX10 , FIFO Stores Slot 10 Data" "no,yes"
|
|
bitfld.long 0x24 0x09 " RX9 , FIFO Stores Slot 9 Data" "no,yes"
|
|
bitfld.long 0x24 0x08 " RX8 , FIFO Stores Slot 8 Data" "no,yes"
|
|
bitfld.long 0x24 0x07 " RX7 , FIFO Stores Slot 7 Data" "no,yes"
|
|
bitfld.long 0x24 0x06 " RX6 , FIFO Stores Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x24 0x05 "RX5 , FIFO Stores Slot 5 Data" "no,yes"
|
|
bitfld.long 0x24 0x04 " RX4 , FIFO Stores Slot 4 Data" "no,yes"
|
|
bitfld.long 0x24 0x03 " RX3 , FIFO Stores Slot 3 Data" "no,yes"
|
|
bitfld.long 0x24 0x02 " RX2 , FIFO Stores Slot 2 Data" "no,yes"
|
|
bitfld.long 0x24 0x01 " RX1 , FIFO Stores Slot 1 Data" "no,yes"
|
|
bitfld.long 0x24 0x00 " REN , Receive Enable" "dis,ena"
|
|
line.long 0x44 "RXCR3 , Receive Control Register 3"
|
|
hexmask.long.byte 0x44 0x11--0x1c 1. 0. "TOC , Time Out Count"
|
|
bitfld.long 0x44 0x10 " FDIS , FIFO Disable" "ena,dis"
|
|
bitfld.long 0x44 0x0f " CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x44 0x0d--0x0e " RSIZE , Receive Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x44 0x0c "RX12 , FIFO Stores Slot 12 Data" "no,yes"
|
|
bitfld.long 0x44 0x0b " RX11 , FIFO Stores Slot 11 Data" "no,yes"
|
|
bitfld.long 0x44 0x0a " RX10 , FIFO Stores Slot 10 Data" "no,yes"
|
|
bitfld.long 0x44 0x09 " RX9 , FIFO Stores Slot 9 Data" "no,yes"
|
|
bitfld.long 0x44 0x08 " RX8 , FIFO Stores Slot 8 Data" "no,yes"
|
|
bitfld.long 0x44 0x07 " RX7 , FIFO Stores Slot 7 Data" "no,yes"
|
|
bitfld.long 0x44 0x06 " RX6 , FIFO Stores Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x44 0x05 "RX5 , FIFO Stores Slot 5 Data" "no,yes"
|
|
bitfld.long 0x44 0x04 " RX4 , FIFO Stores Slot 4 Data" "no,yes"
|
|
bitfld.long 0x44 0x03 " RX3 , FIFO Stores Slot 3 Data" "no,yes"
|
|
bitfld.long 0x44 0x02 " RX2 , FIFO Stores Slot 2 Data" "no,yes"
|
|
bitfld.long 0x44 0x01 " RX1 , FIFO Stores Slot 1 Data" "no,yes"
|
|
bitfld.long 0x44 0x00 " REN , Receive Enable" "dis,ena"
|
|
line.long 0x64 "RXCR4 , Receive Control Register 4"
|
|
hexmask.long.byte 0x64 0x11--0x1c 1. 0. "TOC , Time Out Count"
|
|
bitfld.long 0x64 0x10 " FDIS , FIFO Disable" "ena,dis"
|
|
bitfld.long 0x64 0x0f " CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x64 0x0d--0x0e " RSIZE , Receive Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x64 0x0c "RX12 , FIFO Stores Slot 12 Data" "no,yes"
|
|
bitfld.long 0x64 0x0b " RX11 , FIFO Stores Slot 11 Data" "no,yes"
|
|
bitfld.long 0x64 0x0a " RX10 , FIFO Stores Slot 10 Data" "no,yes"
|
|
bitfld.long 0x64 0x09 " RX9 , FIFO Stores Slot 9 Data" "no,yes"
|
|
bitfld.long 0x64 0x08 " RX8 , FIFO Stores Slot 8 Data" "no,yes"
|
|
bitfld.long 0x64 0x07 " RX7 , FIFO Stores Slot 7 Data" "no,yes"
|
|
bitfld.long 0x64 0x06 " RX6 , FIFO Stores Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x64 0x05 "RX5 , FIFO Stores Slot 5 Data" "no,yes"
|
|
bitfld.long 0x64 0x04 " RX4 , FIFO Stores Slot 4 Data" "no,yes"
|
|
bitfld.long 0x64 0x03 " RX3 , FIFO Stores Slot 3 Data" "no,yes"
|
|
bitfld.long 0x64 0x02 " RX2 , FIFO Stores Slot 2 Data" "no,yes"
|
|
bitfld.long 0x64 0x01 " RX1 , FIFO Stores Slot 1 Data" "no,yes"
|
|
bitfld.long 0x64 0x00 " REN , Receive Enable" "dis,ena"
|
|
line.long 0x08 "TXCR1 , Transmit Control Register 1"
|
|
bitfld.long 0x08 0x10 "FDIS , FIFO Disable" "ena,dis"
|
|
bitfld.long 0x08 0x0f " CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x08 0x0d--0x0e " TSIZE , Transmit Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x08 0x0c "TX12 , FIFO Transmits Slot 12 Data" "no,yes"
|
|
bitfld.long 0x08 0x0b " TX11 , FIFO Transmits Slot 11 Data" "no,yes"
|
|
bitfld.long 0x08 0x0a " TX10 , FIFO Transmits Slot 10 Data" "no,yes"
|
|
bitfld.long 0x08 0x09 " TX9 , FIFO Transmits Slot 9 Data" "no,yes"
|
|
bitfld.long 0x08 0x08 " TX8 , FIFO Transmits Slot 8 Data" "no,yes"
|
|
bitfld.long 0x08 0x07 " TX7 , FIFO Transmits Slot 7 Data" "no,yes"
|
|
bitfld.long 0x08 0x06 " TX6 , FIFO Transmits Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 0x05 "TX5 , FIFO Transmits Slot 5 Data" "no,yes"
|
|
bitfld.long 0x08 0x04 " TX4 , FIFO Transmits Slot 4 Data" "no,yes"
|
|
bitfld.long 0x08 0x03 " TX3 , FIFO Transmits Slot 3 Data" "no,yes"
|
|
bitfld.long 0x08 0x02 " TX2 , FIFO Transmits Slot 2 Data" "no,yes"
|
|
bitfld.long 0x08 0x01 " TX1 , FIFO Transmits Slot 1 Data" "no,yes"
|
|
bitfld.long 0x08 0x00 " REN , Transmit Enable" "dis,ena"
|
|
line.long 0x28 "TXCR2 , Transmit Control Register 2"
|
|
bitfld.long 0x28 0x0f "CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x28 0x0d--0x0e " TSIZE , Transmit Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x28 0x0c "TX12 , FIFO Transmits Slot 12 Data" "no,yes"
|
|
bitfld.long 0x28 0x0b " TX11 , FIFO Transmits Slot 11 Data" "no,yes"
|
|
bitfld.long 0x28 0x0a " TX10 , FIFO Transmits Slot 10 Data" "no,yes"
|
|
bitfld.long 0x28 0x09 " TX9 , FIFO Transmits Slot 9 Data" "no,yes"
|
|
bitfld.long 0x28 0x08 " TX8 , FIFO Transmits Slot 8 Data" "no,yes"
|
|
bitfld.long 0x28 0x07 " TX7 , FIFO Transmits Slot 7 Data" "no,yes"
|
|
bitfld.long 0x28 0x06 " TX6 , FIFO Transmits Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x28 0x05 "TX5 , FIFO Transmits Slot 5 Data" "no,yes"
|
|
bitfld.long 0x28 0x04 " TX4 , FIFO Transmits Slot 4 Data" "no,yes"
|
|
bitfld.long 0x28 0x03 " TX3 , FIFO Transmits Slot 3 Data" "no,yes"
|
|
bitfld.long 0x28 0x02 " TX2 , FIFO Transmits Slot 2 Data" "no,yes"
|
|
bitfld.long 0x28 0x01 " TX1 , FIFO Transmits Slot 1 Data" "no,yes"
|
|
bitfld.long 0x28 0x00 " REN , Transmit Enable" "dis,ena"
|
|
line.long 0x48 "TXCR3 , Transmit Control Register 3"
|
|
bitfld.long 0x48 0x0f "CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x48 0x0d--0x0e " TSIZE , Transmit Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x48 0x0c "TX12 , FIFO Transmits Slot 12 Data" "no,yes"
|
|
bitfld.long 0x48 0x0b " TX11 , FIFO Transmits Slot 11 Data" "no,yes"
|
|
bitfld.long 0x48 0x0a " TX10 , FIFO Transmits Slot 10 Data" "no,yes"
|
|
bitfld.long 0x48 0x09 " TX9 , FIFO Transmits Slot 9 Data" "no,yes"
|
|
bitfld.long 0x48 0x08 " TX8 , FIFO Transmits Slot 8 Data" "no,yes"
|
|
bitfld.long 0x48 0x07 " TX7 , FIFO Transmits Slot 7 Data" "no,yes"
|
|
bitfld.long 0x48 0x06 " TX6 , FIFO Transmits Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x48 0x05 "TX5 , FIFO Transmits Slot 5 Data" "no,yes"
|
|
bitfld.long 0x48 0x04 " TX4 , FIFO Transmits Slot 4 Data" "no,yes"
|
|
bitfld.long 0x48 0x03 " TX3 , FIFO Transmits Slot 3 Data" "no,yes"
|
|
bitfld.long 0x48 0x02 " TX2 , FIFO Transmits Slot 2 Data" "no,yes"
|
|
bitfld.long 0x48 0x01 " TX1 , FIFO Transmits Slot 1 Data" "no,yes"
|
|
bitfld.long 0x48 0x00 " REN , Transmit Enable" "dis,ena"
|
|
line.long 0x68 "TXCR4 , Transmit Control Register 4"
|
|
bitfld.long 0x68 0x0f "CM , Compact Mode" "dis,ena"
|
|
bitfld.long 0x68 0x0d--0x0e " TSIZE , Transmit Data Size" "16,18,20,12"
|
|
textline " "
|
|
bitfld.long 0x68 0x0c "TX12 , FIFO Transmits Slot 12 Data" "no,yes"
|
|
bitfld.long 0x68 0x0b " TX11 , FIFO Transmits Slot 11 Data" "no,yes"
|
|
bitfld.long 0x68 0x0a " TX10 , FIFO Transmits Slot 10 Data" "no,yes"
|
|
bitfld.long 0x68 0x09 " TX9 , FIFO Transmits Slot 9 Data" "no,yes"
|
|
bitfld.long 0x68 0x08 " TX8 , FIFO Transmits Slot 8 Data" "no,yes"
|
|
bitfld.long 0x68 0x07 " TX7 , FIFO Transmits Slot 7 Data" "no,yes"
|
|
bitfld.long 0x68 0x06 " TX6 , FIFO Transmits Slot 6 Data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x68 0x05 "TX5 , FIFO Transmits Slot 5 Data" "no,yes"
|
|
bitfld.long 0x68 0x04 " TX4 , FIFO Transmits Slot 4 Data" "no,yes"
|
|
bitfld.long 0x68 0x03 " TX3 , FIFO Transmits Slot 3 Data" "no,yes"
|
|
bitfld.long 0x68 0x02 " TX2 , FIFO Transmits Slot 2 Data" "no,yes"
|
|
bitfld.long 0x68 0x01 " TX1 , FIFO Transmits Slot 1 Data" "no,yes"
|
|
bitfld.long 0x68 0x00 " REN , Transmit Enable" "dis,ena"
|
|
line.long 0x0c "SR1 , Controller Status Register 1"
|
|
bitfld.long 0x0c 0x06 "TXUE , Transmit Underrun Error" "no,err"
|
|
bitfld.long 0x0c 0x05 " RXOE , Receive Overrun Error" "no,err"
|
|
bitfld.long 0x0c 0x04 " TXBUSY , Transmit Busy" "no,yes"
|
|
bitfld.long 0x0c 0x03 " TXFF , Transmit FIFO Full Flag" "no,err"
|
|
bitfld.long 0x0c 0x02 " RXFF , Receive FIFO Full Flag" "no,full"
|
|
bitfld.long 0x0c 0x01 " TXFE , Transmit FIFO Emptx Flag" "no,empty"
|
|
bitfld.long 0x0c 0x00 " RXFE , Receive FIFO Empty Flag" "no,empty"
|
|
line.long 0x2c "SR2 , Controller Status Register 2"
|
|
bitfld.long 0x2c 0x06 "TXUE , Transmit Underrun Error" "no,err"
|
|
bitfld.long 0x2c 0x05 " RXOE , Receive Overrun Error" "no,err"
|
|
bitfld.long 0x2c 0x04 " TXBUSY , Transmit Busy" "no,yes"
|
|
bitfld.long 0x2c 0x03 " TXFF , Transmit FIFO Full Flag" "no,err"
|
|
bitfld.long 0x2c 0x02 " RXFF , Receive FIFO Full Flag" "no,full"
|
|
bitfld.long 0x2c 0x01 " TXFE , Transmit FIFO Emptx Flag" "no,empty"
|
|
bitfld.long 0x2c 0x00 " RXFE , Receive FIFO Empty Flag" "no,empty"
|
|
line.long 0x4c "SR3 , Controller Status Register 3"
|
|
bitfld.long 0x4c 0x06 "TXUE , Transmit Underrun Error" "no,err"
|
|
bitfld.long 0x4c 0x05 " RXOE , Receive Overrun Error" "no,err"
|
|
bitfld.long 0x4c 0x04 " TXBUSY , Transmit Busy" "no,yes"
|
|
bitfld.long 0x4c 0x03 " TXFF , Transmit FIFO Full Flag" "no,err"
|
|
bitfld.long 0x4c 0x02 " RXFF , Receive FIFO Full Flag" "no,full"
|
|
bitfld.long 0x4c 0x01 " TXFE , Transmit FIFO Emptx Flag" "no,empty"
|
|
bitfld.long 0x4c 0x00 " RXFE , Receive FIFO Empty Flag" "no,empty"
|
|
line.long 0x6c "SR4 , Controller Status Register 4"
|
|
bitfld.long 0x6c 0x06 "TXUE , Transmit Underrun Error" "no,err"
|
|
bitfld.long 0x6c 0x05 " RXOE , Receive Overrun Error" "no,err"
|
|
bitfld.long 0x6c 0x04 " TXBUSY , Transmit Busy" "no,yes"
|
|
bitfld.long 0x6c 0x03 " TXFF , Transmit FIFO Full Flag" "no,err"
|
|
bitfld.long 0x6c 0x02 " RXFF , Receive FIFO Full Flag" "no,full"
|
|
bitfld.long 0x6c 0x01 " TXFE , Transmit FIFO Emptx Flag" "no,empty"
|
|
bitfld.long 0x6c 0x00 " RXFE , Receive FIFO Empty Flag" "no,empty"
|
|
line.long 0x10 "RISR1 , Raw Interrupt Status Register 1"
|
|
bitfld.long 0x10 0x03 "RIS , Receive Interrupt Status;FIFO Receive Interrupt asserted" "no,yes"
|
|
bitfld.long 0x10 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "no,yes"
|
|
bitfld.long 0x10 0x01 " RTIS ,Receive Timeout Interrupt Status" "deass,ass"
|
|
bitfld.long 0x10 0x00 " TCIS , Transmit Complete Interrupt Status" "deass,ass"
|
|
line.long 0x30 "RISR2 , Raw Interrupt Status Register 2"
|
|
bitfld.long 0x30 0x03 "RIS , Receive Interrupt Status;FIFO Receive Interrupt asserted" "no,yes"
|
|
bitfld.long 0x30 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "no,yes"
|
|
bitfld.long 0x30 0x01 " RTIS ,Receive Timeout Interrupt Status" "deass,ass"
|
|
bitfld.long 0x30 0x00 " TCIS , Transmit Complete Interrupt Status" "deass,ass"
|
|
line.long 0x50 "RISR3 , Raw Interrupt Status Register 3"
|
|
bitfld.long 0x50 0x03 "RIS , Receive Interrupt Status;FIFO Receive Interrupt asserted" "no,yes"
|
|
bitfld.long 0x50 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "no,yes"
|
|
bitfld.long 0x50 0x01 " RTIS ,Receive Timeout Interrupt Status" "deass,ass"
|
|
bitfld.long 0x50 0x00 " TCIS , Transmit Complete Interrupt Status" "deass,ass"
|
|
line.long 0x70 "RISR4 , Raw Interrupt Status Register 4"
|
|
bitfld.long 0x70 0x03 "RIS , Receive Interrupt Status;FIFO Receive Interrupt asserted" "no,yes"
|
|
bitfld.long 0x70 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "no,yes"
|
|
bitfld.long 0x70 0x01 " RTIS ,Receive Timeout Interrupt Status" "deass,ass"
|
|
bitfld.long 0x70 0x00 " TCIS , Transmit Complete Interrupt Status" "deass,ass"
|
|
line.long 0x14 "ISR1 , Interrupt Status Register 1"
|
|
bitfld.long 0x14 0x03 "RIS , Read Interrupt Status;FIFO Receive Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x14 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x14 0x01 " RTIS ,Receive Timeout Interrupt Status" "dis,ena"
|
|
bitfld.long 0x14 0x00 " TCIS , Transmit Complete Interrupt Status" "dis,ena"
|
|
line.long 0x34 "ISR2 , Interrupt Status Register 2"
|
|
bitfld.long 0x34 0x03 "RIS , Read Interrupt Status;FIFO Receive Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x34 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x34 0x01 " RTIS ,Receive Timeout Interrupt Status" "dis,ena"
|
|
bitfld.long 0x34 0x00 " TCIS , Transmit Complete Interrupt Status" "dis,ena"
|
|
line.long 0x54 "ISR3 , Interrupt Status Register 3"
|
|
bitfld.long 0x54 0x03 "RIS , Read Interrupt Status;FIFO Receive Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x54 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x54 0x01 " RTIS ,Receive Timeout Interrupt Status" "dis,ena"
|
|
bitfld.long 0x54 0x00 " TCIS , Transmit Complete Interrupt Status" "dis,ena"
|
|
line.long 0x74 "ISR4 , Interrupt Status Register 4"
|
|
bitfld.long 0x74 0x03 "RIS , Read Interrupt Status;FIFO Receive Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x74 0x02 " TIS , Transmit Interrupt Status;FIFO Transmit Interrupt asserted" "dis,ena"
|
|
bitfld.long 0x74 0x01 " RTIS ,Receive Timeout Interrupt Status" "dis,ena"
|
|
bitfld.long 0x74 0x00 " TCIS , Transmit Complete Interrupt Status" "dis,ena"
|
|
line.long 0x18 "IE1 , Interrupt Enable Register 1"
|
|
bitfld.long 0x18 0x03 "RIE , Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x18 0x02 " TIE , Transmit Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x18 0x01 " RTIE ,Receive Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x18 0x00 " TCIE , Transmit Complete Interrupt Enable" "dis,ena"
|
|
line.long 0x38 "IE2 , Interrupt Enable Register 2"
|
|
bitfld.long 0x38 0x03 "RIE , Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x38 0x02 " TIE , Transmit Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x38 0x01 " RTIE ,Receive Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x38 0x00 " TCIE , Transmit Complete Interrupt Enable" "dis,ena"
|
|
line.long 0x58 "IE3 , Interrupt Enable Register 3"
|
|
bitfld.long 0x58 0x03 "RIE , Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x02 " TIE , Transmit Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x01 " RTIE ,Receive Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x00 " TCIE , Transmit Complete Interrupt Enable" "dis,ena"
|
|
line.long 0x78 "IE4 , Interrupt Enable Register 4"
|
|
bitfld.long 0x78 0x03 "RIE , Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x78 0x02 " TIE , Transmit Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x78 0x01 " RTIE ,Receive Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x78 0x00 " TCIE , Transmit Complete Interrupt Enable" "dis,ena"
|
|
line.long 0x80 "S1DATA , Slot 1 Data Register"
|
|
hexmask.long.byte 0x80 0x00--0x06 1. 0. "DATA , Data transfered via Slot1"
|
|
line.long 0x84 "S2DATA , Slot 2 Data Register"
|
|
hexmask.long.word 0x84 0x00--0x0f 1. 0. "DATA , Data transfered via Slot2"
|
|
line.long 0x88 "S12DATA , Slot 12 Data Register"
|
|
hexmask.long.byte 0x88 0x00--0x13 1. 0. "DATA , Data transfered via Slot12"
|
|
line.long 0x8c "RGIS , Raw Global Interrupt Status Register"
|
|
bitfld.long 0x8c 0x05 "CODRDY , Codec Ready" "deass,ass"
|
|
bitfld.long 0x8c 0x04 " RWIS , Raw Wakeup Interrupt Status" "deass,ass"
|
|
bitfld.long 0x8c 0x03 " GPIORI , GPIO Receive Interrupt" "deass,ass"
|
|
bitfld.long 0x8c 0x02 " GPIOTRC , GPIO Transmission Complete" "deass,ass"
|
|
bitfld.long 0x8c 0x01 " S2INTRX , Slot 2 Receive Valid" "deass,ass"
|
|
bitfld.long 0x8c 0x00 " S1TXCMP , Slot 1 Transmit Complete" "deass,ass"
|
|
line.long 0x90 "GIS , Global Interrupt Status Register"
|
|
bitfld.long 0x90 0x05 "CODRDY , Codec Ready" "deass,ass"
|
|
bitfld.long 0x90 0x04 " WIS , Wakeup Interrupt Status" "deass,ass"
|
|
bitfld.long 0x90 0x03 " GPIORI , GPIO Receive Interrupt" "deass,ass"
|
|
bitfld.long 0x90 0x02 " GPIOTRC , GPIO Transmission Complete" "deass,ass"
|
|
bitfld.long 0x90 0x01 " S2INTRX , Slot 2 Receive Valid" "deass,ass"
|
|
bitfld.long 0x90 0x00 " S1TXCMP , Slot 1 Transmit Complete" "deass,ass"
|
|
line.long 0x94 "GIEN , Global Interrupt Enable Register"
|
|
bitfld.long 0x94 0x05 "CODRDY , Codec Ready" "dis,ena"
|
|
bitfld.long 0x94 0x04 " WIEN , Wakeup Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x94 0x03 " GPIORIE , GPIO Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x94 0x02 " GPIOTRCE , GPIO Transmission Complete Enable" "dis,ena"
|
|
bitfld.long 0x94 0x01 " S2INTRXE , Slot 2 Receive Valid Enable" "dis,ena"
|
|
bitfld.long 0x94 0x00 " S1TXCMPE , Slot 1 Transmit Complete Enable" "dis,ena"
|
|
line.long 0x98 "GEOI , Global End-of-Interrupt Register"
|
|
bitfld.long 0x98 0x01 "CODRDY , Codec Ready Interrupt Status Clear" "no,clear"
|
|
bitfld.long 0x98 0x00 " WISC , Wakeup Interrupt Status Clear" "no,clear"
|
|
line.long 0x9c "GCR , Global Control Register"
|
|
bitfld.long 0x9c 0x02 "OCR , Override Codec Ready" "norm,ena"
|
|
bitfld.long 0x9c 0x01 " LOOP , Loopback Mode" "norm,ena"
|
|
bitfld.long 0x9c 0x00 " IFE , IF Enable" "dis,ena"
|
|
line.long 0xa0 "RESET , Reset Register"
|
|
bitfld.long 0xa0 0x02 "EFORCER , Enable Forced Reset Bit" "no,ena"
|
|
bitfld.long 0xa0 0x01 " FORRES , Forced Reset" "low,high"
|
|
bitfld.long 0xa0 0x00 " TIMRES , Timed Reset" "dis,force"
|
|
line.long 0xa4 "SYNC , SYNC Port Register"
|
|
bitfld.long 0xa4 0x02 "FORCSYE , Forced SYNC Enable" "no,ena"
|
|
bitfld.long 0xa4 0x01 " FORSYNC , Forced SYNC" "low,high"
|
|
bitfld.long 0xa4 0x00 " TIMSYNC , Timed SYNC" "no,force"
|
|
line.long 0xa8 "GCIS , Global Control Interrupt Status Register"
|
|
hexmask.long.byte 0xa8 0x10--0x15 1. 0. "GIS , Global Control Interrupt Status Register"
|
|
hexmask.long.byte 0xa8 0x0c--0x0f 1. 0. " ISR4 , Copy of FIFO 4 ISR"
|
|
hexmask.long.byte 0xa8 0x08--0x0b 1. 0. " ISR3 , Copy of FIFO 3 ISR"
|
|
hexmask.long.byte 0xa8 0x04--0x07 1. 0. " ISR2 , Copy of FIFO 2 ISR"
|
|
hexmask.long.byte 0xa8 0x00--0x03 1. 0. " ISR1 , Copy of FIFO 1 ISR"
|
|
;bitfld.long 0xa8 0x0c--0x0f " ISR4 , Copy of FIFO 4 ISR" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf"
|
|
;bitfld.long 0xa8 0x08--0x0b " ISR3 , Copy of FIFO 3 ISR" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf"
|
|
;bitfld.long 0xa8 0x04--0x07 " ISR2 , Copy of FIFO 2 ISR" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf"
|
|
;bitfld.long 0xa8 0x00--0x03 " ISR1 , Copy of FIFO 1 ISR" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf"
|
|
TREE.END
|
|
TREE "Audio Codec Interface (ACI)"
|
|
group sd:0x80000a00--0x80000a13
|
|
line.long 0x00 "DATA, ACI Data Register"
|
|
hexmask.long.byte 0x00 0x00--0x07 1. "DATA , Transfered Data"
|
|
line.long 0x04 "CTL, ACI Control Register"
|
|
bitfld.long 0x04 0x05 "TXCLKE , Transmit FIFO Empty Stop Clock Enable" "cont,stop"
|
|
bitfld.long 0x04 0x04 " LB , Loopback" "nor,ena"
|
|
bitfld.long 0x04 0x03 " TXIE , Receive Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x04 0x02 " RXIE , Transmit Complete Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x04 0x01 " TXIE , Receive Enable" "dis,ena"
|
|
bitfld.long 0x04 0x00 " RXIE , Transmit Enable" "dis,ena"
|
|
line.long 0x08 "CTL, ACI Control Register"
|
|
bitfld.long 0x08 0x07 "TXBUSY , Transmit Busy" "dis,act"
|
|
bitfld.long 0x08 0x06 " RXBUSY , Receive Busy" "dis,act"
|
|
bitfld.long 0x08 0x05 " TXI , Transmit Interrupt" "> 8,<=8"
|
|
bitfld.long 0x08 0x04 " RXI , Receive Interrupt" "<=8,> 8"
|
|
bitfld.long 0x08 0x03 " TXFE , Transmit FIFO Empty" "full,emp"
|
|
bitfld.long 0x08 0x02 " RXFF , Receive FIFO Full" "emp,full"
|
|
textline " "
|
|
bitfld.long 0x08 0x01 "TXFF , Transmit FIFO Full" "emp,full"
|
|
bitfld.long 0x08 0x00 " RXFE , Receive FIFO Empty" "full,emp"
|
|
line.long 0x0c "EOI, End-of-Interrupt Register"
|
|
line.long 0x10 "CLKDIV, ACI Clock Divisor Register"
|
|
hexmask.long.word 0x10 0x00--0x09 1. "CLKDIV , Clock Divisor"
|
|
TREE.END
|
|
TREE "Battery Monitor Interface (BMI)"
|
|
group sd:0x80000f00--0x80000f5b
|
|
line.long 0x00 "SWIDR , BMI Single Wire Interface Register"
|
|
bitfld.long 0x00 0x0b "BE ,Break Error " "no,yes"
|
|
line.long 0x04 "SWICR , BMI Single Wire Interface Control Register"
|
|
bitfld.long 0x04 0x10 "SPINVRT ,Start Stop Invert" "norm,rev"
|
|
bitfld.long 0x04 0x0f " TRST , Transfer Reset" "no,res"
|
|
hexmask.long.byte 0x04 0x09--0x0e 1 " RDSS ,Read Data Size Select"
|
|
hexmask.long.byte 0x04 0x03--0x08 1 " WDCS ,Write Data or Command Size"
|
|
bitfld.long 0x04 0x02 " DINV ,Data Invert" "norm,inv"
|
|
bitfld.long 0x04 0x02 " GBS ,Generate Break Sequence" "no,yes"
|
|
bitfld.long 0x04 0x00 " SWIEN ,SWI Enable" "dis,ena"
|
|
line.long 0x08 "SWISR , BMI Single Wire Interface Status Register"
|
|
bitfld.long 0x08 0x0b "COL ,Collision" "no,yes"
|
|
bitfld.long 0x08 0x0a " TEF ,Transmit Error Flag" "no,yes"
|
|
bitfld.long 0x08 0x09 " RXB ,Receive Busy" "idle,busy"
|
|
bitfld.long 0x08 0x08 " BRF ,Break Recovered Flag" "compl,not"
|
|
bitfld.long 0x08 0x07 " BRS ,Break Recovery Status" "no,yes"
|
|
bitfld.long 0x08 0x06 " BKS ,Break Status" "no,yes"
|
|
bitfld.long 0x08 0x05 " RXF ,Received Flag" "no,yes"
|
|
bitfld.long 0x08 0x04 " TXF ,Transmitted Flag" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 0x03 "PBY ,Stop Bit Status;Access to Stop Bit" "no,yes"
|
|
bitfld.long 0x08 0x02 " DBS ,Data Bit Status;Access to Data Bit" "no,yes"
|
|
bitfld.long 0x08 0x01 " SBS ,Start Bit Status;Access to Start Bit" "no,yes"
|
|
bitfld.long 0x08 0x00 " TXB , Transmit Busy" "idle,busy"
|
|
line.long 0x0c "SWIRISR , BMI Single Wire Interface Raw Interrupt Status Register"
|
|
bitfld.long 0x0c 0x02 "BRI ,Break Recovered Interrupt;Break complete" "no,yes"
|
|
bitfld.long 0x0c 0x01 " WRI ,Word Received Interrupt;Receipt complete" "no,yes"
|
|
bitfld.long 0x0c 0x00 " WTI ,Word Transmitted Interrupt;Transmitted?" "no,yes"
|
|
line.long 0x0c "SWIRISR , BMI Single Wire Interface Raw Interrupt Clear Register"
|
|
bitfld.long 0x0c 0x02 "BRI ,Break Recovered Interrupt;Deassert Interrupt" "no,yes"
|
|
bitfld.long 0x0c 0x00 " WTI ,Word Transmitted Interrupt;Deassert Interrupt" "no,yes"
|
|
line.long 0x10 "SWIISR , BMI Single Wire Interface Interrupt Status Register"
|
|
bitfld.long 0x10 0x02 "BRI ,Break Recovered Interrupt;Break complete" "no,yes"
|
|
bitfld.long 0x10 0x01 " WRI ,Word Received Interrupt;Receipt complete" "no,yes"
|
|
bitfld.long 0x10 0x00 " WTI ,Word Transmitted Interrupt;Deassert Interrupt" "no,yes"
|
|
line.long 0x14 "SWIIER , BMI Single Wire Interface Interrupt Enable Register"
|
|
bitfld.long 0x14 0x02 "BRI ,Break Recovery Interrupt Enalbe" "dis,ena"
|
|
bitfld.long 0x14 0x01 " WRI ,Word Received Interrupt Enalbe" "dis,ena"
|
|
bitfld.long 0x14 0x00 " WTI ,Word Transmitted Interrupt Enable" "dis,ena"
|
|
line.long 0x18 "SWITR , BMI Single Wire Interface Timing Register"
|
|
line.long 0x1c "SWIBR , BMI Single Wire Interface Break Register"
|
|
hexmask.long.word 0x1c 0x0c--0x17 1 "SWIB ,SWI Break Time"
|
|
hexmask.long.word 0x1c 0x00--0x0b 1 " SWIBR ,SWI Break Recovery Time"
|
|
line.long 0x40 "SBIDR , BMI Smart Battery Data Register"
|
|
line.long 0x44 "SBICR , BMI Smart Battery Cotrol Register"
|
|
bitfld.long 0x44 0x19 "PEF ,Packet Error Code Enabled Flag" "no,yes"
|
|
bitfld.long 0x44 0x18 " BRF ,Block Read Flag;Block Transfer Started" "no,yes"
|
|
hexmask.long.word 0x44 0x0c--0x17 1 " TOC ,Timeout Count Value"
|
|
bitfld.long 0x44 0x0b " RXFDIS ,Receive FIFO Disable" "dis,ena"
|
|
bitfld.long 0x44 0x0a " TXFDIS ,Transmit FIFO Disable" "dis,ena"
|
|
hexmask.long.byte 0x44 0x02--0x09 1 " DIVFACT ,Divisor Factor"
|
|
bitfld.long 0x44 0x01 " FFLUSH ,FIFO Flush" "no,yes"
|
|
bitfld.long 0x44 0x00 " SBIEN ,SBI Enable" "dis,ena"
|
|
line.long 0x48 "SBICOUN , BMI Smart Battery Count Register"
|
|
;hexmask.long.byte 0x48 0x0a--0x0e 1 "READ ,Read Byte Count"
|
|
;hexmask.long.byte 0x48 0x05--0x09 1 " REP ,Repeat Write Count"
|
|
;hexmask.long.byte 0x48 0x00--0x04 1 " PRE ,PreWrite Count"
|
|
bitfld.long 0x48 0x0a--0x0e "READ ,Read Byte Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x48 0x05--0x09 " REP ,Repeat Write Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x48 0x00--0x04 " PRE ,PreWrite Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x4c "SBISR , BMI Smart Battery Status Register"
|
|
bitfld.long 0x4c 0x0c "SBH ,Slave Bus Hold" "res,dis"
|
|
bitfld.long 0x4c 0x0b " CLT ,Clock LOW Timeout" "no,yes"
|
|
bitfld.long 0x4c 0x0a " TXUE ,Transmit Underrun Error" "clr,flu"
|
|
bitfld.long 0x4c 0x09 " RXOE ,Receive Overrun Error" "clr,rec"
|
|
bitfld.long 0x4c 0x08 " ACKFAIL ,Acknowledge Fail" "no,yes"
|
|
bitfld.long 0x4c 0x07 " RnW ,Read/Not Write" "no,yes"
|
|
bitfld.long 0x4c 0x06 " SLAVE ,Slave Mode" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4c 0x05 "MASTER ,Master Mode" "no,yes"
|
|
bitfld.long 0x4c 0x04 " TXBUSY ,Transmit Busy" "no,yes"
|
|
bitfld.long 0x4c 0x03 " TXFF ,Transmit FIFO Full" "no,yes"
|
|
bitfld.long 0x4c 0x02 " RXFF ,Receive FIFO Full" "no,yes"
|
|
bitfld.long 0x4c 0x01 " TXFE ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x4c 0x00 " RXFE ,Receive FIFO Empty" "no,yes"
|
|
line.long 0x50 "SBIRISR , BMI Smart Battery Raw Interrupt Status Register"
|
|
bitfld.long 0x50 0x07 "CLTI ,Clock LOW Timeout Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x06 " STCI ,Slave Transfer Complete Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x05 " ALI ,Arbitration Lost Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x04 " AFI ,Acknowledge Fail Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x03 " RXI ,Receive Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x02 " TXI ,Transmit Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x01 " RTI ,Receive Timeout Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x00 " MTCI ,Master Transfer Complete Interrupt" "clr,ass"
|
|
line.long 0x50 "SBIEOI , BMI Smart Battery End-of-Interrupt Status Register"
|
|
bitfld.long 0x50 0x07 "CLTI ,Clock LOW Timeout Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x06 " STCI ,Slave Transfer Complete Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x05 " ALI ,Arbitration Lost Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x04 " AFI ,Acknowledge Fail Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x03 " RXI ,Receive Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x02 " TXI ,Transmit Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x01 " RTI ,Receive Timeout Interrupt" "clr,ass"
|
|
bitfld.long 0x50 0x00 " MTCI ,Master Transfer Complete Interrupt" "clr,ass"
|
|
line.long 0x54 "SBIISR , BMI Smart Battery Interrupt Status Register"
|
|
bitfld.long 0x54 0x07 "CLTI ,Clock LOW Timeout Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x06 " STCI ,Slave Transfer Complete Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x05 " ALI ,Arbitration Lost Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x04 " AFI ,Acknowledge Fail Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x03 " RXI ,Receive Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x02 " TXI ,Transmit Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x01 " RTI ,Receive Timeout Interrupt" "clr,ass"
|
|
bitfld.long 0x54 0x00 " MTCI ,Master Transfer Complete Interrupt" "clr,ass"
|
|
line.long 0x58 "SBIIER , BMI Smart Battery Interrupt Enable Register"
|
|
bitfld.long 0x58 0x07 "CLTI ,Clock LOW Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x06 " STCI ,Slave Transfer Complete Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x05 " ALI ,Arbitration Lost Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x04 " AFI ,Acknowledge Fail Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x03 " RXI ,Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x02 " TXI ,Transmit Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x01 " RTI ,Receive Timeout Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 0x00 " MTCI ,Master Transfer Complete Interrupt Enable" "dis,ena"
|
|
TREE.END
|
|
TREE "Direct Current to Direct Current (DC-DC) Converter Interface"
|
|
group sd:0x80000900--0x8000090b
|
|
line.long 0x00 "DCDCCON ,DC-DC Duty Cycle Configuration Register"
|
|
bitfld.long 0x00 0x0c--0x0f "PWM1DL ,PWM1 Duty Cycle with NEXTPWR LOW" "dis,1/16,2/16,3/16,4/16,5/16,6/16,7/16,8/16,9/16,10/16,11/16,12/16,13/16,14/16,15/16"
|
|
bitfld.long 0x00 0x08--0x0b " PWM1DH ,PWM1 Duty Cycle with NEXTPWR HIGH" "dis,1/16,2/16,3/16,4/16,5/16,6/16,7/16,8/16,9/16,10/16,11/16,12/16,13/16,14/16,15/16"
|
|
bitfld.long 0x00 0x04--0x07 " PWM0DL ,PWM0 Duty Cycle with NEXTPWR LOW" "dis,1/16,2/16,3/16,4/16,5/16,6/16,7/16,8/16,9/16,10/16,11/16,12/16,13/16,14/16,15/16"
|
|
bitfld.long 0x00 0x00--0x03 " PWM0DH ,PWM0 Duty Cycle with NEXTPWR HIGH" "dis,1/16,2/16,3/16,4/16,5/16,6/16,7/16,8/16,9/16,10/16,11/16,12/16,13/16,14/16,15/16"
|
|
line.long 0x08 "DCDCFRQ ,DC-DC Frequency Configuration Register"
|
|
bitfld.long 0x08 0x0c--0x0e "PWM1PL ,PWM1 Duty Prescaler with NEXTPWR LOW" "14MHz,7MHz,3.6MHz,1.8MHz,921kHz,460kHz,230kHz,115kHz"
|
|
bitfld.long 0x08 0x08--0x0a " PWM1PH ,PWM1 Duty Prescaler with NEXTPWR LOW" "14MHz,7MHz,3.6MHz,1.8MHz,921kHz,460kHz,230kHz,115kHz"
|
|
bitfld.long 0x08 0x04--0x06 " PWM0PL ,PWM0 Duty Prescaler with NEXTPWR LOW" "14MHz,7MHz,3.6MHz,1.8MHz,921kHz,460kHz,230kHz,115kHz"
|
|
bitfld.long 0x08 0x00--0x02 " PWM0PH ,PWM0 Duty Prescaler with NEXTPWR LOW" "14MHz,7MHz,3.6MHz,1.8MHz,921kHz,460kHz,230kHz,115kHz"
|
|
TREE.END
|
|
TREE "Smart Card Interface (SCI)"
|
|
group sd:0x80000300--0x80000373
|
|
line.long 0x00 "DATA ,Data Register"
|
|
bitfld.long 0x00 0x08 "PARITY ,Parity Error" "no,yes"
|
|
hexmask.long.byte 0x00 0x00--0x07 1 " DATA ,Transmit or Receive Data"
|
|
line.long 0x04 "CR0 ,Control 0 Register"
|
|
bitfld.long 0x04 0x05 "RXNAK ,Receive Negative Error Acknowledge" "T1,T0"
|
|
bitfld.long 0x04 0x04 " RXPAR ,Receive Parity" "even,odd"
|
|
bitfld.long 0x04 0x03 " TXNAK ,Transmit Negative Error Acknowledge" "T1,T0"
|
|
bitfld.long 0x04 0x02 " TXPAR ,Transmit Parity" "even,odd"
|
|
bitfld.long 0x04 0x01 " ORDER ,Data Bit Order" "dir,inv"
|
|
bitfld.long 0x04 0x00 " SENSE ,Data and Parity HIGH and LOW Sence" "dir,inv"
|
|
line.long 0x08 "CR1 ,Control 1 Register"
|
|
bitfld.long 0x08 0x05 "EXDBNCE ,Enable Bypass for Debounce" "use,byp"
|
|
bitfld.long 0x08 0x04 " BGTEN ,Block Guard Timer Enable" "stop,start"
|
|
bitfld.long 0x08 0x03 " CLKZ1 ,Clock Z1 Configuration" "out,opdr"
|
|
bitfld.long 0x08 0x02 " MODE ,Receive or Transmit Mode" "rec,trans"
|
|
bitfld.long 0x08 0x01 " BLKEN ,Block Time-Out Enable" "stop,start"
|
|
bitfld.long 0x08 0x00 " ATRDEN ,Answer-to-Reset Duration Enable" "stop,start"
|
|
line.long 0x0c "CR2 ,Control 2 Register"
|
|
bitfld.long 0x0c 0x02 "WRESET ,Warm Reset" "norm,warm"
|
|
bitfld.long 0x0c 0x01 " FINISH ,Finish Card Session" "norm,deact"
|
|
bitfld.long 0x0c 0x00 " STARTUP ,Start-up Card Session" "norm,act"
|
|
line.long 0x10 "IER ,Interrupt Enable Register"
|
|
bitfld.long 0x10 0x0b "TXWMIE ,Transmit Watermark Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x0a " RXWMIE ,Receive Watermark Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x09 " RTOUTIE ,Receive Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x08 " CHTOIE ,Character Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x07 " BLKTOIE ,Block Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x06 " ATRDTOIE ,Card Inserted Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x10 0x05 "ATRSTOIE ,Answer-to-Reset Duration Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x04 " TXERRIE ,Transmit Error Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x03 " CPDIE ,Card Power-Down Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x02 " CPUIE ,Card Power-Up Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x01 " CTOIE ,Card Taken-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 0x00 " CIIE ,Card Inserted Interrupt Enable" "dis,ena"
|
|
line.long 0x14 "RETRY ,Retry Limit Register"
|
|
bitfld.long 0x14 0x03--0x05 "RXRETRY ,Receive Retry" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0x00--0x02 " TXRETRY ,Transmit Retry" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "WMARK ,Watermark Register"
|
|
bitfld.long 0x18 0x03--0x05 "RXWMARK ,Receive Watermark" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0x00--0x02 " TXWMARK ,Transmit Watermark" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1c "TXCOUNT ,Transmit FIFO Count and Clear Register"
|
|
line.long 0x20 "RXCOUNT ,Receive FIFO Count and Clear Register"
|
|
line.long 0x24 "FR ,FIFO Status Register"
|
|
bitfld.long 0x24 0x03 "RXFE ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x24 0x02 " RXFF ,Receive FIFO Full" "no,yes"
|
|
bitfld.long 0x24 0x01 " TXFE ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x24 0x00 " TXFF ,Transmit FIFO Full" "no,yes"
|
|
line.long 0x28 "RXTIME ,Receive Read Time-Out Register"
|
|
line.long 0x2c "DSTAT ,Direct Status Register"
|
|
bitfld.long 0x2c 0x09 "CARDPRES ,Card Present" "no,yes"
|
|
bitfld.long 0x2c 0x08 " DATAEN ,Data Enable" "no,yes"
|
|
bitfld.long 0x2c 0x07 " DATAOEN ,Data Output Enable" "no,yes"
|
|
bitfld.long 0x2c 0x06 " CLKOUT ,Clock Output" "no,yes"
|
|
bitfld.long 0x2c 0x05 " CLKEN ,Clcok Enable" "no,yes"
|
|
bitfld.long 0x2c 0x04 " CLKOEN ,Clock Output Enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x2c 0x03 "DATAEN ,Data Enable" "no,yes"
|
|
bitfld.long 0x2c 0x02 " CLKEN ,Clock Enable" "no,yes"
|
|
bitfld.long 0x2c 0x01 " CRESET ,Card Reset" "no,yes"
|
|
bitfld.long 0x2c 0x00 " POWER ,Power" "no,yes"
|
|
line.long 0x30 "STABLE ,Debounce Timer Register"
|
|
line.long 0x34 "ATIME ,Activation Time Register"
|
|
line.long 0x38 "DTIME ,Deactivation Event Time Register"
|
|
line.long 0x3c "ATRSTM ,ATR Reception Start Time Register"
|
|
line.long 0x40 "ATRDTM ,ATR Duration Register"
|
|
line.long 0x44 "BLKTM ,Receive Block Time-Out Register"
|
|
line.long 0x48 "CHTM ,Character-to-Character Time-Out Register"
|
|
line.long 0x4c "CLKDIV ,Clock Frequency Register"
|
|
line.long 0x50 "BAUD ,Baud Rate Register"
|
|
line.long 0x54 "CYCLES ,Baud Cycles Register"
|
|
line.long 0x58 "GUARD ,Character-to-Character Guard Time Register"
|
|
line.long 0x5c "BLKGRD ,Block Guard Time Register"
|
|
line.long 0x60 "SYNCCR ,Asynchronous and Synchronous Multiplexing Register"
|
|
bitfld.long 0x60 0x01 "SELCLK ,Select Clock" "SCIREFCLK,SCCLK"
|
|
bitfld.long 0x60 0x00 " SELDATA ,Select Data" "transD,WDATA"
|
|
line.long 0x64 "SYNCDAT ,Synchronous Data Register"
|
|
bitfld.long 0x64 0x03 "WCLKEN ,Write Clock Enable" "no,yes"
|
|
bitfld.long 0x64 0x02 " WDATAEN ,Write Data Enable" "no,yes"
|
|
bitfld.long 0x64 0x01 " WCLK ,Write Clock" "no,yes"
|
|
bitfld.long 0x64 0x00 " WDATA ,Write Data" "no,yes"
|
|
line.long 0x68 "RAWSTAT , Raw I/O and Clock Status Register"
|
|
bitfld.long 0x68 0x01 "RCLK ,Raw Clock" "0,1"
|
|
bitfld.long 0x68 0x00 " RDATA ,Raw Data" "0,1"
|
|
line.long 0x6c "IIR ,Interrupt Identification Register"
|
|
bitfld.long 0x6c 0x0b "TXWMI ,Transmit Watermark Interrupt" "clr,<WMARK"
|
|
bitfld.long 0x6c 0x0a " RXWMI ,Receive Watermark Interrupt" "clr,>lim"
|
|
bitfld.long 0x6c 0x09 " RTMOI ,Read Time-Out Interrupt" "clr,tmout"
|
|
bitfld.long 0x6c 0x08 " CHTMOI ,Character Time-Out Interrupt" "clr,tmout"
|
|
bitfld.long 0x6c 0x07 " BLKTOI ,Block time-Out Interrupt" "clr,tmout"
|
|
bitfld.long 0x6c 0x06 " ATRDTOI ,Answer-to-Reset Duration Time-Out Interrupt" "clr,>time"
|
|
textline " "
|
|
bitfld.long 0x6c 0x05 "ATRSTOI ,Answer-to-Reset Start Time-Out Interrupt" "clr,tmout"
|
|
bitfld.long 0x6c 0x04 " TXERRI ,Transmit Error Interrupt" "clr,err"
|
|
bitfld.long 0x6c 0x03 " CRDDNI ,Card Down Interrupt" "clr,deact"
|
|
bitfld.long 0x6c 0x02 " CRDUPI ,Card Up Interrupt" "clr,act"
|
|
bitfld.long 0x6c 0x01 " CRDOUTI ,Card Out Interrupt" "clr,pres"
|
|
bitfld.long 0x6c 0x00 " CRDINSI ,Card Inserted Interrupt" "clr,pres"
|
|
line.long 0x70 "CONTROL ,Control Register"
|
|
bitfld.long 0x70 0x05 "MUXDETE ,Multiplex Detect Enable" "GPIO,SCI"
|
|
bitfld.long 0x70 0x04 " MUXVCCE ,Multiplex SCI_VCC Enable" "GPIO,SCI"
|
|
bitfld.long 0x70 0x01 " PREDIV ,Pre-Divisor" "HCLK,HCLK/2"
|
|
bitfld.long 0x70 0x00 " EN ,Enable" "dis,ena"
|
|
TREE.END
|
|
TREE "Memory Management Unit (MMU)"
|
|
width 8.
|
|
group c15:0x1--0x1
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 31. " iA ,Asynchronous Clocking Select" "0,1"
|
|
bitfld.long 0x0 30. " nF ,nFastBus Select" "0,1"
|
|
bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
|
|
bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
|
|
textline " "
|
|
bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
|
|
bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
|
|
bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
|
|
bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
|
|
bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
|
|
bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
|
|
textline " "
|
|
group c15:0x0002--0x0002
|
|
line.long 0x0 "TTBR,Translation Table Base Register"
|
|
hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
|
|
textline " "
|
|
group c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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group c15:0x5--0x5
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x105--0x105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x6--0x6
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line.long 0x0 "DFAR,Data Fault Address Register"
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group c15:0x106--0x106
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line.long 0x0 "IFAR,Instruction Fault Address Register"
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textline " "
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group c15:0x000d--0x000d
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line.long 0x0 "FCSEPID,FCSE Process ID"
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TREE.END
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TREE "Icebreaker"
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|
width 8.
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|
group ice:0x0--0x5 "Debug Control"
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line.long 0x0 "DBGCTRL,Debug Control Register"
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bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
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bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
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textline " "
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bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
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|
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
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bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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|
line.long 0x4 "DBGSTAT,Debug Status Register"
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|
bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,1"
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|
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
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|
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
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|
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
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|
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x8 "VECTOR,Vector Catch Register"
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bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
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bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
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bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
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bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
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bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
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|
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
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|
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
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|
line.long 0x10 "COMCTRL,Debug Communication Control Register"
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bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
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bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
|
|
line.long 0x14 "COMDATA,Debug Communication Data Register"
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|
group ice:0x8--0x0d "Watchpoint 0"
|
|
line.long 0x0 "AV,Address Value"
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|
line.long 0x4 "AM,Address Mask"
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|
line.long 0x8 "DV,Data Value"
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|
line.long 0x0c "DM,Data Mask"
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|
line.long 0x10 "CV,Control Value"
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|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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|
group ice:0x10--0x15 "Watchpoint 1"
|
|
line.long 0x0 "AV,Address Value"
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|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
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|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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|
TREE.END
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