49294 lines
3.4 MiB
49294 lines
3.4 MiB
; --------------------------------------------------------------------------------
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; @Title: IMX7ULP On-Chip Peripherals
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; @Props: Released
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; @Author: JMI, RSA
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; @Changelog: 2019-11-28 JMI
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; 2022-02-21 RSA
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; @Manufacturer: NXP - NXP Semiconductors
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; @Doc: SVD generated, based on: MCIMX7U5_ca7.svd (Ver. 1.0),
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; MCIMX7U5_cm4.svd (Ver. 1.0)
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; @Core: Cortex-A7, Cortex-M4F
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; @Chip: IMX7ULP-CA7, IMX7ULP-CM4
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perimx7ulp.per 17736 2024-04-08 09:26:07Z kwisniewski $
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sif (CORENAME()=="CORTEXA7MPCORE")
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tree "Core Registers (Cortex-A7MPCore)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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width 10.
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tree "ID Registers"
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group.long c15:0x0++0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
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rgroup.long c15:0x100++0x0
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..."
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bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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textline " "
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bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical"
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x100++0x0
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..."
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bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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textline " "
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bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..."
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endif
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rgroup.long c15:0x300++0x0
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line.long 0x0 "TLBTR,TLB Type Register"
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bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..."
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rgroup.long c15:0x500++0x0
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line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
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bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported"
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bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
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bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented"
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textline " "
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bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4"
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rgroup.long c15:0x400++0x0
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line.long 0x0 "MIDR2,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup.long c15:0x600++0x0
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line.long 0x0 "REVIDR,Revision ID Register"
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rgroup.long c15:0x700++0x0
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line.long 0x0 "MIDR3,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
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rgroup.long c15:0x0410++0x00
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..."
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bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x0410++0x00
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..."
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bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
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endif
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
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rgroup.long c15:0x0510++0x00
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line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x0510++0x00
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line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
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endif
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rgroup.long c15:0x0610++0x00
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
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bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
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rgroup.long c15:0x0710++0x00
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line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
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bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
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bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..."
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bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x0020++0x00
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line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..."
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
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rgroup.long c15:0x0020++0x00
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line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..."
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..."
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endif
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rgroup.long c15:0x0120++0x00
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line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
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bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..."
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rgroup.long c15:0x0220++0x00
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line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
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bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..."
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bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..."
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bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..."
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rgroup.long c15:0x0320++0x00
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line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
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bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..."
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bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
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rgroup.long c15:0x0420++0x00
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line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
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bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..."
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bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
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rgroup.long c15:0x0010++0x00
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..."
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
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rgroup.long c15:0x0110++0x00
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line.long 0x00 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0210++0x00
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..."
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..."
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..."
|
|
if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented"
|
|
bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented"
|
|
bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented"
|
|
bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented"
|
|
bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "System Control and Configuration"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,System Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x0101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified"
|
|
bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented"
|
|
bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented"
|
|
textline " "
|
|
bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
|
|
bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled"
|
|
bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced"
|
|
bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced"
|
|
bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes"
|
|
bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes"
|
|
bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes"
|
|
bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited"
|
|
bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed"
|
|
bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced"
|
|
bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced"
|
|
bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes"
|
|
bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited"
|
|
bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes"
|
|
bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes"
|
|
bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes"
|
|
bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches"
|
|
textline " "
|
|
bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes"
|
|
bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x140F++0x00
|
|
line.long 0x0 "ACTLR2,Auxiliary Control Register 2"
|
|
bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
hgroup.long c15:0x140F++0x00
|
|
hide.long 0x0 "ACTLR2,Auxiliary Control Register 2"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x201++0x00
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x201++0x00
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes"
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
endif
|
|
group.long c15:0x11++0x0
|
|
line.long 0x0 "SCR,Secure Configuration Register"
|
|
bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted"
|
|
bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled"
|
|
bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
|
|
bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
|
|
bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
|
|
group.long c15:0x0111++0x00
|
|
line.long 0x00 "SDER,Secure Debug Enable Register"
|
|
bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable"
|
|
bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable"
|
|
bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes"
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
endif
|
|
group.long c15:0x000C++0x00
|
|
line.long 0x00 "VBAR,Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address"
|
|
group.long c15:0x010C++0x00
|
|
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address"
|
|
textline " "
|
|
rgroup.long c15:0x001C++0x00
|
|
line.long 0x00 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x400F++0x00
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]"
|
|
else
|
|
hgroup.long c15:0x400F++0x00
|
|
hide.long 0x00 "CBAR,Configuration Base Address Register"
|
|
endif
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x1609))&0x3)==0x3)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes"
|
|
bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes"
|
|
bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
elif (((d.l(c15:0x1609))&0x3)==0x2)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes"
|
|
bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
elif (((d.l(c15:0x1609))&0x3)==0x1)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes"
|
|
bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
elif (((d.l(c15:0x1609))&0x3)==0x0)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
endif
|
|
group.long c15:0x410F++0x00
|
|
line.long 0x00 "FILASTARTR,Peripheral port start address register"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region"
|
|
bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid"
|
|
group.long c15:0x420F++0x00
|
|
line.long 0x00 "FILAENDR,Peripheral port end address register"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
hgroup.long c15:0x1609++0x00
|
|
hide.long 0x00 "SCUCTLR,SCU Control Register"
|
|
hgroup.long c15:0x410F++0x00
|
|
hide.long 0x00 "FILASTARTR,Peripheral port start address register"
|
|
hgroup.long c15:0x420F++0x00
|
|
hide.long 0x00 "FILAENDR,Peripheral port end address register"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Memory Management Unit"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,System Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.quad c15:0x10020++0x01
|
|
line.quad 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
endif
|
|
if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.quad c15:0x11020++0x01
|
|
line.quad 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
endif
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes"
|
|
bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes"
|
|
else
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High"
|
|
bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1"
|
|
bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
textline " "
|
|
group.long c15:0x0003++0x00
|
|
line.long 0x00 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved"
|
|
endif
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
endif
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
|
|
endif
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier"
|
|
bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
else
|
|
hgroup.long c15:0x0015++0x00
|
|
hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
endif
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved"
|
|
endif
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..."
|
|
endif
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
endif
|
|
endif
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0)
|
|
group.quad c15:0x0047++0x01
|
|
line.quad 0x00 "PAR,Physical Address Register"
|
|
hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA"
|
|
hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address"
|
|
bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
textline " "
|
|
bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure"
|
|
bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable"
|
|
bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1)
|
|
group.quad c15:0x0047++0x01
|
|
line.quad 0x00 "PAR,Physical Address Register"
|
|
bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2"
|
|
bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved"
|
|
textline " "
|
|
bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0)
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,Physical Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address"
|
|
bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure"
|
|
bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate"
|
|
bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection"
|
|
bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1)
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,Physical Address Register"
|
|
bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
endif
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x002A++0x00
|
|
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x012A++0x00
|
|
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x003A++0x00
|
|
line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x013A++0x00
|
|
line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
hgroup.long c15:0x003A++0x00
|
|
hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
|
|
hgroup.long c15:0x013A++0x00
|
|
hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
|
|
endif
|
|
else
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
textline " "
|
|
bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
endif
|
|
if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x400F++0x00
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
hgroup.long c15:0x400F++0x00
|
|
hide.long 0x00 "CBAR,Configuration Base Address Register"
|
|
endif
|
|
textline " "
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x10d++0x00
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
else
|
|
group.long c15:0x10d++0x00
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier"
|
|
endif
|
|
group.long c15:0x020D++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
|
|
group.long c15:0x030D++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register"
|
|
group.long c15:0x040D++0x00
|
|
line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register"
|
|
group.long c15:0x420D++0x00
|
|
line.long 0x00 "HTPIDR,Hyp Software Thread ID Register"
|
|
tree.end
|
|
width 15.
|
|
tree "Virtualization Extensions"
|
|
group.long c15:0x4000++0x00
|
|
line.long 0x0 "VPIDR,Virtualization Processor ID Register"
|
|
group.long c15:0x4500++0x00
|
|
line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register"
|
|
group.long c15:0x4001++0x00
|
|
line.long 0x00 "HSCTLR,System Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled"
|
|
group.long c15:0x4011++0x00
|
|
line.long 0x00 "HCR,Hyp Configuration Register"
|
|
bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system"
|
|
bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override"
|
|
bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override"
|
|
bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override"
|
|
bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled"
|
|
group.long c15:0x4111++0x00
|
|
line.long 0x00 "HDCR,Hyp Debug Control Register"
|
|
bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid"
|
|
bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid"
|
|
bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid"
|
|
bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid"
|
|
bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long c15:0x4211++0x00
|
|
line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register"
|
|
bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped"
|
|
bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped"
|
|
bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped"
|
|
group.long c15:0x4025++0x00
|
|
line.long 0x00 "HSR,Hyp Syndrome Register"
|
|
bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit"
|
|
hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome"
|
|
group.long c15:0x4311++0x00
|
|
line.long 0x00 "HSTR,Hyp System Trap Register"
|
|
bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped"
|
|
bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped"
|
|
bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped"
|
|
bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped"
|
|
bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped"
|
|
bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped"
|
|
bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped"
|
|
bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped"
|
|
bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped"
|
|
group.quad c15:0x14020++0x01
|
|
line.quad 0x00 "HTTBR,Hyp Translation Table Base Register"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
group.long c15:0x4202++0x00
|
|
line.long 0x00 "HTCR,Hyp Translation Control Register"
|
|
bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1"
|
|
group.quad c15:0x16020++0x01
|
|
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
|
|
hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
group.long c15:0x4212++0x00
|
|
line.long 0x00 "VTCR,Virtualization Translation Control Register"
|
|
bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved"
|
|
bitfld.long 0x00 4. " S ,Sign extension bit" "0,1"
|
|
bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x4015++0x00
|
|
line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register"
|
|
bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier"
|
|
bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
endif
|
|
group.long c15:0x4006++0x00
|
|
line.long 0x00 "HDFAR,Hyp Data Fault Address Register"
|
|
group.long c15:0x4025++0x00
|
|
line.long 0x00 "HSR,Hyp Syndrome Register"
|
|
bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
|
|
textline " "
|
|
bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit"
|
|
hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome"
|
|
group.long c15:0x4206++0x00
|
|
line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register"
|
|
group.long c15:0x4406++0x00
|
|
line.long 0x00 "HPFAR,Hyp IPA Fault Address Register"
|
|
hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits"
|
|
textline " "
|
|
hgroup.long c15:0x407++0x00
|
|
hide.long 0x00 "NOP,No Operation Register"
|
|
in
|
|
wgroup.long c15:0x17++0x00
|
|
line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x617++0x00
|
|
line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x57++0x00
|
|
line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x157++0x00
|
|
line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x457++0x00
|
|
line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x657++0x00
|
|
line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x757++0x00
|
|
line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x167++0x00
|
|
line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x267++0x00
|
|
line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x0087++0x00
|
|
line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read"
|
|
wgroup.long c15:0x0187++0x00
|
|
line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write"
|
|
wgroup.long c15:0x0287++0x00
|
|
line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read"
|
|
wgroup.long c15:0x0387++0x00
|
|
line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write"
|
|
wgroup.long c15:0x0487++0x00
|
|
line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read"
|
|
wgroup.long c15:0x0587++0x00
|
|
line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write"
|
|
wgroup.long c15:0x0687++0x00
|
|
line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read"
|
|
wgroup.long c15:0x0787++0x00
|
|
line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write"
|
|
wgroup.long c15:0x1a7++0x00
|
|
line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x2a7++0x00
|
|
line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x4a7++0x00
|
|
line.long 0x00 "CP15DSB,Data Synchronization Barrier Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean"
|
|
wgroup.long c15:0x5a7++0x00
|
|
line.long 0x00 "CP15DMB,Data Memory Barrier Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean"
|
|
wgroup.long c15:0x1b7++0x00
|
|
line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
wgroup.long c15:0x1e7++0x00
|
|
line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
wgroup.long c15:0x2e7++0x00
|
|
line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
wgroup.long c15:0x4087++0x00
|
|
line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read"
|
|
wgroup.long c15:0x4187++0x00
|
|
line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write"
|
|
wgroup.long c15:0x0038++0x00
|
|
line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable"
|
|
wgroup.long c15:0x0138++0x00
|
|
line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable"
|
|
wgroup.long c15:0x0238++0x00
|
|
line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable"
|
|
wgroup.long c15:0x0338++0x00
|
|
line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable"
|
|
wgroup.long c15:0x0058++0x00
|
|
line.long 0x00 "ITLBIALL,Invalidate instruction TLB"
|
|
wgroup.long c15:0x0158++0x00
|
|
line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA"
|
|
wgroup.long c15:0x0258++0x00
|
|
line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match"
|
|
wgroup.long c15:0x0068++0x00
|
|
line.long 0x00 "DTLBIALL,Invalidate data TLB"
|
|
wgroup.long c15:0x0168++0x00
|
|
line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA"
|
|
wgroup.long c15:0x0268++0x00
|
|
line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match"
|
|
wgroup.long c15:0x0078++0x00
|
|
line.long 0x00 "TLBIALL,Invalidate unified TLB"
|
|
wgroup.long c15:0x0178++0x00
|
|
line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA"
|
|
wgroup.long c15:0x0278++0x00
|
|
line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match"
|
|
wgroup.long c15:0x0378++0x00
|
|
line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID"
|
|
wgroup.long c15:0x4038++0x00
|
|
line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable"
|
|
wgroup.long c15:0x4138++0x00
|
|
line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable"
|
|
wgroup.long c15:0x4438++0x00
|
|
line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable"
|
|
wgroup.long c15:0x4078++0x00
|
|
line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB"
|
|
wgroup.long c15:0x4178++0x00
|
|
line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA"
|
|
wgroup.long c15:0x4478++0x00
|
|
line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB"
|
|
group.long c15:0x402A++0x00
|
|
line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x412A++0x00
|
|
line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x403A++0x00
|
|
line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x413A++0x00
|
|
line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
else
|
|
hgroup.long c15:0x403A++0x00
|
|
hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0"
|
|
hgroup.long c15:0x413A++0x00
|
|
hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1"
|
|
endif
|
|
group.long c15:0x400C++0x00
|
|
line.long 0x00 "HVBAR,Hyp Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address"
|
|
tree.end
|
|
width 12.
|
|
tree "Cache Control and Configuration"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..."
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..."
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
|
|
bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..."
|
|
bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..."
|
|
bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..."
|
|
bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..."
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..."
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..."
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..."
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..."
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..."
|
|
endif
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..."
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
wgroup.long c15:0x10EF++0x00
|
|
line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register"
|
|
bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved"
|
|
else
|
|
hgroup.long c15:0x10EF++0x00
|
|
hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register"
|
|
endif
|
|
tree "Level 1 memory system"
|
|
width 10.
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x000F++0x00
|
|
line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register"
|
|
group.long c15:0x010F++0x00
|
|
line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register"
|
|
group.long c15:0x020F++0x00
|
|
line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register"
|
|
group.long c15:0x001F++0x00
|
|
line.long 0x00 "DL1DATA0,Data L1 Data 0 Register"
|
|
group.long c15:0x011F++0x00
|
|
line.long 0x00 "DL1DATA1,Data L1 Data 1 Register"
|
|
group.long c15:0x021F++0x00
|
|
line.long 0x00 "DL1DATA2,Data L1 Data 2 Register"
|
|
group.long c15:0x031F++0x00
|
|
line.long 0x00 "DL1DATA3,Data L1 Data 3 Register"
|
|
wgroup.long c15:0x004F++0x00
|
|
line.long 0x00 "RAMINDEX,RAM Index Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier"
|
|
bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
textline " "
|
|
group.quad c15:0x100F0++0x01
|
|
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count"
|
|
bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid"
|
|
textline " "
|
|
hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier"
|
|
bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x300F++0x0
|
|
line.long 0x00 "CDBGDR0,Data Register 0"
|
|
rgroup.long c15:0x310F++0x0
|
|
line.long 0x00 "CDBGDR1,Data Register 1"
|
|
rgroup.long c15:0x320F++0x0
|
|
line.long 0x00 "CDBGDR2,Data Register 2"
|
|
wgroup.long c15:0x302F++0x0
|
|
line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x312F++0x0
|
|
line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 31. " CW ,Cache Way" "Low,High"
|
|
hexmask.long 0x00 5.--30. 1. " SI ,Set index"
|
|
bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x304F++0x0
|
|
line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 31. " CW ,Cache Way" "Low,High"
|
|
hexmask.long 0x00 5.--30. 1. " SI ,Set index"
|
|
bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x324F++0x0
|
|
line.long 0x00 "CDBGTD,TLB Data Read Operation Register"
|
|
bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x300F++0x0
|
|
line.long 0x00 "CDBGDR0,Data Register 0"
|
|
bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High"
|
|
bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High"
|
|
bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High"
|
|
bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High"
|
|
hexmask.long 0x00 0.--26. 1. " TA ,Tag Address"
|
|
rgroup.long c15:0x310F++0x0
|
|
line.long 0x00 "CDBGDR1,Data Register 1"
|
|
bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High"
|
|
rgroup.long c15:0x320F++0x0
|
|
line.long 0x00 "CDBGDR2,Data Register 2"
|
|
wgroup.long c15:0x302F++0x0
|
|
line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index"
|
|
wgroup.long c15:0x312F++0x0
|
|
line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long 0x00 6.--30. 1. " SI ,Set index"
|
|
wgroup.long c15:0x304F++0x0
|
|
line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--15. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--16. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--17. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--18. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--19. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--20. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
else
|
|
hgroup.long c15:0x314F++0x0
|
|
hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
endif
|
|
if (((d.l(c15:0x324F))&0x100)==0x100)
|
|
wgroup.long c15:0x324F++0x0
|
|
line.long 0x00 "CDBGTD,TLB Data Read Operation Register"
|
|
bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1"
|
|
else
|
|
wgroup.long c15:0x324F++0x0
|
|
line.long 0x00 "CDBGTD,TLB Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3"
|
|
bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Level 2 memory system"
|
|
width 11.
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes"
|
|
bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle"
|
|
bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle"
|
|
bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
|
|
bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present"
|
|
bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes"
|
|
bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191."
|
|
rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes"
|
|
bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes"
|
|
bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error"
|
|
group.long c15:0x100F++0x00
|
|
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
|
|
bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced"
|
|
bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced"
|
|
bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes"
|
|
bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes"
|
|
bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes"
|
|
bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes"
|
|
bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes"
|
|
bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes"
|
|
group.long c15:0x130F++0x00
|
|
line.long 0x00 "L2PFR,L2 Prefetch Control Register"
|
|
bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
|
|
bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
|
|
bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines"
|
|
textline " "
|
|
group.quad c15:0x110F0++0x01
|
|
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count"
|
|
bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid"
|
|
textline " "
|
|
hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier"
|
|
bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error"
|
|
hgroup.quad c15:0x110F0++0x01
|
|
hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error"
|
|
bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes"
|
|
rgroup.long c15:0x1609++0x00
|
|
line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register"
|
|
bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1"
|
|
bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA"
|
|
bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xc9++0x00
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes"
|
|
bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled"
|
|
group.long c15:0x1c9++0x00
|
|
line.long 0x00 "PMNCNTENSET,Count Enable Set Register "
|
|
bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled"
|
|
group.long c15:0x2c9++0x00
|
|
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
|
|
eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled"
|
|
group.long c15:0x3c9++0x00
|
|
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
|
|
eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow"
|
|
group.long c15:0x4c9++0x00
|
|
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
|
|
bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment"
|
|
bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment"
|
|
bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5c9++0x00
|
|
line.long 0x00 "PMSELR,Performance Monitor Select Register"
|
|
bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..."
|
|
group.long c15:0xd9++0x00
|
|
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
|
|
group.long c15:0x1d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
|
|
bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes"
|
|
bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes"
|
|
bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes"
|
|
bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count"
|
|
group.long c15:0x2d9++0x00
|
|
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
|
|
group.long c15:0xe9++0x00
|
|
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled"
|
|
group.long c15:0x1e9++0x00
|
|
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
|
|
bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2e9++0x00
|
|
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
|
|
eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
group.long c15:0x3e9++0x00
|
|
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
|
|
bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed"
|
|
bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree "System Timer Register"
|
|
group.long c15:0x000E++0x00
|
|
line.long 0x00 "CNTFRQ,Counter Frequency Register"
|
|
group.long c15:0x001E++0x00
|
|
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
|
|
bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
textline ""
|
|
group.quad c15:0x100E0++0x01
|
|
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
|
|
group.quad c15:0x120E0++0x01
|
|
line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register"
|
|
group.long c15:0x002E++0x00
|
|
line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register"
|
|
group.long c15:0x012E++0x00
|
|
line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register"
|
|
bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled"
|
|
textline ""
|
|
group.quad c15:0x110E0++0x01
|
|
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
|
|
group.quad c15:0x130E0++0x01
|
|
line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register"
|
|
group.long c15:0x003E++0x00
|
|
line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register"
|
|
group.long c15:0x013E++0x00
|
|
line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register"
|
|
bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled"
|
|
group.quad c15:0x140E0++0x01
|
|
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
|
|
textline ""
|
|
group.long c15:0x401E++0x00
|
|
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
|
|
bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
group.quad c15:0x160E0++0x01
|
|
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register"
|
|
group.long c15:0x402E++0x00
|
|
line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register"
|
|
group.long c15:0x412E++0x00
|
|
line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register"
|
|
bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled"
|
|
tree.end
|
|
width 11.
|
|
width 15.
|
|
tree "Debug Registers"
|
|
rgroup.long c14:0.++0x0
|
|
line.long 0x0 "DBGDIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version"
|
|
bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High"
|
|
bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported"
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented"
|
|
hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
wgroup.long c14:6.++0x0
|
|
line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c14:1.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
wgroup.long c14:5.++0x0
|
|
line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c14:195.))&0x1)==0x1)
|
|
group.long c14:1.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
|
|
rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
else
|
|
rgroup.long c14:1.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)"
|
|
rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
endif
|
|
wgroup.long c14:5.++0x0
|
|
line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)"
|
|
endif
|
|
group.long c14:0x7++0x0
|
|
line.long 0x00 "DBGVCR,Debug Vector Catch register"
|
|
bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled"
|
|
group.long c14:9.++0x0
|
|
line.long 0x00 "DBGECR,Debug Event Catch Register"
|
|
bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled"
|
|
group.long c14:32.++0x0
|
|
line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)"
|
|
wgroup.long c14:33.++0x0
|
|
line.long 0x00 "DBGITR,Debug Instruction Transfer Register"
|
|
rgroup.long c14:33.++0x0
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value"
|
|
bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c14:195.))&0x1)==0x1)
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault status" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
else
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault status" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
endif
|
|
endif
|
|
wgroup.long c14:35.++0x0
|
|
line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
wgroup.long c14:36.++0x0
|
|
line.long 0x00 "DBGDRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear"
|
|
bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart"
|
|
bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
wgroup.long c14:36.++0x0
|
|
line.long 0x00 "DBGDRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart"
|
|
bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c14:37.++0x0
|
|
line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register"
|
|
bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset"
|
|
bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request"
|
|
bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running"
|
|
textline " "
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:37.++0x0
|
|
line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register"
|
|
bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset"
|
|
endif
|
|
rgroup.long c14:40.++0x0
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value"
|
|
bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..."
|
|
rgroup.long c14:41.++0x0
|
|
line.long 0x00 "DBGCIDSR,DBGCIDSR"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c14:42.++0x0
|
|
line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register"
|
|
bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c14:42.++0x0
|
|
line.long 0x00 "DBGVIDSR,DBGVIDSR"
|
|
endif
|
|
width 15.
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
textline " "
|
|
wgroup.long c14:958.++0x0
|
|
line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register"
|
|
bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High"
|
|
bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High"
|
|
bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High"
|
|
bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
textline " "
|
|
wgroup.long c14:958.++0x0
|
|
line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register"
|
|
bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High"
|
|
bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High"
|
|
bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c14:959.++0x0
|
|
line.long 0x00 "DBGITISR,Debug Integration Input Status Register"
|
|
bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High"
|
|
bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High"
|
|
bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High"
|
|
bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
textline " "
|
|
rgroup.long c14:959.++0x0
|
|
line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register"
|
|
bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High"
|
|
bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High"
|
|
bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High"
|
|
endif
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
rgroup.quad c14:128.++0x1
|
|
line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address"
|
|
bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid"
|
|
rgroup.quad c14:256.++0x1
|
|
line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value"
|
|
bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid"
|
|
else
|
|
rgroup.long c14:128.++0x0
|
|
line.long 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address"
|
|
bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid"
|
|
rgroup.long c14:256.++0x0
|
|
line.long 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value"
|
|
bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid"
|
|
endif
|
|
group.long c14:195.++0x00
|
|
line.long 0x00 "DBGOSDLR,OS Double Lock Register"
|
|
bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked"
|
|
else
|
|
hgroup.quad c14:128.++0x1
|
|
hide.quad 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hgroup.quad c14:256.++0x1
|
|
hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
hgroup.long c14:195.++0x00
|
|
hide.long 0x00 "DBGOSDLR,OS Double Lock Register"
|
|
endif
|
|
wgroup.long c14:192.++0x00
|
|
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
|
|
rgroup.long c14:193.++0x00
|
|
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
|
|
bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..."
|
|
group.long c14:196.++0x00
|
|
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High"
|
|
bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High"
|
|
rgroup.long c14:197.++0x0
|
|
line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register"
|
|
bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High"
|
|
bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High"
|
|
bitfld.long 0x00 4. " HALTED ,Halted" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High"
|
|
bitfld.long 0x00 2. " RS ,Reset Status" "Low,High"
|
|
bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High"
|
|
tree "Processor ID registers"
|
|
rgroup.long c14:(832.+0.)++0x00
|
|
line.long 0x00 "PIDR0,Processor ID register 0"
|
|
rgroup.long c14:(832.+1.)++0x00
|
|
line.long 0x00 "PIDR1,Processor ID register 1"
|
|
rgroup.long c14:(832.+2.)++0x00
|
|
line.long 0x00 "PIDR2,Processor ID register 2"
|
|
rgroup.long c14:(832.+3.)++0x00
|
|
line.long 0x00 "PIDR3,Processor ID register 3"
|
|
rgroup.long c14:(832.+4.)++0x00
|
|
line.long 0x00 "PIDR4,Processor ID register 4"
|
|
rgroup.long c14:(832.+5.)++0x00
|
|
line.long 0x00 "PIDR5,Processor ID register 5"
|
|
rgroup.long c14:(832.+6.)++0x00
|
|
line.long 0x00 "PIDR6,Processor ID register 6"
|
|
rgroup.long c14:(832.+7.)++0x00
|
|
line.long 0x00 "PIDR7,Processor ID register 7"
|
|
rgroup.long c14:(832.+8.)++0x00
|
|
line.long 0x00 "PIDR8,Processor ID register 8"
|
|
rgroup.long c14:(832.+9.)++0x00
|
|
line.long 0x00 "PIDR9,Processor ID register 9"
|
|
rgroup.long c14:(832.+10.)++0x00
|
|
line.long 0x00 "PIDR10,Processor ID register 10"
|
|
rgroup.long c14:(832.+11.)++0x00
|
|
line.long 0x00 "PIDR11,Processor ID register 11"
|
|
rgroup.long c14:(832.+12.)++0x00
|
|
line.long 0x00 "PIDR12,Processor ID register 12"
|
|
rgroup.long c14:(832.+13.)++0x00
|
|
line.long 0x00 "PIDR13,Processor ID register 13"
|
|
rgroup.long c14:(832.+14.)++0x00
|
|
line.long 0x00 "PIDR14,Processor ID register 14"
|
|
rgroup.long c14:(832.+15.)++0x00
|
|
line.long 0x00 "PIDR15,Processor ID register 15"
|
|
rgroup.long c14:(832.+16.)++0x00
|
|
line.long 0x00 "PIDR16,Processor ID register 16"
|
|
rgroup.long c14:(832.+17.)++0x00
|
|
line.long 0x00 "PIDR17,Processor ID register 17"
|
|
rgroup.long c14:(832.+18.)++0x00
|
|
line.long 0x00 "PIDR18,Processor ID register 18"
|
|
rgroup.long c14:(832.+19.)++0x00
|
|
line.long 0x00 "PIDR19,Processor ID register 19"
|
|
rgroup.long c14:(832.+20.)++0x00
|
|
line.long 0x00 "PIDR20,Processor ID register 20"
|
|
rgroup.long c14:(832.+21.)++0x00
|
|
line.long 0x00 "PIDR21,Processor ID register 21"
|
|
rgroup.long c14:(832.+22.)++0x00
|
|
line.long 0x00 "PIDR22,Processor ID register 22"
|
|
rgroup.long c14:(832.+23.)++0x00
|
|
line.long 0x00 "PIDR23,Processor ID register 23"
|
|
rgroup.long c14:(832.+24.)++0x00
|
|
line.long 0x00 "PIDR24,Processor ID register 24"
|
|
rgroup.long c14:(832.+25.)++0x00
|
|
line.long 0x00 "PIDR25,Processor ID register 25"
|
|
rgroup.long c14:(832.+26.)++0x00
|
|
line.long 0x00 "PIDR26,Processor ID register 26"
|
|
rgroup.long c14:(832.+27.)++0x00
|
|
line.long 0x00 "PIDR27,Processor ID register 27"
|
|
rgroup.long c14:(832.+28.)++0x00
|
|
line.long 0x00 "PIDR28,Processor ID register 28"
|
|
rgroup.long c14:(832.+29.)++0x00
|
|
line.long 0x00 "PIDR29,Processor ID register 29"
|
|
rgroup.long c14:(832.+30.)++0x00
|
|
line.long 0x00 "PIDR30,Processor ID register 30"
|
|
rgroup.long c14:(832.+31.)++0x00
|
|
line.long 0x00 "PIDR31,Processor ID register 31"
|
|
rgroup.long c14:(832.+32.)++0x00
|
|
line.long 0x00 "PIDR32,Processor ID register 32"
|
|
rgroup.long c14:(832.+33.)++0x00
|
|
line.long 0x00 "PIDR33,Processor ID register 33"
|
|
rgroup.long c14:(832.+34.)++0x00
|
|
line.long 0x00 "PIDR34,Processor ID register 34"
|
|
rgroup.long c14:(832.+35.)++0x00
|
|
line.long 0x00 "PIDR35,Processor ID register 35"
|
|
rgroup.long c14:(832.+36.)++0x00
|
|
line.long 0x00 "PIDR36,Processor ID register 36"
|
|
rgroup.long c14:(832.+37.)++0x00
|
|
line.long 0x00 "PIDR37,Processor ID register 37"
|
|
rgroup.long c14:(832.+38.)++0x00
|
|
line.long 0x00 "PIDR38,Processor ID register 38"
|
|
rgroup.long c14:(832.+39.)++0x00
|
|
line.long 0x00 "PIDR39,Processor ID register 39"
|
|
rgroup.long c14:(832.+40.)++0x00
|
|
line.long 0x00 "PIDR40,Processor ID register 40"
|
|
rgroup.long c14:(832.+41.)++0x00
|
|
line.long 0x00 "PIDR41,Processor ID register 41"
|
|
rgroup.long c14:(832.+42.)++0x00
|
|
line.long 0x00 "PIDR42,Processor ID register 42"
|
|
rgroup.long c14:(832.+43.)++0x00
|
|
line.long 0x00 "PIDR43,Processor ID register 43"
|
|
rgroup.long c14:(832.+44.)++0x00
|
|
line.long 0x00 "PIDR44,Processor ID register 44"
|
|
rgroup.long c14:(832.+45.)++0x00
|
|
line.long 0x00 "PIDR45,Processor ID register 45"
|
|
rgroup.long c14:(832.+46.)++0x00
|
|
line.long 0x00 "PIDR46,Processor ID register 46"
|
|
rgroup.long c14:(832.+47.)++0x00
|
|
line.long 0x00 "PIDR47,Processor ID register 47"
|
|
rgroup.long c14:(832.+48.)++0x00
|
|
line.long 0x00 "PIDR48,Processor ID register 48"
|
|
rgroup.long c14:(832.+49.)++0x00
|
|
line.long 0x00 "PIDR49,Processor ID register 49"
|
|
rgroup.long c14:(832.+50.)++0x00
|
|
line.long 0x00 "PIDR50,Processor ID register 50"
|
|
rgroup.long c14:(832.+51.)++0x00
|
|
line.long 0x00 "PIDR51,Processor ID register 51"
|
|
rgroup.long c14:(832.+52.)++0x00
|
|
line.long 0x00 "PIDR52,Processor ID register 52"
|
|
rgroup.long c14:(832.+53.)++0x00
|
|
line.long 0x00 "PIDR53,Processor ID register 53"
|
|
rgroup.long c14:(832.+54.)++0x00
|
|
line.long 0x00 "PIDR54,Processor ID register 54"
|
|
rgroup.long c14:(832.+55.)++0x00
|
|
line.long 0x00 "PIDR55,Processor ID register 55"
|
|
rgroup.long c14:(832.+56.)++0x00
|
|
line.long 0x00 "PIDR56,Processor ID register 56"
|
|
rgroup.long c14:(832.+57.)++0x00
|
|
line.long 0x00 "PIDR57,Processor ID register 57"
|
|
rgroup.long c14:(832.+58.)++0x00
|
|
line.long 0x00 "PIDR58,Processor ID register 58"
|
|
rgroup.long c14:(832.+59.)++0x00
|
|
line.long 0x00 "PIDR59,Processor ID register 59"
|
|
rgroup.long c14:(832.+60.)++0x00
|
|
line.long 0x00 "PIDR60,Processor ID register 60"
|
|
rgroup.long c14:(832.+61.)++0x00
|
|
line.long 0x00 "PIDR61,Processor ID register 61"
|
|
rgroup.long c14:(832.+62.)++0x00
|
|
line.long 0x00 "PIDR62,Processor ID register 62"
|
|
rgroup.long c14:(832.+63.)++0x00
|
|
line.long 0x00 "PIDR63,Processor ID register 63"
|
|
tree.end
|
|
tree "Coresight Management Registers"
|
|
group.long c14:960.++0x0
|
|
line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group.long c14:1000.++0x0
|
|
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set"
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set"
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set"
|
|
group.long c14:1001.++0x0
|
|
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared"
|
|
wgroup.long c14:1004.++0x00
|
|
line.long 0x00 "DBGLAR,Lock Access Register"
|
|
rgroup.long c14:1005.++0x00
|
|
line.long 0x00 "DBGLSR,Lock Status Register"
|
|
bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit"
|
|
bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
rgroup.long c14:1006.++0x0
|
|
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c14:1009.++0x0
|
|
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
|
|
bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..."
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c14:1009.++0x0
|
|
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
|
|
bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..."
|
|
endif
|
|
textline " "
|
|
rgroup.long c14:1010.++0x0
|
|
line.long 0x0 "DBGDEVID0,Debug Device ID Register 0"
|
|
bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..."
|
|
bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..."
|
|
bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..."
|
|
bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
|
|
bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
|
|
textline " "
|
|
bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
|
|
textline " "
|
|
rgroup.long c14:1011.++0x00
|
|
line.long 0x00 "DBGDEVTYPE,Debug Device Type Register"
|
|
bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long c14:1016.++0x00
|
|
line.long 0x00 "DBGPID0,Debug Peripheral ID 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]"
|
|
rgroup.long c14:1017.++0x00
|
|
line.long 0x00 "DBGPID1,Debug Peripheral ID 1"
|
|
hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]"
|
|
rgroup.long c14:1018.++0x00
|
|
line.long 0x00 "DBGPID2,Debug Peripheral ID 2"
|
|
hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]"
|
|
rgroup.long c14:1019.++0x00
|
|
line.long 0x00 "DBGPID3,Debug Peripheral ID 3"
|
|
hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision"
|
|
hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified"
|
|
rgroup.long c14:1012.++0x00
|
|
line.long 0x00 "DBGPID4,Debug Peripheral ID 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code"
|
|
rgroup.long c14:1020.++0x00
|
|
line.long 0x00 "DBGCID0,Debug Component ID 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0"
|
|
rgroup.long c14:1021.++0x00
|
|
line.long 0x00 "DBGCID1,Debug Component ID 1"
|
|
hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1"
|
|
rgroup.long c14:1022.++0x00
|
|
line.long 0x00 "DBGCID2,Debug Component ID 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2"
|
|
rgroup.long c14:1023.++0x00
|
|
line.long 0x00 "DBGCID3,Debug Component ID 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3"
|
|
tree.end
|
|
tree.end
|
|
width 10.
|
|
tree "Breakpoint Registers"
|
|
if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+0.)++0x0
|
|
line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+0.)++0x0
|
|
line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+0.)++0x0
|
|
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+1.)++0x0
|
|
line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+1.)++0x0
|
|
line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+1.)++0x0
|
|
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+2.)++0x0
|
|
line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+2.)++0x0
|
|
line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+2.)++0x0
|
|
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+3.)++0x0
|
|
line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+3.)++0x0
|
|
line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+3.)++0x0
|
|
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+4.)++0x0
|
|
line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+4.)++0x0
|
|
line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+4.)++0x0
|
|
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+5.)++0x0
|
|
line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+5.)++0x0
|
|
line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+5.)++0x0
|
|
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
group.long c14:148.++0x0
|
|
line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value"
|
|
group.long c14:149.++0x0
|
|
line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value"
|
|
tree.end
|
|
width 10.
|
|
tree "Watchpoint Control Registers"
|
|
group.long c14:(96.+0.)++0x00
|
|
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+0.)++0x00
|
|
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+0.)++0x00
|
|
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c14:(96.+1.)++0x00
|
|
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+1.)++0x00
|
|
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+1.)++0x00
|
|
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c14:(96.+2.)++0x00
|
|
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+2.)++0x00
|
|
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+2.)++0x00
|
|
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c14:(96.+3.)++0x00
|
|
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+3.)++0x00
|
|
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+3.)++0x00
|
|
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
tree.end
|
|
width 0xb
|
|
tree.open "Interrupt Controller (GIC-400)"
|
|
width 17.
|
|
width 17.
|
|
base ad:0x40021000
|
|
tree "Distributor Interface"
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
if PER.ADDRESS.isSECUREEX(ad:0x40021000)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
else
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
endif
|
|
rgroup.long 0x0008++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
|
|
bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..."
|
|
bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure)
|
|
width 17.
|
|
tree "Group/Security Registers"
|
|
if PER.ADDRESS.isSECUREEX(ad:0x40021000+0x0080)
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
else
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x0084))
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x0088))
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x008C))
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x0090))
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x0094))
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x0098))
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x009C))
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00A0))
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00A4))
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00A8))
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00AC))
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00B0))
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00B4))
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00B8))
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00BC))
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00C0))
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00C4))
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00C8))
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00CC))
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00D0))
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00D4))
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00D8))
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00DC))
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00E0))
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00E4))
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00E8))
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00EC))
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00F0))
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00F4))
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00F8))
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0x40021000+0x00FC))
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x40021000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
endif
|
|
width 24.
|
|
tree "Set/Clear Enable Registers"
|
|
group.long 0x0100++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled"
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 22.
|
|
tree "Set/Clear Pending Registers"
|
|
group.long 0x0200++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending"
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Set/Clear Active Registers"
|
|
if (((per.l(ad:0x40021000+0x08))&0xFF000000)==(0x0000000||0x1000000))
|
|
rgroup.long 0x0300++0x03
|
|
line.long 0x0 "GICD_ICDABR0,Active Status Register 0"
|
|
bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active"
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active"
|
|
else
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active"
|
|
else
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active"
|
|
else
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active"
|
|
else
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active"
|
|
else
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active"
|
|
else
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active"
|
|
else
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)==0x1F)
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active"
|
|
else
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
else
|
|
group.long 0x0300++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active"
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0304++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0308++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x030C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active"
|
|
else
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0310++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0314++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0318++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x031C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
|
|
else
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0320++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0324++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0328++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x032C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
|
|
else
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0330++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0334++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0338++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x033C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
|
|
else
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
tree "Priority Registers"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 "
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 "
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 "
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 "
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 "
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 "
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 "
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 "
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 "
|
|
group.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 "
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 "
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 "
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 "
|
|
group.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 "
|
|
group.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 "
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 "
|
|
else
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
rgroup.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
rgroup.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
rgroup.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 "
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 "
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 "
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 "
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 "
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 "
|
|
group.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 "
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 "
|
|
else
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
rgroup.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
rgroup.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
rgroup.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
rgroup.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
rgroup.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
rgroup.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
rgroup.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 "
|
|
group.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 "
|
|
group.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 "
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 "
|
|
group.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 "
|
|
group.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 "
|
|
group.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 "
|
|
group.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 "
|
|
else
|
|
rgroup.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
rgroup.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
rgroup.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
rgroup.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
rgroup.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
rgroup.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
rgroup.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
rgroup.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 "
|
|
group.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 "
|
|
group.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 "
|
|
group.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 "
|
|
group.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 "
|
|
group.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 "
|
|
group.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 "
|
|
group.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 "
|
|
else
|
|
rgroup.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
rgroup.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
rgroup.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
rgroup.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
rgroup.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
rgroup.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
rgroup.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
rgroup.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 "
|
|
group.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 "
|
|
group.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 "
|
|
group.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 "
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 "
|
|
group.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 "
|
|
group.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 "
|
|
group.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 "
|
|
else
|
|
rgroup.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
rgroup.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
rgroup.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
rgroup.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
rgroup.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
rgroup.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
rgroup.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
rgroup.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 "
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 "
|
|
group.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 "
|
|
group.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 "
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 "
|
|
group.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 "
|
|
group.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 "
|
|
group.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 "
|
|
else
|
|
rgroup.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
rgroup.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
rgroup.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
rgroup.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
rgroup.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
rgroup.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
rgroup.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
rgroup.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 "
|
|
group.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 "
|
|
group.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 "
|
|
group.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 "
|
|
group.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 "
|
|
group.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 "
|
|
group.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 "
|
|
group.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 "
|
|
else
|
|
rgroup.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
rgroup.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
rgroup.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
rgroup.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
rgroup.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
rgroup.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
rgroup.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
rgroup.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 "
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 "
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 "
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 "
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 "
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 "
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 "
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 "
|
|
else
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
rgroup.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
rgroup.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
rgroup.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 "
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 "
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 "
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 "
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 "
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 "
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 "
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 "
|
|
else
|
|
rgroup.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
rgroup.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
rgroup.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
rgroup.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
rgroup.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
rgroup.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
rgroup.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 "
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 "
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 "
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 "
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 "
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 "
|
|
group.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 "
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 "
|
|
else
|
|
rgroup.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
rgroup.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
rgroup.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
rgroup.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
rgroup.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
rgroup.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
rgroup.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 "
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 "
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 "
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 "
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 "
|
|
group.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 "
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 "
|
|
group.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 "
|
|
else
|
|
rgroup.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
rgroup.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
rgroup.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
rgroup.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
rgroup.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
rgroup.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
rgroup.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
rgroup.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 "
|
|
group.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 "
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 "
|
|
group.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 "
|
|
group.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 "
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 "
|
|
group.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 "
|
|
group.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 "
|
|
else
|
|
rgroup.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
rgroup.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
rgroup.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
rgroup.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
rgroup.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
rgroup.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
rgroup.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
rgroup.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 "
|
|
group.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 "
|
|
group.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 "
|
|
group.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 "
|
|
group.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 "
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 "
|
|
group.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 "
|
|
group.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 "
|
|
else
|
|
rgroup.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
rgroup.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
rgroup.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
rgroup.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
rgroup.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
rgroup.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
rgroup.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
rgroup.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 "
|
|
group.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 "
|
|
group.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 "
|
|
group.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 "
|
|
group.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 "
|
|
group.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 "
|
|
group.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 "
|
|
group.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 "
|
|
else
|
|
rgroup.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
rgroup.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
rgroup.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
rgroup.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
rgroup.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
rgroup.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
rgroup.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
rgroup.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 "
|
|
group.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 "
|
|
group.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 "
|
|
group.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 "
|
|
group.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 "
|
|
group.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 "
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 "
|
|
group.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 "
|
|
else
|
|
rgroup.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
rgroup.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
rgroup.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
rgroup.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
rgroup.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
rgroup.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
rgroup.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
rgroup.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 "
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 "
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 "
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 "
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 "
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 "
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 "
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 "
|
|
else
|
|
rgroup.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
rgroup.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
rgroup.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
rgroup.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
rgroup.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
rgroup.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
rgroup.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
rgroup.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 "
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 "
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 "
|
|
group.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 "
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 "
|
|
group.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 "
|
|
group.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 "
|
|
group.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 "
|
|
else
|
|
rgroup.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
rgroup.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
rgroup.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
rgroup.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
rgroup.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
rgroup.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
rgroup.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
rgroup.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 "
|
|
group.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 "
|
|
group.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 "
|
|
group.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 "
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 "
|
|
group.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 "
|
|
group.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 "
|
|
group.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 "
|
|
else
|
|
rgroup.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
rgroup.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
rgroup.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
rgroup.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
rgroup.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
rgroup.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
rgroup.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
rgroup.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 "
|
|
group.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 "
|
|
group.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 "
|
|
group.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 "
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 "
|
|
group.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 "
|
|
group.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 "
|
|
group.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 "
|
|
else
|
|
rgroup.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
rgroup.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
rgroup.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
rgroup.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
rgroup.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
rgroup.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
rgroup.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
rgroup.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 "
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 "
|
|
group.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 "
|
|
group.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 "
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 "
|
|
group.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 "
|
|
group.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 "
|
|
group.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 "
|
|
else
|
|
rgroup.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
rgroup.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
rgroup.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
rgroup.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
rgroup.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
rgroup.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
rgroup.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
rgroup.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 "
|
|
group.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 "
|
|
group.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 "
|
|
group.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 "
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 "
|
|
group.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 "
|
|
group.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 "
|
|
group.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 "
|
|
else
|
|
rgroup.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
rgroup.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
rgroup.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
rgroup.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
rgroup.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
rgroup.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
rgroup.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
rgroup.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 "
|
|
group.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 "
|
|
group.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 "
|
|
group.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 "
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 "
|
|
group.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 "
|
|
group.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 "
|
|
group.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 "
|
|
else
|
|
rgroup.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
rgroup.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
rgroup.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
rgroup.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
rgroup.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
rgroup.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
rgroup.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
rgroup.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 "
|
|
group.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 "
|
|
group.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 "
|
|
group.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 "
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 "
|
|
group.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 "
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 "
|
|
group.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 "
|
|
else
|
|
rgroup.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
rgroup.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
rgroup.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
rgroup.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
rgroup.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
rgroup.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
rgroup.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
rgroup.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 "
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 "
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 "
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 "
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 "
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 "
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 "
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 "
|
|
else
|
|
rgroup.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
rgroup.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
rgroup.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
rgroup.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
rgroup.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
rgroup.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
rgroup.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
rgroup.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 "
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 "
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 "
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 "
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 "
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 "
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 "
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 "
|
|
else
|
|
rgroup.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
rgroup.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
rgroup.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
rgroup.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
rgroup.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
rgroup.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
rgroup.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
rgroup.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 "
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 "
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 "
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 "
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 "
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 "
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 "
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 "
|
|
else
|
|
rgroup.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
rgroup.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
rgroup.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
rgroup.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
rgroup.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
rgroup.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
rgroup.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
rgroup.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 "
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 "
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 "
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 "
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 "
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 "
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 "
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 "
|
|
else
|
|
rgroup.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
rgroup.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
rgroup.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
rgroup.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
rgroup.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
rgroup.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
rgroup.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
rgroup.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 "
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 "
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 "
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 "
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 "
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 "
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 "
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 "
|
|
else
|
|
rgroup.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
rgroup.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
rgroup.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
rgroup.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
rgroup.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
rgroup.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
rgroup.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
rgroup.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 "
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 "
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 "
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 "
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 "
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 "
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 "
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 "
|
|
else
|
|
rgroup.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
rgroup.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
rgroup.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
rgroup.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
rgroup.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
rgroup.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
rgroup.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
rgroup.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 "
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 "
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 "
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 "
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 "
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 "
|
|
group.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 "
|
|
group.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 "
|
|
else
|
|
rgroup.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
rgroup.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
rgroup.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
rgroup.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
rgroup.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
rgroup.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
rgroup.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
rgroup.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 "
|
|
group.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 "
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000"
|
|
group.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004"
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008"
|
|
group.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012"
|
|
group.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016"
|
|
else
|
|
rgroup.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
rgroup.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
rgroup.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
rgroup.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
rgroup.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
rgroup.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
rgroup.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "Processor Targets Registers"
|
|
if (((per.l(ad:0x40021000+0x04))&0x000000E0)>0x1)
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 "
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 "
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 "
|
|
group.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 "
|
|
group.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 "
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 "
|
|
group.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 "
|
|
group.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 "
|
|
group.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 "
|
|
else
|
|
rgroup.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
rgroup.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
rgroup.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
rgroup.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
rgroup.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
rgroup.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
rgroup.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
rgroup.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 "
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 "
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 "
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 "
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 "
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 "
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 "
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 "
|
|
else
|
|
rgroup.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
rgroup.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
rgroup.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
rgroup.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
rgroup.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
rgroup.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
rgroup.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
rgroup.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 "
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 "
|
|
group.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 "
|
|
group.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 "
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 "
|
|
group.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 "
|
|
group.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 "
|
|
group.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 "
|
|
else
|
|
rgroup.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
rgroup.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
rgroup.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
rgroup.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
rgroup.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
rgroup.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
rgroup.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
rgroup.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 "
|
|
group.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 "
|
|
group.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 "
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 "
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 "
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 "
|
|
group.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 "
|
|
group.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 "
|
|
else
|
|
rgroup.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
rgroup.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
rgroup.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
rgroup.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
rgroup.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
rgroup.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
rgroup.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
rgroup.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 "
|
|
group.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 "
|
|
group.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 "
|
|
group.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 "
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 "
|
|
group.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 "
|
|
group.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 "
|
|
group.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 "
|
|
else
|
|
rgroup.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
rgroup.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
rgroup.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
rgroup.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
rgroup.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
rgroup.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
rgroup.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
rgroup.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 "
|
|
group.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 "
|
|
group.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 "
|
|
group.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 "
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 "
|
|
group.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 "
|
|
group.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 "
|
|
group.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 "
|
|
else
|
|
rgroup.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
rgroup.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
rgroup.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
rgroup.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
rgroup.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
rgroup.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
rgroup.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
rgroup.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 "
|
|
group.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 "
|
|
group.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 "
|
|
group.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 "
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 "
|
|
group.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 "
|
|
group.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 "
|
|
group.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 "
|
|
else
|
|
rgroup.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
rgroup.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
rgroup.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
rgroup.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
rgroup.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
rgroup.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
rgroup.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
rgroup.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 "
|
|
group.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 "
|
|
group.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 "
|
|
group.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 "
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 "
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 "
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 "
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 "
|
|
else
|
|
rgroup.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
rgroup.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
rgroup.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
rgroup.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
rgroup.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
rgroup.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
rgroup.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
rgroup.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 "
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 "
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 "
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 "
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 "
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 "
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 "
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 "
|
|
else
|
|
rgroup.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
rgroup.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
rgroup.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
rgroup.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
rgroup.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
rgroup.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
rgroup.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
rgroup.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 "
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 "
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 "
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 "
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 "
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 "
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 "
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 "
|
|
else
|
|
rgroup.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
rgroup.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
rgroup.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
rgroup.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
rgroup.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
rgroup.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
rgroup.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
rgroup.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 "
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 "
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 "
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 "
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 "
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 "
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 "
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 "
|
|
else
|
|
rgroup.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
rgroup.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
rgroup.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
rgroup.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
rgroup.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
rgroup.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
rgroup.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
rgroup.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 "
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 "
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 "
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 "
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 "
|
|
group.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 "
|
|
group.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 "
|
|
group.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 "
|
|
else
|
|
rgroup.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
rgroup.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
rgroup.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
rgroup.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
rgroup.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
rgroup.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
rgroup.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
rgroup.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 "
|
|
group.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 "
|
|
group.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 "
|
|
group.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 "
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 "
|
|
group.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 "
|
|
group.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 "
|
|
group.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 "
|
|
else
|
|
rgroup.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
rgroup.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
rgroup.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
rgroup.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
rgroup.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
rgroup.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
rgroup.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
rgroup.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 "
|
|
group.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 "
|
|
group.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 "
|
|
group.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 "
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 "
|
|
group.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 "
|
|
group.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 "
|
|
group.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 "
|
|
else
|
|
rgroup.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
rgroup.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
rgroup.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
rgroup.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
rgroup.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
rgroup.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
rgroup.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
rgroup.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 "
|
|
group.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 "
|
|
group.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 "
|
|
group.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 "
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 "
|
|
group.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 "
|
|
group.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 "
|
|
group.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 "
|
|
else
|
|
rgroup.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
rgroup.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
rgroup.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
rgroup.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
rgroup.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
rgroup.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
rgroup.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
rgroup.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 "
|
|
group.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 "
|
|
group.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 "
|
|
group.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 "
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 "
|
|
group.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 "
|
|
group.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 "
|
|
group.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 "
|
|
else
|
|
rgroup.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
rgroup.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
rgroup.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
rgroup.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
rgroup.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
rgroup.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
rgroup.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
rgroup.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 "
|
|
group.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 "
|
|
group.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 "
|
|
group.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 "
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 "
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 "
|
|
group.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 "
|
|
group.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 "
|
|
else
|
|
rgroup.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
rgroup.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
rgroup.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
rgroup.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
rgroup.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
rgroup.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
rgroup.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
rgroup.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 "
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 "
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 "
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 "
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 "
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 "
|
|
group.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 "
|
|
group.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 "
|
|
else
|
|
rgroup.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
rgroup.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
rgroup.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
rgroup.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
rgroup.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
rgroup.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
rgroup.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
rgroup.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 "
|
|
group.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 "
|
|
group.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 "
|
|
group.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 "
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 "
|
|
group.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 "
|
|
group.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 "
|
|
group.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 "
|
|
else
|
|
rgroup.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
rgroup.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
rgroup.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
rgroup.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
rgroup.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
rgroup.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
rgroup.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
rgroup.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 "
|
|
group.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 "
|
|
group.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 "
|
|
group.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 "
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 "
|
|
group.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 "
|
|
group.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 "
|
|
group.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 "
|
|
else
|
|
rgroup.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
rgroup.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
rgroup.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
rgroup.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
rgroup.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
rgroup.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
rgroup.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
rgroup.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 "
|
|
group.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 "
|
|
group.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 "
|
|
group.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 "
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 "
|
|
group.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 "
|
|
group.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 "
|
|
group.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 "
|
|
else
|
|
rgroup.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
rgroup.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
rgroup.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
rgroup.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
rgroup.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
rgroup.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
rgroup.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
rgroup.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 "
|
|
group.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 "
|
|
group.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 "
|
|
group.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 "
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 "
|
|
group.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 "
|
|
group.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 "
|
|
group.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 "
|
|
else
|
|
rgroup.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
rgroup.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
rgroup.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
rgroup.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
rgroup.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
rgroup.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
rgroup.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
rgroup.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 "
|
|
group.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 "
|
|
group.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 "
|
|
group.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 "
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 "
|
|
group.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 "
|
|
group.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 "
|
|
group.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 "
|
|
else
|
|
rgroup.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
rgroup.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
rgroup.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
rgroup.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
rgroup.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
rgroup.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
rgroup.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
rgroup.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 "
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 "
|
|
group.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 "
|
|
group.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 "
|
|
group.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 "
|
|
group.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 "
|
|
group.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 "
|
|
group.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 "
|
|
else
|
|
rgroup.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
rgroup.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
rgroup.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
rgroup.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
rgroup.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
rgroup.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
rgroup.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
rgroup.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 "
|
|
group.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 "
|
|
group.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 "
|
|
group.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 "
|
|
group.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 "
|
|
group.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 "
|
|
group.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 "
|
|
group.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 "
|
|
else
|
|
rgroup.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
rgroup.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
rgroup.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
rgroup.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
rgroup.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
rgroup.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
rgroup.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
rgroup.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 "
|
|
group.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 "
|
|
group.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 "
|
|
group.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 "
|
|
group.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 "
|
|
group.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 "
|
|
group.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 "
|
|
group.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 "
|
|
else
|
|
rgroup.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
rgroup.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
rgroup.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
rgroup.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
rgroup.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
rgroup.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
rgroup.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
rgroup.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 "
|
|
group.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 "
|
|
group.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 "
|
|
group.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 "
|
|
group.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 "
|
|
group.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 "
|
|
group.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 "
|
|
group.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 "
|
|
else
|
|
rgroup.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
rgroup.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
rgroup.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
rgroup.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
rgroup.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
rgroup.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
rgroup.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
rgroup.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 "
|
|
group.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 "
|
|
group.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 "
|
|
group.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 "
|
|
group.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 "
|
|
group.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 "
|
|
group.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 "
|
|
group.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 "
|
|
else
|
|
rgroup.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
rgroup.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
rgroup.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
rgroup.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
rgroup.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
rgroup.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
rgroup.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
rgroup.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 "
|
|
group.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 "
|
|
group.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 "
|
|
group.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 "
|
|
group.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 "
|
|
group.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 "
|
|
group.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 "
|
|
group.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 "
|
|
else
|
|
rgroup.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
rgroup.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
rgroup.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
rgroup.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
rgroup.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
rgroup.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
rgroup.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
rgroup.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 "
|
|
group.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 "
|
|
group.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 "
|
|
group.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 "
|
|
group.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 "
|
|
group.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 "
|
|
group.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 "
|
|
group.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 "
|
|
else
|
|
rgroup.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
rgroup.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
rgroup.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
rgroup.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
rgroup.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
rgroup.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
rgroup.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
rgroup.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 "
|
|
group.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 "
|
|
group.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000"
|
|
group.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004"
|
|
group.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008"
|
|
group.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012"
|
|
group.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016"
|
|
else
|
|
rgroup.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
rgroup.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
rgroup.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
rgroup.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
rgroup.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
rgroup.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
rgroup.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
else
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 "
|
|
rgroup.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 "
|
|
rgroup.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 "
|
|
rgroup.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
|
|
rgroup.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
|
|
rgroup.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
|
|
rgroup.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
|
|
rgroup.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
|
|
rgroup.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
|
|
rgroup.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
|
|
rgroup.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
|
|
rgroup.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
|
|
rgroup.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
|
|
rgroup.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
|
|
rgroup.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
|
|
rgroup.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
|
|
rgroup.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
|
|
rgroup.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
|
|
rgroup.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
|
|
rgroup.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
|
|
rgroup.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
|
|
rgroup.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
|
|
rgroup.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
|
|
rgroup.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
|
|
rgroup.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
|
|
rgroup.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
|
|
rgroup.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
|
|
rgroup.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
|
|
rgroup.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
|
|
rgroup.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
|
|
rgroup.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
|
|
rgroup.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
|
|
rgroup.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
|
|
rgroup.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
|
|
rgroup.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
|
|
rgroup.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
|
|
rgroup.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
|
|
rgroup.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
|
|
rgroup.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
|
|
rgroup.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
|
|
rgroup.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
|
|
rgroup.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
|
|
rgroup.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
|
|
rgroup.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
|
|
rgroup.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
|
|
rgroup.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
|
|
rgroup.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
|
|
rgroup.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
|
|
rgroup.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
|
|
rgroup.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
|
|
rgroup.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
|
|
rgroup.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
|
|
rgroup.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
|
|
rgroup.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
|
|
rgroup.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
|
|
rgroup.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
|
|
rgroup.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
|
|
rgroup.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
|
|
rgroup.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
|
|
rgroup.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
|
|
rgroup.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
|
|
rgroup.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
|
|
rgroup.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
|
|
rgroup.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
|
|
rgroup.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
|
|
rgroup.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
|
|
rgroup.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
|
|
rgroup.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
|
|
rgroup.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
|
|
rgroup.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
|
|
rgroup.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
|
|
rgroup.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
|
|
rgroup.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
|
|
rgroup.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
|
|
rgroup.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
|
|
rgroup.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
|
|
rgroup.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
|
|
rgroup.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
|
|
rgroup.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
|
|
rgroup.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
|
|
rgroup.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
|
|
rgroup.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
|
|
rgroup.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
|
|
rgroup.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
|
|
rgroup.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
|
|
rgroup.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
|
|
rgroup.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
|
|
rgroup.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
|
|
rgroup.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
|
|
rgroup.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
|
|
rgroup.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
|
|
rgroup.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
|
|
rgroup.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
|
|
rgroup.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
rgroup.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
rgroup.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
rgroup.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
rgroup.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
rgroup.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
rgroup.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
rgroup.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
rgroup.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
rgroup.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
rgroup.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
rgroup.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
rgroup.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
rgroup.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
rgroup.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
rgroup.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
rgroup.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
rgroup.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
rgroup.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
rgroup.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
rgroup.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
rgroup.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
rgroup.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
rgroup.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
rgroup.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
rgroup.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
rgroup.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
rgroup.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
rgroup.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
rgroup.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
rgroup.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
rgroup.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
rgroup.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
rgroup.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
rgroup.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
rgroup.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
rgroup.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
rgroup.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
rgroup.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
rgroup.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
rgroup.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
rgroup.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
rgroup.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
rgroup.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
rgroup.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
rgroup.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
rgroup.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
rgroup.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
rgroup.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
rgroup.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
rgroup.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
rgroup.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
rgroup.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
rgroup.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
rgroup.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
rgroup.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
rgroup.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
rgroup.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
rgroup.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
rgroup.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
rgroup.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
rgroup.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
rgroup.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
rgroup.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
rgroup.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
rgroup.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
rgroup.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
rgroup.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
rgroup.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
rgroup.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
rgroup.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
rgroup.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
rgroup.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
rgroup.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
rgroup.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
rgroup.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
rgroup.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
rgroup.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
rgroup.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
rgroup.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
rgroup.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
rgroup.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
rgroup.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
rgroup.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
rgroup.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
rgroup.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
rgroup.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
rgroup.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
rgroup.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
rgroup.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
rgroup.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
rgroup.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
rgroup.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
rgroup.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
rgroup.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
rgroup.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
rgroup.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
rgroup.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
rgroup.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
rgroup.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
rgroup.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
rgroup.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
rgroup.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
rgroup.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
rgroup.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
rgroup.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
rgroup.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
rgroup.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
rgroup.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
rgroup.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
rgroup.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
rgroup.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
rgroup.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
rgroup.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
rgroup.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
rgroup.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
rgroup.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
rgroup.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
rgroup.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
rgroup.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
rgroup.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
rgroup.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
rgroup.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
rgroup.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
rgroup.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
rgroup.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
rgroup.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
rgroup.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
rgroup.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
rgroup.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
rgroup.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
rgroup.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
rgroup.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
rgroup.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
rgroup.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
rgroup.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
rgroup.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
rgroup.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
rgroup.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
rgroup.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
rgroup.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
rgroup.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
rgroup.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
rgroup.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
rgroup.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
rgroup.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
rgroup.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
rgroup.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
rgroup.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
rgroup.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
rgroup.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
rgroup.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
rgroup.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
rgroup.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
rgroup.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
tree.end
|
|
width 14.
|
|
tree "Configuration Registers"
|
|
rgroup.long 0xC00++0x03
|
|
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
|
|
textline " "
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1)
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
rgroup.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x2)
|
|
group.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
rgroup.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x3)
|
|
group.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
rgroup.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x4)
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
rgroup.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x5)
|
|
group.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
rgroup.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x6)
|
|
group.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
rgroup.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x7)
|
|
group.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
rgroup.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x8)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
rgroup.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x9)
|
|
group.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
rgroup.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0xA)
|
|
group.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
rgroup.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0xB)
|
|
group.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
rgroup.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0xC)
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
rgroup.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0xD)
|
|
group.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
rgroup.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0xE)
|
|
group.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
rgroup.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0xF)
|
|
group.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
rgroup.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
rgroup.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
rgroup.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
rgroup.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
rgroup.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
rgroup.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
rgroup.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
rgroup.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
rgroup.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
rgroup.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
rgroup.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
rgroup.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
rgroup.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
rgroup.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
rgroup.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
rgroup.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
rgroup.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral Interrupt Status Registers"
|
|
rgroup.long 0x0D00++0x03
|
|
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
width 22.
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High"
|
|
else
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High"
|
|
else
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High"
|
|
else
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High"
|
|
else
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High"
|
|
else
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High"
|
|
else
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High"
|
|
else
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High"
|
|
else
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High"
|
|
else
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High"
|
|
else
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High"
|
|
else
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High"
|
|
else
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High"
|
|
else
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High"
|
|
else
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High"
|
|
else
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High"
|
|
else
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High"
|
|
else
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High"
|
|
else
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High"
|
|
else
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High"
|
|
else
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High"
|
|
else
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High"
|
|
else
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High"
|
|
else
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x060++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High"
|
|
else
|
|
rgroup.long 0x0D60++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High"
|
|
else
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High"
|
|
else
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High"
|
|
else
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High"
|
|
else
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High"
|
|
else
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High"
|
|
else
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x40021000+0x04))&0x0000001F)>=0x1F)
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High"
|
|
else
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Software Generated Interrupt"
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure"
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x0F20++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
group.long 0x0F24++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
group.long 0x0F28++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
group.long 0x0F2C++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral/Component ID Registers"
|
|
rgroup.byte 0x0FE0++0x00
|
|
line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field"
|
|
rgroup.byte 0x0FE4++0x00
|
|
line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FE8++0x00
|
|
line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High"
|
|
bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7"
|
|
rgroup.byte 0x0FEC++0x00
|
|
line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register"
|
|
bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD0++0x00
|
|
line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register"
|
|
bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0xFD4++0x00
|
|
line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register"
|
|
rgroup.byte 0xFD8++0x00
|
|
line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register"
|
|
rgroup.byte 0xFDC++0x00
|
|
line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register"
|
|
textline " "
|
|
rgroup.byte 0xFF0++0x00
|
|
line.byte 0x00 "GICD_CIDR0,Component ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.byte 0xFF4++0x00
|
|
line.byte 0x00 "GICD_CIDR1,Component ID1 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.byte 0xFF8++0x00
|
|
line.byte 0x00 "GICD_CIDR2,Component ID2 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.byte 0xFFC++0x00
|
|
line.byte 0x00 "GICD_CIDR3,Component ID3 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
textline " "
|
|
tree.end
|
|
tree.end
|
|
width 0x0B
|
|
base ad:0x40022000
|
|
width 17.
|
|
tree "CPU Interface"
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x0)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
else
|
|
if PER.ADDRESS.isSECUREEX(ad:0x40022000)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)"
|
|
bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common"
|
|
bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)"
|
|
bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
endif
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
if PER.ADDRESS.isSECUREEX(ad:0x40022000+0x0008)
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
hgroup.long 0x001C++0x03
|
|
hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
endif
|
|
hgroup.long 0x0020++0x003
|
|
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
|
|
in
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0024++0x03
|
|
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0028++0x03
|
|
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
else
|
|
hgroup.long 0x0024++0x03
|
|
hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
|
|
hgroup.long 0x0028++0x03
|
|
hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
|
|
endif
|
|
group.long 0x00D0++0x03
|
|
line.long 0x00 "GICC_APR0,Active Priorities Register"
|
|
if (((per.l(ad:0x40021000+0x04))&0x400)==0x400)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
|
|
else
|
|
hgroup.long 0x00E0++0x03
|
|
hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
|
|
endif
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
wgroup.long 0x1000++0x03
|
|
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID"
|
|
tree.end
|
|
sif CPU.FEATURE(hypervisor)
|
|
base ad:0x40024000
|
|
width 12.
|
|
tree "Virtual CPU Control Interface"
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
|
|
bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICH_VTR,VGIC Type Register"
|
|
bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..."
|
|
group.long 0x008++0x03
|
|
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
|
|
bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1"
|
|
bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1"
|
|
bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1"
|
|
bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1"
|
|
bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1"
|
|
rgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
|
|
bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x020++0x03
|
|
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
|
|
bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x0030++0x03
|
|
line.long 0x00 "GICH_ELSR0,Empty List register Status Register"
|
|
bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty"
|
|
group.long 0x00F0++0x03
|
|
line.long 0x00 "GICH_APR0,Active Priorities Register"
|
|
bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
if (((per.l(ad:0x40024000+0x100))&0x80000000)==0x80000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GICH_LR0,List Register 0"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GICH_LR0,List Register 0"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
if (((per.l(ad:0x40024000+0x104))&0x80000000)==0x80000000)
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "GICH_LR1,List Register 1"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "GICH_LR1,List Register 1"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
if (((per.l(ad:0x40024000+0x108))&0x80000000)==0x80000000)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GICH_LR2,List Register 2"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GICH_LR2,List Register 2"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
if (((per.l(ad:0x40024000+0x10C))&0x80000000)==0x80000000)
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GICH_LR3,List Register 3"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GICH_LR3,List Register 3"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
tree.end
|
|
base ad:0x40026000
|
|
width 12.
|
|
tree "Virtual CPU Interface"
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICV_CTLR,Virtual Machine Control Register"
|
|
bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common"
|
|
bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
|
|
bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICV_BPR,VM Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICV_EOIR,VM End of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICV_RPR,VM Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
hgroup.long 0x0020++0x03
|
|
hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0024++0x03
|
|
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0028++0x03
|
|
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x00D0++0x03
|
|
line.long 0x00 "GICV_APR0,VM Active Priority Register"
|
|
bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
wgroup.long 0x1000++0x03
|
|
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID"
|
|
tree.end
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
elif (CORENAME()=="CORTEXM4F")
|
|
tree.close "Core Registers (Cortex-M4F)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
|
|
bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
|
|
bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
|
|
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
|
|
bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
rgroup.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD04++0x23
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
|
|
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
|
|
bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
|
|
rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
|
|
bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
|
|
line.long 0x0C "SCR,System Control Register"
|
|
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
line.long 0x10 "CCR,Configuration Control Register"
|
|
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
|
|
bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
|
|
line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
|
|
bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
|
|
bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
|
|
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
|
|
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
|
|
group.byte 0xD28++0x1
|
|
line.byte 0x00 "MMFSR,MemManage Status Register"
|
|
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
|
|
group.word 0xD2A++0x1
|
|
line.word 0x00 "USAFAULT,Usage Fault Status Register"
|
|
bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
|
|
bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
|
|
bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
|
|
bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
|
|
group.long 0xD2C++0x07
|
|
line.long 0x00 "HFSR,Hard Fault Status Register"
|
|
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
|
|
line.long 0x04 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
|
|
bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
|
|
group.long 0xD34++0x0B
|
|
line.long 0x00 "MMFAR,MemManage Fault Address Register"
|
|
line.long 0x04 "BFAR,BusFault Address Register"
|
|
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
|
|
wgroup.long 0xF00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
|
|
width 10.
|
|
tree "Feature Registers"
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
autoindent.on center tree
|
|
tree "FB"
|
|
base ad:0x40100000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CSPMCR,Chip Select Port Multiplexing Control Register"
|
|
bitfld.long 0x00 28.--31. "GROUP1,FlexBus Signal Group 1 Multiplex control" "0: GROUP1_0,1: no description available,2: no description available,?..."
|
|
bitfld.long 0x00 24.--27. "GROUP2,FlexBus Signal Group 2 Multiplex control" "0: no description available,1: GROUP2_1,2: no description available,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "GROUP3,FlexBus Signal Group 3 Multiplex control" "0: no description available,1: GROUP3_1,2: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "GROUP4,FlexBus Signal Group 4 Multiplex control" "0: no description available,1: no description available,2: no description available,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "GROUP5,FlexBus Signal Group 5 Multiplex control" "0: no description available,1: no description available,2: no description available,?..."
|
|
endif
|
|
repeat 6. (increment 0 1)(increment 0 0xC)
|
|
tree "CS[$1]"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "CSAR,Chip Select Address Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "BA,Base Address"
|
|
group.long ($2+0x04)++0x03
|
|
line.long 0x00 "CSMR,Chip Select Mask Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "BAM,Base Address Mask"
|
|
bitfld.long 0x00 8. "WP,Write Protect" "0: Write accesses are allowed,1: Write accesses are not allowed"
|
|
newline
|
|
bitfld.long 0x00 0. "V,Valid" "0: Chip-select is invalid,1: Chip-select is valid"
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "CSCR,Chip Select Control Register"
|
|
bitfld.long 0x00 26.--31. "SWS,Secondary Wait States" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "SWSEN,Secondary Wait State Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. "EXTS,EXTS" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 20.--21. "ASET,Address Setup" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "RDAH,Read Address Hold or Deselect" "0: When AA is 1b 1 cycle,1: When AA is 1b 2 cycles,2: When AA is 1b 3 cycles,3: When AA is 1b 4 cycles"
|
|
bitfld.long 0x00 16.--17. "WRAH,Write Address Hold or Deselect" "0: no description available,1: 2 cycles,2: 3 cycles,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 10.--15. "WS,Wait States" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 9. "BLS,Byte-Lane Shift" "0: Not shifted,1: Shifted"
|
|
newline
|
|
bitfld.long 0x00 8. "AA,Auto-Acknowledge Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 6.--7. "PS,Port Size" "0: 32-bit port size,1: no description available,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 5. "BEM,Byte-Enable Mode" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 4. "BSTR,Burst-Read Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "BSTW,Burst-Write Enable" "0: Disabled,1: Enabled"
|
|
endif
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "USB (Universal Serial Bus)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40330000 ad:0x40340000)
|
|
tree "USB$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "ID,Identification register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "REVISION,Revision number of the controller core"
|
|
bitfld.long 0x00 8.--13. "NID,Complement version of ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "ID,Configuration number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "HWGENERAL,Hardware General"
|
|
bitfld.long 0x00 9.--10. "SM,Serial interface mode capability SM bit reset value is '00b'" "0: No Serial Engine always use parallel signalling,1: Serial Engine present always use serial..,2: Software programmable - Reset to use parallel..,3: Software programmable - Reset to use serial.."
|
|
bitfld.long 0x00 6.--8. "PHYM,Transciever type PHYM bit reset value: '0000b' for OTG controller core '0100b' for Host-only controller core" "0: UTMI/UMTI+,1: ULPI DDR,2: PHYM_2,3: Serial Only,4: Software programmable - reset to UTMI/UTMI+,5: Software programmable - reset to ULPI DDR,6: Software programmable - reset to ULPI,7: Software programmable - reset to Serial"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PHYW,Data width of the transciever connected to the controller core" "0: 8 bit wide data bus Software non-programmable,1: 16 bit wide data bus Software non-programmable,2: Reset to 8 bit wide data bus Software..,3: Reset to 16 bit wide data bus Software.."
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "HWHOST,Host Hardware Parameters"
|
|
bitfld.long 0x00 1.--3. "NPORT,The Nmber of downstream ports supported by the host controller is (NPORT+1)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "HC,Host Capable" "0: Not supported,1: Supported"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "HWDEVICE,Device Hardware Parameters"
|
|
bitfld.long 0x00 1.--5. "DEVEP,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "DC,Device Capable" "0: Not supported,1: Supported"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "HWTXBUF,TX Buffer Hardware Parameters"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TXCHANADD,TX FIFO Buffer size is: (2^TXCHANADD) * 4 Bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXBURST,Default burst size for memory to TX buffer transfer"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "HWRXBUF,RX Buffer Hardware Parameters"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RXADD,Buffer total size for all receive endpoints is (2^RXADD)"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXBURST,Default burst size for memory to RX buffer transfer"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "GPTIMER0LD,General Purpose Timer #0 Load"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "GPTLD,General Purpose Timer Load Value These bit fields are loaded to GPTCNT bits when GPTRST bit is set '1b'"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "GPTIMER0CTRL,General Purpose Timer #0 Controller"
|
|
bitfld.long 0x00 31. "GPTRUN,General Purpose Timer Run GPTCNT bits are not effected when setting or clearing this bit" "0: Stop counting,1: GPTRUN_1"
|
|
bitfld.long 0x00 30. "GPTRST,General Purpose Timer Reset" "0: No action,1: Load counter value from GPTLD bits in.."
|
|
newline
|
|
bitfld.long 0x00 24. "GPTMODE,General Purpose Timer Mode In one shot mode the timer will count down to zero generate an interrupt and stop until the counter is reset by software In repeat mode the timer will count down to zero generate an interrupt and automatically reload.." "0: One Shot Mode,1: Repeat Mode"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "GPTCNT,General Purpose Timer Counter"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "GPTIMER1LD,General Purpose Timer #1 Load"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "GPTLD,General Purpose Timer Load Value These bit fields are loaded to GPTCNT bits when GPTRST bit is set '1b'"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GPTIMER1CTRL,General Purpose Timer #1 Controller"
|
|
bitfld.long 0x00 31. "GPTRUN,General Purpose Timer Run GPTCNT bits are not effected when setting or clearing this bit" "0: Stop counting,1: GPTRUN_1"
|
|
bitfld.long 0x00 30. "GPTRST,General Purpose Timer Reset" "0: No action,1: Load counter value from GPTLD bits in.."
|
|
newline
|
|
bitfld.long 0x00 24. "GPTMODE,General Purpose Timer Mode In one shot mode the timer will count down to zero generate an interrupt and stop until the counter is reset by software" "0: One Shot Mode,1: Repeat Mode"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "GPTCNT,General Purpose Timer Counter"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "SBUSCFG,System Bus Config"
|
|
bitfld.long 0x00 0.--2. "AHBBRST,AHB master interface Burst configuration These bits control AHB master transfer type sequence (or priority)" "0: Incremental burst of unspecified length only,1: INCR4 burst then single transfer,2: INCR8 burst INCR4 burst then single transfer,3: INCR16 burst INCR8 burst INCR4 burst then..,?,5: INCR4 burst then incremental burst of..,6: INCR8 burst INCR4 burst then incremental..,7: INCR16 burst INCR8 burst INCR4 burst then.."
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "CAPLENGTH,Capability Registers Length"
|
|
hexmask.byte 0x00 0.--7. 1. "CAPLENGTH,These bits are used as an offset to add to register base to find the beginning of the Operational Register"
|
|
rgroup.word 0x102++0x01
|
|
line.word 0x00 "HCIVERSION,Host Controller Interface Version"
|
|
hexmask.word 0x00 0.--15. 1. "HCIVERSION,Host Controller Interface Version Number Default value is '10h' which means EHCI rev1.0"
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "HCSPARAMS,Host Controller Structural Parameters"
|
|
bitfld.long 0x00 24.--27. "N_TT,Number of Transaction Translators (N_TT)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "N_PTT,Number of Ports per Transaction Translator (N_PTT)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16. "PI,Port Indicators (P INDICATOR) This bit indicates whether the ports support port indicator control" "0,1"
|
|
bitfld.long 0x00 12.--15. "N_CC,Number of Companion Controller (N_CC)" "0: There is no internal Companion Controller and..,1: There are internal companion controller(s)..,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "N_PCC,Number of Ports per Companion Controller This field indicates the number of ports supported per internal Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. "PPC,Port Power Control This field indicates whether the host controller implementation includes port power control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "N_PORTS,Number of downstream ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "HCCPARAMS,Host Controller Capability Parameters"
|
|
hexmask.long.byte 0x00 8.--15. 1. "EECP,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x00 4.--7. "IST,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2. "ASP,Asynchronous Schedule Park Capability If this bit is set to a one then the host controller supports the park feature for high-speed queue heads in the Asynchronous Schedule" "0,1"
|
|
bitfld.long 0x00 1. "PFL,Programmable Frame List Flag If this bit is set to zero then the system software must use a frame list length of 1024 elements with this host controller" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ADC,64-bit Addressing Capability This bit is set '0b' in all controller core no 64-bit addressing capability is supported" "0,1"
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "DCIVERSION,Device Controller Interface Version"
|
|
hexmask.word 0x00 0.--15. 1. "DCIVERSION,Device Controller Interface Version Number Default value is '01h' which means rev0.1"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "DCCPARAMS,Device Controller Capability Parameters"
|
|
bitfld.long 0x00 8. "HC,Host Capable When this bit is 1 this controller is capable of operating as an EHCI compatible USB 2" "0,1"
|
|
bitfld.long 0x00 7. "DC,Device Capable When this bit is 1 this controller is capable of operating as a USB 2.0 device" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "DEN,Device Endpoint Number This field indicates the number of endpoints built into the device controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ITC,Interrupt Threshold Control -Read/"
|
|
bitfld.long 0x00 15. "FS_2,See also bits 3-2 Frame List Size - (Read/Write or Read Only)" "0: 1024 elements (4096 bytes) Default value,1: 512 elements (2048 bytes)"
|
|
newline
|
|
bitfld.long 0x00 13. "SUTW,Setup TripWire - Read/" "0,1"
|
|
bitfld.long 0x00 12. "ATDTW,Add dTD TripWire - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ASPE,Asynchronous Schedule Park Mode Enable - Read/" "0,1"
|
|
bitfld.long 0x00 8.--9. "ASP,Asynchronous Schedule Park Mode Count - Read/" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6. "IAA,Interrupt on Async Advance Doorbell - Read/" "0,1"
|
|
bitfld.long 0x00 5. "ASE,Asynchronous Schedule Enable - Read/" "0: Do not process the Asynchronous Schedule,1: Use the ASYNCLISTADDR register to access the.."
|
|
newline
|
|
bitfld.long 0x00 4. "PSE,Periodic Schedule Enable- Read/" "0: Do not process the Periodic Schedule,1: Use the PERIODICLISTBASE register to access.."
|
|
bitfld.long 0x00 2.--3. "FS_1,See description at bit 15" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 1. "RST,Controller Reset (RESET) - Read/" "0,1"
|
|
bitfld.long 0x00 0. "RS,Run/Stop (RS) - Read/" "0,1"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "USBSTS,USB Status Register"
|
|
bitfld.long 0x00 25. "TI1,General Purpose Timer Interrupt 1(GPTINT1)--R/WC" "0,1"
|
|
bitfld.long 0x00 24. "TI0,General Purpose Timer Interrupt 0(GPTINT0)--R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "UPI,USB Host Periodic Interrupt (USBHSTPERINT)" "0,1"
|
|
bitfld.long 0x00 18. "UAI,USB Host Asynchronous Interrupt (USBHSTASYNCINT)" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 16. "NAKI,NAK Interrupt Bit--RO" "0,1"
|
|
bitfld.long 0x00 15. "AS,Asynchronous Schedule Status - Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PS,Periodic Schedule Status - Read Only" "0,1"
|
|
bitfld.long 0x00 13. "RCL,Reclamation - Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "HCH,HCHaIted - Read Only" "0,1"
|
|
bitfld.long 0x00 10. "ULPII,ULPI Interrupt - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SLI,DCSuspend - R/WC" "0,1"
|
|
bitfld.long 0x00 7. "SRI,SOF Received - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "URI,USB Reset Received - R/WC" "0,1"
|
|
bitfld.long 0x00 5. "AAI,Interrupt on Async Advance - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SEI,System Error- R/WC" "0,1"
|
|
bitfld.long 0x00 3. "FRI,Frame List Rollover - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCI,Port Change Detect - R/WC" "0,1"
|
|
bitfld.long 0x00 1. "UEI,USB Error Interrupt (USBERRINT) - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UI,USB Interrupt (USBINT) - R/WC" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "USBSTS,USB Status Register"
|
|
bitfld.long 0x00 25. "TI1,General Purpose Timer Interrupt 1(GPTINT1)--R/WC" "0,1"
|
|
bitfld.long 0x00 24. "TI0,General Purpose Timer Interrupt 0(GPTINT0)--R/WC" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 16. "NAKI,NAK Interrupt Bit--RO" "0,1"
|
|
bitfld.long 0x00 15. "AS,Asynchronous Schedule Status - Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PS,Periodic Schedule Status - Read Only" "0,1"
|
|
bitfld.long 0x00 13. "RCL,Reclamation - Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "HCH,HCHaIted - Read Only" "0,1"
|
|
bitfld.long 0x00 10. "ULPII,ULPI Interrupt - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SLI,DCSuspend - R/WC" "0,1"
|
|
bitfld.long 0x00 7. "SRI,SOF Received - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "URI,USB Reset Received - R/WC" "0,1"
|
|
bitfld.long 0x00 5. "AAI,Interrupt on Async Advance - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SEI,System Error- R/WC" "0,1"
|
|
bitfld.long 0x00 3. "FRI,Frame List Rollover - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCI,Port Change Detect - R/WC" "0,1"
|
|
bitfld.long 0x00 1. "UEI,USB Error Interrupt (USBERRINT) - R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UI,USB Interrupt (USBINT) - R/WC" "0,1"
|
|
endif
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "USBINTR,Interrupt Enable Register"
|
|
bitfld.long 0x00 25. "TIE1,General Purpose Timer #1 Interrupt Enable When this bit is one and the TI1 bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
bitfld.long 0x00 24. "TIE0,General Purpose Timer #0 Interrupt Enable When this bit is one and the TI0 bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "UPIE,USB Host Periodic Interrupt Enable When this bit is one and the UPI bit in the n_USBSTS register is one host controller will issue an interrupt at the next interrupt threshold" "0,1"
|
|
bitfld.long 0x00 18. "UAIE,USB Host Asynchronous Interrupt Enable When this bit is one and the UAI bit in the n_USBSTS register is one host controller will issue an interrupt at the next interrupt threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "NAKE,NAK Interrupt Enable When this bit is one and the NAKI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
bitfld.long 0x00 10. "ULPIE,ULPI Interrupt Enable When this bit is one and the UPLII bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SLE,Sleep Interrupt Enable When this bit is one and the SLI bit in n_n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
bitfld.long 0x00 7. "SRE,SOF Received Interrupt Enable When this bit is one and the SRI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "URE,USB Reset Interrupt Enable When this bit is one and the URI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
bitfld.long 0x00 5. "AAE,Async Advance Interrupt Enable When this bit is one and the AAI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SEE,System Error Interrupt Enable When this bit is one and the SEI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
bitfld.long 0x00 3. "FRE,Frame List Rollover Interrupt Enable When this bit is one and the FRI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCE,Port Change Detect Interrupt Enable When this bit is one and the PCI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
bitfld.long 0x00 1. "UEE,USB Error Interrupt Enable When this bit is one and the UEI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UE,USB Interrupt Enable When this bit is one and the UI bit in n_USBSTS register is a one the controller will issue an interrupt" "0,1"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "FRINDEX,USB Frame Index"
|
|
hexmask.long.word 0x00 0.--13. 1. "FRINDEX,Frame Index"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "PERIODICLISTBASE,Frame List Base Address"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. "BASEADR,Base Address (Low)"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "DEVICEADDR,Device Address"
|
|
hexmask.long.byte 0x00 25.--31. 1. "USBADR,Device Address"
|
|
bitfld.long 0x00 24. "USBADRA,Device Address Advance" "0,1"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "ENDPTLISTADDR,Endpoint List Address"
|
|
hexmask.long.tbyte 0x00 11.--31. 1. "EPBASE,Endpoint List Pointer(Low)"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "ASYNCLISTADDR,Next Asynch"
|
|
hexmask.long 0x00 5.--31. 1. "ASYBASE,Link Pointer Low (LPL)"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "BURSTSIZE,Programmable Burst Size"
|
|
hexmask.long.word 0x00 8.--16. 1. "TXPBURST,Programmable TX Burst Size"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXPBURST,Programmable RX Burst Size"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "TXFILLTUNING,TX FIFO Fill Tuning"
|
|
bitfld.long 0x00 16.--21. "TXFIFOTHRES,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--12. "TXSCHHEALTH,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXSCHOH,Scheduler Overhead"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "ENDPTNAK,Endpoint NAK"
|
|
hexmask.long.byte 0x00 16.--23. 1. "EPTN,TX Endpoint NAK - R/WC"
|
|
hexmask.long.byte 0x00 0.--7. 1. "EPRN,RX Endpoint NAK - R/WC"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "ENDPTNAKEN,Endpoint NAK Enable"
|
|
hexmask.long.byte 0x00 16.--23. 1. "EPTNE,TX Endpoint NAK Enable - R/W"
|
|
hexmask.long.byte 0x00 0.--7. 1. "EPRNE,RX Endpoint NAK Enable - R/W"
|
|
rgroup.long 0x180++0x03
|
|
line.long 0x00 "CONFIGFLAG,Configure Flag Register"
|
|
bitfld.long 0x00 0. "CF,Configure Flag Host software sets this bit as the last action in its process of configuring the Host Controller" "0: Port routing control logic default-routes..,1: Port routing control logic default-routes all.."
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port Status & Control"
|
|
bitfld.long 0x00 30.--31. "PTS_1,Bit field {bit25 bit31 bit30}: 000b UTMI/UTMI+ 001b Reserved 010b ULPI 011b Serial/USB 1" "0,1,2,3"
|
|
bitfld.long 0x00 29. "STS,Serial Transceiver Select - Read Only Serial Transceiver Select 1 Serial Interface Engine is selected 0 Parallel Interface signals is selected Serial Interface Engine can be used in combination with UTMI+/ULPI physical interface to provide FS/LS.." "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "PTW,Parallel Transceiver Width This bit has no effect if serial interface engine is used" "0: Select the 8-bit UTMI interface [60MHz],1: Select the 16-bit UTMI interface [30MHz]"
|
|
bitfld.long 0x00 26.--27. "PSPD,Port Speed - Read Only" "0: Full Speed,1: Low Speed,2: High Speed,3: Undefined"
|
|
newline
|
|
bitfld.long 0x00 25. "PTS_2,See description at bits 31-30" "0,1"
|
|
bitfld.long 0x00 24. "PFSC,Port Force Full Speed Connect - Read/" "0: Normal operation,1: Forced to full speed"
|
|
newline
|
|
bitfld.long 0x00 23. "PHCD,PHY Low Power Suspend - Clock Disable (PLPSCD) - Read/" "0: Enable PHY clock,1: Disable PHY clock"
|
|
bitfld.long 0x00 22. "WKOC,Wake on Over-current Enable (WKOC_E) - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "WKDC,Wake on Disconnect Enable (WKDSCNNT_E) - Read/" "0,1"
|
|
bitfld.long 0x00 20. "WKCN,Wake on Connect Enable (WKCNNT_E) - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "PTC,Port Test Control - Read/" "0: TEST_MODE_DISABLE,1: J_STATE,2: K_STATE,3: SE0 (host) / NAK (device),4: Packet,5: FORCE_ENABLE_HS,6: FORCE_ENABLE_FS,7: FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. "PIC,Port Indicator Control - Read/" "0: Port indicators are off,1: PIC_1,2: PIC_2,3: Undefined"
|
|
newline
|
|
bitfld.long 0x00 13. "PO,Port Owner-Read/" "0,1"
|
|
bitfld.long 0x00 12. "PP,Port Power (PP)-Read/Write or Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "LS,Line Status-Read Only" "0: LS_0,1: K-state,2: J-state,3: Undefined"
|
|
rbitfld.long 0x00 9. "HSP,High-Speed Port - Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PR,Port Reset - Read/Write or Read Only" "0,1"
|
|
bitfld.long 0x00 7. "SUSP,Suspend - Read/Write or Read Only" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FPR,Force Port Resume -Read/" "0,1"
|
|
bitfld.long 0x00 5. "OCC,Over-current Change-R/WC" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 4. "OCA,Over-current Active-Read Only" "0: This port does not have an over-current..,1: This port currently has an over-current.."
|
|
bitfld.long 0x00 3. "PEC,Port Enable/Disable Change-R/WC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PE,Port Enabled/Disabled-Read/" "0,1"
|
|
bitfld.long 0x00 1. "CSC,Connect Status Change-R/WC" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "CCS,Current Connect Status-Read Only" "0,1"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "OTGSC,On-The-Go Status & control"
|
|
bitfld.long 0x00 30. "DPIE,Data Pulse Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 29. "EN_1MS,1 millisecond timer Interrupt Enable - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "BSEIE,B Session End Interrupt Enable - Read/" "0,1"
|
|
bitfld.long 0x00 27. "BSVIE,B Session Valid Interrupt Enable - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "ASVIE,A Session Valid Interrupt Enable - Read/" "0,1"
|
|
bitfld.long 0x00 25. "AVVIE,A VBus Valid Interrupt Enable - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "IDIE,USB ID Interrupt Enable - Read/" "0,1"
|
|
bitfld.long 0x00 22. "DPIS,Data Pulse Interrupt Status - Read/Write to Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STATUS_1MS,1 millisecond timer Interrupt Status - Read/Write to Clear" "0,1"
|
|
bitfld.long 0x00 20. "BSEIS,B Session End Interrupt Status - Read/Write to Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BSVIS,B Session Valid Interrupt Status - Read/Write to Clear" "0,1"
|
|
bitfld.long 0x00 18. "ASVIS,A Session Valid Interrupt Status - Read/Write to Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "AVVIS,A VBus Valid Interrupt Status - Read/Write to Clear" "0,1"
|
|
bitfld.long 0x00 16. "IDIS,USB ID Interrupt Status - Read/" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 14. "DPS,Data Bus Pulsing Status - Read Only" "0,1"
|
|
rbitfld.long 0x00 13. "TOG_1MS,1 millisecond timer toggle - Read Only" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 12. "BSE,B Session End - Read Only" "0,1"
|
|
rbitfld.long 0x00 11. "BSV,B Session Valid - Read Only" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 10. "ASV,A Session Valid - Read Only" "0,1"
|
|
rbitfld.long 0x00 9. "AVV,A VBus Valid - Read Only" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "ID,USB ID - Read Only" "0: A device,1: B device"
|
|
bitfld.long 0x00 5. "IDPU,ID Pullup - Read/Write This bit provide control over the ID pull-up resistor" "0: off,1: on"
|
|
newline
|
|
bitfld.long 0x00 4. "DP,Data Pulsing - Read/" "0,1"
|
|
bitfld.long 0x00 3. "OT,OTG Termination - Read/" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "VC,VBUS Charge - Read/" "0,1"
|
|
bitfld.long 0x00 0. "VD,VBUS_Discharge - Read/" "0,1"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "USBMODE,USB Device Mode"
|
|
bitfld.long 0x00 4. "SDIS,Stream Disable Mode" "0,1"
|
|
bitfld.long 0x00 3. "SLOM,Setup Lockout Mode" "0: Setup Lockouts On (default),1: Setup Lockouts Off (DCD requires use of Setup.."
|
|
newline
|
|
bitfld.long 0x00 2. "ES,Endian Select - Read/" "0: Little Endian [Default],1: Big Endian"
|
|
bitfld.long 0x00 0.--1. "CM,Controller Mode - R/WO" "0: Idle [Default for combination host/device],?,2: Device Controller [Default for device only..,3: Host Controller [Default for host only.."
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "ENDPTSETUPSTAT,Endpoint Setup Status"
|
|
hexmask.long.word 0x00 0.--15. 1. "ENDPTSETUPSTAT,Setup Endpoint Status"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "ENDPTPRIME,Endpoint Prime"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PETB,Prime Endpoint Transmit Buffer - R/WS"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PERB,Prime Endpoint Receive Buffer - R/WS"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "ENDPTFLUSH,Endpoint Flush"
|
|
hexmask.long.byte 0x00 16.--23. 1. "FETB,Flush Endpoint Transmit Buffer - R/WS"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FERB,Flush Endpoint Receive Buffer - R/WS"
|
|
rgroup.long 0x1B8++0x03
|
|
line.long 0x00 "ENDPTSTAT,Endpoint Status"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ETBR,Endpoint Transmit Buffer Ready -- Read Only"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ERBR,Endpoint Receive Buffer Ready -- Read Only"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "ENDPTCOMPLETE,Endpoint Complete"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ETCE,Endpoint Transmit Complete Event - R/WC"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ERCE,Endpoint Receive Complete Event - RW/C"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "ENDPTCTRL0,Endpoint Control0"
|
|
bitfld.long 0x00 23. "TXE,TX Endpoint Enable 1 Enabled Endpoint0 is always enabled" "0,1"
|
|
bitfld.long 0x00 18.--19. "TXT,TX Endpoint Type - Read/" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 16. "TXS,TX Endpoint Stall - Read/Write 0 End Point OK [Default] 1 End Point Stalled Software can write a one to this bit to force the endpoint to return a STALL handshake to the Host" "0,1"
|
|
bitfld.long 0x00 7. "RXE,RX Endpoint Enable 1 Enabled Endpoint0 is always enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "RXT,RX Endpoint Type - Read/Write 00 Control Endpoint0 is fixed as a Control End Point" "0,1,2,3"
|
|
bitfld.long 0x00 0. "RXS,RX Endpoint Stall - Read/Write 0 End Point OK" "0,1"
|
|
repeat 7. (strings "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 )
|
|
group.long ($2+0x1C4)++0x03
|
|
line.long 0x00 "ENDPTCTRL$1,Endpoint Control $1"
|
|
bitfld.long 0x00 23. "TXE,TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured" "0,1"
|
|
bitfld.long 0x00 22. "TXR,TX Data Toggle Reset (WS)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "TXI,TX Data Toggle Inhibit 0 PID Sequencing Enabled" "0,1"
|
|
bitfld.long 0x00 18.--19. "TXT,TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 17. "TXD,TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0" "0,1"
|
|
bitfld.long 0x00 16. "TXS,TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until.." "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RXE,RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured" "0,1"
|
|
bitfld.long 0x00 6. "RXR,RX Data Toggle Reset (WS)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXI,RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero" "0,1"
|
|
bitfld.long 0x00 2.--3. "RXT,RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Reserved" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 1. "RXD,RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero" "0,1"
|
|
bitfld.long 0x00 0. "RXS,RX Endpoint Stall - Read/Write 0 End Point OK" "0,1"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "USBNC (Universal Serial Bus)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40330200 ad:0x40340200)
|
|
tree "USBNC$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "_CTRL1,USB OTG Control 1 Register"
|
|
rbitfld.long 0x00 31. "WIR,Wake-up Interrupt Request This bit indicates that a wake-up interrupt request is received on the OTGn port" "0: No wake-up interrupt request received,1: Wake-up Interrupt Request received"
|
|
bitfld.long 0x00 29. "WKUP_DPDM_EN,Wake-up on DPDM change enable" "0: DPDM changes wake-up to be disabled only when..,1: (Default) DPDM changes wake-up to be enabled.."
|
|
newline
|
|
bitfld.long 0x00 20. "ULPI_PHY_CLK_EN,ULPI PHY clock enable" "0: ULPI_PHY_CLK_EN_0,1: ULPI_PHY_CLK_EN_1"
|
|
bitfld.long 0x00 17. "WKUP_VBUS_EN,Wake-up on VBUS change enable" "0: WKUP_VBUS_EN_0,1: WKUP_VBUS_EN_1"
|
|
newline
|
|
bitfld.long 0x00 16. "WKUP_ID_EN,Wake-up on ID change enable" "0: WKUP_ID_EN_0,1: WKUP_ID_EN_1"
|
|
bitfld.long 0x00 15. "WKUP_SW,Software Wake-up" "0: WKUP_SW_0,1: Force wake-up"
|
|
newline
|
|
bitfld.long 0x00 14. "WKUP_SW_EN,Software Wake-up Enable" "0: WKUP_SW_EN_0,1: WKUP_SW_EN_1"
|
|
bitfld.long 0x00 10. "WIE,Wake-up Interrupt Enable This bit enables or disables the OTGn wake-up interrupt" "0: Interrupt Disabled,1: Interrupt Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "PWR_POL,Power Polarity This bit should be set according to PMIC Power Pin polarity" "0: PMIC Power Pin is Low active,1: PMIC Power Pin is High active"
|
|
bitfld.long 0x00 8. "OVER_CUR_POL,Polarity of Overcurrent The polarity of OTGn/OTG2 port overcurrent event" "0: High active (high on this signal represents..,1: Low active (low on this signal represents an.."
|
|
newline
|
|
bitfld.long 0x00 7. "OVER_CUR_DIS,Disable Overcurrent Detection" "0: Enables overcurrent detection,1: Disables overcurrent detection"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "_CTRL2,USB OTG Control 2 Register"
|
|
eventfld.long 0x00 31. "UTMI_CLK_VLD,Indicate whether the UTMI clock to the USB PHY is valid" "0: UTMI_CLK_VLD_0,?..."
|
|
bitfld.long 0x00 3. "LOWSPEED_EN,Set if AUTURESUME_EN is set and works on low speed" "0: LOWSPEED_EN_0,?..."
|
|
newline
|
|
bitfld.long 0x00 2. "AUTURESUME_EN,Auto Resume Enable" "0: AUTURESUME_EN_0,?..."
|
|
bitfld.long 0x00 0.--1. "VBUS_SOURCE_SEL,VBUS source select when detect VBUS wakeup event it is for UTMI PHY only (UH core has no such feature)" "0,1,2,3"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "_HSIC_CTRL,USB Host HSIC Control Register"
|
|
rbitfld.long 0x00 31. "CLK_VLD,Indicating whether Host HSIC clock is valid" "?,1: CLK_VLD_1"
|
|
bitfld.long 0x00 12. "HSIC_EN,Host HSIC enable" "0: HSIC_EN_0,1: HSIC_EN_1"
|
|
newline
|
|
bitfld.long 0x00 11. "HSIC_CLK_ON,Force Host HSIC module 480M clock on even when in Host is in suspend mode" "0: HSIC_CLK_ON_0,1: HSIC_CLK_ON_1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "USBPHY (USBPHY Register Reference Index)"
|
|
base ad:0x40350000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWD,USB PHY Power-Down Register"
|
|
bitfld.long 0x00 20. "RXPWDRX,This bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the entire USB PHY receiver block.."
|
|
newline
|
|
bitfld.long 0x00 19. "RXPWDDIFF,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 18. "RXPWD1PT1,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 17. "RXPWDENV,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed receiver.."
|
|
newline
|
|
bitfld.long 0x00 12. "TXPWDV2I,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY transmit V-to-I.."
|
|
newline
|
|
bitfld.long 0x00 11. "TXPWDIBIAS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY current bias block for.."
|
|
newline
|
|
bitfld.long 0x00 10. "TXPWDFS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed drivers"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PWD_SET,USB PHY Power-Down Register"
|
|
bitfld.long 0x00 20. "RXPWDRX,This bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the entire USB PHY receiver block.."
|
|
newline
|
|
bitfld.long 0x00 19. "RXPWDDIFF,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 18. "RXPWD1PT1,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 17. "RXPWDENV,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed receiver.."
|
|
newline
|
|
bitfld.long 0x00 12. "TXPWDV2I,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY transmit V-to-I.."
|
|
newline
|
|
bitfld.long 0x00 11. "TXPWDIBIAS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY current bias block for.."
|
|
newline
|
|
bitfld.long 0x00 10. "TXPWDFS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed drivers"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PWD_CLR,USB PHY Power-Down Register"
|
|
bitfld.long 0x00 20. "RXPWDRX,This bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the entire USB PHY receiver block.."
|
|
newline
|
|
bitfld.long 0x00 19. "RXPWDDIFF,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 18. "RXPWD1PT1,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 17. "RXPWDENV,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed receiver.."
|
|
newline
|
|
bitfld.long 0x00 12. "TXPWDV2I,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY transmit V-to-I.."
|
|
newline
|
|
bitfld.long 0x00 11. "TXPWDIBIAS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY current bias block for.."
|
|
newline
|
|
bitfld.long 0x00 10. "TXPWDFS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed drivers"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PWD_TOG,USB PHY Power-Down Register"
|
|
bitfld.long 0x00 20. "RXPWDRX,This bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the entire USB PHY receiver block.."
|
|
newline
|
|
bitfld.long 0x00 19. "RXPWDDIFF,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 18. "RXPWD1PT1,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed differential.."
|
|
newline
|
|
bitfld.long 0x00 17. "RXPWDENV,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB high-speed receiver.."
|
|
newline
|
|
bitfld.long 0x00 12. "TXPWDV2I,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY transmit V-to-I.."
|
|
newline
|
|
bitfld.long 0x00 11. "TXPWDIBIAS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB PHY current bias block for.."
|
|
newline
|
|
bitfld.long 0x00 10. "TXPWDFS,Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled" "0: Normal operation,1: Power-down the USB full-speed drivers"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TX,USB PHY Transmitter Control Register"
|
|
bitfld.long 0x00 21. "TXENCAL45DP,Enable resistance calibration on DP" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TXCAL45DP,Decode to trim the nominal 45ohm series termination resistance to the USB_DP output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 13. "TXENCAL45DN,Enable resistance calibration on DN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TXCAL45DM,Decode to trim the nominal 45ohm series termination resistance to the USB_DM output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "D_CAL,Decode to trim the nominal 17" "0: Maximum current approximately 19% above nominal,?,?,?,?,?,?,7: D_CAL_7,?,?,?,?,?,?,?,15: Minimum current approximately 19% below.."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TX_SET,USB PHY Transmitter Control Register"
|
|
bitfld.long 0x00 21. "TXENCAL45DP,Enable resistance calibration on DP" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TXCAL45DP,Decode to trim the nominal 45ohm series termination resistance to the USB_DP output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 13. "TXENCAL45DN,Enable resistance calibration on DN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TXCAL45DM,Decode to trim the nominal 45ohm series termination resistance to the USB_DM output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "D_CAL,Decode to trim the nominal 17" "0: Maximum current approximately 19% above nominal,?,?,?,?,?,?,7: D_CAL_7,?,?,?,?,?,?,?,15: Minimum current approximately 19% below.."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TX_CLR,USB PHY Transmitter Control Register"
|
|
bitfld.long 0x00 21. "TXENCAL45DP,Enable resistance calibration on DP" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TXCAL45DP,Decode to trim the nominal 45ohm series termination resistance to the USB_DP output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 13. "TXENCAL45DN,Enable resistance calibration on DN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TXCAL45DM,Decode to trim the nominal 45ohm series termination resistance to the USB_DM output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "D_CAL,Decode to trim the nominal 17" "0: Maximum current approximately 19% above nominal,?,?,?,?,?,?,7: D_CAL_7,?,?,?,?,?,?,?,15: Minimum current approximately 19% below.."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TX_TOG,USB PHY Transmitter Control Register"
|
|
bitfld.long 0x00 21. "TXENCAL45DP,Enable resistance calibration on DP" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TXCAL45DP,Decode to trim the nominal 45ohm series termination resistance to the USB_DP output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 13. "TXENCAL45DN,Enable resistance calibration on DN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TXCAL45DM,Decode to trim the nominal 45ohm series termination resistance to the USB_DM output pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "D_CAL,Decode to trim the nominal 17" "0: Maximum current approximately 19% above nominal,?,?,?,?,?,?,7: D_CAL_7,?,?,?,?,?,?,?,15: Minimum current approximately 19% below.."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RX,USB PHY Receiver Control Register"
|
|
bitfld.long 0x00 22. "RXDBYPASS,This test mode is intended for lab use only replace FS differential receiver with DP single ended receiver" "0: Normal operation,1: Use the output of the USB_DP single-ended.."
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DISCONADJ,The DISCONADJ field adjusts the trip point for the disconnect detector" "0: Trip-Level Voltage is 0.56875 V,1: Trip-Level Voltage is 0.55000 V,2: Trip-Level Voltage is 0.58125 V,3: Trip-Level Voltage is 0.60000 V,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "ENVADJ,The ENVADJ field adjusts the trip point for the envelope detector" "0: Trip-Level Voltage is 0.1000 V,1: Trip-Level Voltage is 0.1125 V,2: Trip-Level Voltage is 0.1250 V,3: Trip-Level Voltage is 0.0875 V,?..."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RX_SET,USB PHY Receiver Control Register"
|
|
bitfld.long 0x00 22. "RXDBYPASS,This test mode is intended for lab use only replace FS differential receiver with DP single ended receiver" "0: Normal operation,1: Use the output of the USB_DP single-ended.."
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DISCONADJ,The DISCONADJ field adjusts the trip point for the disconnect detector" "0: Trip-Level Voltage is 0.56875 V,1: Trip-Level Voltage is 0.55000 V,2: Trip-Level Voltage is 0.58125 V,3: Trip-Level Voltage is 0.60000 V,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "ENVADJ,The ENVADJ field adjusts the trip point for the envelope detector" "0: Trip-Level Voltage is 0.1000 V,1: Trip-Level Voltage is 0.1125 V,2: Trip-Level Voltage is 0.1250 V,3: Trip-Level Voltage is 0.0875 V,?..."
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group.long 0x28++0x03
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line.long 0x00 "RX_CLR,USB PHY Receiver Control Register"
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bitfld.long 0x00 22. "RXDBYPASS,This test mode is intended for lab use only replace FS differential receiver with DP single ended receiver" "0: Normal operation,1: Use the output of the USB_DP single-ended.."
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bitfld.long 0x00 4.--6. "DISCONADJ,The DISCONADJ field adjusts the trip point for the disconnect detector" "0: Trip-Level Voltage is 0.56875 V,1: Trip-Level Voltage is 0.55000 V,2: Trip-Level Voltage is 0.58125 V,3: Trip-Level Voltage is 0.60000 V,?..."
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bitfld.long 0x00 0.--2. "ENVADJ,The ENVADJ field adjusts the trip point for the envelope detector" "0: Trip-Level Voltage is 0.1000 V,1: Trip-Level Voltage is 0.1125 V,2: Trip-Level Voltage is 0.1250 V,3: Trip-Level Voltage is 0.0875 V,?..."
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group.long 0x2C++0x03
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line.long 0x00 "RX_TOG,USB PHY Receiver Control Register"
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bitfld.long 0x00 22. "RXDBYPASS,This test mode is intended for lab use only replace FS differential receiver with DP single ended receiver" "0: Normal operation,1: Use the output of the USB_DP single-ended.."
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newline
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bitfld.long 0x00 4.--6. "DISCONADJ,The DISCONADJ field adjusts the trip point for the disconnect detector" "0: Trip-Level Voltage is 0.56875 V,1: Trip-Level Voltage is 0.55000 V,2: Trip-Level Voltage is 0.58125 V,3: Trip-Level Voltage is 0.60000 V,?..."
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newline
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bitfld.long 0x00 0.--2. "ENVADJ,The ENVADJ field adjusts the trip point for the envelope detector" "0: Trip-Level Voltage is 0.1000 V,1: Trip-Level Voltage is 0.1125 V,2: Trip-Level Voltage is 0.1250 V,3: Trip-Level Voltage is 0.0875 V,?..."
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group.long 0x30++0x03
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line.long 0x00 "CTRL,USB PHY General Control Register"
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bitfld.long 0x00 31. "SFTRST,Writing a 1 to this bit will soft-reset the USBPHY_PWD USBPHY_TX USBPHY_RX and USBPHY_CTRL registers" "0,1"
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bitfld.long 0x00 30. "CLKGATE,Gate UTMI Clocks" "0,1"
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rbitfld.long 0x00 29. "UTMI_SUSPENDM,Used by the PHY to indicate a powered-down state" "0,1"
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bitfld.long 0x00 28. "HOST_FORCE_LS_SE0,Forces the next FS packet that is transmitted to have a EOP with low-speed timing" "0,1"
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rbitfld.long 0x00 27. "OTG_ID_VALUE,Indicates the results of USB_ID pin while monitoring the cable plugged into the Micro- or Mini-AB receptacle" "0,1"
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bitfld.long 0x00 24. "FSDLL_RST_EN,Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet" "0,1"
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bitfld.long 0x00 20. "ENAUTOCLR_PHY_PWD,Enables the feature to auto-clear the PWD register bits in USBPHY_PWD if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 19. "ENAUTOCLR_CLKGATE,Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 18. "AUTORESUME_EN,Enable the auto resume feature when set HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)" "0,1"
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bitfld.long 0x00 15. "ENUTMILEVEL3,Enables UTMI+ Level 3 operation for the USB HS PHY" "0,1"
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bitfld.long 0x00 14. "ENUTMILEVEL2,Enables UTMI+ Level 2 operation for the USB HS PHY" "0,1"
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bitfld.long 0x00 12. "DEVPLUGIN_IRQ,Indicates that the device is connected" "0,1"
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bitfld.long 0x00 4. "ENDEVPLUGINDET,Enables non-standard resistive plugged-in detection" "0: Disables 200kohm pullup resistors on USB_DP..,1: Enables 200kohm pullup resistors on USB_DP.."
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bitfld.long 0x00 3. "HOSTDISCONDETECT_IRQ,Indicates that the device has disconnected in High-Speed mode" "0,1"
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bitfld.long 0x00 1. "ENHOSTDISCONDETECT,For host mode enables high-speed disconnect detector" "0,1"
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group.long 0x34++0x03
|
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line.long 0x00 "CTRL_SET,USB PHY General Control Register"
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bitfld.long 0x00 31. "SFTRST,Writing a 1 to this bit will soft-reset the USBPHY_PWD USBPHY_TX USBPHY_RX and USBPHY_CTRL registers" "0,1"
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bitfld.long 0x00 30. "CLKGATE,Gate UTMI Clocks" "0,1"
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rbitfld.long 0x00 29. "UTMI_SUSPENDM,Used by the PHY to indicate a powered-down state" "0,1"
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bitfld.long 0x00 28. "HOST_FORCE_LS_SE0,Forces the next FS packet that is transmitted to have a EOP with low-speed timing" "0,1"
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rbitfld.long 0x00 27. "OTG_ID_VALUE,Indicates the results of USB_ID pin while monitoring the cable plugged into the Micro- or Mini-AB receptacle" "0,1"
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bitfld.long 0x00 24. "FSDLL_RST_EN,Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet" "0,1"
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bitfld.long 0x00 20. "ENAUTOCLR_PHY_PWD,Enables the feature to auto-clear the PWD register bits in USBPHY_PWD if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 19. "ENAUTOCLR_CLKGATE,Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 18. "AUTORESUME_EN,Enable the auto resume feature when set HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)" "0,1"
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bitfld.long 0x00 15. "ENUTMILEVEL3,Enables UTMI+ Level 3 operation for the USB HS PHY" "0,1"
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bitfld.long 0x00 14. "ENUTMILEVEL2,Enables UTMI+ Level 2 operation for the USB HS PHY" "0,1"
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bitfld.long 0x00 12. "DEVPLUGIN_IRQ,Indicates that the device is connected" "0,1"
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bitfld.long 0x00 4. "ENDEVPLUGINDET,Enables non-standard resistive plugged-in detection" "0: Disables 200kohm pullup resistors on USB_DP..,1: Enables 200kohm pullup resistors on USB_DP.."
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bitfld.long 0x00 3. "HOSTDISCONDETECT_IRQ,Indicates that the device has disconnected in High-Speed mode" "0,1"
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newline
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bitfld.long 0x00 1. "ENHOSTDISCONDETECT,For host mode enables high-speed disconnect detector" "0,1"
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group.long 0x38++0x03
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line.long 0x00 "CTRL_CLR,USB PHY General Control Register"
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bitfld.long 0x00 31. "SFTRST,Writing a 1 to this bit will soft-reset the USBPHY_PWD USBPHY_TX USBPHY_RX and USBPHY_CTRL registers" "0,1"
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newline
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bitfld.long 0x00 30. "CLKGATE,Gate UTMI Clocks" "0,1"
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newline
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rbitfld.long 0x00 29. "UTMI_SUSPENDM,Used by the PHY to indicate a powered-down state" "0,1"
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|
newline
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bitfld.long 0x00 28. "HOST_FORCE_LS_SE0,Forces the next FS packet that is transmitted to have a EOP with low-speed timing" "0,1"
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newline
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rbitfld.long 0x00 27. "OTG_ID_VALUE,Indicates the results of USB_ID pin while monitoring the cable plugged into the Micro- or Mini-AB receptacle" "0,1"
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newline
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bitfld.long 0x00 24. "FSDLL_RST_EN,Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet" "0,1"
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newline
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bitfld.long 0x00 20. "ENAUTOCLR_PHY_PWD,Enables the feature to auto-clear the PWD register bits in USBPHY_PWD if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 19. "ENAUTOCLR_CLKGATE,Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended" "0,1"
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|
newline
|
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bitfld.long 0x00 18. "AUTORESUME_EN,Enable the auto resume feature when set HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)" "0,1"
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newline
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bitfld.long 0x00 15. "ENUTMILEVEL3,Enables UTMI+ Level 3 operation for the USB HS PHY" "0,1"
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bitfld.long 0x00 14. "ENUTMILEVEL2,Enables UTMI+ Level 2 operation for the USB HS PHY" "0,1"
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bitfld.long 0x00 12. "DEVPLUGIN_IRQ,Indicates that the device is connected" "0,1"
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newline
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bitfld.long 0x00 4. "ENDEVPLUGINDET,Enables non-standard resistive plugged-in detection" "0: Disables 200kohm pullup resistors on USB_DP..,1: Enables 200kohm pullup resistors on USB_DP.."
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newline
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bitfld.long 0x00 3. "HOSTDISCONDETECT_IRQ,Indicates that the device has disconnected in High-Speed mode" "0,1"
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newline
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bitfld.long 0x00 1. "ENHOSTDISCONDETECT,For host mode enables high-speed disconnect detector" "0,1"
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group.long 0x3C++0x03
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line.long 0x00 "CTRL_TOG,USB PHY General Control Register"
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bitfld.long 0x00 31. "SFTRST,Writing a 1 to this bit will soft-reset the USBPHY_PWD USBPHY_TX USBPHY_RX and USBPHY_CTRL registers" "0,1"
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newline
|
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bitfld.long 0x00 30. "CLKGATE,Gate UTMI Clocks" "0,1"
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newline
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rbitfld.long 0x00 29. "UTMI_SUSPENDM,Used by the PHY to indicate a powered-down state" "0,1"
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newline
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bitfld.long 0x00 28. "HOST_FORCE_LS_SE0,Forces the next FS packet that is transmitted to have a EOP with low-speed timing" "0,1"
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newline
|
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rbitfld.long 0x00 27. "OTG_ID_VALUE,Indicates the results of USB_ID pin while monitoring the cable plugged into the Micro- or Mini-AB receptacle" "0,1"
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|
newline
|
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bitfld.long 0x00 24. "FSDLL_RST_EN,Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet" "0,1"
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|
newline
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bitfld.long 0x00 20. "ENAUTOCLR_PHY_PWD,Enables the feature to auto-clear the PWD register bits in USBPHY_PWD if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 19. "ENAUTOCLR_CLKGATE,Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended" "0,1"
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newline
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bitfld.long 0x00 18. "AUTORESUME_EN,Enable the auto resume feature when set HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)" "0,1"
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newline
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bitfld.long 0x00 15. "ENUTMILEVEL3,Enables UTMI+ Level 3 operation for the USB HS PHY" "0,1"
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newline
|
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bitfld.long 0x00 14. "ENUTMILEVEL2,Enables UTMI+ Level 2 operation for the USB HS PHY" "0,1"
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|
newline
|
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bitfld.long 0x00 12. "DEVPLUGIN_IRQ,Indicates that the device is connected" "0,1"
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|
newline
|
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bitfld.long 0x00 4. "ENDEVPLUGINDET,Enables non-standard resistive plugged-in detection" "0: Disables 200kohm pullup resistors on USB_DP..,1: Enables 200kohm pullup resistors on USB_DP.."
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newline
|
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bitfld.long 0x00 3. "HOSTDISCONDETECT_IRQ,Indicates that the device has disconnected in High-Speed mode" "0,1"
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|
newline
|
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bitfld.long 0x00 1. "ENHOSTDISCONDETECT,For host mode enables high-speed disconnect detector" "0,1"
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group.long 0x40++0x03
|
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line.long 0x00 "STATUS,USB PHY Status Register"
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rbitfld.long 0x00 10. "RESUME_STATUS,Indicates that the host is sending a wake-up after Suspend and has triggered an interrupt" "0,1"
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newline
|
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bitfld.long 0x00 8. "OTGID_STATUS,Indicates the results of USB_ID pin on the USB cable plugged into the local Micro- or Mini-AB receptacle" "0,1"
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newline
|
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rbitfld.long 0x00 6. "DEVPLUGIN_STATUS,Status indicator for non-standard resistive plugged-in detection" "0: No attachment to a USB host is detected,1: Cable attachment to a USB host is detected"
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newline
|
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rbitfld.long 0x00 3. "HOSTDISCONDETECT_STATUS,Indicates at the local host (downstream) port that the remote device has disconnected while in High-Speed mode" "0: USB cable disconnect has not been detected at..,1: USB cable disconnect has been detected at the.."
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group.long 0x50++0x03
|
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line.long 0x00 "DEBUG0,USB PHY Debug Register 0"
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bitfld.long 0x00 30. "CLKGATE,Gate Test Clocks" "0,1"
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newline
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bitfld.long 0x00 29. "HOST_RESUME_DEBUG,Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1" "0,1"
|
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newline
|
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bitfld.long 0x00 25.--28. "SQUELCHRESETLENGTH,Duration of RESET in terms of the number of 480-MHz cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 24. "ENSQUELCHRESET,Set bit to allow squelch to reset high-speed receive" "0,1"
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newline
|
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bitfld.long 0x00 16.--20. "SQUELCHRESETCOUNT,Delay in between the detection of squelch to the reset of high-speed RX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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newline
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bitfld.long 0x00 12. "ENTX2RXCOUNT,Set this bit to allow a countdown to transition in between TX and RX" "0,1"
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|
newline
|
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bitfld.long 0x00 8.--11. "TX2RXCOUNT,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 4.--5. "ENHSTPULLDOWN,This bit field selects host pulldown overdrive mode" "0,1,2,3"
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|
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bitfld.long 0x00 2.--3. "HSTPULLDOWN,This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line" "0,1,2,3"
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newline
|
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bitfld.long 0x00 1. "DEBUG_INTERFACE_HOLD,Use holding registers to assist in timing for external UTMI interface" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "OTGIDPIOLOCK,Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled use this to hold the value" "0,1"
|
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group.long 0x54++0x03
|
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line.long 0x00 "DEBUG0_SET,USB PHY Debug Register 0"
|
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bitfld.long 0x00 30. "CLKGATE,Gate Test Clocks" "0,1"
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newline
|
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bitfld.long 0x00 29. "HOST_RESUME_DEBUG,Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1" "0,1"
|
|
newline
|
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bitfld.long 0x00 25.--28. "SQUELCHRESETLENGTH,Duration of RESET in terms of the number of 480-MHz cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 24. "ENSQUELCHRESET,Set bit to allow squelch to reset high-speed receive" "0,1"
|
|
newline
|
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bitfld.long 0x00 16.--20. "SQUELCHRESETCOUNT,Delay in between the detection of squelch to the reset of high-speed RX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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newline
|
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bitfld.long 0x00 12. "ENTX2RXCOUNT,Set this bit to allow a countdown to transition in between TX and RX" "0,1"
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|
newline
|
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bitfld.long 0x00 8.--11. "TX2RXCOUNT,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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bitfld.long 0x00 4.--5. "ENHSTPULLDOWN,This bit field selects host pulldown overdrive mode" "0,1,2,3"
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newline
|
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bitfld.long 0x00 2.--3. "HSTPULLDOWN,This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line" "0,1,2,3"
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newline
|
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bitfld.long 0x00 1. "DEBUG_INTERFACE_HOLD,Use holding registers to assist in timing for external UTMI interface" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "OTGIDPIOLOCK,Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled use this to hold the value" "0,1"
|
|
group.long 0x58++0x03
|
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line.long 0x00 "DEBUG0_CLR,USB PHY Debug Register 0"
|
|
bitfld.long 0x00 30. "CLKGATE,Gate Test Clocks" "0,1"
|
|
newline
|
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bitfld.long 0x00 29. "HOST_RESUME_DEBUG,Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--28. "SQUELCHRESETLENGTH,Duration of RESET in terms of the number of 480-MHz cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 24. "ENSQUELCHRESET,Set bit to allow squelch to reset high-speed receive" "0,1"
|
|
newline
|
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bitfld.long 0x00 16.--20. "SQUELCHRESETCOUNT,Delay in between the detection of squelch to the reset of high-speed RX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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newline
|
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bitfld.long 0x00 12. "ENTX2RXCOUNT,Set this bit to allow a countdown to transition in between TX and RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TX2RXCOUNT,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 4.--5. "ENHSTPULLDOWN,This bit field selects host pulldown overdrive mode" "0,1,2,3"
|
|
newline
|
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bitfld.long 0x00 2.--3. "HSTPULLDOWN,This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line" "0,1,2,3"
|
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newline
|
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bitfld.long 0x00 1. "DEBUG_INTERFACE_HOLD,Use holding registers to assist in timing for external UTMI interface" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "OTGIDPIOLOCK,Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled use this to hold the value" "0,1"
|
|
group.long 0x5C++0x03
|
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line.long 0x00 "DEBUG0_TOG,USB PHY Debug Register 0"
|
|
bitfld.long 0x00 30. "CLKGATE,Gate Test Clocks" "0,1"
|
|
newline
|
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bitfld.long 0x00 29. "HOST_RESUME_DEBUG,Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--28. "SQUELCHRESETLENGTH,Duration of RESET in terms of the number of 480-MHz cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 24. "ENSQUELCHRESET,Set bit to allow squelch to reset high-speed receive" "0,1"
|
|
newline
|
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bitfld.long 0x00 16.--20. "SQUELCHRESETCOUNT,Delay in between the detection of squelch to the reset of high-speed RX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 12. "ENTX2RXCOUNT,Set this bit to allow a countdown to transition in between TX and RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TX2RXCOUNT,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 4.--5. "ENHSTPULLDOWN,This bit field selects host pulldown overdrive mode" "0,1,2,3"
|
|
newline
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bitfld.long 0x00 2.--3. "HSTPULLDOWN,This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line" "0,1,2,3"
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bitfld.long 0x00 1. "DEBUG_INTERFACE_HOLD,Use holding registers to assist in timing for external UTMI interface" "0,1"
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bitfld.long 0x00 0. "OTGIDPIOLOCK,Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled use this to hold the value" "0,1"
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group.long 0x70++0x03
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line.long 0x00 "DEBUG1,UTMI Debug Status Register 1"
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bitfld.long 0x00 21.--22. "USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
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bitfld.long 0x00 18.--20. "USB2_REFBIAS_VBGADJ,Adjustment bits on bandgap" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 13.--14. "ENTAILADJVD,Delay increment of the rise of squelch" "0: Delay is nominal,1: ENTAILADJVD_1,2: ENTAILADJVD_2,3: ENTAILADJVD_3"
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group.long 0x74++0x03
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line.long 0x00 "DEBUG1_SET,UTMI Debug Status Register 1"
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bitfld.long 0x00 21.--22. "USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
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bitfld.long 0x00 18.--20. "USB2_REFBIAS_VBGADJ,Adjustment bits on bandgap" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 13.--14. "ENTAILADJVD,Delay increment of the rise of squelch" "0: Delay is nominal,1: ENTAILADJVD_1,2: ENTAILADJVD_2,3: ENTAILADJVD_3"
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group.long 0x78++0x03
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line.long 0x00 "DEBUG1_CLR,UTMI Debug Status Register 1"
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bitfld.long 0x00 21.--22. "USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
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bitfld.long 0x00 18.--20. "USB2_REFBIAS_VBGADJ,Adjustment bits on bandgap" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 13.--14. "ENTAILADJVD,Delay increment of the rise of squelch" "0: Delay is nominal,1: ENTAILADJVD_1,2: ENTAILADJVD_2,3: ENTAILADJVD_3"
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group.long 0x7C++0x03
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line.long 0x00 "DEBUG1_TOG,UTMI Debug Status Register 1"
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bitfld.long 0x00 21.--22. "USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
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bitfld.long 0x00 18.--20. "USB2_REFBIAS_VBGADJ,Adjustment bits on bandgap" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 13.--14. "ENTAILADJVD,Delay increment of the rise of squelch" "0: Delay is nominal,1: ENTAILADJVD_1,2: ENTAILADJVD_2,3: ENTAILADJVD_3"
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rgroup.long 0x80++0x03
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line.long 0x00 "VERSION,UTMI RTL Version"
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hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Fixed read-only value reflecting the MAJOR field of the RTL version"
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hexmask.long.byte 0x00 16.--23. 1. "MINOR,Fixed read-only value reflecting the MINOR field of the RTL version"
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hexmask.long.word 0x00 0.--15. 1. "STEP,Fixed read-only value reflecting the stepping of the RTL version"
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group.long 0xA0++0x03
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line.long 0x00 "PLL_SIC,USB PHY PLL Control/Status Register"
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rbitfld.long 0x00 31. "PLL_LOCK,USB PLL lock status indicator" "0: PLL is not currently locked,1: PLL is currently locked"
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bitfld.long 0x00 22.--24. "PLL_DIV_SEL,This field controls the USB PLL feedback loop divider" "0: PLL_DIV_SEL_0,1: PLL_DIV_SEL_1,2: PLL_DIV_SEL_2,3: PLL_DIV_SEL_3,4: PLL_DIV_SEL_4,5: PLL_DIV_SEL_5,6: PLL_DIV_SEL_6,7: PLL_DIV_SEL_7"
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bitfld.long 0x00 21. "PLL_REG_ENABLE,This field controls the USB PLL regulator set to enable the regulator" "0,1"
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bitfld.long 0x00 20. "REFBIAS_PWD,Power down the reference bias" "0,1"
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bitfld.long 0x00 19. "REFBIAS_PWD_SEL,Reference bias power down select" "0: Selects PLL_POWER to control the reference bias,1: Selects REFBIAS_PWD to control the reference.."
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bitfld.long 0x00 16. "PLL_BYPASS,Bypass the USB PLL" "0,1"
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bitfld.long 0x00 13. "PLL_ENABLE,Enables the clock output from the USB PLL" "0,1"
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bitfld.long 0x00 12. "PLL_POWER,Power up the USB PLL" "0,1"
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bitfld.long 0x00 6. "PLL_EN_USB_CLKS,Enables the USB clock from PLL to USB PHY" "0,1"
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group.long 0xA4++0x03
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line.long 0x00 "PLL_SIC_SET,USB PHY PLL Control/Status Register"
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rbitfld.long 0x00 31. "PLL_LOCK,USB PLL lock status indicator" "0: PLL is not currently locked,1: PLL is currently locked"
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bitfld.long 0x00 22.--24. "PLL_DIV_SEL,This field controls the USB PLL feedback loop divider" "0: PLL_DIV_SEL_0,1: PLL_DIV_SEL_1,2: PLL_DIV_SEL_2,3: PLL_DIV_SEL_3,4: PLL_DIV_SEL_4,5: PLL_DIV_SEL_5,6: PLL_DIV_SEL_6,7: PLL_DIV_SEL_7"
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bitfld.long 0x00 21. "PLL_REG_ENABLE,This field controls the USB PLL regulator set to enable the regulator" "0,1"
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bitfld.long 0x00 20. "REFBIAS_PWD,Power down the reference bias" "0,1"
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bitfld.long 0x00 19. "REFBIAS_PWD_SEL,Reference bias power down select" "0: Selects PLL_POWER to control the reference bias,1: Selects REFBIAS_PWD to control the reference.."
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bitfld.long 0x00 16. "PLL_BYPASS,Bypass the USB PLL" "0,1"
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bitfld.long 0x00 13. "PLL_ENABLE,Enables the clock output from the USB PLL" "0,1"
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bitfld.long 0x00 12. "PLL_POWER,Power up the USB PLL" "0,1"
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bitfld.long 0x00 6. "PLL_EN_USB_CLKS,Enables the USB clock from PLL to USB PHY" "0,1"
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group.long 0xA8++0x03
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line.long 0x00 "PLL_SIC_CLR,USB PHY PLL Control/Status Register"
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rbitfld.long 0x00 31. "PLL_LOCK,USB PLL lock status indicator" "0: PLL is not currently locked,1: PLL is currently locked"
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bitfld.long 0x00 22.--24. "PLL_DIV_SEL,This field controls the USB PLL feedback loop divider" "0: PLL_DIV_SEL_0,1: PLL_DIV_SEL_1,2: PLL_DIV_SEL_2,3: PLL_DIV_SEL_3,4: PLL_DIV_SEL_4,5: PLL_DIV_SEL_5,6: PLL_DIV_SEL_6,7: PLL_DIV_SEL_7"
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bitfld.long 0x00 21. "PLL_REG_ENABLE,This field controls the USB PLL regulator set to enable the regulator" "0,1"
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bitfld.long 0x00 20. "REFBIAS_PWD,Power down the reference bias" "0,1"
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bitfld.long 0x00 19. "REFBIAS_PWD_SEL,Reference bias power down select" "0: Selects PLL_POWER to control the reference bias,1: Selects REFBIAS_PWD to control the reference.."
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bitfld.long 0x00 16. "PLL_BYPASS,Bypass the USB PLL" "0,1"
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bitfld.long 0x00 13. "PLL_ENABLE,Enables the clock output from the USB PLL" "0,1"
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bitfld.long 0x00 12. "PLL_POWER,Power up the USB PLL" "0,1"
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bitfld.long 0x00 6. "PLL_EN_USB_CLKS,Enables the USB clock from PLL to USB PHY" "0,1"
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group.long 0xAC++0x03
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line.long 0x00 "PLL_SIC_TOG,USB PHY PLL Control/Status Register"
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rbitfld.long 0x00 31. "PLL_LOCK,USB PLL lock status indicator" "0: PLL is not currently locked,1: PLL is currently locked"
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bitfld.long 0x00 22.--24. "PLL_DIV_SEL,This field controls the USB PLL feedback loop divider" "0: PLL_DIV_SEL_0,1: PLL_DIV_SEL_1,2: PLL_DIV_SEL_2,3: PLL_DIV_SEL_3,4: PLL_DIV_SEL_4,5: PLL_DIV_SEL_5,6: PLL_DIV_SEL_6,7: PLL_DIV_SEL_7"
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bitfld.long 0x00 21. "PLL_REG_ENABLE,This field controls the USB PLL regulator set to enable the regulator" "0,1"
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bitfld.long 0x00 20. "REFBIAS_PWD,Power down the reference bias" "0,1"
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bitfld.long 0x00 19. "REFBIAS_PWD_SEL,Reference bias power down select" "0: Selects PLL_POWER to control the reference bias,1: Selects REFBIAS_PWD to control the reference.."
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bitfld.long 0x00 16. "PLL_BYPASS,Bypass the USB PLL" "0,1"
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bitfld.long 0x00 13. "PLL_ENABLE,Enables the clock output from the USB PLL" "0,1"
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bitfld.long 0x00 12. "PLL_POWER,Power up the USB PLL" "0,1"
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bitfld.long 0x00 6. "PLL_EN_USB_CLKS,Enables the USB clock from PLL to USB PHY" "0,1"
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group.long 0xC0++0x03
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line.long 0x00 "USB1_VBUS_DETECT,USB PHY VBUS Detect Control Register"
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bitfld.long 0x00 31. "EN_CHARGER_RESISTOR,Enables resistors used for an older method of resistive battery charger detection" "0: Disable resistive charger detection resistors..,1: Enable resistive charger detection resistors.."
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bitfld.long 0x00 26. "DISCHARGE_VBUS,Controls VBUS discharge resistor" "0: VBUS discharge resistor is disabled (Default),1: VBUS discharge resistor is enabled"
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bitfld.long 0x00 20. "PWRUP_CMPS,Enables the VBUS_VALID comparator" "0: Powers down the VBUS_VALID comparator,1: Enables the VBUS_VALID comparator (default)"
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bitfld.long 0x00 18. "VBUSVALID_TO_SESSVALID,Selects the comparator used for VBUS_VALID" "0: Use the VBUS_VALID comparator for VBUS_VALID..,1: Use the Session End comparator for VBUS_VALID.."
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bitfld.long 0x00 9.--10. "VBUS_SOURCE_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the Session Valid comparator results for..,2: Use the Session Valid comparator results for..,?..."
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bitfld.long 0x00 8. "VBUSVALID_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the VBUS_VALID_3V detector results for.."
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bitfld.long 0x00 7. "VBUSVALID_OVERRIDE,Override value for VBUS_VALID signal sent to USB controller" "0,1"
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bitfld.long 0x00 6. "AVALID_OVERRIDE,Override value for A-Device Session Valid" "0,1"
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bitfld.long 0x00 5. "BVALID_OVERRIDE,Override value for B-Device Session Valid" "0,1"
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bitfld.long 0x00 4. "SESSEND_OVERRIDE,Override value for SESSEND" "0,1"
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bitfld.long 0x00 3. "VBUS_OVERRIDE_EN,VBUS detect signal override enable" "0: Use the results of the internal VBUS_VALID..,1: Use the override values for VBUS_VALID AVALID.."
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bitfld.long 0x00 0.--2. "VBUSVALID_THRESH,Sets the threshold for the VBUSVALID comparator" "0: VBUSVALID_THRESH_0,1: VBUSVALID_THRESH_1,2: VBUSVALID_THRESH_2,3: VBUSVALID_THRESH_3,4: VBUSVALID_THRESH_4,5: VBUSVALID_THRESH_5,6: VBUSVALID_THRESH_6,7: VBUSVALID_THRESH_7"
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group.long 0xC4++0x03
|
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line.long 0x00 "USB1_VBUS_DETECT_SET,USB PHY VBUS Detect Control Register"
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bitfld.long 0x00 31. "EN_CHARGER_RESISTOR,Enables resistors used for an older method of resistive battery charger detection" "0: Disable resistive charger detection resistors..,1: Enable resistive charger detection resistors.."
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bitfld.long 0x00 26. "DISCHARGE_VBUS,Controls VBUS discharge resistor" "0: VBUS discharge resistor is disabled (Default),1: VBUS discharge resistor is enabled"
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bitfld.long 0x00 20. "PWRUP_CMPS,Enables the VBUS_VALID comparator" "0: Powers down the VBUS_VALID comparator,1: Enables the VBUS_VALID comparator (default)"
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bitfld.long 0x00 18. "VBUSVALID_TO_SESSVALID,Selects the comparator used for VBUS_VALID" "0: Use the VBUS_VALID comparator for VBUS_VALID..,1: Use the Session End comparator for VBUS_VALID.."
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bitfld.long 0x00 9.--10. "VBUS_SOURCE_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the Session Valid comparator results for..,2: Use the Session Valid comparator results for..,?..."
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bitfld.long 0x00 8. "VBUSVALID_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the VBUS_VALID_3V detector results for.."
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|
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bitfld.long 0x00 7. "VBUSVALID_OVERRIDE,Override value for VBUS_VALID signal sent to USB controller" "0,1"
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|
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bitfld.long 0x00 6. "AVALID_OVERRIDE,Override value for A-Device Session Valid" "0,1"
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|
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bitfld.long 0x00 5. "BVALID_OVERRIDE,Override value for B-Device Session Valid" "0,1"
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|
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bitfld.long 0x00 4. "SESSEND_OVERRIDE,Override value for SESSEND" "0,1"
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|
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bitfld.long 0x00 3. "VBUS_OVERRIDE_EN,VBUS detect signal override enable" "0: Use the results of the internal VBUS_VALID..,1: Use the override values for VBUS_VALID AVALID.."
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bitfld.long 0x00 0.--2. "VBUSVALID_THRESH,Sets the threshold for the VBUSVALID comparator" "0: VBUSVALID_THRESH_0,1: VBUSVALID_THRESH_1,2: VBUSVALID_THRESH_2,3: VBUSVALID_THRESH_3,4: VBUSVALID_THRESH_4,5: VBUSVALID_THRESH_5,6: VBUSVALID_THRESH_6,7: VBUSVALID_THRESH_7"
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group.long 0xC8++0x03
|
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line.long 0x00 "USB1_VBUS_DETECT_CLR,USB PHY VBUS Detect Control Register"
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bitfld.long 0x00 31. "EN_CHARGER_RESISTOR,Enables resistors used for an older method of resistive battery charger detection" "0: Disable resistive charger detection resistors..,1: Enable resistive charger detection resistors.."
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|
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bitfld.long 0x00 26. "DISCHARGE_VBUS,Controls VBUS discharge resistor" "0: VBUS discharge resistor is disabled (Default),1: VBUS discharge resistor is enabled"
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|
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bitfld.long 0x00 20. "PWRUP_CMPS,Enables the VBUS_VALID comparator" "0: Powers down the VBUS_VALID comparator,1: Enables the VBUS_VALID comparator (default)"
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|
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bitfld.long 0x00 18. "VBUSVALID_TO_SESSVALID,Selects the comparator used for VBUS_VALID" "0: Use the VBUS_VALID comparator for VBUS_VALID..,1: Use the Session End comparator for VBUS_VALID.."
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bitfld.long 0x00 9.--10. "VBUS_SOURCE_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the Session Valid comparator results for..,2: Use the Session Valid comparator results for..,?..."
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bitfld.long 0x00 8. "VBUSVALID_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the VBUS_VALID_3V detector results for.."
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|
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bitfld.long 0x00 7. "VBUSVALID_OVERRIDE,Override value for VBUS_VALID signal sent to USB controller" "0,1"
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|
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bitfld.long 0x00 6. "AVALID_OVERRIDE,Override value for A-Device Session Valid" "0,1"
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|
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|
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bitfld.long 0x00 5. "BVALID_OVERRIDE,Override value for B-Device Session Valid" "0,1"
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|
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bitfld.long 0x00 4. "SESSEND_OVERRIDE,Override value for SESSEND" "0,1"
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|
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bitfld.long 0x00 3. "VBUS_OVERRIDE_EN,VBUS detect signal override enable" "0: Use the results of the internal VBUS_VALID..,1: Use the override values for VBUS_VALID AVALID.."
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bitfld.long 0x00 0.--2. "VBUSVALID_THRESH,Sets the threshold for the VBUSVALID comparator" "0: VBUSVALID_THRESH_0,1: VBUSVALID_THRESH_1,2: VBUSVALID_THRESH_2,3: VBUSVALID_THRESH_3,4: VBUSVALID_THRESH_4,5: VBUSVALID_THRESH_5,6: VBUSVALID_THRESH_6,7: VBUSVALID_THRESH_7"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "USB1_VBUS_DETECT_TOG,USB PHY VBUS Detect Control Register"
|
|
bitfld.long 0x00 31. "EN_CHARGER_RESISTOR,Enables resistors used for an older method of resistive battery charger detection" "0: Disable resistive charger detection resistors..,1: Enable resistive charger detection resistors.."
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|
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bitfld.long 0x00 26. "DISCHARGE_VBUS,Controls VBUS discharge resistor" "0: VBUS discharge resistor is disabled (Default),1: VBUS discharge resistor is enabled"
|
|
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|
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bitfld.long 0x00 20. "PWRUP_CMPS,Enables the VBUS_VALID comparator" "0: Powers down the VBUS_VALID comparator,1: Enables the VBUS_VALID comparator (default)"
|
|
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|
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bitfld.long 0x00 18. "VBUSVALID_TO_SESSVALID,Selects the comparator used for VBUS_VALID" "0: Use the VBUS_VALID comparator for VBUS_VALID..,1: Use the Session End comparator for VBUS_VALID.."
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|
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bitfld.long 0x00 9.--10. "VBUS_SOURCE_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the Session Valid comparator results for..,2: Use the Session Valid comparator results for..,?..."
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|
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bitfld.long 0x00 8. "VBUSVALID_SEL,Selects the source of the VBUS_VALID signal reported to the USB controller" "0: Use the VBUS_VALID comparator results for..,1: Use the VBUS_VALID_3V detector results for.."
|
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|
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bitfld.long 0x00 7. "VBUSVALID_OVERRIDE,Override value for VBUS_VALID signal sent to USB controller" "0,1"
|
|
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|
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bitfld.long 0x00 6. "AVALID_OVERRIDE,Override value for A-Device Session Valid" "0,1"
|
|
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|
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bitfld.long 0x00 5. "BVALID_OVERRIDE,Override value for B-Device Session Valid" "0,1"
|
|
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|
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bitfld.long 0x00 4. "SESSEND_OVERRIDE,Override value for SESSEND" "0,1"
|
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|
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bitfld.long 0x00 3. "VBUS_OVERRIDE_EN,VBUS detect signal override enable" "0: Use the results of the internal VBUS_VALID..,1: Use the override values for VBUS_VALID AVALID.."
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|
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bitfld.long 0x00 0.--2. "VBUSVALID_THRESH,Sets the threshold for the VBUSVALID comparator" "0: VBUSVALID_THRESH_0,1: VBUSVALID_THRESH_1,2: VBUSVALID_THRESH_2,3: VBUSVALID_THRESH_3,4: VBUSVALID_THRESH_4,5: VBUSVALID_THRESH_5,6: VBUSVALID_THRESH_6,7: VBUSVALID_THRESH_7"
|
|
rgroup.long 0xD0++0x03
|
|
line.long 0x00 "USB1_VBUS_DET_STAT,USB PHY VBUS Detector Status Register"
|
|
bitfld.long 0x00 4. "VBUS_VALID_3V,VBUS_VALID_3V detector status" "0: VBUS voltage is below VBUS_VALID_3V threshold,1: VBUS voltage is above VBUS_VALID_3V threshold"
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|
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bitfld.long 0x00 3. "VBUS_VALID,VBUS voltage status" "0: VBUS is below the comparator threshold,1: VBUS is above the comparator threshold"
|
|
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|
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bitfld.long 0x00 2. "AVALID,A-Device Session Valid status" "0: The VBUS voltage is below the Session Valid..,1: The VBUS voltage is above the Session Valid.."
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|
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bitfld.long 0x00 1. "BVALID,B-Device Session Valid status" "0: The VBUS voltage is below the Session Valid..,1: The VBUS voltage is above the Session Valid.."
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|
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bitfld.long 0x00 0. "SESSEND,Session End indicator" "0: The VBUS voltage is above the Session Valid..,1: The VBUS voltage is below the Session Valid.."
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "USB1_CHRG_DETECT,USB PHY Charger Detect Control Register"
|
|
bitfld.long 0x00 23. "BGR_IBIAS,USB charge detector bias current reference" "0: Bias current is derived from the USB PHY..,1: Bias current is derived from the reference.."
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|
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bitfld.long 0x00 2. "PULLUP_DP,This bit is used to pull up DP for digital charge detect" "0,1"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "USB1_CHRG_DETECT_SET,USB PHY Charger Detect Control Register"
|
|
bitfld.long 0x00 23. "BGR_IBIAS,USB charge detector bias current reference" "0: Bias current is derived from the USB PHY..,1: Bias current is derived from the reference.."
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|
newline
|
|
bitfld.long 0x00 2. "PULLUP_DP,This bit is used to pull up DP for digital charge detect" "0,1"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "USB1_CHRG_DETECT_CLR,USB PHY Charger Detect Control Register"
|
|
bitfld.long 0x00 23. "BGR_IBIAS,USB charge detector bias current reference" "0: Bias current is derived from the USB PHY..,1: Bias current is derived from the reference.."
|
|
newline
|
|
bitfld.long 0x00 2. "PULLUP_DP,This bit is used to pull up DP for digital charge detect" "0,1"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "USB1_CHRG_DETECT_TOG,USB PHY Charger Detect Control Register"
|
|
bitfld.long 0x00 23. "BGR_IBIAS,USB charge detector bias current reference" "0: Bias current is derived from the USB PHY..,1: Bias current is derived from the reference.."
|
|
newline
|
|
bitfld.long 0x00 2. "PULLUP_DP,This bit is used to pull up DP for digital charge detect" "0,1"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "USB1_CHRG_DET_STAT,USB PHY Charger Detect Status Register"
|
|
bitfld.long 0x00 4. "SECDET_DCP,Battery Charging Secondary Detection phase output" "0: Charging Downstream Port (CDP) has been..,1: Downstream Charging Port (DCP) has been.."
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|
newline
|
|
bitfld.long 0x00 3. "DP_STATE,Single ended receiver output for the USB_DP pin from charger detection circuits" "0: USB_DP pin voltage is < 0.8V,1: USB_DP pin voltage is > 2.0V"
|
|
newline
|
|
bitfld.long 0x00 2. "DM_STATE,Single ended receiver output for the USB_DM pin from charger detection circuits" "0: USB_DM pin voltage is < 0.8V,1: USB_DM pin voltage is > 2.0V"
|
|
newline
|
|
bitfld.long 0x00 1. "CHRG_DETECTED,Battery Charging Primary Detection phase output" "0: Standard Downstream Port (SDP) has been..,1: Charging Port has been detected"
|
|
newline
|
|
bitfld.long 0x00 0. "PLUG_CONTACT,Battery Charging Data Contact Detection phase output" "0: No USB cable attachment has been detected,1: A USB cable attachment between the device and.."
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "ANACTRL,USB PHY Analog Control Register"
|
|
bitfld.long 0x00 10. "DEV_PULLDOWN,Setting this field to 1'b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins" "0: The 15kohm nominal pulldowns on the USB_DP..,1: The 15kohm nominal pulldowns on the USB_DP.."
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "ANACTRL_SET,USB PHY Analog Control Register"
|
|
bitfld.long 0x00 10. "DEV_PULLDOWN,Setting this field to 1'b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins" "0: The 15kohm nominal pulldowns on the USB_DP..,1: The 15kohm nominal pulldowns on the USB_DP.."
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "ANACTRL_CLR,USB PHY Analog Control Register"
|
|
bitfld.long 0x00 10. "DEV_PULLDOWN,Setting this field to 1'b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins" "0: The 15kohm nominal pulldowns on the USB_DP..,1: The 15kohm nominal pulldowns on the USB_DP.."
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "ANACTRL_TOG,USB PHY Analog Control Register"
|
|
bitfld.long 0x00 10. "DEV_PULLDOWN,Setting this field to 1'b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins" "0: The 15kohm nominal pulldowns on the USB_DP..,1: The 15kohm nominal pulldowns on the USB_DP.."
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "USB1_LOOPBACK,USB PHY Loopback Control/Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TSTPKT,Selects the packet data byte used for USB loopback testing in Pulse mode"
|
|
newline
|
|
bitfld.long 0x00 15. "TSTI_HSFS_MODE_EN,Setting this bit field to value 1'b1 will enable the loopback test to dynamically change the packet speed" "0,1"
|
|
newline
|
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rbitfld.long 0x00 8. "UTMO_DIG_TST1,This read-only bit is a status bit for USB loopback test" "0,1"
|
|
newline
|
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rbitfld.long 0x00 7. "UTMO_DIG_TST0,This read-only bit is a status bit for USB loopback test results" "0,1"
|
|
newline
|
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bitfld.long 0x00 6. "TSTI_TX_HIZ,Sets TX Hi-Z for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TSTI_TX_EN,Enable TX for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TSTI_TX_LS_MODE,Set to value 1'b1 to choose LS for USB loopback testing set to value 1'b0 to choose HS or FS mode which is defined by TSTI1_TX_HS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TSTI_TX_HS_MODE,Select HS or FS mode for USB loopback testing" "0,1"
|
|
newline
|
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bitfld.long 0x00 2. "UTMI_DIG_TST1,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UTMI_DIG_TST0,Mode control for USB loopback test" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "UTMI_TESTSTART,This bit enables the USB loopback test" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_SET,USB PHY Loopback Control/Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TSTPKT,Selects the packet data byte used for USB loopback testing in Pulse mode"
|
|
newline
|
|
bitfld.long 0x00 15. "TSTI_HSFS_MODE_EN,Setting this bit field to value 1'b1 will enable the loopback test to dynamically change the packet speed" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "UTMO_DIG_TST1,This read-only bit is a status bit for USB loopback test" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 7. "UTMO_DIG_TST0,This read-only bit is a status bit for USB loopback test results" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TSTI_TX_HIZ,Sets TX Hi-Z for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TSTI_TX_EN,Enable TX for USB loopback test" "0,1"
|
|
newline
|
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bitfld.long 0x00 4. "TSTI_TX_LS_MODE,Set to value 1'b1 to choose LS for USB loopback testing set to value 1'b0 to choose HS or FS mode which is defined by TSTI1_TX_HS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TSTI_TX_HS_MODE,Select HS or FS mode for USB loopback testing" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UTMI_DIG_TST1,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UTMI_DIG_TST0,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UTMI_TESTSTART,This bit enables the USB loopback test" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_CLR,USB PHY Loopback Control/Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TSTPKT,Selects the packet data byte used for USB loopback testing in Pulse mode"
|
|
newline
|
|
bitfld.long 0x00 15. "TSTI_HSFS_MODE_EN,Setting this bit field to value 1'b1 will enable the loopback test to dynamically change the packet speed" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "UTMO_DIG_TST1,This read-only bit is a status bit for USB loopback test" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 7. "UTMO_DIG_TST0,This read-only bit is a status bit for USB loopback test results" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TSTI_TX_HIZ,Sets TX Hi-Z for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TSTI_TX_EN,Enable TX for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TSTI_TX_LS_MODE,Set to value 1'b1 to choose LS for USB loopback testing set to value 1'b0 to choose HS or FS mode which is defined by TSTI1_TX_HS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TSTI_TX_HS_MODE,Select HS or FS mode for USB loopback testing" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UTMI_DIG_TST1,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UTMI_DIG_TST0,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UTMI_TESTSTART,This bit enables the USB loopback test" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_TOG,USB PHY Loopback Control/Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TSTPKT,Selects the packet data byte used for USB loopback testing in Pulse mode"
|
|
newline
|
|
bitfld.long 0x00 15. "TSTI_HSFS_MODE_EN,Setting this bit field to value 1'b1 will enable the loopback test to dynamically change the packet speed" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "UTMO_DIG_TST1,This read-only bit is a status bit for USB loopback test" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 7. "UTMO_DIG_TST0,This read-only bit is a status bit for USB loopback test results" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TSTI_TX_HIZ,Sets TX Hi-Z for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TSTI_TX_EN,Enable TX for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TSTI_TX_LS_MODE,Set to value 1'b1 to choose LS for USB loopback testing set to value 1'b0 to choose HS or FS mode which is defined by TSTI1_TX_HS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TSTI_TX_HS_MODE,Select HS or FS mode for USB loopback testing" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UTMI_DIG_TST1,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UTMI_DIG_TST0,Mode control for USB loopback test" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UTMI_TESTSTART,This bit enables the USB loopback test" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_HSFSCNT,USB PHY Loopback Packet Number Select Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "TSTI_FS_NUMBER,Full speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "TSTI_HS_NUMBER,High speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_HSFSCNT_SET,USB PHY Loopback Packet Number Select Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "TSTI_FS_NUMBER,Full speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "TSTI_HS_NUMBER,High speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_HSFSCNT_CLR,USB PHY Loopback Packet Number Select Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "TSTI_FS_NUMBER,Full speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "TSTI_HS_NUMBER,High speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "USB1_LOOPBACK_HSFSCNT_TOG,USB PHY Loopback Packet Number Select Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "TSTI_FS_NUMBER,Full speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "TSTI_HS_NUMBER,High speed packet number used when USBPHY_USB1_LOOPBACK[TSTI_HSFS_MODE_EN] is set to value 1'b1"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "TRIM_OVERRIDE_EN,USB PHY Trim Override Enable Register"
|
|
rbitfld.long 0x00 28.--31. "TRIM_USBPHY_TX_CAL45DM,IFR value of TX_CAL45DM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
|
rbitfld.long 0x00 24.--27. "TRIM_USBPHY_TX_CAL45DP,IFR value of TX_CAL45DP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
|
rbitfld.long 0x00 20.--23. "TRIM_USBPHY_TX_D_CAL,IFR value of TX_D_CAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "TRIM_USB_REG_ENV_TAIL_ADJ_VD,IFR value of ENV_TAIL_ADJ" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 15.--17. "TRIM_PLL_CTRL0_DIV_SEL,IFR value of PLL_DIV_SEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x00 13.--14. "TRIM_USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 10.--12. "TRIM_USB2_REFBIAS_VBGADJ,Adjustment bits for bandgap" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6. "TRIM_REFBIAS_TST_OVERRIDE,Override enable for bias current control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TRIM_REFBIAS_VBGADJ_OVERRIDE,Override enable for bandgap adjustment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TRIM_TX_CAL45DM_OVERRIDE,Override enable for TX_CAL45DM when set the register value in USBPHY_TX[11:8] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TRIM_TX_CAL45DP_OVERRIDE,Override enable for TX_CAL45DP when set the register value in USBPHY_TX[19:16] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TRIM_TX_D_CAL_OVERRIDE,Override enable for TX_D_CAL when set the register value in USBPHY_TX[3:0] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRIM_ENV_TAIL_ADJ_VD_OVERRIDE,Override enable for ENV_TAIL_ADJ when set the register value in USBPHY_DEBUG1[14:13] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TRIM_DIV_SEL_OVERRIDE,Override enable for PLL_DIV_SEL when set the register value in USBPHY_PLL_SIC[1:0] will be used" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "TRIM_OVERRIDE_EN_SET,USB PHY Trim Override Enable Register"
|
|
rbitfld.long 0x00 28.--31. "TRIM_USBPHY_TX_CAL45DM,IFR value of TX_CAL45DM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 24.--27. "TRIM_USBPHY_TX_CAL45DP,IFR value of TX_CAL45DP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 20.--23. "TRIM_USBPHY_TX_D_CAL,IFR value of TX_D_CAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "TRIM_USB_REG_ENV_TAIL_ADJ_VD,IFR value of ENV_TAIL_ADJ" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 15.--17. "TRIM_PLL_CTRL0_DIV_SEL,IFR value of PLL_DIV_SEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x00 13.--14. "TRIM_USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 10.--12. "TRIM_USB2_REFBIAS_VBGADJ,Adjustment bits for bandgap" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6. "TRIM_REFBIAS_TST_OVERRIDE,Override enable for bias current control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TRIM_REFBIAS_VBGADJ_OVERRIDE,Override enable for bandgap adjustment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TRIM_TX_CAL45DM_OVERRIDE,Override enable for TX_CAL45DM when set the register value in USBPHY_TX[11:8] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TRIM_TX_CAL45DP_OVERRIDE,Override enable for TX_CAL45DP when set the register value in USBPHY_TX[19:16] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TRIM_TX_D_CAL_OVERRIDE,Override enable for TX_D_CAL when set the register value in USBPHY_TX[3:0] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRIM_ENV_TAIL_ADJ_VD_OVERRIDE,Override enable for ENV_TAIL_ADJ when set the register value in USBPHY_DEBUG1[14:13] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TRIM_DIV_SEL_OVERRIDE,Override enable for PLL_DIV_SEL when set the register value in USBPHY_PLL_SIC[1:0] will be used" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "TRIM_OVERRIDE_EN_CLR,USB PHY Trim Override Enable Register"
|
|
rbitfld.long 0x00 28.--31. "TRIM_USBPHY_TX_CAL45DM,IFR value of TX_CAL45DM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 24.--27. "TRIM_USBPHY_TX_CAL45DP,IFR value of TX_CAL45DP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 20.--23. "TRIM_USBPHY_TX_D_CAL,IFR value of TX_D_CAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "TRIM_USB_REG_ENV_TAIL_ADJ_VD,IFR value of ENV_TAIL_ADJ" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 15.--17. "TRIM_PLL_CTRL0_DIV_SEL,IFR value of PLL_DIV_SEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x00 13.--14. "TRIM_USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 10.--12. "TRIM_USB2_REFBIAS_VBGADJ,Adjustment bits for bandgap" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6. "TRIM_REFBIAS_TST_OVERRIDE,Override enable for bias current control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TRIM_REFBIAS_VBGADJ_OVERRIDE,Override enable for bandgap adjustment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TRIM_TX_CAL45DM_OVERRIDE,Override enable for TX_CAL45DM when set the register value in USBPHY_TX[11:8] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TRIM_TX_CAL45DP_OVERRIDE,Override enable for TX_CAL45DP when set the register value in USBPHY_TX[19:16] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TRIM_TX_D_CAL_OVERRIDE,Override enable for TX_D_CAL when set the register value in USBPHY_TX[3:0] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRIM_ENV_TAIL_ADJ_VD_OVERRIDE,Override enable for ENV_TAIL_ADJ when set the register value in USBPHY_DEBUG1[14:13] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TRIM_DIV_SEL_OVERRIDE,Override enable for PLL_DIV_SEL when set the register value in USBPHY_PLL_SIC[1:0] will be used" "0,1"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "TRIM_OVERRIDE_EN_TOG,USB PHY Trim Override Enable Register"
|
|
rbitfld.long 0x00 28.--31. "TRIM_USBPHY_TX_CAL45DM,IFR value of TX_CAL45DM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 24.--27. "TRIM_USBPHY_TX_CAL45DP,IFR value of TX_CAL45DP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 20.--23. "TRIM_USBPHY_TX_D_CAL,IFR value of TX_D_CAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "TRIM_USB_REG_ENV_TAIL_ADJ_VD,IFR value of ENV_TAIL_ADJ" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 15.--17. "TRIM_PLL_CTRL0_DIV_SEL,IFR value of PLL_DIV_SEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x00 13.--14. "TRIM_USB2_REFBIAS_TST,Bias current control for usb2_phy" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 10.--12. "TRIM_USB2_REFBIAS_VBGADJ,Adjustment bits for bandgap" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6. "TRIM_REFBIAS_TST_OVERRIDE,Override enable for bias current control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TRIM_REFBIAS_VBGADJ_OVERRIDE,Override enable for bandgap adjustment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TRIM_TX_CAL45DM_OVERRIDE,Override enable for TX_CAL45DM when set the register value in USBPHY_TX[11:8] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TRIM_TX_CAL45DP_OVERRIDE,Override enable for TX_CAL45DP when set the register value in USBPHY_TX[19:16] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TRIM_TX_D_CAL_OVERRIDE,Override enable for TX_D_CAL when set the register value in USBPHY_TX[3:0] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRIM_ENV_TAIL_ADJ_VD_OVERRIDE,Override enable for ENV_TAIL_ADJ when set the register value in USBPHY_DEBUG1[14:13] will be used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TRIM_DIV_SEL_OVERRIDE,Override enable for PLL_DIV_SEL when set the register value in USBPHY_PLL_SIC[1:0] will be used" "0,1"
|
|
tree.end
|
|
tree "DCD (USBDCD)"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
base ad:0x40350800
|
|
elif cpuis("IMX7ULP-CM4")
|
|
base ad:0x40350800
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONTROL,Control register"
|
|
bitfld.long 0x00 25. "SR,Software Reset" "0: Do not perform a software reset,1: Perform a software reset"
|
|
bitfld.long 0x00 24. "START,Start Change Detection Sequence" "0: Do not start the sequence,1: Initiate the charger detection sequence"
|
|
newline
|
|
bitfld.long 0x00 17. "BC12,BC12" "0: Compatible with BC1.1 (default),1: Compatible with BC1.2"
|
|
bitfld.long 0x00 16. "IE,Interrupt Enable" "0: Disable interrupts to the system,1: Enable interrupts to the system"
|
|
newline
|
|
rbitfld.long 0x00 8. "IF,Interrupt Flag" "0: No interrupt is pending,1: An interrupt is pending"
|
|
bitfld.long 0x00 0. "IACK,Interrupt Acknowledge" "0: Do not clear the interrupt,1: Clear the IF bit (interrupt flag)"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CLOCK,Clock register"
|
|
hexmask.long.word 0x00 2.--11. 1. "CLOCK_SPEED,Numerical Value of Clock Speed in Binary"
|
|
bitfld.long 0x00 0. "CLOCK_UNIT,Unit of Measurement Encoding for Clock Speed" "0: kHz Speed (between 1 kHz and 1023 kHz),1: MHz Speed (between 1 MHz and 1023 MHz)"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status register"
|
|
bitfld.long 0x00 22. "ACTIVE,Active Status Indicator" "0: The sequence is not running,1: The sequence is running"
|
|
bitfld.long 0x00 21. "TO,Timeout Flag" "0: The detection sequence has not been running..,1: It has been over 1 s since the data pin.."
|
|
newline
|
|
bitfld.long 0x00 20. "ERR,Error Flag" "0: No sequence errors,1: Error in the detection sequence"
|
|
bitfld.long 0x00 18.--19. "SEQ_STAT,Charger Detection Sequence Status" "0: The module is either not enabled or the..,1: Data pin contact detection is complete,2: Charging port detection is complete,3: Charger type detection is complete"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "SEQ_RES,Charger Detection Sequence Results" "0: No results to report,1: Attached to an SDP,2: no description available,3: Attached to a DCP"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SIGNAL_OVERRIDE,Signal Override Register"
|
|
bitfld.long 0x00 0.--1. "PS,Phase Selection" "0: No overrides,?,2: Enables VDP_SRC voltage source for the USB_DP..,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TIMER0,TIMER0 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "TSEQ_INIT,Sequence Initiation Time"
|
|
hexmask.long.word 0x00 0.--11. 1. "TUNITCON,Unit Connection Timer Elapse (in ms)"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TIMER1,TIMER1 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "TDCD_DBNC,Time Period to Debounce D+ Signal"
|
|
hexmask.long.word 0x00 0.--9. 1. "TVDPSRC_ON,Time Period Comparator Enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TIMER2_BC11,TIMER2_BC11 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "TVDPSRC_CON,Time Period Before Enabling D+ Pullup"
|
|
bitfld.long 0x00 0.--3. "CHECK_DM,Time Before Check of D- Line" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TIMER2_BC12,TIMER2_BC12 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "TWAIT_AFTER_PRD,TWAIT_AFTER_PRD"
|
|
hexmask.long.word 0x00 0.--9. 1. "TVDMSRC_ON,TVDMSRC_ON"
|
|
endif
|
|
tree.end
|
|
tree "USDHC (Ultra Secured Digital Host Controller)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40370000 ad:0x40380000)
|
|
tree "USDHC$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DS_ADDR,DMA System Address"
|
|
hexmask.long 0x00 0.--31. 1. "DS_ADDR,DS_ADDR"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BLK_ATT,Block Attributes"
|
|
hexmask.long.word 0x00 16.--31. 1. "BLKCNT,Block Count"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. "BLKSIZE,Block Size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMD_ARG,Command Argument"
|
|
hexmask.long 0x00 0.--31. 1. "CMDARG,Command Argument"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CMD_XFR_TYP,Command Transfer Type"
|
|
bitfld.long 0x00 24.--29. "CMDINX,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CMDTYP,Command Type" "0: Normal Other commands,1: Suspend CMD52 for writing Bus Suspend in CCCR,2: Resume CMD52 for writing Function Select in..,3: Abort CMD12 CMD52 for writing I/O Abort in CCCR"
|
|
newline
|
|
bitfld.long 0x00 21. "DPSEL,Data Present Select" "0: No Data Present,1: Data Present"
|
|
newline
|
|
bitfld.long 0x00 20. "CICEN,Command Index Check Enable" "0: CICEN_0,1: CICEN_1"
|
|
newline
|
|
bitfld.long 0x00 19. "CCCEN,Command CRC Check Enable" "0: CCCEN_0,1: CCCEN_1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "RSPTYP,Response Type Select" "0: No Response,1: Response Length 136,2: Response Length 48,3: Response Length 48 check Busy after response"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD_RSP0,Command Response0"
|
|
hexmask.long 0x00 0.--31. 1. "CMDRSP0,Command Response 0"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CMD_RSP1,Command Response1"
|
|
hexmask.long 0x00 0.--31. 1. "CMDRSP1,Command Response 1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD_RSP2,Command Response2"
|
|
hexmask.long 0x00 0.--31. 1. "CMDRSP2,Command Response 2"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "CMD_RSP3,Command Response3"
|
|
hexmask.long 0x00 0.--31. 1. "CMDRSP3,Command Response 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DATA_BUFF_ACC_PORT,Data Buffer Access Port"
|
|
hexmask.long 0x00 0.--31. 1. "DATCONT,Data Content"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PRES_STATE,Present State"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DLSL,DATA[7:0] Line Signal Level"
|
|
newline
|
|
bitfld.long 0x00 23. "CLSL,CMD Line Signal Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "WPSPL,Write Protect Switch Pin Level" "0: Write protected (WP = 1),1: Write enabled (WP = 0)"
|
|
newline
|
|
bitfld.long 0x00 18. "CDPL,Card Detect Pin Level" "0: No card present (CD_B = 1),1: Card present (CD_B = 0)"
|
|
newline
|
|
bitfld.long 0x00 16. "CINST,Card Inserted" "0: Power on Reset or No Card,1: Card Inserted"
|
|
newline
|
|
bitfld.long 0x00 15. "TSCD,Tape Select Change Done" "0: Delay cell select change is not finished,1: Delay cell select change is finished"
|
|
newline
|
|
bitfld.long 0x00 12. "RTR,Re-Tuning Request (only for SD3.0 SDR104 mode and EMMC HS200 mode)" "0: Fixed or well tuned sampling clock,1: Sampling clock needs re-tuning"
|
|
newline
|
|
bitfld.long 0x00 11. "BREN,Buffer Read Enable" "0: Read disable,1: Read enable"
|
|
newline
|
|
bitfld.long 0x00 10. "BWEN,Buffer Write Enable" "0: Write disable,1: Write enable"
|
|
newline
|
|
bitfld.long 0x00 9. "RTA,Read Transfer Active" "0: No valid data,1: Transferring data"
|
|
newline
|
|
bitfld.long 0x00 8. "WTA,Write Transfer Active" "0: No valid data,1: Transferring data"
|
|
newline
|
|
bitfld.long 0x00 7. "SDOFF,SD Clock Gated Off Internally" "0: SD Clock is active,1: SD Clock is gated off"
|
|
newline
|
|
bitfld.long 0x00 6. "PEROFF,IPG_PERCLK Gated Off Internally" "0: IPG_PERCLK is active,1: IPG_PERCLK is gated off"
|
|
newline
|
|
bitfld.long 0x00 5. "HCKOFF,HCLK Gated Off Internally" "0: HCLK is active,1: HCLK is gated off"
|
|
newline
|
|
bitfld.long 0x00 4. "IPGOFF,IPG_CLK Gated Off Internally" "0: IPG_CLK is active,1: IPG_CLK is gated off"
|
|
newline
|
|
bitfld.long 0x00 3. "SDSTB,SD Clock Stable" "0: Clock is changing frequency and not stable,1: Clock is stable"
|
|
newline
|
|
bitfld.long 0x00 2. "DLA,Data Line Active" "0: DATA Line Inactive,1: DATA Line Active"
|
|
newline
|
|
bitfld.long 0x00 1. "CDIHB,Command Inhibit (DATA)" "0: Can issue command which uses the DATA line,1: Cannot issue command which uses the DATA line"
|
|
newline
|
|
bitfld.long 0x00 0. "CIHB,Command Inhibit (CMD)" "0: Can issue command using only CMD line,1: Cannot issue command"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control"
|
|
bitfld.long 0x00 30. "NON_EXACT_BLK_RD,NON_EXACT_BLK_RD" "0: The block read is exact block,1: The block read is non-exact block"
|
|
newline
|
|
bitfld.long 0x00 27.--29. "BURST_LEN_EN,BURST length enable for INCR INCR4 / INCR8 / INCR16 INCR4-WRAP / INCR8-WRAP / INCR16-WRAP" "?,1: Burst length is enabled for INCR,?,3: Burst length is enabled for INCR,?,5: Burst length is enabled for INCR,?,7: Burst length is enabled for INCR"
|
|
newline
|
|
bitfld.long 0x00 26. "WECRM,Wakeup Event Enable On SD Card Removal" "0: WECRM_0,1: WECRM_1"
|
|
newline
|
|
bitfld.long 0x00 25. "WECINS,Wakeup Event Enable On SD Card Insertion" "0: WECINS_0,1: WECINS_1"
|
|
newline
|
|
bitfld.long 0x00 24. "WECINT,Wakeup Event Enable On Card Interrupt" "0: WECINT_0,1: WECINT_1"
|
|
newline
|
|
bitfld.long 0x00 20. "RD_DONE_NO_8CLK,RD_DONE_NO_8CLK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "IABG,Interrupt At Block Gap" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. "RWCTL,Read Wait Control" "0: Disable Read Wait Control and stop SD Clock..,1: Enable Read Wait Control and assert Read Wait.."
|
|
newline
|
|
bitfld.long 0x00 17. "CREQ,Continue Request" "0: No effect,1: Restart"
|
|
newline
|
|
bitfld.long 0x00 16. "SABGREQ,Stop At Block Gap Request" "0: SABGREQ_0,1: SABGREQ_1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "DMASEL,DMA Select" "0: No DMA or Simple DMA is selected,1: ADMA1 is selected,2: ADMA2 is selected,?..."
|
|
newline
|
|
bitfld.long 0x00 7. "CDSS,Card Detect Signal Selection" "0: Card Detection Level is selected (for normal..,1: Card Detection Test Level is selected (for.."
|
|
newline
|
|
bitfld.long 0x00 6. "CDTL,Card Detect Test Level" "0: Card Detect Test Level is 0 no card inserted,1: Card Detect Test Level is 1 card inserted"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "EMODE,Endian Mode" "0: Big Endian Mode,1: Half Word Big Endian Mode,2: Little Endian Mode,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "D3CD,DATA3 as Card Detection Pin" "0: DATA3 does not monitor Card Insertion,1: DATA3 as Card Detection Pin"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "DTW,Data Transfer Width" "0: 1-bit mode,1: 4-bit mode,2: 8-bit mode,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "LCTL,LED Control" "0: LED off,1: LCTL_1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SYS_CTRL,System Control"
|
|
bitfld.long 0x00 28. "RSTT,Reset Tuning" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "INITA,Initialization Active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "RSTD,Software Reset For DATA Line" "0: No Reset,1: RSTD_1"
|
|
newline
|
|
bitfld.long 0x00 25. "RSTC,Software Reset For CMD Line" "0: No Reset,1: RSTC_1"
|
|
newline
|
|
bitfld.long 0x00 24. "RSTA,Software Reset For ALL" "0: No Reset,1: RSTA_1"
|
|
newline
|
|
bitfld.long 0x00 23. "IPP_RST_N,IPP_RST_N" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "DTOCV,Data Timeout Counter Value" "0: no description available,1: no description available,?,?,?,?,?,?,?,?,?,?,?,13: no description available,14: no description available,15: no description available"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "SDCLKFS,SDCLK Frequency Select"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DVS,Divisor" "0: Divide-by-1,1: Divide-by-2,?,?,?,?,?,?,?,?,?,?,?,?,14: Divide-by-15,15: Divide-by-16"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "INT_STATUS,Interrupt Status"
|
|
eventfld.long 0x00 28. "DMAE,DMA Error" "0: No Error,1: DMAE_1"
|
|
newline
|
|
eventfld.long 0x00 26. "TNE,Tuning Error: (only for SD3.0 SDR104 mode and EMMC HS200 mode)" "0,1"
|
|
newline
|
|
eventfld.long 0x00 24. "AC12E,Auto CMD12 Error" "0: No Error,1: AC12E_1"
|
|
newline
|
|
eventfld.long 0x00 22. "DEBE,Data End Bit Error" "0: No Error,1: DEBE_1"
|
|
newline
|
|
eventfld.long 0x00 21. "DCE,Data CRC Error" "0: No Error,1: DCE_1"
|
|
newline
|
|
eventfld.long 0x00 20. "DTOE,Data Timeout Error" "0: No Error,1: Time out"
|
|
newline
|
|
eventfld.long 0x00 19. "CIE,Command Index Error" "0: No Error,1: CIE_1"
|
|
newline
|
|
eventfld.long 0x00 18. "CEBE,Command End Bit Error" "0: No Error,1: End Bit Error Generated"
|
|
newline
|
|
eventfld.long 0x00 17. "CCE,Command CRC Error" "0: No Error,1: CRC Error Generated"
|
|
newline
|
|
eventfld.long 0x00 16. "CTOE,Command Timeout Error" "0: No Error,1: Time out"
|
|
newline
|
|
eventfld.long 0x00 14. "TP,Tuning Pass:(only for SD3.0 SDR104 mode and EMMC HS200 mode)" "0,1"
|
|
newline
|
|
eventfld.long 0x00 12. "RTE,Re-Tuning Event: (only for SD3.0 SDR104 mode and EMMC HS200 mode)" "0: Re-Tuning is not required,1: Re-Tuning should be performed"
|
|
newline
|
|
eventfld.long 0x00 8. "CINT,Card Interrupt" "0: No Card Interrupt,1: Generate Card Interrupt"
|
|
newline
|
|
eventfld.long 0x00 7. "CRM,Card Removal" "0: Card state unstable or inserted,1: Card removed"
|
|
newline
|
|
eventfld.long 0x00 6. "CINS,Card Insertion" "0: Card state unstable or removed,1: Card inserted"
|
|
newline
|
|
eventfld.long 0x00 5. "BRR,Buffer Read Ready" "0: Not ready to read buffer,1: Ready to read buffer"
|
|
newline
|
|
eventfld.long 0x00 4. "BWR,Buffer Write Ready" "0: Not ready to write buffer,1: Ready to write buffer"
|
|
newline
|
|
eventfld.long 0x00 3. "DINT,DMA Interrupt" "0: No DMA Interrupt,1: DMA Interrupt is generated"
|
|
newline
|
|
eventfld.long 0x00 2. "BGE,Block Gap Event" "0: No block gap event,1: Transaction stopped at block gap"
|
|
newline
|
|
eventfld.long 0x00 1. "TC,Transfer Complete" "0: Transfer not complete,1: Transfer complete"
|
|
newline
|
|
eventfld.long 0x00 0. "CC,Command Complete" "0: Command not complete,1: Command complete"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "INT_STATUS_EN,Interrupt Status Enable"
|
|
bitfld.long 0x00 28. "DMAESEN,DMA Error Status Enable" "0: DMAESEN_0,1: DMAESEN_1"
|
|
newline
|
|
bitfld.long 0x00 26. "TNESEN,Tuning Error Status Enable" "0: TNESEN_0,1: TNESEN_1"
|
|
newline
|
|
bitfld.long 0x00 24. "AC12ESEN,Auto CMD12 Error Status Enable" "0: AC12ESEN_0,1: AC12ESEN_1"
|
|
newline
|
|
bitfld.long 0x00 22. "DEBESEN,Data End Bit Error Status Enable" "0: DEBESEN_0,1: DEBESEN_1"
|
|
newline
|
|
bitfld.long 0x00 21. "DCESEN,Data CRC Error Status Enable" "0: DCESEN_0,1: DCESEN_1"
|
|
newline
|
|
bitfld.long 0x00 20. "DTOESEN,Data Timeout Error Status Enable" "0: DTOESEN_0,1: DTOESEN_1"
|
|
newline
|
|
bitfld.long 0x00 19. "CIESEN,Command Index Error Status Enable" "0: CIESEN_0,1: CIESEN_1"
|
|
newline
|
|
bitfld.long 0x00 18. "CEBESEN,Command End Bit Error Status Enable" "0: CEBESEN_0,1: CEBESEN_1"
|
|
newline
|
|
bitfld.long 0x00 17. "CCESEN,Command CRC Error Status Enable" "0: CCESEN_0,1: CCESEN_1"
|
|
newline
|
|
bitfld.long 0x00 16. "CTOESEN,Command Timeout Error Status Enable" "0: CTOESEN_0,1: CTOESEN_1"
|
|
newline
|
|
bitfld.long 0x00 14. "TPSEN,Tuning Pass Status Enable" "0: TPSEN_0,1: TPSEN_1"
|
|
newline
|
|
bitfld.long 0x00 12. "RTESEN,Re-Tuning Event Status Enable" "0: RTESEN_0,1: RTESEN_1"
|
|
newline
|
|
bitfld.long 0x00 8. "CINTSEN,Card Interrupt Status Enable" "0: CINTSEN_0,1: CINTSEN_1"
|
|
newline
|
|
bitfld.long 0x00 7. "CRMSEN,Card Removal Status Enable" "0: CRMSEN_0,1: CRMSEN_1"
|
|
newline
|
|
bitfld.long 0x00 6. "CINSSEN,Card Insertion Status Enable" "0: CINSSEN_0,1: CINSSEN_1"
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|
newline
|
|
bitfld.long 0x00 5. "BRRSEN,Buffer Read Ready Status Enable" "0: BRRSEN_0,1: BRRSEN_1"
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|
newline
|
|
bitfld.long 0x00 4. "BWRSEN,Buffer Write Ready Status Enable" "0: BWRSEN_0,1: BWRSEN_1"
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|
newline
|
|
bitfld.long 0x00 3. "DINTSEN,DMA Interrupt Status Enable" "0: DINTSEN_0,1: DINTSEN_1"
|
|
newline
|
|
bitfld.long 0x00 2. "BGESEN,Block Gap Event Status Enable" "0: BGESEN_0,1: BGESEN_1"
|
|
newline
|
|
bitfld.long 0x00 1. "TCSEN,Transfer Complete Status Enable" "0: TCSEN_0,1: TCSEN_1"
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|
newline
|
|
bitfld.long 0x00 0. "CCSEN,Command Complete Status Enable" "0: CCSEN_0,1: CCSEN_1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "INT_SIGNAL_EN,Interrupt Signal Enable"
|
|
bitfld.long 0x00 28. "DMAEIEN,DMA Error Interrupt Enable" "0: DMAEIEN_0,1: DMAEIEN_1"
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|
newline
|
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bitfld.long 0x00 26. "TNEIEN,Tuning Error Interrupt Enable" "0: TNEIEN_0,1: TNEIEN_1"
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|
newline
|
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bitfld.long 0x00 24. "AC12EIEN,Auto CMD12 Error Interrupt Enable" "0: AC12EIEN_0,1: AC12EIEN_1"
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newline
|
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bitfld.long 0x00 22. "DEBEIEN,Data End Bit Error Interrupt Enable" "0: DEBEIEN_0,1: DEBEIEN_1"
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newline
|
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bitfld.long 0x00 21. "DCEIEN,Data CRC Error Interrupt Enable" "0: DCEIEN_0,1: DCEIEN_1"
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|
newline
|
|
bitfld.long 0x00 20. "DTOEIEN,Data Timeout Error Interrupt Enable" "0: DTOEIEN_0,1: DTOEIEN_1"
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|
newline
|
|
bitfld.long 0x00 19. "CIEIEN,Command Index Error Interrupt Enable" "0: CIEIEN_0,1: CIEIEN_1"
|
|
newline
|
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bitfld.long 0x00 18. "CEBEIEN,Command End Bit Error Interrupt Enable" "0: CEBEIEN_0,1: CEBEIEN_1"
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|
newline
|
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bitfld.long 0x00 17. "CCEIEN,Command CRC Error Interrupt Enable" "0: CCEIEN_0,1: CCEIEN_1"
|
|
newline
|
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bitfld.long 0x00 16. "CTOEIEN,Command Timeout Error Interrupt Enable" "0: CTOEIEN_0,1: CTOEIEN_1"
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|
newline
|
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bitfld.long 0x00 14. "TPIEN,Tuning Pass Interrupt Enable" "0: TPIEN_0,1: TPIEN_1"
|
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newline
|
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bitfld.long 0x00 12. "RTEIEN,Re-Tuning Event Interrupt Enable" "0: RTEIEN_0,1: RTEIEN_1"
|
|
newline
|
|
bitfld.long 0x00 8. "CINTIEN,Card Interrupt Interrupt Enable" "0: CINTIEN_0,1: CINTIEN_1"
|
|
newline
|
|
bitfld.long 0x00 7. "CRMIEN,Card Removal Interrupt Enable" "0: CRMIEN_0,1: CRMIEN_1"
|
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newline
|
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bitfld.long 0x00 6. "CINSIEN,Card Insertion Interrupt Enable" "0: CINSIEN_0,1: CINSIEN_1"
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|
newline
|
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bitfld.long 0x00 5. "BRRIEN,Buffer Read Ready Interrupt Enable" "0: BRRIEN_0,1: BRRIEN_1"
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|
newline
|
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bitfld.long 0x00 4. "BWRIEN,Buffer Write Ready Interrupt Enable" "0: BWRIEN_0,1: BWRIEN_1"
|
|
newline
|
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bitfld.long 0x00 3. "DINTIEN,DMA Interrupt Enable" "0: DINTIEN_0,1: DINTIEN_1"
|
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newline
|
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bitfld.long 0x00 2. "BGEIEN,Block Gap Event Interrupt Enable" "0: BGEIEN_0,1: BGEIEN_1"
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|
newline
|
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bitfld.long 0x00 1. "TCIEN,Transfer Complete Interrupt Enable" "0: TCIEN_0,1: TCIEN_1"
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|
newline
|
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bitfld.long 0x00 0. "CCIEN,Command Complete Interrupt Enable" "0: CCIEN_0,1: CCIEN_1"
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group.long 0x3C++0x03
|
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line.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status"
|
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bitfld.long 0x00 23. "SMP_CLK_SEL,Sample Clock Select" "0: Fixed clock is used to sample data,1: Tuned clock is used to sample data"
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newline
|
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bitfld.long 0x00 22. "EXECUTE_TUNING,Execute Tuning" "0,1"
|
|
newline
|
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rbitfld.long 0x00 7. "CNIBAC12E,Command Not Issued By Auto CMD12 Error" "0: CNIBAC12E_0,1: CNIBAC12E_1"
|
|
newline
|
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rbitfld.long 0x00 4. "AC12IE,Auto CMD12 / 23 Index Error" "0: AC12IE_0,1: Error the CMD index in response is not CMD12/23"
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|
newline
|
|
rbitfld.long 0x00 3. "AC12CE,Auto CMD12 / 23 CRC Error" "0: No CRC error,1: CRC Error Met in Auto CMD12/23 Response"
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|
newline
|
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rbitfld.long 0x00 2. "AC12EBE,Auto CMD12 / 23 End Bit Error" "0: AC12EBE_0,1: End Bit Error Generated"
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|
newline
|
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rbitfld.long 0x00 1. "AC12TOE,Auto CMD12 / 23 Timeout Error" "0: AC12TOE_0,1: AC12TOE_1"
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newline
|
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rbitfld.long 0x00 0. "AC12NE,Auto CMD12 Not Executed" "0: AC12NE_0,1: Not executed"
|
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group.long 0x40++0x03
|
|
line.long 0x00 "HOST_CTRL_CAP,Host Controller Capabilities"
|
|
rbitfld.long 0x00 26. "VS18,Voltage Support 1.8 V" "0: 1.8V not supported,1: 1.8V supported"
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|
newline
|
|
rbitfld.long 0x00 25. "VS30,Voltage Support 3.0 V" "0: 3.0V not supported,1: 3.0V supported"
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|
newline
|
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rbitfld.long 0x00 24. "VS33,Voltage Support 3.3V" "0: 3.3V not supported,1: 3.3V supported"
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|
newline
|
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rbitfld.long 0x00 23. "SRS,Suspend / Resume Support" "0: Not supported,1: Supported"
|
|
newline
|
|
rbitfld.long 0x00 22. "DMAS,DMA Support" "0: DMA not supported,1: DMA Supported"
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|
newline
|
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rbitfld.long 0x00 21. "HSS,High Speed Support" "0: High Speed Not Supported,1: High Speed Supported"
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|
newline
|
|
rbitfld.long 0x00 20. "ADMAS,ADMA Support" "0: Advanced DMA Not supported,1: Advanced DMA Supported"
|
|
newline
|
|
rbitfld.long 0x00 16.--18. "MBL,Max Block Length" "0: 512 bytes,1: 1024 bytes,2: 2048 bytes,3: 4096 bytes,?..."
|
|
newline
|
|
rbitfld.long 0x00 14.--15. "RETUNING_MODE,Retuning Mode" "0: RETUNING_MODE_0,1: RETUNING_MODE_1,2: RETUNING_MODE_2,?..."
|
|
newline
|
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bitfld.long 0x00 13. "USE_TUNING_SDR50,Use Tuning for SDR50" "0: SDR does not require tuning,1: SDR50 requires tuning"
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|
newline
|
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bitfld.long 0x00 8.--11. "TIME_COUNT_RETUNING,Time Counter for Retuning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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rbitfld.long 0x00 2. "DDR50_SUPPORT,DDR50 support" "0,1"
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|
newline
|
|
rbitfld.long 0x00 1. "SDR104_SUPPORT,SDR104 support" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "SDR50_SUPPORT,SDR50 support" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "WTMK_LVL,Watermark Level"
|
|
bitfld.long 0x00 24.--28. "WR_BRST_LEN,Write Burst Length Due to system restriction the actual burst length may not exceed 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
newline
|
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hexmask.long.byte 0x00 16.--23. 1. "WR_WML,Write Watermark Level"
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|
newline
|
|
bitfld.long 0x00 8.--12. "RD_BRST_LEN,Read Burst Length Due to system restriction the actual burst length may not exceed 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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hexmask.long.byte 0x00 0.--7. 1. "RD_WML,Read Watermark Level"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MIX_CTRL,Mixer Control"
|
|
bitfld.long 0x00 26. "HS400_MODE,Enable HS400 Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "FBCLK_SEL,Feedback Clock Source Selection (Only used for SD3.0 SDR104 mode and EMMC HS200 mode)" "0: Feedback clock comes from the loopback CLK,1: Feedback clock comes from the ipp_card_clk_out"
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|
newline
|
|
bitfld.long 0x00 24. "AUTO_TUNE_EN,Auto Tuning Enable (Only used for SD3.0 SDR104 mode and and EMMC HS200 mode)" "0: Disable auto tuning,1: Enable auto tuning"
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|
newline
|
|
bitfld.long 0x00 23. "SMP_CLK_SEL,SMP_CLK_SEL" "0: Fixed clock is used to sample data / cmd,1: Tuned clock is used to sample data / cmd"
|
|
newline
|
|
bitfld.long 0x00 22. "EXE_TUNE,Execute Tuning: (Only used for SD3.0 SDR104 mode and EMMC HS200 mode)" "0: Not Tuned or Tuning Completed,1: Execute Tuning"
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|
newline
|
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bitfld.long 0x00 7. "AC23EN,Auto CMD23 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "NIBBLE_POS,NIBBLE_POS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "MSBSEL,Multi / Single Block Select" "0: Single Block,1: Multiple Blocks"
|
|
newline
|
|
bitfld.long 0x00 4. "DTDSEL,Data Transfer Direction Select" "0: Write (Host to Card),1: Read (Card to Host)"
|
|
newline
|
|
bitfld.long 0x00 3. "DDR_EN,Dual Data Rate mode selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "AC12EN,Auto CMD12 Enable" "0: AC12EN_0,1: AC12EN_1"
|
|
newline
|
|
bitfld.long 0x00 1. "BCEN,Block Count Enable" "0: Disable,1: BCEN_1"
|
|
newline
|
|
bitfld.long 0x00 0. "DMAEN,DMA Enable" "0: DMAEN_0,1: DMAEN_1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FORCE_EVENT,Force Event"
|
|
bitfld.long 0x00 31. "FEVTCINT,Force Event Card Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "FEVTDMAE,Force Event DMA Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "FEVTTNE,Force Tuning Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FEVTAC12E,Force Event Auto Command 12 Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "FEVTDEBE,Force Event Data End Bit Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "FEVTDCE,Force Event Data CRC Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "FEVTDTOE,Force Event Data Time Out Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "FEVTCIE,Force Event Command Index Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "FEVTCEBE,Force Event Command End Bit Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "FEVTCCE,Force Event Command CRC Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FEVTCTOE,Force Event Command Time Out Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "FEVTCNIBAC12E,Force Event Command Not Executed By Auto Command 12 Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "FEVTAC12IE,Force Event Auto Command 12 Index Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "FEVTAC12EBE,Force Event Auto Command 12 End Bit Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "FEVTAC12CE,Force Event Auto Command 12 CRC Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FEVTAC12TOE,Force Event Auto Command 12 Time Out Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FEVTAC12NE,Force Event Auto Command 12 Not Executed" "0,1"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "ADMA_ERR_STATUS,ADMA Error Status Register"
|
|
bitfld.long 0x00 3. "ADMADCE,ADMA Descriptor Error" "0: ADMADCE_0,1: ADMADCE_1"
|
|
newline
|
|
bitfld.long 0x00 2. "ADMALME,ADMA Length Mismatch Error" "0: ADMALME_0,1: ADMALME_1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "ADMAES,ADMA Error State (when ADMA Error is occurred)" "0,1,2,3"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ADMA_SYS_ADDR,ADMA System Address"
|
|
hexmask.long 0x00 2.--31. 1. "ADS_ADDR,ADMA System Address"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DLL_CTRL,DLL (Delay Line) Control"
|
|
bitfld.long 0x00 28.--31. "DLL_CTRL_REF_UPDATE_INT,DLL_CTRL_REF_UPDATE_INT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
|
hexmask.long.byte 0x00 20.--27. 1. "DLL_CTRL_SLV_UPDATE_INT,DLL_CTRL_SLV_UPDATE_INT"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "DLL_CTRL_SLV_DLY_TARGET1,DLL_CTRL_SLV_DLY_TARGET1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 9.--15. 1. "DLL_CTRL_SLV_OVERRIDE_VAL,DLL_CTRL_SLV_OVERRIDE_VAL"
|
|
newline
|
|
bitfld.long 0x00 8. "DLL_CTRL_SLV_OVERRIDE,DLL_CTRL_SLV_OVERRIDE" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "DLL_CTRL_GATE_UPDATE,DLL_CTRL_GATE_UPDATE" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3.--6. "DLL_CTRL_SLV_DLY_TARGET0,DLL_CTRL_SLV_DLY_TARGET0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2. "DLL_CTRL_SLV_FORCE_UPD,DLL_CTRL_SLV_FORCE_UPD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DLL_CTRL_RESET,DLL_CTRL_RESET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DLL_CTRL_ENABLE,DLL_CTRL_ENABLE" "0,1"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "DLL_STATUS,DLL Status"
|
|
hexmask.long.byte 0x00 9.--15. 1. "DLL_STS_REF_SEL,DLL_STS_REF_SEL"
|
|
newline
|
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hexmask.long.byte 0x00 2.--8. 1. "DLL_STS_SLV_SEL,DLL_STS_SLV_SEL"
|
|
newline
|
|
bitfld.long 0x00 1. "DLL_STS_REF_LOCK,DLL_STS_REF_LOCK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DLL_STS_SLV_LOCK,DLL_STS_SLV_LOCK" "0,1"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CLK_TUNE_CTRL_STATUS,CLK Tuning Control and Status"
|
|
rbitfld.long 0x00 31. "PRE_ERR,PRE_ERR" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 24.--30. 1. "TAP_SEL_PRE,TAP_SEL_PRE"
|
|
newline
|
|
rbitfld.long 0x00 20.--23. "TAP_SEL_OUT,TAP_SEL_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "TAP_SEL_POST,TAP_SEL_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 15. "NXT_ERR,NXT_ERR" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "DLY_CELL_SET_PRE,DLY_CELL_SET_PRE"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DLY_CELL_SET_OUT,DLY_CELL_SET_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DLY_CELL_SET_POST,DLY_CELL_SET_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "STROBE_DLL_CTRL,Strobe DLL Control"
|
|
bitfld.long 0x00 28.--31. "STROBE_DLL_CTRL_REF_UPDATE_INT,Strobe DLL Control Reference Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 20.--27. 1. "STROBE_DLL_CTRL_SLV_UPDATE_INT,Strobe DLL Control Slave Update Interval"
|
|
newline
|
|
hexmask.long.byte 0x00 9.--15. 1. "STROBE_DLL_CTRL_SLV_OVERRIDE_VAL,Strobe DLL Control Slave Override Value"
|
|
newline
|
|
bitfld.long 0x00 8. "STROBE_DLL_CTRL_SLV_OVERRIDE,Strobe DLL Control Slave Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "STROBE_DLL_CTRL_GATE_UPDATE_1,Strobe DLL Control Gate Update" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "STROBE_DLL_CTRL_GATE_UPDATE_0,Strobe DLL Control Gate Update" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "STROBE_DLL_CTRL_SLV_DLY_TARGET,Strobe DLL Control Slave Delay Target" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "STROBE_DLL_CTRL_SLV_FORCE_UPD,Strobe DLL Control Slave Force Updated" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STROBE_DLL_CTRL_RESET,Strobe DLL Control Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STROBE_DLL_CTRL_ENABLE,Strobe DLL Control Enable" "0,1"
|
|
rgroup.long 0x74++0x03
|
|
line.long 0x00 "STROBE_DLL_STATUS,Strobe DLL Status"
|
|
hexmask.long.byte 0x00 9.--15. 1. "STROBE_DLL_STS_REF_SEL,Strobe DLL Status Reference Select"
|
|
newline
|
|
hexmask.long.byte 0x00 2.--8. 1. "STROBE_DLL_STS_SLV_SEL,Strobe DLL Status Slave Select"
|
|
newline
|
|
bitfld.long 0x00 1. "STROBE_DLL_STS_REF_LOCK,Strobe DLL Status Reference Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STROBE_DLL_STS_SLV_LOCK,Strobe DLL Status Slave Lock" "0,1"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "VEND_SPEC,Vendor Specific Register"
|
|
bitfld.long 0x00 31. "CMD_BYTE_EN,CMD_BYTE_EN" "0: CMD_BYTE_EN_0,1: CMD_BYTE_EN_1"
|
|
newline
|
|
bitfld.long 0x00 15. "CRC_CHK_DIS,CRC Check Disable" "0: Check CRC16 for every read data packet and..,1: Ignore CRC16 check for every read data packet.."
|
|
newline
|
|
bitfld.long 0x00 8. "FRC_SDCLK_ON,FRC_SDCLK_ON" "0: CLK active or inactive is fully controlled by..,1: Force CLK active"
|
|
newline
|
|
bitfld.long 0x00 3. "AC12_WR_CHKBUSY_EN,AC12_WR_CHKBUSY_EN" "0: Do not check busy after auto CMD12 for write..,1: Check busy after auto CMD12 for write data.."
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newline
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bitfld.long 0x00 2. "CONFLICT_CHK_EN,Conflict check enable" "0: Conflict check disable,1: Conflict check enable"
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newline
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bitfld.long 0x00 1. "VSELECT,Voltage Selection" "0: Change the voltage to high voltage range..,1: Change the voltage to low voltage range.."
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|
group.long 0xC4++0x03
|
|
line.long 0x00 "MMC_BOOT,MMC Boot Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "BOOT_BLK_CNT,BOOT_BLK_CNT"
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newline
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bitfld.long 0x00 8. "DISABLE_TIME_OUT,Disable Time Out" "0: DISABLE_TIME_OUT_0,1: DISABLE_TIME_OUT_1"
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|
newline
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bitfld.long 0x00 7. "AUTO_SABG_EN,AUTO_SABG_EN" "0,1"
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|
newline
|
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bitfld.long 0x00 6. "BOOT_EN,BOOT_EN" "0: Fast boot disable,1: Fast boot enable"
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|
newline
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bitfld.long 0x00 5. "BOOT_MODE,BOOT_MODE" "0: BOOT_MODE_0,1: Alternative boot"
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|
newline
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bitfld.long 0x00 4. "BOOT_ACK,BOOT_ACK" "0: BOOT_ACK_0,1: BOOT_ACK_1"
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|
newline
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bitfld.long 0x00 0.--3. "DTOCV_ACK,DTOCV_ACK" "0: SDCLK x 2^14,1: SDCLK x 2^15,2: SDCLK x 2^16,3: SDCLK x 2^17,4: SDCLK x 2^18,5: SDCLK x 2^19,6: SDCLK x 2^20,7: SDCLK x 2^21,?,?,?,?,?,?,14: DTOCV_ACK_14,15: DTOCV_ACK_15"
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|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC8++0x03
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|
line.long 0x00 "VEND_SPEC2,Vendor Specific 2 Register"
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|
bitfld.long 0x00 12. "ACMD23_ARGU2_EN,Argument2 register enable for ACMD23" "0: ACMD23_ARGU2_EN_0,1: Argument2 register enable for ACMD23 sharing.."
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newline
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bitfld.long 0x00 11. "HS400_RD_CLK_STOP_EN,HS400 Read Clock Stop Enable" "0,1"
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newline
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bitfld.long 0x00 10. "HS400_WR_CLK_STOP_EN,HS400 Write Clock Stop Enable" "0,1"
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|
newline
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bitfld.long 0x00 6. "TUNING_CMD_EN,TUNING_CMD_EN" "0: Auto tuning circuit does not check the CMD line,1: Auto tuning circuit checks the CMD line"
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newline
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bitfld.long 0x00 5. "TUNING_1bit_EN,TUNING_1bit_EN" "0,1"
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newline
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bitfld.long 0x00 4. "TUNING_8bit_EN,TUNING_8bit_EN" "0,1"
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|
newline
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bitfld.long 0x00 3. "CARD_INT_D3_TEST,Card Interrupt Detection Test" "0: Check the card interrupt only when DATA3 is..,1: Check the card interrupt by ignoring the.."
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|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "VEND_SPEC2,Vendor Specific 2 Register"
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|
bitfld.long 0x00 14. "BUS_RST,BUS reset" "0,1"
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|
newline
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bitfld.long 0x00 13. "PART_DLL_DEBUG,debug for part dll" "0,1"
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|
newline
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bitfld.long 0x00 12. "ACMD23_ARGU2_EN,Argument2 register enable for ACMD23" "0: ACMD23_ARGU2_EN_0,1: Argument2 register enable for ACMD23 sharing.."
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|
newline
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bitfld.long 0x00 11. "HS400_RD_CLK_STOP_EN,HS400 Read Clock Stop Enable" "0,1"
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|
newline
|
|
bitfld.long 0x00 10. "HS400_WR_CLK_STOP_EN,HS400 Write Clock Stop Enable" "0,1"
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|
newline
|
|
bitfld.long 0x00 6. "TUNING_CMD_EN,TUNING_CMD_EN" "0: Auto tuning circuit does not check the CMD line,1: Auto tuning circuit checks the CMD line"
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|
newline
|
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bitfld.long 0x00 5. "TUNING_1bit_EN,TUNING_1bit_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TUNING_8bit_EN,TUNING_8bit_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CARD_INT_D3_TEST,Card Interrupt Detection Test" "0: Check the card interrupt only when DATA3 is..,1: Check the card interrupt by ignoring the.."
|
|
endif
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "TUNING_CTRL,Tuning Control Register"
|
|
bitfld.long 0x00 24. "STD_TUNING_EN,STD_TUNING_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "TUNING_WINDOW,TUNING_WINDOW" "0,1,2,3,4,5,6,7"
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|
newline
|
|
bitfld.long 0x00 16.--18. "TUNING_STEP,TUNING_STEP" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "TUNING_COUNTER,TUNING_COUNTER"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TUNING_START_TAP,TUNING_START_TAP"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TRGMUX"
|
|
tree "TRGMUX1"
|
|
base ad:0x403A0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DMAMUX1_A,TRGMUX DMAMUX1_A Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
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|
bitfld.long 0x00 24.--29. "SEL3,Trigger MUX Input 3 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
newline
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DMAMUX1_B,TRGMUX DMAMUX1_B Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
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|
bitfld.long 0x00 24.--29. "SEL3,Trigger MUX Input 3 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
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bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TPM4,TRGMUX TPM4 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
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|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "TPM5,TRGMUX TPM5 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TPM6,TRGMUX TPM6 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TPM7,TRGMUX TPM7 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "LPUART4,TRGMUX LPUART4 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LPUART5,TRGMUX LPUART5 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "LPUART6,TRGMUX LPUART6 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "LPUART7,TRGMUX LPUART7 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "LPI2C4,TRGMUX LPI2C4 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "LPI2C5,TRGMUX LPI2C5 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "LPI2C6,TRGMUX LPI2C6 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "LPI2C7,TRGMUX LPI2C7 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LPSPI2,TRGMUX LPSPI2 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "LPSPI3,TRGMUX LPSPI3 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FLEXIO1,TRGMUX FLEXIO1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 24.--29. "SEL3,Trigger MUX Input 3 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "LPIT1,TRGMUX LPIT1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
bitfld.long 0x00 24.--29. "SEL3,Trigger MUX Input 3 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "SEL2,Trigger MUX Input 2 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "SEL1,Trigger MUX Input 1 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "SEL0,Trigger MUX Input 0 Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
tree "TRGMUX0"
|
|
base ad:0x41024000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DMAMUX0_A,TRGMUX DMAMUX0_A Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DMAMUX0_B,TRGMUX DMAMUX0_B Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "LPIT0,TRGMUX LPIT0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TPM0,TRGMUX TPM0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TPM1,TRGMUX TPM1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TPM2,TRGMUX TPM2 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TPM3,TRGMUX TPM3 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ADC0,TRGMUX ADC0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ADC1,TRGMUX ADC1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CMP0,TRGMUX CMP0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CMP1,TRGMUX CMP1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DAC0,TRGMUX DAC0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DAC1,TRGMUX DAC1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LPUART0,TRGMUX LPUART0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "LPUART1,TRGMUX LPUART1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "LPUART2,TRGMUX LPUART2 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "LPUART3,TRGMUX LPUART3 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "LPI2C0,TRGMUX LPI2C0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "LPI2C1,TRGMUX LPI2C1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "LPI2C2,TRGMUX LPI2C2 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "LPI2C3,TRGMUX LPI2C3 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "LPSPI0,TRGMUX LPSPI0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "LPSPI1,TRGMUX LPSPI1 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "FLEXIO0,TRGMUX FLEXIO0 Register"
|
|
bitfld.long 0x00 31. "LK,TRGMUX register lock" "0: Register can be written,1: Register cannot be written until the next.."
|
|
hexmask.long.byte 0x00 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x00 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
tree.end
|
|
tree.end
|
|
tree "SCG"
|
|
tree "SCG1"
|
|
base ad:0x403E0000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long 0x00 0.--31. 1. "VERSION,SCG Version Number"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 27.--31. "DIVPRES,Divider Present" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,16: System DIVCORE is present,17: System DIVCORE is present,18: System DIVCORE is present,19: System DIVCORE is present,20: System DIVCORE is present,21: System DIVCORE is present,22: System DIVCORE is present,23: System DIVCORE is present,24: System DIVCORE is present,25: System DIVCORE is present,26: System DIVCORE is present,27: System DIVCORE is present,28: System DIVCORE is present,29: System DIVCORE is present,30: System DIVCORE is present,31: System DIVCORE is present"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CLKPRES,Clock Present"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 27.--31. "DIVPRES,Divider Present" "?,?,2: System DIVBUS is present,3: System DIVBUS is present,?,?,6: System DIVBUS is present,7: System DIVBUS is present,?,?,10: System DIVBUS is present,11: System DIVBUS is present,?,?,14: System DIVBUS is present,15: System DIVBUS is present,?,?,18: System DIVBUS is present,19: System DIVBUS is present,?,?,22: System DIVBUS is present,23: System DIVBUS is present,?,?,26: System DIVBUS is present,27: System DIVBUS is present,?,?,30: System DIVBUS is present,31: System DIVBUS is present"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CLKPRES,Clock Present"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CSR,Clock Status Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CSR,Clock Status Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RCCR,Run Clock Control Register"
|
|
bitfld.long 0x00 24.--26. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RCCR,Run Clock Control Register"
|
|
bitfld.long 0x00 24.--26. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "VCCR,VLPR Clock Control Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "VCCR,VLPR Clock Control Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "HCCR,HSRUN Clock Control Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "HCCR,HSRUN Clock Control Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CLKOUTCNFG,SCG CLKOUT Configuration Register"
|
|
bitfld.long 0x00 24.--27. "CLKOUTSEL,SCG Clkout Select" "?,1: no description available,2: no description available,3: no description available,?,5: no description available,6: no description available,?,?,?,?,?,?,?,?,15: no description available"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DDRCCR,DDR Clock Control Register"
|
|
bitfld.long 0x00 24.--25. "DDRCS,DDR Clock Source" "0: no description available,?..."
|
|
bitfld.long 0x00 0.--2. "DDRDIV,DDR Divider" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "NICCCR,NIC Clock Control Register"
|
|
bitfld.long 0x00 28.--29. "NICCS,NIC Clock Source" "0: no description available,1: no description available,2: no description available,?..."
|
|
bitfld.long 0x00 24.--27. "NIC0_DIV,NIC0 Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "GPU_DIV,GPU Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
bitfld.long 0x00 16.--19. "NIC1_DIV,NIC1 Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "NIC1_DIVEXT,NIC1 External Clock Divide Ratio" "0: NIC1_DIVEXT_0,1: NIC1_DIVEXT_1,2: NIC1_DIVEXT_2,3: NIC1_DIVEXT_3,4: NIC1_DIVEXT_4,5: NIC1_DIVEXT_5,6: NIC1_DIVEXT_6,7: NIC1_DIVEXT_7,8: NIC1_DIVEXT_8,9: NIC1_DIVEXT_9,10: NIC1_DIVEXT_10,11: NIC1_DIVEXT_11,12: NIC1_DIVEXT_12,13: NIC1_DIVEXT_13,14: NIC1_DIVEXT_14,15: NIC1_DIVEXT_15"
|
|
bitfld.long 0x00 4.--7. "NIC1_DIVBUS,NIC1 Bus Clock Divide Ratio" "0: NIC1_DIVBUS_0,1: NIC1_DIVBUS_1,2: NIC1_DIVBUS_2,3: NIC1_DIVBUS_3,4: NIC1_DIVBUS_4,5: NIC1_DIVBUS_5,6: NIC1_DIVBUS_6,7: NIC1_DIVBUS_7,8: NIC1_DIVBUS_8,9: NIC1_DIVBUS_9,10: NIC1_DIVBUS_10,11: NIC1_DIVBUS_11,12: NIC1_DIVBUS_12,13: NIC1_DIVBUS_13,14: NIC1_DIVBUS_14,15: NIC1_DIVBUS_15"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "NICCSR,NIC Clock Status Register"
|
|
bitfld.long 0x00 28.--29. "NICCS,NIC Clock Source" "0: no description available,1: no description available,2: no description available,?..."
|
|
bitfld.long 0x00 24.--27. "NIC0_DIV,NIC0 Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "GPU_DIV,GPU Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
bitfld.long 0x00 16.--19. "NIC1_DIV,NIC1 Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "NIC1_DIVEXT,NIC1 External Clock Divide Ratio" "0: NIC1_DIVEXT_0,1: NIC1_DIVEXT_1,2: NIC1_DIVEXT_2,3: NIC1_DIVEXT_3,4: NIC1_DIVEXT_4,5: NIC1_DIVEXT_5,6: NIC1_DIVEXT_6,7: NIC1_DIVEXT_7,8: NIC1_DIVEXT_8,9: NIC1_DIVEXT_9,10: NIC1_DIVEXT_10,11: NIC1_DIVEXT_11,12: NIC1_DIVEXT_12,13: NIC1_DIVEXT_13,14: NIC1_DIVEXT_14,15: NIC1_DIVEXT_15"
|
|
bitfld.long 0x00 4.--7. "NIC1_DIVBUS,NIC1 Bus Clock Divide Ratio" "0: NIC1_DIVBUS_0,1: NIC1_DIVBUS_1,2: NIC1_DIVBUS_2,3: NIC1_DIVBUS_3,4: NIC1_DIVBUS_4,5: NIC1_DIVBUS_5,6: NIC1_DIVBUS_6,7: NIC1_DIVBUS_7,8: NIC1_DIVBUS_8,9: NIC1_DIVBUS_9,10: NIC1_DIVBUS_10,11: NIC1_DIVBUS_11,12: NIC1_DIVBUS_12,13: NIC1_DIVBUS_13,14: NIC1_DIVBUS_14,15: NIC1_DIVBUS_15"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SOSCCSR,System OSC Control Status Register"
|
|
eventfld.long 0x00 26. "SOSCERR,System OSC Clock Error" "0: System OSC Clock Monitor is disabled or has..,1: System OSC Clock Monitor is enabled and.."
|
|
rbitfld.long 0x00 25. "SOSCSEL,System OSC Selected" "0: System OSC is not the system clock source,1: System OSC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "SOSCVLD,System OSC Valid" "0: System OSC is not enabled or clock is not valid,1: System OSC is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: This Control Status Register can be written,1: This Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 17. "SOSCCMRE,System OSC Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error.."
|
|
bitfld.long 0x00 16. "SOSCCM,System OSC Clock Monitor" "0: System OSC Clock Monitor is disabled,1: System OSC Clock Monitor is enabled"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "SOSCDIV,System OSC Divide Register"
|
|
bitfld.long 0x00 16.--18. "SOSCDIV3,System OSC Clock Divide 3" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "SOSCDIV2,System OSC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SOSCDIV1,System OSC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SIRCCSR,Slow IRC Control Status Register"
|
|
rbitfld.long 0x00 25. "SIRCSEL,Slow IRC Selected" "0: Slow IRC is not the system clock source,1: Slow IRC is the system clock source"
|
|
rbitfld.long 0x00 24. "SIRCVLD,Slow IRC Valid" "0: Slow IRC is not enabled or clock is not valid,1: Slow IRC is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "SIRCDIV,Slow IRC Divide Register"
|
|
bitfld.long 0x00 16.--18. "SIRCDIV3,Slow IRC Clock Divider 3" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "SIRCDIV2,Slow IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SIRCDIV1,Slow IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "FIRCCSR,Fast IRC Control Status Register"
|
|
rbitfld.long 0x00 25. "FIRCSEL,Fast IRC Selected status" "0: Fast IRC is not the system clock source,1: Fast IRC is the system clock source"
|
|
rbitfld.long 0x00 24. "FIRCVLD,Fast IRC Valid status" "0: Fast IRC is not enabled or clock is not valid,1: Fast IRC is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x00 9. "FIRCTRUP,Fast IRC Trim Update" "0: Disable Fast IRC trimming updates,1: Enable Fast IRC trimming updates"
|
|
bitfld.long 0x00 8. "FIRCTREN,Fast IRC Trim Enable" "0: Disable trimming Fast IRC to an external..,1: Enable trimming Fast IRC to an external clock.."
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "FIRCCSR,Fast IRC Control Status Register"
|
|
rbitfld.long 0x00 25. "FIRCSEL,Fast IRC Selected status" "0: Fast IRC is not the system clock source,1: Fast IRC is the system clock source"
|
|
rbitfld.long 0x00 24. "FIRCVLD,Fast IRC Valid status" "0: Fast IRC is not enabled or clock is not valid,1: Fast IRC is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "POSTDIV,Fast IRC Divider" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4"
|
|
bitfld.long 0x00 9. "FIRCTRUP,Fast IRC Trim Update" "0: Disable Fast IRC trimming updates,1: Enable Fast IRC trimming updates"
|
|
newline
|
|
bitfld.long 0x00 8. "FIRCTREN,Fast IRC Trim Enable" "0: Disable trimming Fast IRC to an external..,1: Enable trimming Fast IRC to an external clock.."
|
|
endif
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "FIRCDIV,Fast IRC Divide Register"
|
|
bitfld.long 0x00 16.--18. "FIRCDIV3,Fast IRC Clock Divider 3" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "FIRCDIV2,Fast IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "FIRCDIV1,Fast IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "APLLCSR,Auxiliary PLL Control Status Register"
|
|
rbitfld.long 0x00 25. "APLLSEL,APLL Selected" "0: APLL is not the system clock source,1: APLL is the system clock source"
|
|
rbitfld.long 0x00 24. "APLLVLD,APLL Valid" "0: APLL is not enabled or clock is not valid,1: APLL is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
bitfld.long 0x00 1. "APLLSTEN,APLL Stop Enable" "0: APLL is disabled in Stop modes,1: APLL is enabled in Stop modes"
|
|
newline
|
|
bitfld.long 0x00 0. "APLLEN,Auxiliary PLL (APLL) Enable" "0: APLL is disabled,1: APLL is enabled"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "APLLDIV,Auxiliary PLL Divide Register"
|
|
bitfld.long 0x00 16.--18. "APLLDIV3,Auxiliary PLL Clock Divide 3" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "APLLDIV2,Auxiliary PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "APLLDIV1,Auxiliary PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "APLLCFG,Auxiliary PLL Configuration Register"
|
|
bitfld.long 0x00 28.--31. "PLLPOSTDIV2,Auxiliary PLL Post Clock Divide2 Ratio" "0: PLLPOSTDIV2_0,1: PLLPOSTDIV2_1,2: PLLPOSTDIV2_2,3: PLLPOSTDIV2_3,4: PLLPOSTDIV2_4,5: PLLPOSTDIV2_5,6: PLLPOSTDIV2_6,7: PLLPOSTDIV2_7,8: PLLPOSTDIV2_8,9: PLLPOSTDIV2_9,10: PLLPOSTDIV2_10,11: PLLPOSTDIV2_11,12: PLLPOSTDIV2_12,13: PLLPOSTDIV2_13,14: PLLPOSTDIV2_14,15: PLLPOSTDIV2_15"
|
|
bitfld.long 0x00 24.--27. "PLLPOSTDIV1,Auxiliary PLL Post Clock Divide1 Ratio" "0: PLLPOSTDIV1_0,1: PLLPOSTDIV1_1,2: PLLPOSTDIV1_2,3: PLLPOSTDIV1_3,4: PLLPOSTDIV1_4,5: PLLPOSTDIV1_5,6: PLLPOSTDIV1_6,7: PLLPOSTDIV1_7,8: PLLPOSTDIV1_8,9: PLLPOSTDIV1_9,10: PLLPOSTDIV1_10,11: PLLPOSTDIV1_11,12: PLLPOSTDIV1_12,13: PLLPOSTDIV1_13,14: PLLPOSTDIV1_14,15: PLLPOSTDIV1_15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "MULT,Auxiliary PLL Multiplier"
|
|
bitfld.long 0x00 14.--15. "PFDSEL,PFD Clock Select" "0: PFD0 output clock selected,1: PFD1 output clock selected,2: PFD2 output clock selected,3: PFD3 output clock selected"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "PLLS,PLL Select" "0: APLL clock selected,1: APLL PFD output clock selected"
|
|
newline
|
|
bitfld.long 0x00 0. "SOURCE,Clock Source" "0: System OSC,?..."
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "APLLCFG,Auxiliary PLL Configuration Register"
|
|
bitfld.long 0x00 28.--31. "PLLPOSTDIV2,Auxiliary PLL Post Clock Divide2Ratio" "0: PLLPOSTDIV2_0,1: PLLPOSTDIV2_1,2: PLLPOSTDIV2_2,3: PLLPOSTDIV2_3,4: PLLPOSTDIV2_4,5: PLLPOSTDIV2_5,6: PLLPOSTDIV2_6,7: PLLPOSTDIV2_7,8: PLLPOSTDIV2_8,9: PLLPOSTDIV2_9,10: PLLPOSTDIV2_10,11: PLLPOSTDIV2_11,12: PLLPOSTDIV2_12,13: PLLPOSTDIV2_13,14: PLLPOSTDIV2_14,15: PLLPOSTDIV2_15"
|
|
bitfld.long 0x00 24.--27. "PLLPOSTDIV1,Auxiliary PLL Post Clock Divide1Ratio" "0: PLLPOSTDIV1_0,1: PLLPOSTDIV1_1,2: PLLPOSTDIV1_2,3: PLLPOSTDIV1_3,4: PLLPOSTDIV1_4,5: PLLPOSTDIV1_5,6: PLLPOSTDIV1_6,7: PLLPOSTDIV1_7,8: PLLPOSTDIV1_8,9: PLLPOSTDIV1_9,10: PLLPOSTDIV1_10,11: PLLPOSTDIV1_11,12: PLLPOSTDIV1_12,13: PLLPOSTDIV1_13,14: PLLPOSTDIV1_14,15: PLLPOSTDIV1_15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "MULT,Auxiliary PLL Multiplier"
|
|
bitfld.long 0x00 14.--15. "PFDSEL,PFD Clock Select" "0: PFD0 output clock selected,1: PFD1 output clock selected,2: PFD2 output clock selected,3: PFD3 output clock selected"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "PLLS,PLL Select" "0: APLL clock selected,1: APLL PFD output clock selected"
|
|
newline
|
|
bitfld.long 0x00 0. "SOURCE,Clock Source" "0: System OSC,?..."
|
|
endif
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "APLLPFD,Auxiliary PLL PFD Register"
|
|
bitfld.long 0x00 31. "PFD3_CLKGATE,PFD3_CLKGATE" "0: PFD3 clock is not gated,1: PFD3 clock is gated"
|
|
rbitfld.long 0x00 30. "PFD3_VALID,PFD3_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--29. "PFD3,PLL Fractional Divider 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "PFD2_CLKGATE,PFD2_CLKGATE" "0: PFD2 clock is not gated,1: PFD2 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 22. "PFD2_VALID,PFD2_VALID" "0,1"
|
|
bitfld.long 0x00 16.--21. "PFD2,PLL Fractional Divider 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 15. "PFD1_CLKGATE,PFD1_CLKGATE" "0: PFD1 clock is not gated,1: PFD1 clock is gated"
|
|
rbitfld.long 0x00 14. "PFD1_VALID,PFD1_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PFD1,PLL Fractional Divider 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. "PFD0_CLKGATE,PFD0_CLKGATE" "0: PFD0 clock is not gated,1: PFD0 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 6. "PFD0_VALID,PFD0_VALID" "0,1"
|
|
bitfld.long 0x00 0.--5. "PFD0,PLL Fractional Divider 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "APLLNUM,Auxiliary PLL Numerator Register"
|
|
hexmask.long 0x00 0.--29. 1. "NUM,30-bit numerator of the Auxiliary PLLFractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "APLLNUM,Auxiliary PLL Numerator Register"
|
|
hexmask.long 0x00 0.--29. 1. "NUM,30-bit numerator of the Auxiliary PLL Fractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "APLLDENOM,Auxiliary PLL Denominator Register"
|
|
hexmask.long 0x00 0.--29. 1. "DENOM,30-bit denominator of the Auxiliary PLLFractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "APLLDENOM,Auxiliary PLL Denominator Register"
|
|
hexmask.long 0x00 0.--29. 1. "DENOM,30-bit denominator of the Auxiliary PLL Fractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "APLLSS,Auxiliary PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STOP,STOP and STEP together control the modulation depth(maximum frequency change) and modulation depth"
|
|
bitfld.long 0x00 15. "ENABLE,Enables the spread spectrummodulation" "0: Spectrum modulation is disabled,1: Spectrum modulation is enabled"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "STEP,STOP and STEP together control the modulation depth(maximum frequency change) and modulation frequency"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "APLLSS,Auxiliary PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STOP,STOP and STEP together control the modulation depth (maximum frequency change) and modulation depth"
|
|
bitfld.long 0x00 15. "ENABLE,Enables the spread spectrum modulation" "0: Spectrum modulation is disabled,1: Spectrum modulation is enabled"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "STEP,STOP and STEP together control the modulation depth (maximum frequency change) and modulation frequency"
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "APLLLOCK_CNFG,Auxiliary PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count before APLL is considered locked and valid"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "APLLLOCK_CNFG,Auxiliary PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count beforeAPLL is considered locked and valid"
|
|
endif
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "SPLLCSR,System PLL Control Status Register"
|
|
eventfld.long 0x00 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has..,1: System PLL Clock Monitor is enabled and.."
|
|
rbitfld.long 0x00 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 1. "SPLLSTEN,System PLL Stop Enable" "0: System PLL is disabled in Stop modes,1: System PLL is enabled in Stop modes"
|
|
bitfld.long 0x00 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled"
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "SPLLDIV,System PLL Divide Register"
|
|
bitfld.long 0x00 16.--18. "SPLLDIV3,System PLL Clock Divide 3" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "SPLLCFG,System PLL Configuration Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. "MULT,System PLL Multiplier"
|
|
bitfld.long 0x00 14.--15. "PFDSEL,PFD Clock Select" "0: PFD0 output clock selected,1: PFD1 output clock selected,2: PFD2 output clock selected,3: PFD3 output clock selected"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "PLLS,PLL Select" "0: SPLL output clocks selected,1: SPLL PFD output clock selected"
|
|
newline
|
|
bitfld.long 0x00 0. "SOURCE,Clock Source" "0: System OSC (SOSC),?..."
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "SPLLPFD,System PLL PFD Register"
|
|
bitfld.long 0x00 31. "PFD3_CLKGATE,PFD3_CLKGATE" "0: PFD3 clock is not gated,1: PFD3 clock is gated"
|
|
rbitfld.long 0x00 30. "PFD3_VALID,PFD3_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--29. "PFD3,PLL Fractional Divider 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "PFD2_CLKGATE,PFD2_CLKGATE" "0: PFD2 clock is not gated,1: PFD2 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 22. "PFD2_VALID,PFD2_VALID" "0,1"
|
|
bitfld.long 0x00 16.--21. "PFD2,PLL Fractional Divider 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 15. "PFD1_CLKGATE,PFD1_CLKGATE" "0: PFD1 clock is not gated,1: PFD1 clock is gated"
|
|
rbitfld.long 0x00 14. "PFD1_VALID,PFD1_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PFD1,PLL Fractional Divider 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. "PFD0_CLKGATE,PFD0_CLKGATE" "0: PFD0 clock is not gated,1: PFD0 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 6. "PFD0_VALID,PFD0_VALID" "0,1"
|
|
bitfld.long 0x00 0.--5. "PFD0,PLL Fractional Divider 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "SPLLNUM,System PLL Numerator Register"
|
|
hexmask.long 0x00 0.--29. 1. "NUM,30-bit numerator of the System PLL Fractional-Loopdivider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "SPLLNUM,System PLL Numerator Register"
|
|
hexmask.long 0x00 0.--29. 1. "NUM,30-bit numerator of the System PLL Fractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "SPLLDENOM,System PLL Denominator Register"
|
|
hexmask.long 0x00 0.--29. 1. "DENOM,30-bit denominator of the System PLL Fractional-Loopdivider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "SPLLDENOM,System PLL Denominator Register"
|
|
hexmask.long 0x00 0.--29. 1. "DENOM,30-bit denominator of the System PLL Fractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "SPLLSS,System PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STOP,STOP and STEP together control the modulation depth(maximum frequency change) and Modulation Depth"
|
|
bitfld.long 0x00 15. "ENABLE,Enables the spread spectrummodulation" "0: Spectrum modulation is disabled,1: Spectrum modulation is enabled"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "STEP,STOP and STEP together control the modulation depth(maximum frequency change) and Modulation Depth"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "SPLLSS,System PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STOP,STOP and STEP together control the modulation depth (maximum frequency change) and Modulation Depth"
|
|
bitfld.long 0x00 15. "ENABLE,Enables the spread spectrum modulation" "0: Spectrum modulation is disabled,1: Spectrum modulation is enabled"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "STEP,STOP and STEP together control the modulation depth (maximum frequency change) and Modulation Depth"
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "SPLLLOCK_CNFG,System PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count before SPLL is considered locked and valid"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "SPLLLOCK_CNFG,System PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count beforeSPLL is considered locked and valid"
|
|
endif
|
|
tree.end
|
|
tree "SCG0"
|
|
base ad:0x41027000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long 0x00 0.--31. 1. "VERSION,SCG Version Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 27.--31. "DIVPRES,Divider Present" "?,1: System DIVSLOW is present,?,3: System DIVSLOW is present,?,5: System DIVSLOW is present,?,7: System DIVSLOW is present,?,9: System DIVSLOW is present,?,11: System DIVSLOW is present,?,13: System DIVSLOW is present,?,15: System DIVSLOW is present,?,17: System DIVSLOW is present,?,19: System DIVSLOW is present,?,21: System DIVSLOW is present,?,23: System DIVSLOW is present,?,25: System DIVSLOW is present,?,27: System DIVSLOW is present,?,29: System DIVSLOW is present,?,31: System DIVSLOW is present"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CLKPRES,Clock Present"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CSR,Clock Status Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "DIVPLAT,Platform Clock Divide Ratio" "0: Divide-by-1,?..."
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DIVSLOW,Slow Clock Divide Ratio" "0: no description available,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: no description available,9: no description available,10: no description available,11: no description available,12: no description available,13: no description available,14: no description available,15: no description available"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RCCR,Run Clock Control Register"
|
|
bitfld.long 0x00 24.--26. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "DIVPLAT,Platform Clock Divide Ratio" "0: Divide-by-1,?..."
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DIVSLOW,Slow Clock Divide Ratio" "0: no description available,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: no description available,9: no description available,10: no description available,11: no description available,12: no description available,13: no description available,14: no description available,15: no description available"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "VCCR,VLPR Clock Control Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,4: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "DIVPLAT,Platform Clock Divide Ratio" "0: Divide-by-1,?..."
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DIVSLOW,Slow Clock Divide Ratio" "0: no description available,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: no description available,9: no description available,10: no description available,11: no description available,12: no description available,13: no description available,14: no description available,15: no description available"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "HCCR,HSRUN Clock Control Register"
|
|
bitfld.long 0x00 24.--27. "SCS,System Clock Source" "?,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,?..."
|
|
bitfld.long 0x00 16.--19. "DIVCORE,Core Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "DIVPLAT,Platform Clock Divide Ratio" "0: Divide-by-1,?..."
|
|
bitfld.long 0x00 4.--7. "DIVBUS,Bus Clock Divide Ratio" "0: Divide-by-1,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: Divide-by-9,9: Divide-by-10,10: Divide-by-11,11: Divide-by-12,12: Divide-by-13,13: Divide-by-14,14: Divide-by-15,15: Divide-by-16"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DIVSLOW,Slow Clock Divide Ratio" "0: no description available,1: Divide-by-2,2: Divide-by-3,3: Divide-by-4,4: Divide-by-5,5: Divide-by-6,6: Divide-by-7,7: Divide-by-8,8: no description available,9: no description available,10: no description available,11: no description available,12: no description available,13: no description available,14: no description available,15: no description available"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CLKOUTCNFG,SCG CLKOUT Configuration Register"
|
|
bitfld.long 0x00 24.--27. "CLKOUTSEL,SCG Clkout Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,?..."
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|
group.long 0x100++0x03
|
|
line.long 0x00 "SOSCCSR,System OSC Control Status Register"
|
|
eventfld.long 0x00 26. "SOSCERR,System OSC Clock Error" "0: System OSC Clock Monitor is disabled or has..,1: System OSC Clock Monitor is enabled and.."
|
|
rbitfld.long 0x00 25. "SOSCSEL,System OSC Selected" "0: System OSC is not the system clock source,1: System OSC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "SOSCVLD,System OSC Valid" "0: System OSC is not enabled or clock is not valid,1: System OSC is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: This Control Status Register can be written,1: This Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 17. "SOSCCMRE,System OSC Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error.."
|
|
bitfld.long 0x00 16. "SOSCCM,System OSC Clock Monitor" "0: System OSC Clock Monitor is disabled,1: System OSC Clock Monitor is enabled"
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|
newline
|
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bitfld.long 0x00 2. "SOSCLPEN,System OSC Low Power Enable" "0: System OSC is disabled in VLP modes,1: System OSC is enabled in VLP modes"
|
|
bitfld.long 0x00 1. "SOSCSTEN,System OSC Stop Enable" "0: System OSC is disabled in Stop modes,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 0. "SOSCEN,System OSC Enable" "0: System OSC is disabled,1: System OSC is enabled"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "SOSCDIV,System OSC Divide Register"
|
|
bitfld.long 0x00 16.--18. "SOSCDIV3,System OSC Clock Divide 3" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "SOSCDIV2,System OSC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
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|
newline
|
|
bitfld.long 0x00 0.--2. "SOSCDIV1,System OSC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "SOSCCFG,System Oscillator Configuration Register"
|
|
bitfld.long 0x00 3. "HGO,High Gain Oscillator Select" "0: Configure crystal oscillator for low-power..,1: Configure crystal oscillator for high-gain.."
|
|
bitfld.long 0x00 2. "EREFS,External Reference Select" "0: no description available,1: no description available"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SIRCCSR,Slow IRC Control Status Register"
|
|
rbitfld.long 0x00 25. "SIRCSEL,Slow IRC Selected" "0: Slow IRC is not the system clock source,1: Slow IRC is the system clock source"
|
|
rbitfld.long 0x00 24. "SIRCVLD,Slow IRC Valid" "0: Slow IRC is not enabled or clock is not valid,1: Slow IRC is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
bitfld.long 0x00 4. "LPOPO,LPO Power Option" "0: LPO clock is enabled in LLS/VLLSx,1: LPO clock is disabled in LLS/VLLSx"
|
|
newline
|
|
bitfld.long 0x00 2. "SIRCLPEN,Slow IRC Low Power Enable" "0: Slow IRC is disabled in VLP modes,1: Slow IRC is enabled in VLP modes"
|
|
bitfld.long 0x00 1. "SIRCSTEN,Slow IRC Stop Enable" "0: Slow IRC is disabled in Stop modes,1: Slow IRC is enabled in Stop modes"
|
|
newline
|
|
bitfld.long 0x00 0. "SIRCEN,Slow IRC Enable" "0: Slow IRC is disabled,1: Slow IRC is enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "SIRCDIV,Slow IRC Divide Register"
|
|
bitfld.long 0x00 16.--18. "SIRCDIV3,Slow IRC Clock Divider 3" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "SIRCDIV2,Slow IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SIRCDIV1,Slow IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "SIRCCFG,Slow IRC Configuration Register"
|
|
bitfld.long 0x00 0. "RANGE,Frequency Range" "0: no description available,1: no description available"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "FIRCCSR,Fast IRC Control Status Register"
|
|
eventfld.long 0x00 26. "FIRCERR,Fast IRC Clock Error" "0: Error not detected with the Fast IRC trimming,1: Error detected with the Fast IRC trimming"
|
|
rbitfld.long 0x00 25. "FIRCSEL,Fast IRC Selected status" "0: Fast IRC is not the system clock source,1: Fast IRC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "FIRCVLD,Fast IRC Valid status" "0: Fast IRC is not enabled or clock is not valid,1: Fast IRC is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 9. "FIRCTRUP,Fast IRC Trim Update" "0: Disable Fast IRC trimming updates,1: Enable Fast IRC trimming updates"
|
|
bitfld.long 0x00 8. "FIRCTREN,Fast IRC Trim Enable" "0: Disable trimming Fast IRC to an external..,1: Enable trimming Fast IRC to an external clock.."
|
|
newline
|
|
bitfld.long 0x00 2. "FIRCLPEN,Fast IRC Low Power Enable" "0: Fast IRC is disabled in VLP modes,1: Fast IRC is enabled in VLP modes"
|
|
bitfld.long 0x00 1. "FIRCSTEN,Fast IRC Stop Enable" "0: Fast IRC is disabled in Stop modes,1: Fast IRC is enabled in Stop modes"
|
|
newline
|
|
bitfld.long 0x00 0. "FIRCEN,Fast IRC Enable" "0: Fast IRC is disabled,1: Fast IRC is enabled"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "FIRCCSR,Fast IRC Control Status Register"
|
|
eventfld.long 0x00 26. "FIRCERR,Fast IRC Clock Error" "0: Error not detected with the Fast IRC trimming,1: Error detected with the Fast IRC trimming"
|
|
rbitfld.long 0x00 25. "FIRCSEL,Fast IRC Selected status" "0: Fast IRC is not the system clock source,1: Fast IRC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "FIRCVLD,Fast IRC Valid status" "0: Fast IRC is not enabled or clock is not valid,1: Fast IRC is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "POSTDIV,Fast IRC Divider" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4"
|
|
bitfld.long 0x00 9. "FIRCTRUP,Fast IRC Trim Update" "0: Disable Fast IRC trimming updates,1: Enable Fast IRC trimming updates"
|
|
newline
|
|
bitfld.long 0x00 8. "FIRCTREN,Fast IRC Trim Enable" "0: Disable trimming Fast IRC to an external..,1: Enable trimming Fast IRC to an external clock.."
|
|
bitfld.long 0x00 2. "FIRCLPEN,Fast IRC Low Power Enable" "0: Fast IRC is disabled in VLP modes,1: Fast IRC is enabled in VLP modes"
|
|
newline
|
|
bitfld.long 0x00 1. "FIRCSTEN,Fast IRC Stop Enable" "0: Fast IRC is disabled in Stop modes,1: Fast IRC is enabled in Stop modes"
|
|
bitfld.long 0x00 0. "FIRCEN,Fast IRC Enable" "0: Fast IRC is disabled,1: Fast IRC is enabled"
|
|
endif
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "FIRCDIV,Fast IRC Divide Register"
|
|
bitfld.long 0x00 16.--18. "FIRCDIV3,Fast IRC Clock Divider 3" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "FIRCDIV2,Fast IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "FIRCDIV1,Fast IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "FIRCCFG,Fast IRC Configuration Register"
|
|
bitfld.long 0x00 0.--1. "RANGE,Frequency Range" "0: Fast IRC is trimmed to 48 MHz,1: Fast IRC is trimmed to 52 MHz,2: Fast IRC is trimmed to 56 MHz,3: Fast IRC is trimmed to 60 MHz"
|
|
group.long 0x30C++0x03
|
|
line.long 0x00 "FIRCTCFG,Fast IRC Trim Configuration Register"
|
|
bitfld.long 0x00 8.--10. "TRIMDIV,Fast IRC Trim Predivide" "0: Divide by 1,1: Divide by 128,2: Divide by 256,3: Divide by 512,4: Divide by 1024,5: Divide by 2048,?..."
|
|
bitfld.long 0x00 0.--1. "TRIMSRC,Trim Source" "?,?,2: no description available,3: no description available"
|
|
group.long 0x318++0x03
|
|
line.long 0x00 "FIRCSTAT,Fast IRC Status Register"
|
|
bitfld.long 0x00 8.--13. "TRIMCOAR,Trim Coarse" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TRIMFINE,Trim Fine Status"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "ROSCCSR,RTC OSC Control Status Register"
|
|
eventfld.long 0x00 26. "ROSCERR,RTC OSC Clock Error" "0: RTC OSC Clock Monitor is disabled or has not..,1: RTC OSC Clock Monitor is enabled and detected.."
|
|
rbitfld.long 0x00 25. "ROSCSEL,RTC OSC Selected" "0: RTC OSC is not the system clock source,1: RTC OSC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "ROSCVLD,RTC OSC Valid" "0: RTC OSC is not enabled or clock is not valid,1: RTC OSC is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 17. "ROSCCMRE,RTC OSC Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error.."
|
|
bitfld.long 0x00 16. "ROSCCM,RTC OSC Clock Monitor" "0: RTC OSC Clock Monitor is disabled,1: RTC OSC Clock Monitor is enabled"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "APLLCSR,Auxiliary PLL Control Status Register"
|
|
rbitfld.long 0x00 25. "APLLSEL,APLL Selected" "0: APLL is not the system clock source,1: APLL is the system clock source"
|
|
rbitfld.long 0x00 24. "APLLVLD,APLL Valid" "0: APLL is not enabled or clock is not valid,1: APLL is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
bitfld.long 0x00 1. "APLLSTEN,APLL Stop Enable" "0: APLL is disabled in Stop modes,1: APLL is enabled in Stop modes"
|
|
newline
|
|
bitfld.long 0x00 0. "APLLEN,Auxiliary PLL (APLL) Enable" "0: APLL is disabled,1: APLL is enabled"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "APLLDIV,Auxiliary PLL Divide Register"
|
|
bitfld.long 0x00 16.--18. "APLLDIV3,Auxiliary PLL Clock Divide 3" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "APLLDIV2,Auxiliary PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "APLLDIV1,Auxiliary PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "APLLCFG,Auxiliary PLL Configuration Register"
|
|
bitfld.long 0x00 28.--31. "PLLPOSTDIV2,Auxiliary PLL Post Clock Divide2 Ratio" "0: PLLPOSTDIV2_0,1: PLLPOSTDIV2_1,2: PLLPOSTDIV2_2,3: PLLPOSTDIV2_3,4: PLLPOSTDIV2_4,5: PLLPOSTDIV2_5,6: PLLPOSTDIV2_6,7: PLLPOSTDIV2_7,8: PLLPOSTDIV2_8,9: PLLPOSTDIV2_9,10: PLLPOSTDIV2_10,11: PLLPOSTDIV2_11,12: PLLPOSTDIV2_12,13: PLLPOSTDIV2_13,14: PLLPOSTDIV2_14,15: PLLPOSTDIV2_15"
|
|
bitfld.long 0x00 24.--27. "PLLPOSTDIV1,Auxiliary PLL Post Clock Divide1 Ratio" "0: PLLPOSTDIV1_0,1: PLLPOSTDIV1_1,2: PLLPOSTDIV1_2,3: PLLPOSTDIV1_3,4: PLLPOSTDIV1_4,5: PLLPOSTDIV1_5,6: PLLPOSTDIV1_6,7: PLLPOSTDIV1_7,8: PLLPOSTDIV1_8,9: PLLPOSTDIV1_9,10: PLLPOSTDIV1_10,11: PLLPOSTDIV1_11,12: PLLPOSTDIV1_12,13: PLLPOSTDIV1_13,14: PLLPOSTDIV1_14,15: PLLPOSTDIV1_15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "MULT,Auxiliary PLL Multiplier"
|
|
bitfld.long 0x00 14.--15. "PFDSEL,PFD Clock Select" "0: PFD0 output clock selected,1: PFD1 output clock selected,2: PFD2 output clock selected,3: PFD3 output clock selected"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "PLLS,PLL Select" "0: APLL clock selected,1: APLL PFD output clock selected"
|
|
newline
|
|
bitfld.long 0x00 0. "SOURCE,Clock Source" "0: System OSC,?..."
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "APLLCFG,Auxiliary PLL Configuration Register"
|
|
bitfld.long 0x00 28.--31. "PLLPOSTDIV2,Auxiliary PLL Post Clock Divide2Ratio" "0: PLLPOSTDIV2_0,1: PLLPOSTDIV2_1,2: PLLPOSTDIV2_2,3: PLLPOSTDIV2_3,4: PLLPOSTDIV2_4,5: PLLPOSTDIV2_5,6: PLLPOSTDIV2_6,7: PLLPOSTDIV2_7,8: PLLPOSTDIV2_8,9: PLLPOSTDIV2_9,10: PLLPOSTDIV2_10,11: PLLPOSTDIV2_11,12: PLLPOSTDIV2_12,13: PLLPOSTDIV2_13,14: PLLPOSTDIV2_14,15: PLLPOSTDIV2_15"
|
|
bitfld.long 0x00 24.--27. "PLLPOSTDIV1,Auxiliary PLL Post Clock Divide1Ratio" "0: PLLPOSTDIV1_0,1: PLLPOSTDIV1_1,2: PLLPOSTDIV1_2,3: PLLPOSTDIV1_3,4: PLLPOSTDIV1_4,5: PLLPOSTDIV1_5,6: PLLPOSTDIV1_6,7: PLLPOSTDIV1_7,8: PLLPOSTDIV1_8,9: PLLPOSTDIV1_9,10: PLLPOSTDIV1_10,11: PLLPOSTDIV1_11,12: PLLPOSTDIV1_12,13: PLLPOSTDIV1_13,14: PLLPOSTDIV1_14,15: PLLPOSTDIV1_15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "MULT,Auxiliary PLL Multiplier"
|
|
bitfld.long 0x00 14.--15. "PFDSEL,PFD Clock Select" "0: PFD0 output clock selected,1: PFD1 output clock selected,2: PFD2 output clock selected,3: PFD3 output clock selected"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "PLLS,PLL Select" "0: APLL clock selected,1: APLL PFD output clock selected"
|
|
newline
|
|
bitfld.long 0x00 0. "SOURCE,Clock Source" "0: System OSC,?..."
|
|
endif
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "APLLPFD,Auxiliary PLL PFD Register"
|
|
bitfld.long 0x00 31. "PFD3_CLKGATE,PFD3_CLKGATE" "0: PFD3 clock is not gated,1: PFD3 clock is gated"
|
|
rbitfld.long 0x00 30. "PFD3_VALID,PFD3_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--29. "PFD3,PLL Fractional Divider 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "PFD2_CLKGATE,PFD2_CLKGATE" "0: PFD2 clock is not gated,1: PFD2 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 22. "PFD2_VALID,PFD2_VALID" "0,1"
|
|
bitfld.long 0x00 16.--21. "PFD2,PLL Fractional Divider 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 15. "PFD1_CLKGATE,PFD1_CLKGATE" "0: PFD1 clock is not gated,1: PFD1 clock is gated"
|
|
rbitfld.long 0x00 14. "PFD1_VALID,PFD1_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PFD1,PLL Fractional Divider 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. "PFD0_CLKGATE,PFD0_CLKGATE" "0: PFD0 clock is not gated,1: PFD0 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 6. "PFD0_VALID,PFD0_VALID" "0,1"
|
|
bitfld.long 0x00 0.--5. "PFD0,PLL Fractional Divider 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "APLLNUM,Auxiliary PLL Numerator Register"
|
|
hexmask.long 0x00 0.--29. 1. "NUM,30-bit numerator of the Auxiliary PLLFractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "APLLNUM,Auxiliary PLL Numerator Register"
|
|
hexmask.long 0x00 0.--29. 1. "NUM,30-bit numerator of the Auxiliary PLL Fractional-Loop divider"
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "APLLDENOM,Auxiliary PLL Denominator Register"
|
|
hexmask.long 0x00 0.--29. 1. "DENOM,30-bit denominator of the Auxiliary PLL Fractional-Loop divider"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "APLLDENOM,Auxiliary PLL Denominator Register"
|
|
hexmask.long 0x00 0.--29. 1. "DENOM,30-bit denominator of the Auxiliary PLLFractional-Loop divider"
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "APLLSS,Auxiliary PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STOP,STOP and STEP together control the modulation depth(maximum frequency change) and modulation depth"
|
|
bitfld.long 0x00 15. "ENABLE,Enables the spread spectrummodulation" "0: Spectrum modulation is disabled,1: Spectrum modulation is enabled"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "STEP,STOP and STEP together control the modulation depth(maximum frequency change) and modulation frequency"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "APLLSS,Auxiliary PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STOP,STOP and STEP together control the modulation depth (maximum frequency change) and modulation depth"
|
|
bitfld.long 0x00 15. "ENABLE,Enables the spread spectrum modulation" "0: Spectrum modulation is disabled,1: Spectrum modulation is enabled"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "STEP,STOP and STEP together control the modulation depth (maximum frequency change) and modulation frequency"
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "APLLLOCK_CNFG,Auxiliary PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count before APLL is considered locked and valid"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "APLLLOCK_CNFG,Auxiliary PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count beforeAPLL is considered locked and valid"
|
|
endif
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "SPLLCSR,System PLL Control Status Register"
|
|
eventfld.long 0x00 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has..,1: System PLL Clock Monitor is enabled and.."
|
|
rbitfld.long 0x00 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source"
|
|
newline
|
|
rbitfld.long 0x00 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid"
|
|
bitfld.long 0x00 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
|
|
newline
|
|
bitfld.long 0x00 1. "SPLLSTEN,System PLL Stop Enable" "0: System PLL is disabled in Stop modes,1: System PLL is enabled in Stop modes"
|
|
bitfld.long 0x00 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled"
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "SPLLDIV,System PLL Divide Register"
|
|
bitfld.long 0x00 16.--18. "SPLLDIV3,System PLL Clock Divide 3" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x00 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "SPLLCFG,System PLL Configuration Register"
|
|
bitfld.long 0x00 16.--18. "MULT,System PLL Multiplier" "?,1: MULT = 15,2: MULT = 16,3: MULT = 20,4: MULT = 22,5: MULT = 25,6: MULT = 30,?..."
|
|
bitfld.long 0x00 14.--15. "PFDSEL,PFD Clock Select" "0: PFD0 output clock selected,1: PFD1 output clock selected,2: PFD2 output clock selected,3: PFD3 output clock selected"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "PLLS,PLL Select" "0: SPLL output clocks selected,1: SPLL PFD output clock selected"
|
|
newline
|
|
bitfld.long 0x00 0. "SOURCE,Clock Source" "0: System OSC (SOSC),?..."
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "SPLLPFD,System PLL PFD Register"
|
|
bitfld.long 0x00 31. "PFD3_CLKGATE,PFD3_CLKGATE" "0: PFD3 clock is not gated,1: PFD3 clock is gated"
|
|
rbitfld.long 0x00 30. "PFD3_VALID,PFD3_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--29. "PFD3,PLL Fractional Divider 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "PFD2_CLKGATE,PFD2_CLKGATE" "0: PFD2 clock is not gated,1: PFD2 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 22. "PFD2_VALID,PFD2_VALID" "0,1"
|
|
bitfld.long 0x00 16.--21. "PFD2,PLL Fractional Divider 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 15. "PFD1_CLKGATE,PFD1_CLKGATE" "0: PFD1 clock is not gated,1: PFD1 clock is gated"
|
|
rbitfld.long 0x00 14. "PFD1_VALID,PFD1_VALID" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PFD1,PLL Fractional Divider 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. "PFD0_CLKGATE,PFD0_CLKGATE" "0: PFD0 clock is not gated,1: PFD0 clock is gated"
|
|
newline
|
|
rbitfld.long 0x00 6. "PFD0_VALID,PFD0_VALID" "0,1"
|
|
bitfld.long 0x00 0.--5. "PFD0,PLL Fractional Divider 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "SPLLLOCK_CNFG,System PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count before SPLL is considered locked and valid"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "SPLLLOCK_CNFG,System PLL LOCK Configuration Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCK_TIME,Configures the number of reference clocks to count beforeSPLL is considered locked and valid"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "PCC"
|
|
tree "PCC2"
|
|
base ad:0x403F0000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PCC_DMA1,PCC DMA1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PCC_DMA1,PCC DMA1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PCC_RGPIO2P1,PCC RGPIO2P1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PCC_RGPIO2P1,PCC RGPIO2P1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PCC_FLEXBUS,PCC FLEXBUS Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PCC_FLEXBUS,PCC FLEXBUS Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PCC_SEMA42_1,PCC SEMA42_1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PCC_SEMA42_1,PCC SEMA42_1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PCC_DMA_MUX1,PCC DMA_MUX1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PCC_DMA_MUX1,PCC DMA_MUX1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PCC_CAAM,PCC CAAM Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PCC_CAAM,PCC CAAM Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_TPM4,PCC TPM4 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_TPM4,PCC TPM4 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "PCC_TPM5,PCC TPM5 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "PCC_TPM5,PCC TPM5 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "PCC_LPIT1,PCC LPIT1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "PCC_LPIT1,PCC LPIT1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_LPSPI2,PCC LPSPI2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_LPSPI2,PCC LPSPI2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_LPSPI3,PCC LPSPI3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_LPSPI3,PCC LPSPI3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "PCC_LPI2C4,PCC LPI2C4 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "PCC_LPI2C4,PCC LPI2C4 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PCC_LPI2C5,PCC LPI2C5 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PCC_LPI2C5,PCC LPI2C5 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PCC_LPUART4,PCC LPUART4 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PCC_LPUART4,PCC LPUART4 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PCC_LPUART5,PCC LPUART5 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PCC_LPUART5,PCC LPUART5 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCC_FLEXIO1,PCC FLEXIO1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCC_FLEXIO1,PCC FLEXIO1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PCC_USB0,PCC USB0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PCC_USB0,PCC USB0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
rgroup.long 0xD0++0x03
|
|
line.long 0x00 "PCC_USB1,PCC USB1 Register"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "PCC_USB_PHY,PCC USB_PHY Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "PCC_USB_PHY,PCC USB_PHY Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "PCC_USB_PL301,PCC USB_PL301 Register"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "PCC_USDHC0,PCC USDHC0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "PCC_USDHC0,PCC USDHC0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "PCC_USDHC1,PCC USDHC1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "PCC_USDHC1,PCC USDHC1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "PCC_WDOG1,PCC WDOG1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "PCC_WDOG1,PCC WDOG1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "PCC_WDOG2,PCC WDOG2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "PCC_WDOG2,PCC WDOG2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
tree.end
|
|
tree "PCC3"
|
|
base ad:0x40B30000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PCC_TPM6,PCC TPM6 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PCC_TPM6,PCC TPM6 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "PCC_TPM7,PCC TPM7 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "PCC_TPM7,PCC TPM7 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PCC_LPI2C6,PCC LPI2C6 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PCC_LPI2C6,PCC LPI2C6 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_LPI2C7,PCC LPI2C7 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_LPI2C7,PCC LPI2C7 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "PCC_LPUART6,PCC LPUART6 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "PCC_LPUART6,PCC LPUART6 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "PCC_LPUART7,PCC LPUART7 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "PCC_LPUART7,PCC LPUART7 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PCC_VIU,PCC VIU Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PCC_VIU,PCC VIU Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_DSI,PCC DSI Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_DSI,PCC DSI Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_LCDIF,PCC LCDIF Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_LCDIF,PCC LCDIF Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "PCC_MMDC,PCC MMDC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "PCC_MMDC,PCC MMDC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PCC_PCTLC,PCC PCTLC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PCC_PCTLC,PCC PCTLC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "PCC_PCTLD,PCC PCTLD Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "PCC_PCTLD,PCC PCTLD Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PCC_PCTLE,PCC PCTLE Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PCC_PCTLE,PCC PCTLE Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCC_PCTLF,PCC PCTLF Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCC_PCTLF,PCC PCTLF Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "PCC_GPU3D,PCC GPU3D Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "PCC_GPU3D,PCC GPU3D Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "PCC_GPU2D,PCC GPU2D Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "PCC_GPU2D,PCC GPU2D Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
tree.end
|
|
tree "PCC0"
|
|
base ad:0x41026000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PCC_DMA0,PCC DMA0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PCC_DMA0,PCC DMA0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PCC_RGPIO2P0,PCC RGPIO2P0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PCC_RGPIO2P0,PCC RGPIO2P0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PCC_XRDC,PCC XRDC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PCC_XRDC,PCC XRDC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PCC_SEMA42_0,PCC SEMA42_0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PCC_SEMA42_0,PCC SEMA42_0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PCC_DMA_MUX0,PCC DMA_MUX0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PCC_DMA_MUX0,PCC DMA_MUX0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "PCC_MU_A,PCC MU_A Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "PCC_MU_A,PCC MU_A Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_WDOG0,PCC WDOG0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_WDOG0,PCC WDOG0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_CRC,PCC CRC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_CRC,PCC CRC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_LTC,PCC LTC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_LTC,PCC LTC Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PCC_TRNG,PCC TRNG Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PCC_TRNG,PCC TRNG Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PCC_LPIT0,PCC LPIT0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PCC_LPIT0,PCC LPIT0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PCC_LPTIMER0,PCC LPTIMER0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PCC_LPTIMER0,PCC LPTIMER0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "PCC_LPTIMER1,PCC LPTIMER1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "PCC_LPTIMER1,PCC LPTIMER1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PCC_TPM0,PCC TPM0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PCC_TPM0,PCC TPM0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCC_TPM1,PCC TPM1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCC_TPM1,PCC TPM1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "PCC_FLEXIO0,PCC FLEXIO0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "PCC_FLEXIO0,PCC FLEXIO0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PCC_LPI2C0,PCC LPI2C0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PCC_LPI2C0,PCC LPI2C0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "PCC_LPI2C1,PCC LPI2C1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "PCC_LPI2C1,PCC LPI2C1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "PCC_LPI2C2,PCC LPI2C2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "PCC_LPI2C2,PCC LPI2C2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "PCC_LPI2C3,PCC LPI2C3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "PCC_LPI2C3,PCC LPI2C3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "PCC_SAI0,PCC SAI0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "FRAC,Peripheral Clock Divider Fraction"
|
|
hexmask.long.word 0x00 0.--15. 1. "PCD,Peripheral Clock Divider Select"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "PCC_SAI0,PCC SAI0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "FRAC,Peripheral Clock Divider Fraction"
|
|
hexmask.long.word 0x00 0.--15. 1. "PCD,Peripheral Clock Divider Select"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "PCC_LPSPI0,PCC LPSPI0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "PCC_LPSPI0,PCC LPSPI0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "PCC_LPSPI1,PCC LPSPI1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "PCC_LPSPI1,PCC LPSPI1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "PCC_LPUART0,PCC LPUART0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "PCC_LPUART0,PCC LPUART0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "PCC_LPUART1,PCC LPUART1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "PCC_LPUART1,PCC LPUART1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "PCC_PCTLA,PCC PCTLA Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "PCC_PCTLA,PCC PCTLA Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "PCC_PCTLB,PCC PCTLB Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "PCC_PCTLB,PCC PCTLB Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "PCC_ADC0,PCC ADC0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "PCC_ADC0,PCC ADC0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "PCC_CMP0,PCC CMP0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "PCC_CMP0,PCC CMP0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "PCC_CMP1,PCC CMP1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "PCC_CMP1,PCC CMP1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "PCC_DAC0,PCC DAC0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "PCC_DAC0,PCC DAC0 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "PCC_DAC1,PCC DAC1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "PCC_DAC1,PCC DAC1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "PCC_SNVS,PCC SNVS Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "PCC_SNVS,PCC SNVS Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
endif
|
|
tree.end
|
|
tree "PCC1"
|
|
base ad:0x410B2000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PCC_TPIU,PCC TPIU Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PCC_TPIU,PCC TPIU Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_QSPI_OTFAD,PCC QSPI_OTFAD Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "PCC_QSPI_OTFAD,PCC QSPI_OTFAD Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
bitfld.long 0x00 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0,1: Fractional value is 1"
|
|
bitfld.long 0x00 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PCC_TPM2,PCC TPM2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PCC_TPM2,PCC TPM2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_TPM3,PCC TPM3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "PCC_TPM3,PCC TPM3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_SAI1,PCC SAI1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "FRAC,Peripheral Clock Divider Fraction"
|
|
hexmask.long.word 0x00 0.--15. 1. "PCD,Peripheral Clock Divider Select"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PCC_SAI1,PCC SAI1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "FRAC,Peripheral Clock Divider Fraction"
|
|
hexmask.long.word 0x00 0.--15. 1. "PCD,Peripheral Clock Divider Select"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "PCC_LPUART2,PCC LPUART2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "PCC_LPUART2,PCC LPUART2 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PCC_LPUART3,PCC LPUART3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PCC_LPUART3,PCC LPUART3 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PCC_ADC1,PCC ADC1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PCC_ADC1,PCC ADC1 Register"
|
|
rbitfld.long 0x00 31. "PR,Present" "0: Peripheral is not present,1: Peripheral is present"
|
|
bitfld.long 0x00 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "INUSE,In use flag" "0: Peripheral is not being used,1: Peripheral is being used"
|
|
bitfld.long 0x00 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "PMC1 (PMC)"
|
|
base ad:0x40400000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,PMC 1 Version register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HSRUN,PMC 1 HSRUN mode register"
|
|
bitfld.long 0x00 24. "FBBEN,Forward Back Bias Enable" "0: FBB is disabled,1: FBB is enabled"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RUN,PMC 1 RUN mode register"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "VLPR,PMC 1 VLPR mode register"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "STOP,PMC 1 STOP mode register"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "VLPS,PMC 1 VLPS mode register"
|
|
bitfld.long 0x00 28. "RBBEN,Reverse Back Bias Enable" "0: RBB is disabled,1: RBB is enabled"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
newline
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "LLS,PMC 1 LLS mode register"
|
|
bitfld.long 0x00 28. "RBBEN,Reverse Back Bias Enable" "0: RBB is disabled,1: RBB is enabled"
|
|
bitfld.long 0x00 16.--21. "LDOVL,Linear LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
newline
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "VLLS,PMC 1 VLLS mode register"
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "STATUS,PMC 1 Status register"
|
|
bitfld.long 0x00 24. "SRAMF,SRAM Flag" "0: No change request in the SRAMs,1: A change mode request is being processed in.."
|
|
bitfld.long 0x00 8. "LDOVLF,LDO Voltage Level Flag" "0: LDO Voltage Level is stable,1: LDO Voltage Level is changing"
|
|
newline
|
|
bitfld.long 0x00 5. "HVDV,1.2V High-Voltage Detector Value" "0: High-voltage event was not detected by the..,1: High-voltage event was detected by the 1.2V.."
|
|
bitfld.long 0x00 4. "HVDF,1.2V High-Voltage Detector Flag" "0: High-voltage event was not detected by the..,1: High-voltage event was detected by the 1.2V.."
|
|
newline
|
|
bitfld.long 0x00 1. "LVDV,1.2V Low-Voltage Detector Value" "0: Low-voltage event was not detected by the..,1: Low-voltage event was detected by the 1.2V.."
|
|
bitfld.long 0x00 0. "LVDF,1.2V Low-Voltage Detector Flag" "0: Low-voltage event was not detected by the..,1: Low-voltage event was detected by the 1.2V.."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CTRL,PMC 1 Control register"
|
|
bitfld.long 0x00 14. "ISOACK,Isolation Acknowledge" "0,1"
|
|
bitfld.long 0x00 10. "HVDRE,1.2V High-Voltage Detector Reset Enable" "0: 1.2V high-voltage detector reset is disabled,1: 1.2V high-voltage detector reset is enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "LVDRE,Low-Voltage Detector Reset Enable" "0: Low-voltage detector reset is disabled,1: Low-voltage detector reset is enabled"
|
|
bitfld.long 0x00 3. "HVDACK,1.2V High-Voltage Detector Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "HVDIE,1.2V High-Voltage Detector Interrupt Enable" "0: 1.2V high-voltage detector interrupt is..,1: 1.2V high-voltage detector interrupt is enabled"
|
|
bitfld.long 0x00 1. "LVDACK,1.2V Low-Voltage Detector Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LVDIE,Low-Voltage Detector Interrupt Enable" "0: Low-voltage detector interrupt is disabled,1: Low-voltage detector interrupt is enabled"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BCTRL,PMC 1 Biasing Control register"
|
|
bitfld.long 0x00 24.--27. "FBBPLEVEL,FBB P-Well Voltage Level" "0: No BIAS condition,1: Voltage level at 50mV,2: Voltage level at 150mV,3: Voltage level at 100mV,4: Voltage level at 350mV,5: Voltage level at 300mV,6: Voltage level at 200mV,7: Voltage level at 250mV,?..."
|
|
bitfld.long 0x00 16.--19. "FBBNLEVEL,FBB N-Well Voltage Level" "0: No BIAS condition,1: Voltage level at -50mV,2: Voltage level at -150mV,3: Voltage level at -100mV,4: Voltage level at -350mV,5: Voltage level at -300mV,6: Voltage level at -200mV,7: Voltage level at -250mV,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "RBBPLEVEL,RBB P-Well Voltage Level" "0: Voltage level at -0.5V,1: Voltage level at -0.6V,2: Voltage level at -0.7V,3: Voltage level at -0.8V,4: Voltage level at -0.9V,5: Voltage level at -1.0V,6: Voltage level at -1.1V,7: Voltage level at -1.2V,8: Voltage level at -1.3V,?..."
|
|
bitfld.long 0x00 0.--3. "RBBNLEVEL,RBB N-Well Voltage Level" "0: Voltage level at 0.5V,1: Voltage level at 0.6V,2: Voltage level at 0.7V,3: Voltage level at 0.8V,4: Voltage level at 0.9V,5: Voltage level at 1.0V,6: Voltage level at 1.1V,7: Voltage level at 1.2V,8: Voltage level at 1.3V,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SRAMCTRL,PMC 1 SRAMs Control register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRAM_STDY,PMC 1 SRAM Bank in Standby Mode"
|
|
tree.end
|
|
tree "VIU"
|
|
base ad:0x40A80000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCR,Status And Configuration Register"
|
|
bitfld.long 0x00 31. "MODE32BIT,MODE32BIT" "0: 16-bit RGB or YUV 4:2:2 output,1: 32-bit RGB or YUV 4:4:4 output"
|
|
bitfld.long 0x00 30. "ROUND_ON,ROUND_ON" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DITHER_ON,DITHER_ON" "0,1"
|
|
rbitfld.long 0x00 28. "FIELD_NO,FIELD_NO" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "DMA_ACT,DMA_ACT" "0,1"
|
|
bitfld.long 0x00 26. "SCALER_EN,SCALER_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "YUV2RGB_EN,YUV2RGB_EN" "0,1"
|
|
bitfld.long 0x00 24. "BC_EN,BC_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "MODE444,MODE444" "0,1"
|
|
eventfld.long 0x00 21. "ERROR_IRQ,ERROR_IRQ" "0,1"
|
|
newline
|
|
eventfld.long 0x00 20. "DMA_END_IRQ,DMA_END_IRQ" "0,1"
|
|
eventfld.long 0x00 19. "VSTART_IRQ,VSTART_IRQ" "0,1"
|
|
newline
|
|
eventfld.long 0x00 18. "HSYNC_IRQ,HSYNC_IRQ" "0,1"
|
|
eventfld.long 0x00 17. "VSYNC_IRQ,VSYNC_IRQ" "0,1"
|
|
newline
|
|
eventfld.long 0x00 16. "FIELD_IRQ,FIELD_IRQ" "0,1"
|
|
bitfld.long 0x00 14. "ECC_EN,ECC_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "ERROR_EN,ERROR_EN" "0,1"
|
|
bitfld.long 0x00 12. "DMA_END_EN,DMA_END_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "VSTART_EN,VSTART_EN" "0,1"
|
|
bitfld.long 0x00 10. "HSYNC_EN,HSYNC_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "VSYNC_EN,VSYNC_EN" "0,1"
|
|
bitfld.long 0x00 8. "FIELD_EN,FIELD_EN" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 4.--7. "ERROR_CODE,ERROR_CODE" "0: ERROR_CODE_0,1: DMA arm command given during vertical active..,2: DMA arm command given during vertical..,?,4: Line too long,5: Too many lines in a field/frame,6: Line too short,7: Not enough lines in a field/frame,8: FIFO overflow,9: FIFO underflow,10: One bit ECC error,11: Two or more bits ECC error,?..."
|
|
bitfld.long 0x00 1.--3. "FORMAT_CTRL,FORMAT_CTRL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 0. "SOFT_RESET,SOFT_RESET" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DINVSZ,Detected Input Video Pixel and Line Counts"
|
|
hexmask.long.word 0x00 16.--31. 1. "DETECTED_LINEC,DETECTED_LINEC"
|
|
hexmask.long.word 0x00 0.--15. 1. "DETECTED_PIXELC,DETECTED_PIXELC"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DINVFL,Detected Input Video Frame Length"
|
|
hexmask.long.word 0x00 16.--31. 1. "DETECTED_FRAME_HEIGHT,DETECTED_FRAME_HEIGHT"
|
|
hexmask.long.word 0x00 0.--15. 1. "DETECTED_FRAME_WIDTH,DETECTED_FRAME_WIDTH"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DMA_ADDR,Base Address Of Every Field/Frame Of Picture In Memory"
|
|
hexmask.long 0x00 3.--31. 1. "ADDR,ADDR"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DMA_INC,Horizontal DMA Increment"
|
|
hexmask.long.word 0x00 3.--15. 1. "INC,INC"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "INVSZ,Input Video Pixel and Line Count"
|
|
hexmask.long.word 0x00 16.--31. 1. "LINEC,LINEC"
|
|
hexmask.long.word 0x00 0.--15. 1. "PIXELC,PIXELC"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "HPRALRM,High Priority Bus Request Alarm"
|
|
hexmask.long.word 0x00 0.--15. 1. "ALARM,ALARM"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ALPHA,Programable Alpha Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ALPHA,ALPHA"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HFACTOR,Scaling Factor In Horizontal Direction"
|
|
hexmask.long.word 0x00 0.--10. 1. "FACTOR,FACTOR"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "VFACTOR,Down Scaling Factor In Vertical Direction"
|
|
hexmask.long.word 0x00 0.--10. 1. "FACTOR,FACTOR"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "VID_SIZE,Scaling Destination Pixel and Line Count"
|
|
hexmask.long.word 0x00 16.--31. 1. "LINEC,LINEC"
|
|
hexmask.long.word 0x00 0.--15. 1. "PIXELC,PIXELC"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "LUT_ADDR,B/C Adjust Look-up-table Current Address"
|
|
hexmask.long.byte 0x00 2.--9. 1. "ADDR,ADDR"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LUT_DATA,B/C Adjust Look-up-table Data Entry"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "EXT_CONFIG,Extended Configuration Register"
|
|
bitfld.long 0x00 14. "MONO_LSB,Data location selector on input data bus" "0: 8-bit MONO data is on LSB of input bus,1: 8-bit MONO data is on MSB of input bus"
|
|
bitfld.long 0x00 13. "MODE_8BIT,8 bit mode output format selector" "0: 8-bit output mode is not selected,1: 8-bit output mode is selected"
|
|
newline
|
|
bitfld.long 0x00 12. "CS_EN,CS_EN" "0: Chroma swap is disabled,1: Chroma swap is enabled"
|
|
bitfld.long 0x00 11. "LENDIAN,LENDIAN" "0: Big endian,1: Little endian"
|
|
newline
|
|
bitfld.long 0x00 9. "RGB2YUV_EN,RGB2YUV_EN" "0,1"
|
|
bitfld.long 0x00 8. "DE_VALID,DE_VALID" "0: DE is invalid,1: DE is valid"
|
|
newline
|
|
bitfld.long 0x00 5.--7. "INP_FORMAT,INP_FORMAT" "0: 10/8bit ITU stream,1: 24bit parallel YUV,2: 8bit mono input,?,4: 24bit parallel RGB,5: 8bit serial RGB,6: 18bit parallel RGB,7: 16bit parallel RGB"
|
|
bitfld.long 0x00 4. "PCLK_POL,PCLK_POL" "0: Active high,1: PCLK_POL_1"
|
|
newline
|
|
bitfld.long 0x00 3. "VSYNC_POL,VSYNC_POL" "0: VSYNC_POL_0,1: VSYNC_POL_1"
|
|
bitfld.long 0x00 2. "HSYNC_POL,HSYNC_POL" "0: HSYNC_POL_0,1: HSYNC_POL_1"
|
|
newline
|
|
bitfld.long 0x00 1. "DE_POL,DE_POL" "0: Active high,1: Active low"
|
|
bitfld.long 0x00 0. "HMIRROR_EN,HMIRROR_EN" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "ACT_ORG,Active Image Origin"
|
|
hexmask.long.word 0x00 16.--31. 1. "ACT_ORG_Y,ACT_ORG_Y"
|
|
hexmask.long.word 0x00 0.--15. 1. "ACT_ORG_X,ACT_ORG_X"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "ACT_SIZE,Active Image Size"
|
|
hexmask.long.word 0x00 16.--31. 1. "ACT_IMG_HEIGHT,ACT_IMG_HEIGHT"
|
|
hexmask.long.word 0x00 0.--15. 1. "ACT_IMG_WIDTH,ACT_IMG_WIDTH"
|
|
tree.end
|
|
tree "MIPI_DSI_HOST (MIPI DSI HOST)"
|
|
base ad:0x40A90000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_NUM_LANES,no description available"
|
|
bitfld.long 0x00 0.--1. "dsi_host_cfg_num_lanes,Sets the number of active lanes that are to be used for transmitting data" "?,?,2: Reserved,3: Reserved"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_NONCONTINUOUS_CLK,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_noncontinuous_clk,Sets the Host Controller into non-continuous MIPI clock mode" "0: Continuous high speed clock,1: Non-Continuous high speed clock"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_T_PRE,no description available"
|
|
hexmask.long.byte 0x00 0.--6. 1. "dsi_host_cfg_t_pre,Sets the number of byte clock periods ('clk_byte' input) that the controller will wait after enabling the clock lane for HS operation before enabling the data lanes for HS operation"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_T_POST,no description available"
|
|
hexmask.long.byte 0x00 0.--6. 1. "dsi_host_cfg_t_post,Sets the number of byte clock periods ('clk_byte' input) to wait before putting the clock lane into LP mode after the data lanes have been detected to be in Stop State"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_TX_GAP,no description available"
|
|
hexmask.long.byte 0x00 0.--6. 1. "dsi_host_cfg_tx_gap,Sets the number of byte clock periods ('clk_byte' input) that the controller will wait after the clock lane has been put into LP mode before enabling the clock lane for HS mode again"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_AUTOINSERT_EOTP,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_autoinsert_eotp,Enables the Host Controller to automatically insert an EoTp short packet when switching from HS to LP mode" "0: EoTp is not automatically inserted,1: EoTp is automatically inserted"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_EXTRA_CMDS_AFTER_EOTP,no description available"
|
|
hexmask.long.byte 0x00 0.--7. 1. "dsi_host_cfg_extra_cmds_after_eotp,Configures the DSI Host Controller to send extra End Of Transmission Packets after the end of a packet"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_HTX_TO_COUNT,no description available"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "dsi_host_cfg_htx_to_count,Sets the value of the DSI Host High Speed TX timeout count in clk_byte clock periods that once reached will initiate a timeout error and follow the recovery procedure documented in the DSI specification"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_LRX_H_TO_COUNT,no description available"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "dsi_host_cfg_lrx_h_to_count,Sets the value of the DSI Host low power RX timeout count in clk_byte clock periods that once reached will initiate a timeout error and follow the recovery procedure documented in the DSI specification"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_BTA_H_TO_COUNT,no description available"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "dsi_host_cfg_bta_h_to_count,Sets the value of the DSI Host Bus Turn Around (BTA) timeout in clk_byte clock periods that once reached will initiate a timeout error"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_TWAKEUP,no description available"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "dsi_host_cfg_twakeup,DPHY Twakeup timing parameter"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_STATUS_OUT,no description available"
|
|
bitfld.long 0x00 10. "CHECKSUM_ERROR,Checksum Error (long packet only) - Checksum error from peripheral error report cleared upon read" "0,1"
|
|
bitfld.long 0x00 9. "ECC_ERROR_MULTI_BIT,ECC Error multi-bit (detected not corrected) - ECC multi-bit error from peripheral error report cleared upon read" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ECC_ERROR_SINGLE_BIT,ECC single bit error from peripheral error report cleared upon read" "0,1"
|
|
bitfld.long 0x00 7. "CONTENTION_DETECT,Contention Detected - Contention Detection from peripheral error report cleared upon read" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FALSE_CONTROL_ERROR,False Control Error - False Control Error from peripheral error report cleared upon read" "0,1"
|
|
bitfld.long 0x00 5. "PERIPH_TIMEOUT_ERROR,Peripheral Timeout Error - Peripheral Timeout error from peripheral error report cleared upon read" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LP_TX_SYNC_ERROR,Low-Power Transmit Sync Error - Low Power Transmit Sync error from peripheral error report cleared upon read" "0,1"
|
|
bitfld.long 0x00 3. "ESCAPE_MODE_ENTRY_CMD_ERROR,Escape Mode Entry Command Error - Escape Mode Entry Command Error from peripheral error report cleared upon read" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EOT_SYNC_ERROR,EoT Sync Error - End of Transmission (EoT) Sync Error from peripheral error report cleared upon read" "0,1"
|
|
bitfld.long 0x00 1. "SOT_SYNC_ERROR,SoT Sync Error - Start of Transmission (SoT) Sync Error from peripheral error report cleared upon read" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SOT_ERROR,SoT Error - Start of Transmission (SoT) Error from peripheral error report cleared upon read" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DSI_HOST_RX_ERROR_STATUS,no description available"
|
|
hexmask.long.word 0x00 0.--10. 1. "dsi_host_rx_error_status,Status Register for Host receive error detection ECC errors CRC errors and for timeout indicators [0] ECC single bit error detected [1] ECC multi bit error detected [6:2] Errored bit position for single bit ECC error [7] CRC.."
|
|
tree.end
|
|
tree "MIPI_DSI_HOST_DPI_INTFC (MIPI DSI HOST DPI INTFC)"
|
|
base ad:0x40A90200
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_PIXEL_PAYLOAD_SIZE,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_cfg_dpi_pixel_payload_size,Maximum number of pixels that should be sent as one DSI packet"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_PIXEL_FIFO_SEND_LEVEL,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_cfg_dpi_pixel_fifo_send_level,In order to optimize DSI utility the DPI bridge buffers a cerntain number of DPI pixels before initiating a DSI packet"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_INTERFACE_COLOR_CODING,no description available"
|
|
bitfld.long 0x00 0.--2. "dsi_host_cfg_dpi_interface_color_coding,Sets the distribution of RGB bits within the 24-bit d bus as specified by the DPI specification" "0: 16-bit,1: 16-bit,2: 16-bit,3: 18-bit,4: 18-bit,5: 24-bit,?..."
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_PIXEL_FORMAT,no description available"
|
|
bitfld.long 0x00 0.--1. "dsi_host_cfg_dpi_pixel_format,Sets the DSI packet type of the pixels" "0,1,2,3"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_VSYNC_POLARITY,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_dpi_vsync_polarity,Sets polarity of dpi_vsync_input" "0: active low,1: active high"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_HSYNC_POLARITY,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_dpi_hsync_polarity,Sets polarity of dpi_hsync_input" "0: active low,1: active high"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_VIDEO_MODE,no description available"
|
|
bitfld.long 0x00 0.--1. "dsi_host_cfg_dpi_video_mode,Select DSI video mode that the host DPI module should generate packets for" "0: Non-Burst mode with Sync Pulses,1: Non-Burst mode with Sync Events,2: Burst mode,3: Reserved not valid"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_HFP,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_cfg_dpi_hfp,Sets the DSI packet payload size in bytes of the horizontal front porch blanking packet"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_HBP,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_cfg_dpi_hbp,Sets the DSI packet payload size in bytes of the horizontal back porch blanking packet"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_HSA,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_cfg_dpi_hsa,Sets the DSI packet payload size in bytes of the horizontal sync width filler blanking packet"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_ENABLE_MULT_PKTS,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_dpi_enable_mult_pkts,Enable Multiple packets per video line" "0: Video Line is sent in a single packet,1: Video Line is sent in two packets"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_VBP,no description available"
|
|
hexmask.long.byte 0x00 0.--7. 1. "dsi_host_cfg_dpi_vbp,Sets the number of lines in the vertical back porch"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_VFP,no description available"
|
|
hexmask.long.byte 0x00 0.--7. 1. "dsi_host_cfg_dpi_vfp,Sets the number of lines in the vertical front porch"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_BLLP_MODE,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_dpi_bllp_mode,Optimize bllp periods to Low Power mode when possible" "0: blanking packets are sent during BLLP periods,1: LP mode is used for BLLP periods"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_USE_NULL_PKT_BLLP,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_cfg_dpi_use_null_pkt_bllp,Selects type of blanking packet to be sent during bllp region" "0: Blanking packet used in bllp region,1: Null packet used in bllp region"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_VACTIVE,no description available"
|
|
hexmask.long.word 0x00 0.--13. 1. "dsi_host_cfg_dpi_vactive,Sets the number of lines in the vertical active area"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DSI_HOST_CFG_DPI_VC,no description available"
|
|
bitfld.long 0x00 0.--1. "dsi_host_cfg_dpi_vc,Sets the Virtual Channel (VC) of packets that will be sent to the receive packet interface" "0,1,2,3"
|
|
tree.end
|
|
tree "MIPI_DSI_HOST_APB_PKT_IF (MIPI DSI HOST APB PKT IF)"
|
|
base ad:0x40A90280
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DSI_HOST_TX_PAYLOAD,no description available"
|
|
hexmask.long 0x00 0.--31. 1. "dsi_host_tx_payload,Tx Payload data write register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DSI_HOST_PKT_CONTROL,no description available"
|
|
abitfld.long 0x00 0.--26. "dsi_host_pkt_control,Tx packet control register" "0x0000000=0: LP mode,0x0000001=1: HS mode [25]"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DSI_HOST_SEND_PACKET,no description available"
|
|
bitfld.long 0x00 0. "dsi_host_send_packet,Tx send packet" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "DSI_HOST_PKT_STATUS,no description available"
|
|
abitfld.long 0x00 0.--8. "dsi_host_pkt_status,Status of APB to packet interface [0] - state machine not idle [1] - Tx packet done [2] - dphy direction" "0x000=0: tx had control,0x001=1: rx has control [3] - tx fifo overflow"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DSI_HOST_PKT_FIFO_WR_LEVEL,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_pkt_fifo_wr_level,Write level of APB to pkt interface fifo"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "DSI_HOST_PKT_FIFO_RD_LEVEL,no description available"
|
|
hexmask.long.word 0x00 0.--15. 1. "dsi_host_pkt_fifo_rd_level,Read level of APB to pkt interface fifo"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DSI_HOST_PKT_RX_PAYLOAD,no description available"
|
|
hexmask.long 0x00 0.--31. 1. "dsi_host_pkt_rx_payload,APB to pkt interface rx payload"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DSI_HOST_PKT_RX_PKT_HEADER,no description available"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "dsi_host_pkt_rx_pkt_header,APB to pkt interface rx packet header [15:0] word count [21:16] data type [23:22] Virtual Channel"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "DSI_HOST_IRQ_STATUS,no description available"
|
|
abitfld.long 0x00 0.--31. "dsi_host_irq_status,Status of APB to packet interface [0] - state machine not idle [1] - Tx packet done [2] - dphy direction" "0x00000000=0: tx had control,0x00000001=1: rx has control [3] - tx fifo.."
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "DSI_HOST_IRQ_STATUS2,no description available"
|
|
bitfld.long 0x00 0.--2. "dsi_host_irq_status2,Status of APB to packet interface part 2" "0,1,2,3,4,5,6,7"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DSI_HOST_IRQ_MASK,no description available"
|
|
abitfld.long 0x00 0.--31. "dsi_host_irq_mask,irq mask [0] - state machine not idle [1] - Tx packet done [2] - dphy direction" "0x00000000=0: tx had control,0x00000001=1: rx has control [3] - tx fifo.."
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DSI_HOST_IRQ_MASK2,no description available"
|
|
bitfld.long 0x00 0.--2. "dsi_host_irq_mask2,irq mask 2 [0] - single bit ecc error [1] - multi bit ecc error [2] - crc error" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "MIPI_DSI_HOST_FSL_IP1_DPHY_INTFC (MIPI DSI HOST FSL IP1 DPHY INTFC)"
|
|
base ad:0x40A90300
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DPHY_PD_DPHY,no description available"
|
|
bitfld.long 0x00 0. "dphy_pd_dphy,DPHY PD_DPHY input control" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DPHY_M_PRG_HS_PREPARE,no description available"
|
|
bitfld.long 0x00 0.--1. "dphy_m_prg_hs_prepare,DPHY m_PRG_HS_PREPARE input" "0: dphy_m_prg_hs_prepare_0,1: dphy_m_prg_hs_prepare_1,2: dphy_m_prg_hs_prepare_2,3: dphy_m_prg_hs_prepare_3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DPHY_MC_PRG_HS_PREPARE,no description available"
|
|
bitfld.long 0x00 0. "dphy_mc_prg_hs_prepare,DPHY mc_PRG_HS_PREPARE input" "0: dphy_mc_prg_hs_prepare_0,1: dphy_mc_prg_hs_prepare_1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DPHY_M_PRG_HS_ZERO,no description available"
|
|
bitfld.long 0x00 0.--4. "dphy_m_prg_hs_zero,DPHY m_PRG_HS_ZERO input" "0: dphy_m_prg_hs_zero_0,1: dphy_m_prg_hs_zero_1,2: dphy_m_prg_hs_zero_2,3: dphy_m_prg_hs_zero_3,4: dphy_m_prg_hs_zero_4,5: dphy_m_prg_hs_zero_5,6: dphy_m_prg_hs_zero_6,7: dphy_m_prg_hs_zero_7,8: dphy_m_prg_hs_zero_8,9: dphy_m_prg_hs_zero_9,10: dphy_m_prg_hs_zero_10,11: dphy_m_prg_hs_zero_11,12: dphy_m_prg_hs_zero_12,13: dphy_m_prg_hs_zero_13,14: dphy_m_prg_hs_zero_14,15: dphy_m_prg_hs_zero_15,16: dphy_m_prg_hs_zero_16,17: dphy_m_prg_hs_zero_17,18: dphy_m_prg_hs_zero_18,19: dphy_m_prg_hs_zero_19,20: dphy_m_prg_hs_zero_20,21: dphy_m_prg_hs_zero_21,22: dphy_m_prg_hs_zero_22,23: dphy_m_prg_hs_zero_23,24: dphy_m_prg_hs_zero_24,25: dphy_m_prg_hs_zero_25,26: dphy_m_prg_hs_zero_26,27: dphy_m_prg_hs_zero_27,28: dphy_m_prg_hs_zero_28,29: dphy_m_prg_hs_zero_29,30: dphy_m_prg_hs_zero_30,31: dphy_m_prg_hs_zero_31"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DPHY_MC_PRG_HS_ZERO,no description available"
|
|
bitfld.long 0x00 0.--5. "dphy_mc_prg_hs_zero,DPHY mc_PRG_HS_ZERO input" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: dphy_mc_prg_hs_zero_32,33: dphy_mc_prg_hs_zero_33,34: dphy_mc_prg_hs_zero_34,35: dphy_mc_prg_hs_zero_35,36: dphy_mc_prg_hs_zero_36,37: dphy_mc_prg_hs_zero_37,38: dphy_mc_prg_hs_zero_38,39: dphy_mc_prg_hs_zero_39,40: dphy_mc_prg_hs_zero_40,41: dphy_mc_prg_hs_zero_41,42: dphy_mc_prg_hs_zero_42,43: dphy_mc_prg_hs_zero_43,44: dphy_mc_prg_hs_zero_44,45: dphy_mc_prg_hs_zero_45,46: dphy_mc_prg_hs_zero_46,47: dphy_mc_prg_hs_zero_47,48: dphy_mc_prg_hs_zero_48,49: dphy_mc_prg_hs_zero_49,50: dphy_mc_prg_hs_zero_50,51: dphy_mc_prg_hs_zero_51,52: dphy_mc_prg_hs_zero_52,53: dphy_mc_prg_hs_zero_53,54: dphy_mc_prg_hs_zero_54,55: dphy_mc_prg_hs_zero_55,56: dphy_mc_prg_hs_zero_56,57: dphy_mc_prg_hs_zero_57,58: dphy_mc_prg_hs_zero_58,59: dphy_mc_prg_hs_zero_59,60: dphy_mc_prg_hs_zero_60,61: dphy_mc_prg_hs_zero_61,62: dphy_mc_prg_hs_zero_62,63: dphy_mc_prg_hs_zero_63"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DPHY_M_PRG_HS_TRAIL,no description available"
|
|
bitfld.long 0x00 0.--3. "dphy_m_prg_hs_trail,DPHY m_PRG_HS_TRAIL input" "0: dphy_m_prg_hs_trail_0,1: dphy_m_prg_hs_trail_1,2: dphy_m_prg_hs_trail_2,3: dphy_m_prg_hs_trail_3,4: dphy_m_prg_hs_trail_4,5: dphy_m_prg_hs_trail_5,6: dphy_m_prg_hs_trail_6,7: dphy_m_prg_hs_trail_7,8: dphy_m_prg_hs_trail_8,9: dphy_m_prg_hs_trail_9,10: dphy_m_prg_hs_trail_10,11: dphy_m_prg_hs_trail_11,12: dphy_m_prg_hs_trail_12,13: dphy_m_prg_hs_trail_13,14: dphy_m_prg_hs_trail_14,15: dphy_m_prg_hs_trail_15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DPHY_MC_PRG_HS_TRAIL,no description available"
|
|
bitfld.long 0x00 0.--3. "dphy_mc_prg_hs_trail,DPHY mc_PRG_HS_TRAIL input" "0: dphy_mc_prg_hs_trail_0,1: dphy_mc_prg_hs_trail_1,2: dphy_mc_prg_hs_trail_2,3: dphy_mc_prg_hs_trail_3,4: dphy_mc_prg_hs_trail_4,5: dphy_mc_prg_hs_trail_5,6: dphy_mc_prg_hs_trail_6,7: dphy_mc_prg_hs_trail_7,8: dphy_mc_prg_hs_trail_8,9: dphy_mc_prg_hs_trail_9,10: dphy_mc_prg_hs_trail_10,11: dphy_mc_prg_hs_trail_11,12: dphy_mc_prg_hs_trail_12,13: dphy_mc_prg_hs_trail_13,14: dphy_mc_prg_hs_trail_14,15: dphy_mc_prg_hs_trail_15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DPHY_PD_PLL,no description available"
|
|
bitfld.long 0x00 0. "PD,DPHY PD_PLL input" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DPHY_TST,no description available"
|
|
bitfld.long 0x00 0.--5. "TST,DPHY TST input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DPHY_CN,no description available"
|
|
bitfld.long 0x00 0.--4. "CN,DPHY PLL Input Divider" "0: Divide by 2,1: Divide by 32,2: Divide by 11,3: Divide by 31,4: Divide by 10,5: Divide by 26,6: Divide by 30,7: Divide by 7,8: Divide by 13,9: Divide by 9,10: Divide by 15,11: Divide by 25,12: Divide by 29,13: Divide by 23,14: Divide by 6,15: Divide by 20,16: Divide by 3,17: Divide by 12,18: Divide by 27,19: Divide by 8,20: Divide by 14,21: Divide by 16,22: Divide by 24,23: Divide by 21,24: Divide by 4,25: Divide by 28,26: Divide by 17,27: Divide by 22,28: Divide by 5,29: Divide by 18,30: Divide by 19,31: Divide by 1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DPHY_CM,no description available"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CM,DPHY PLL Feedback Divider"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DPHY_CO,no description available"
|
|
bitfld.long 0x00 0.--1. "CO,DPHY PLL Output Divider" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DPHY_LOCK,no description available"
|
|
bitfld.long 0x00 0. "LOCK,DPHY PLL LOCK output" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DPHY_LOCK_BYP,no description available"
|
|
bitfld.long 0x00 0. "dphy_lock_byp,DPHY LOCK_BYP input" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DPHY_RTERM_SEL,no description available"
|
|
bitfld.long 0x00 0. "dphy_rterm_sel,DPHY RTERM_SEL input" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "DPHY_AUTO_PD_EN,no description available"
|
|
bitfld.long 0x00 0. "dphy_auto_pd_en,DPHY AUTO_PD_EN input" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DPHY_RXLPRP,no description available"
|
|
bitfld.long 0x00 0.--1. "dphy_rxlprp,DPHY RXLPRP input" "0,1,2,3"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DPHY_RXCDRP,no description available"
|
|
bitfld.long 0x00 0.--1. "dphy_rxcdrp,DPHY RXCDRP input" "0,1,2,3"
|
|
tree.end
|
|
tree "LCDIF (LCD Interface)"
|
|
base ad:0x40AA0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,LCDIF General Control Register"
|
|
bitfld.long 0x00 31. "SFTRST,This bit must be set to zero to enable normal operation of the LCDIF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 30. "CLKGATE,This bit must be set to zero for normal operation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "DATA_SHIFT_DIR,Use this bit to determine the direction of shift of transmit data" "0: Data to be transmitted is shifted LEFT by..,1: Data to be transmitted is shifted RIGHT by.."
|
|
newline
|
|
bitfld.long 0x00 21.--25. "SHIFT_NUM_BITS,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 19. "BYPASS_COUNT,When this bit is 0 it means that LCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "DOTCLK_MODE,Set this bit to 1 to make the hardware go into the DOTCLK mode i" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "INPUT_DATA_SWIZZLE,This field specifies how to swap the bytes fetched by the bus master interface" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "CSC_DATA_SWIZZLE,This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "LCD_DATABUS_WIDTH,LCD Data bus transfer width" "0: 16-bit data bus mode,1: 8-bit data bus mode,2: 18-bit data bus mode,3: 24-bit data bus mode"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "WORD_LENGTH,Input data format" "0: Input data is 16 bits per pixel,1: Input data is 8 bits wide,2: Input data is 18 bits per pixel,3: Input data is 24 bits per pixel"
|
|
newline
|
|
bitfld.long 0x00 5. "MASTER,Set this bit to make the LCDIF act as a bus master" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DATA_FORMAT_16_BIT,When this bit is 1 and WORD_LENGTH = 0 it implies that the 16-bit data is in ARGB555 format" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DATA_FORMAT_18_BIT,Used only when WORD_LENGTH = 2 i.e" "0: Data input to the block is in 18 bpp format..,1: Data input to the block is in 18 bpp format.."
|
|
newline
|
|
bitfld.long 0x00 1. "DATA_FORMAT_24_BIT,Used only when WORD_LENGTH = 3 i" "0: Data input to the block is in 24 bpp format..,1: Data input to the block is actually RGB 18.."
|
|
newline
|
|
bitfld.long 0x00 0. "RUN,When this bit is set by software the LCDIF will begin transferring data between the SoC and the display" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL_SET,LCDIF General Control Register"
|
|
bitfld.long 0x00 31. "SFTRST,This bit must be set to zero to enable normal operation of the LCDIF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 30. "CLKGATE,This bit must be set to zero for normal operation" "0,1"
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newline
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bitfld.long 0x00 26. "DATA_SHIFT_DIR,Use this bit to determine the direction of shift of transmit data" "0: Data to be transmitted is shifted LEFT by..,1: Data to be transmitted is shifted RIGHT by.."
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newline
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bitfld.long 0x00 21.--25. "SHIFT_NUM_BITS,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 19. "BYPASS_COUNT,When this bit is 0 it means that LCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out" "0,1"
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bitfld.long 0x00 17. "DOTCLK_MODE,Set this bit to 1 to make the hardware go into the DOTCLK mode i" "0,1"
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bitfld.long 0x00 14.--15. "INPUT_DATA_SWIZZLE,This field specifies how to swap the bytes fetched by the bus master interface" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
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bitfld.long 0x00 12.--13. "CSC_DATA_SWIZZLE,This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
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bitfld.long 0x00 10.--11. "LCD_DATABUS_WIDTH,LCD Data bus transfer width" "0: 16-bit data bus mode,1: 8-bit data bus mode,2: 18-bit data bus mode,3: 24-bit data bus mode"
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newline
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bitfld.long 0x00 8.--9. "WORD_LENGTH,Input data format" "0: Input data is 16 bits per pixel,1: Input data is 8 bits wide,2: Input data is 18 bits per pixel,3: Input data is 24 bits per pixel"
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bitfld.long 0x00 5. "MASTER,Set this bit to make the LCDIF act as a bus master" "0,1"
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bitfld.long 0x00 3. "DATA_FORMAT_16_BIT,When this bit is 1 and WORD_LENGTH = 0 it implies that the 16-bit data is in ARGB555 format" "0,1"
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bitfld.long 0x00 2. "DATA_FORMAT_18_BIT,Used only when WORD_LENGTH = 2 i.e" "0: Data input to the block is in 18 bpp format..,1: Data input to the block is in 18 bpp format.."
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bitfld.long 0x00 1. "DATA_FORMAT_24_BIT,Used only when WORD_LENGTH = 3 i" "0: Data input to the block is in 24 bpp format..,1: Data input to the block is actually RGB 18.."
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bitfld.long 0x00 0. "RUN,When this bit is set by software the LCDIF will begin transferring data between the SoC and the display" "0,1"
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group.long 0x08++0x03
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line.long 0x00 "CTRL_CLR,LCDIF General Control Register"
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bitfld.long 0x00 31. "SFTRST,This bit must be set to zero to enable normal operation of the LCDIF" "0,1"
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newline
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bitfld.long 0x00 30. "CLKGATE,This bit must be set to zero for normal operation" "0,1"
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newline
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bitfld.long 0x00 26. "DATA_SHIFT_DIR,Use this bit to determine the direction of shift of transmit data" "0: Data to be transmitted is shifted LEFT by..,1: Data to be transmitted is shifted RIGHT by.."
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newline
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bitfld.long 0x00 21.--25. "SHIFT_NUM_BITS,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 19. "BYPASS_COUNT,When this bit is 0 it means that LCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out" "0,1"
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bitfld.long 0x00 17. "DOTCLK_MODE,Set this bit to 1 to make the hardware go into the DOTCLK mode i" "0,1"
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bitfld.long 0x00 14.--15. "INPUT_DATA_SWIZZLE,This field specifies how to swap the bytes fetched by the bus master interface" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
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bitfld.long 0x00 12.--13. "CSC_DATA_SWIZZLE,This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
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bitfld.long 0x00 10.--11. "LCD_DATABUS_WIDTH,LCD Data bus transfer width" "0: 16-bit data bus mode,1: 8-bit data bus mode,2: 18-bit data bus mode,3: 24-bit data bus mode"
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newline
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bitfld.long 0x00 8.--9. "WORD_LENGTH,Input data format" "0: Input data is 16 bits per pixel,1: Input data is 8 bits wide,2: Input data is 18 bits per pixel,3: Input data is 24 bits per pixel"
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bitfld.long 0x00 5. "MASTER,Set this bit to make the LCDIF act as a bus master" "0,1"
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bitfld.long 0x00 3. "DATA_FORMAT_16_BIT,When this bit is 1 and WORD_LENGTH = 0 it implies that the 16-bit data is in ARGB555 format" "0,1"
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newline
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bitfld.long 0x00 2. "DATA_FORMAT_18_BIT,Used only when WORD_LENGTH = 2 i.e" "0: Data input to the block is in 18 bpp format..,1: Data input to the block is in 18 bpp format.."
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bitfld.long 0x00 1. "DATA_FORMAT_24_BIT,Used only when WORD_LENGTH = 3 i" "0: Data input to the block is in 24 bpp format..,1: Data input to the block is actually RGB 18.."
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bitfld.long 0x00 0. "RUN,When this bit is set by software the LCDIF will begin transferring data between the SoC and the display" "0,1"
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group.long 0x0C++0x03
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line.long 0x00 "CTRL_TOG,LCDIF General Control Register"
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bitfld.long 0x00 31. "SFTRST,This bit must be set to zero to enable normal operation of the LCDIF" "0,1"
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newline
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bitfld.long 0x00 30. "CLKGATE,This bit must be set to zero for normal operation" "0,1"
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newline
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bitfld.long 0x00 26. "DATA_SHIFT_DIR,Use this bit to determine the direction of shift of transmit data" "0: Data to be transmitted is shifted LEFT by..,1: Data to be transmitted is shifted RIGHT by.."
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newline
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bitfld.long 0x00 21.--25. "SHIFT_NUM_BITS,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 19. "BYPASS_COUNT,When this bit is 0 it means that LCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out" "0,1"
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bitfld.long 0x00 17. "DOTCLK_MODE,Set this bit to 1 to make the hardware go into the DOTCLK mode i" "0,1"
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newline
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bitfld.long 0x00 14.--15. "INPUT_DATA_SWIZZLE,This field specifies how to swap the bytes fetched by the bus master interface" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
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newline
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bitfld.long 0x00 12.--13. "CSC_DATA_SWIZZLE,This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "0: No byte swapping.(Little endian),1: Big Endian swap (swap bytes 0 3 and 1 2),2: Swap half-words,3: Swap bytes within each half-word"
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bitfld.long 0x00 10.--11. "LCD_DATABUS_WIDTH,LCD Data bus transfer width" "0: 16-bit data bus mode,1: 8-bit data bus mode,2: 18-bit data bus mode,3: 24-bit data bus mode"
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newline
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bitfld.long 0x00 8.--9. "WORD_LENGTH,Input data format" "0: Input data is 16 bits per pixel,1: Input data is 8 bits wide,2: Input data is 18 bits per pixel,3: Input data is 24 bits per pixel"
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bitfld.long 0x00 5. "MASTER,Set this bit to make the LCDIF act as a bus master" "0,1"
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newline
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bitfld.long 0x00 3. "DATA_FORMAT_16_BIT,When this bit is 1 and WORD_LENGTH = 0 it implies that the 16-bit data is in ARGB555 format" "0,1"
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newline
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bitfld.long 0x00 2. "DATA_FORMAT_18_BIT,Used only when WORD_LENGTH = 2 i.e" "0: Data input to the block is in 18 bpp format..,1: Data input to the block is in 18 bpp format.."
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newline
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bitfld.long 0x00 1. "DATA_FORMAT_24_BIT,Used only when WORD_LENGTH = 3 i" "0: Data input to the block is in 24 bpp format..,1: Data input to the block is actually RGB 18.."
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bitfld.long 0x00 0. "RUN,When this bit is set by software the LCDIF will begin transferring data between the SoC and the display" "0,1"
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group.long 0x10++0x03
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line.long 0x00 "CTRL1,LCDIF General Control1 Register"
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bitfld.long 0x00 26. "BM_ERROR_IRQ_EN,This bit is set to enable bus master error interrupt in the LCDIF master mode" "0,1"
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newline
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bitfld.long 0x00 25. "BM_ERROR_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 24. "RECOVER_ON_UNDERFLOW,Set this bit to enable the LCDIF block to recover in the next field/frame if there was an underflow in the current field/frame" "0,1"
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newline
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bitfld.long 0x00 23. "INTERLACE_FIELDS,Set this bit if it is required that the LCDIF block fetches odd lines in one field and even lines in the other field" "0,1"
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newline
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bitfld.long 0x00 22. "START_INTERLACE_FROM_SECOND_FIELD,The default is to grab the odd lines first and then the even lines" "0,1"
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newline
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bitfld.long 0x00 21. "FIFO_CLEAR,Set this bit to clear all the data in the latency FIFO (LFIFO) TXFIFO and the RXFIFO" "0,1"
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newline
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bitfld.long 0x00 20. "IRQ_ON_ALTERNATE_FIELDS,If this bit is set the LCDIF block will assert the cur_frame_done interrupt only on alternate fields otherwise it will issue the interrupt on both odd and even field" "0,1"
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bitfld.long 0x00 16.--19. "BYTE_PACKING_FORMAT,This bitfield is used to show which data bytes in a 32-bit word are valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 15. "OVERFLOW_IRQ_EN,This bit is set to enable an overflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 14. "UNDERFLOW_IRQ_EN,This bit is set to enable an underflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 13. "CUR_FRAME_DONE_IRQ_EN,This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state" "0,1"
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newline
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bitfld.long 0x00 12. "VSYNC_EDGE_IRQ_EN,This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes or the beginning of every field in DVI mode" "0,1"
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newline
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bitfld.long 0x00 11. "OVERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 10. "UNDERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 9. "CUR_FRAME_DONE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 8. "VSYNC_EDGE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 0. "RESET,Reset bit for the external LCD controller" "0: LCD_RESET output signal is low,1: LCD_RESET output signal is high"
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group.long 0x14++0x03
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line.long 0x00 "CTRL1_SET,LCDIF General Control1 Register"
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bitfld.long 0x00 26. "BM_ERROR_IRQ_EN,This bit is set to enable bus master error interrupt in the LCDIF master mode" "0,1"
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newline
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bitfld.long 0x00 25. "BM_ERROR_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 24. "RECOVER_ON_UNDERFLOW,Set this bit to enable the LCDIF block to recover in the next field/frame if there was an underflow in the current field/frame" "0,1"
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newline
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bitfld.long 0x00 23. "INTERLACE_FIELDS,Set this bit if it is required that the LCDIF block fetches odd lines in one field and even lines in the other field" "0,1"
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newline
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bitfld.long 0x00 22. "START_INTERLACE_FROM_SECOND_FIELD,The default is to grab the odd lines first and then the even lines" "0,1"
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newline
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bitfld.long 0x00 21. "FIFO_CLEAR,Set this bit to clear all the data in the latency FIFO (LFIFO) TXFIFO and the RXFIFO" "0,1"
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newline
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bitfld.long 0x00 20. "IRQ_ON_ALTERNATE_FIELDS,If this bit is set the LCDIF block will assert the cur_frame_done interrupt only on alternate fields otherwise it will issue the interrupt on both odd and even field" "0,1"
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newline
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bitfld.long 0x00 16.--19. "BYTE_PACKING_FORMAT,This bitfield is used to show which data bytes in a 32-bit word are valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 15. "OVERFLOW_IRQ_EN,This bit is set to enable an overflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 14. "UNDERFLOW_IRQ_EN,This bit is set to enable an underflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 13. "CUR_FRAME_DONE_IRQ_EN,This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state" "0,1"
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newline
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bitfld.long 0x00 12. "VSYNC_EDGE_IRQ_EN,This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes or the beginning of every field in DVI mode" "0,1"
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newline
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bitfld.long 0x00 11. "OVERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 10. "UNDERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 9. "CUR_FRAME_DONE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 8. "VSYNC_EDGE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 0. "RESET,Reset bit for the external LCD controller" "0: LCD_RESET output signal is low,1: LCD_RESET output signal is high"
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group.long 0x18++0x03
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line.long 0x00 "CTRL1_CLR,LCDIF General Control1 Register"
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bitfld.long 0x00 26. "BM_ERROR_IRQ_EN,This bit is set to enable bus master error interrupt in the LCDIF master mode" "0,1"
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newline
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bitfld.long 0x00 25. "BM_ERROR_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 24. "RECOVER_ON_UNDERFLOW,Set this bit to enable the LCDIF block to recover in the next field/frame if there was an underflow in the current field/frame" "0,1"
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newline
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bitfld.long 0x00 23. "INTERLACE_FIELDS,Set this bit if it is required that the LCDIF block fetches odd lines in one field and even lines in the other field" "0,1"
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newline
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bitfld.long 0x00 22. "START_INTERLACE_FROM_SECOND_FIELD,The default is to grab the odd lines first and then the even lines" "0,1"
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newline
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bitfld.long 0x00 21. "FIFO_CLEAR,Set this bit to clear all the data in the latency FIFO (LFIFO) TXFIFO and the RXFIFO" "0,1"
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newline
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bitfld.long 0x00 20. "IRQ_ON_ALTERNATE_FIELDS,If this bit is set the LCDIF block will assert the cur_frame_done interrupt only on alternate fields otherwise it will issue the interrupt on both odd and even field" "0,1"
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newline
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bitfld.long 0x00 16.--19. "BYTE_PACKING_FORMAT,This bitfield is used to show which data bytes in a 32-bit word are valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 15. "OVERFLOW_IRQ_EN,This bit is set to enable an overflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 14. "UNDERFLOW_IRQ_EN,This bit is set to enable an underflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 13. "CUR_FRAME_DONE_IRQ_EN,This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state" "0,1"
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newline
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bitfld.long 0x00 12. "VSYNC_EDGE_IRQ_EN,This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes or the beginning of every field in DVI mode" "0,1"
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newline
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bitfld.long 0x00 11. "OVERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 10. "UNDERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 9. "CUR_FRAME_DONE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 8. "VSYNC_EDGE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 0. "RESET,Reset bit for the external LCD controller" "0: LCD_RESET output signal is low,1: LCD_RESET output signal is high"
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group.long 0x1C++0x03
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line.long 0x00 "CTRL1_TOG,LCDIF General Control1 Register"
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bitfld.long 0x00 26. "BM_ERROR_IRQ_EN,This bit is set to enable bus master error interrupt in the LCDIF master mode" "0,1"
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newline
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bitfld.long 0x00 25. "BM_ERROR_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 24. "RECOVER_ON_UNDERFLOW,Set this bit to enable the LCDIF block to recover in the next field/frame if there was an underflow in the current field/frame" "0,1"
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newline
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bitfld.long 0x00 23. "INTERLACE_FIELDS,Set this bit if it is required that the LCDIF block fetches odd lines in one field and even lines in the other field" "0,1"
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newline
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bitfld.long 0x00 22. "START_INTERLACE_FROM_SECOND_FIELD,The default is to grab the odd lines first and then the even lines" "0,1"
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newline
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bitfld.long 0x00 21. "FIFO_CLEAR,Set this bit to clear all the data in the latency FIFO (LFIFO) TXFIFO and the RXFIFO" "0,1"
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newline
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bitfld.long 0x00 20. "IRQ_ON_ALTERNATE_FIELDS,If this bit is set the LCDIF block will assert the cur_frame_done interrupt only on alternate fields otherwise it will issue the interrupt on both odd and even field" "0,1"
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newline
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bitfld.long 0x00 16.--19. "BYTE_PACKING_FORMAT,This bitfield is used to show which data bytes in a 32-bit word are valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 15. "OVERFLOW_IRQ_EN,This bit is set to enable an overflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 14. "UNDERFLOW_IRQ_EN,This bit is set to enable an underflow interrupt in the TXFIFO in the write mode" "0,1"
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newline
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bitfld.long 0x00 13. "CUR_FRAME_DONE_IRQ_EN,This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state" "0,1"
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newline
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bitfld.long 0x00 12. "VSYNC_EDGE_IRQ_EN,This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes or the beginning of every field in DVI mode" "0,1"
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newline
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bitfld.long 0x00 11. "OVERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 10. "UNDERFLOW_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 9. "CUR_FRAME_DONE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 8. "VSYNC_EDGE_IRQ,This bit is set to indicate that an interrupt is requested by the LCDIF block" "0: No Interrupt Request Pending,1: Interrupt Request Pending"
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newline
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bitfld.long 0x00 0. "RESET,Reset bit for the external LCD controller" "0: LCD_RESET output signal is low,1: LCD_RESET output signal is high"
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group.long 0x20++0x03
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line.long 0x00 "CTRL2,LCDIF General Control2 Register"
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bitfld.long 0x00 21.--23. "OUTSTANDING_REQS,This bitfield indicates the maximum number of outstanding transactions that LCDIF should request when it is acting as a bus master" "0: REQ_1,1: REQ_2,2: REQ_4,3: REQ_8,4: REQ_16,?..."
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newline
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bitfld.long 0x00 20. "BURST_LEN_8,By default when the LCDIF is in the bus master mode it will issue AXI bursts of length 16 (except when in packed 24 bpp mode it will issue bursts of length 15)" "0,1"
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newline
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bitfld.long 0x00 16.--18. "ODD_LINE_PATTERN,This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1 3 5" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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newline
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bitfld.long 0x00 12.--14. "EVEN_LINE_PATTERN,This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2 4 6" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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group.long 0x24++0x03
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line.long 0x00 "CTRL2_SET,LCDIF General Control2 Register"
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bitfld.long 0x00 21.--23. "OUTSTANDING_REQS,This bitfield indicates the maximum number of outstanding transactions that LCDIF should request when it is acting as a bus master" "0: REQ_1,1: REQ_2,2: REQ_4,3: REQ_8,4: REQ_16,?..."
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newline
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bitfld.long 0x00 20. "BURST_LEN_8,By default when the LCDIF is in the bus master mode it will issue AXI bursts of length 16 (except when in packed 24 bpp mode it will issue bursts of length 15)" "0,1"
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newline
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bitfld.long 0x00 16.--18. "ODD_LINE_PATTERN,This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1 3 5" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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newline
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bitfld.long 0x00 12.--14. "EVEN_LINE_PATTERN,This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2 4 6" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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group.long 0x28++0x03
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line.long 0x00 "CTRL2_CLR,LCDIF General Control2 Register"
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bitfld.long 0x00 21.--23. "OUTSTANDING_REQS,This bitfield indicates the maximum number of outstanding transactions that LCDIF should request when it is acting as a bus master" "0: REQ_1,1: REQ_2,2: REQ_4,3: REQ_8,4: REQ_16,?..."
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newline
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bitfld.long 0x00 20. "BURST_LEN_8,By default when the LCDIF is in the bus master mode it will issue AXI bursts of length 16 (except when in packed 24 bpp mode it will issue bursts of length 15)" "0,1"
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newline
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bitfld.long 0x00 16.--18. "ODD_LINE_PATTERN,This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1 3 5" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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newline
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bitfld.long 0x00 12.--14. "EVEN_LINE_PATTERN,This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2 4 6" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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group.long 0x2C++0x03
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line.long 0x00 "CTRL2_TOG,LCDIF General Control2 Register"
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bitfld.long 0x00 21.--23. "OUTSTANDING_REQS,This bitfield indicates the maximum number of outstanding transactions that LCDIF should request when it is acting as a bus master" "0: REQ_1,1: REQ_2,2: REQ_4,3: REQ_8,4: REQ_16,?..."
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newline
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bitfld.long 0x00 20. "BURST_LEN_8,By default when the LCDIF is in the bus master mode it will issue AXI bursts of length 16 (except when in packed 24 bpp mode it will issue bursts of length 15)" "0,1"
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newline
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bitfld.long 0x00 16.--18. "ODD_LINE_PATTERN,This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1 3 5" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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newline
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bitfld.long 0x00 12.--14. "EVEN_LINE_PATTERN,This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2 4 6" "0: RGB,1: RBG,2: GBR,3: GRB,4: BRG,5: BGR,?..."
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group.long 0x30++0x03
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line.long 0x00 "TRANSFER_COUNT,LCDIF Horizontal and Vertical Valid Data Count Register"
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hexmask.long.word 0x00 16.--31. 1. "V_COUNT,Number of horizontal lines per frame which contain valid data"
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newline
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hexmask.long.word 0x00 0.--15. 1. "H_COUNT,Total valid data (pixels) in each horizontal line"
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group.long 0x40++0x03
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line.long 0x00 "CUR_BUF,LCD Interface Current Buffer Address Register"
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hexmask.long 0x00 0.--31. 1. "ADDR,Address of the current frame being transmitted by LCDIF"
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group.long 0x50++0x03
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line.long 0x00 "NEXT_BUF,LCD Interface Next Buffer Address Register"
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hexmask.long 0x00 0.--31. 1. "ADDR,Address of the next frame that will be transmitted by LCDIF"
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group.long 0x70++0x03
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line.long 0x00 "VDCTRL0,LCDIF VSYNC Mode and Dotclk Mode Control Register0"
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bitfld.long 0x00 29. "VSYNC_OEB,0 means the VSYNC signal is an output 1 means it is an input" "0: The VSYNC pin is in the output mode and the..,1: The VSYNC pin is in the input mode and the.."
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newline
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bitfld.long 0x00 28. "ENABLE_PRESENT,Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode thereby making it the true RGB interface along with the remaining three signals VSYNC HSYNC and DOTCLK" "0,1"
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newline
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bitfld.long 0x00 27. "VSYNC_POL,Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period" "0,1"
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newline
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bitfld.long 0x00 26. "HSYNC_POL,Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period" "0,1"
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newline
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bitfld.long 0x00 25. "DOTCLK_POL,Default is data launched at negative edge of DOTCLK and captured at positive edge" "0,1"
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newline
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bitfld.long 0x00 24. "ENABLE_POL,Default 0 active low during valid data transfer on each horizontal line" "0,1"
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newline
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bitfld.long 0x00 21. "VSYNC_PERIOD_UNIT,Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 20. "VSYNC_PULSE_WIDTH_UNIT,Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 19. "HALF_LINE,Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i" "0,1"
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newline
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bitfld.long 0x00 18. "HALF_LINE_MODE,When this bit is 0 the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line" "0,1"
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newline
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hexmask.long.tbyte 0x00 0.--17. 1. "VSYNC_PULSE_WIDTH,Number of units for which VSYNC signal is active"
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group.long 0x74++0x03
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line.long 0x00 "VDCTRL0_SET,LCDIF VSYNC Mode and Dotclk Mode Control Register0"
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bitfld.long 0x00 29. "VSYNC_OEB,0 means the VSYNC signal is an output 1 means it is an input" "0: The VSYNC pin is in the output mode and the..,1: The VSYNC pin is in the input mode and the.."
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newline
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bitfld.long 0x00 28. "ENABLE_PRESENT,Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode thereby making it the true RGB interface along with the remaining three signals VSYNC HSYNC and DOTCLK" "0,1"
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newline
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bitfld.long 0x00 27. "VSYNC_POL,Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period" "0,1"
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newline
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bitfld.long 0x00 26. "HSYNC_POL,Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period" "0,1"
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newline
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bitfld.long 0x00 25. "DOTCLK_POL,Default is data launched at negative edge of DOTCLK and captured at positive edge" "0,1"
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newline
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bitfld.long 0x00 24. "ENABLE_POL,Default 0 active low during valid data transfer on each horizontal line" "0,1"
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newline
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bitfld.long 0x00 21. "VSYNC_PERIOD_UNIT,Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 20. "VSYNC_PULSE_WIDTH_UNIT,Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 19. "HALF_LINE,Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i" "0,1"
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newline
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bitfld.long 0x00 18. "HALF_LINE_MODE,When this bit is 0 the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line" "0,1"
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newline
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hexmask.long.tbyte 0x00 0.--17. 1. "VSYNC_PULSE_WIDTH,Number of units for which VSYNC signal is active"
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group.long 0x78++0x03
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line.long 0x00 "VDCTRL0_CLR,LCDIF VSYNC Mode and Dotclk Mode Control Register0"
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bitfld.long 0x00 29. "VSYNC_OEB,0 means the VSYNC signal is an output 1 means it is an input" "0: The VSYNC pin is in the output mode and the..,1: The VSYNC pin is in the input mode and the.."
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newline
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bitfld.long 0x00 28. "ENABLE_PRESENT,Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode thereby making it the true RGB interface along with the remaining three signals VSYNC HSYNC and DOTCLK" "0,1"
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newline
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bitfld.long 0x00 27. "VSYNC_POL,Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period" "0,1"
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newline
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bitfld.long 0x00 26. "HSYNC_POL,Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period" "0,1"
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newline
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bitfld.long 0x00 25. "DOTCLK_POL,Default is data launched at negative edge of DOTCLK and captured at positive edge" "0,1"
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newline
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bitfld.long 0x00 24. "ENABLE_POL,Default 0 active low during valid data transfer on each horizontal line" "0,1"
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newline
|
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bitfld.long 0x00 21. "VSYNC_PERIOD_UNIT,Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 20. "VSYNC_PULSE_WIDTH_UNIT,Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 19. "HALF_LINE,Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i" "0,1"
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newline
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bitfld.long 0x00 18. "HALF_LINE_MODE,When this bit is 0 the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line" "0,1"
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newline
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hexmask.long.tbyte 0x00 0.--17. 1. "VSYNC_PULSE_WIDTH,Number of units for which VSYNC signal is active"
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group.long 0x7C++0x03
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line.long 0x00 "VDCTRL0_TOG,LCDIF VSYNC Mode and Dotclk Mode Control Register0"
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bitfld.long 0x00 29. "VSYNC_OEB,0 means the VSYNC signal is an output 1 means it is an input" "0: The VSYNC pin is in the output mode and the..,1: The VSYNC pin is in the input mode and the.."
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newline
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bitfld.long 0x00 28. "ENABLE_PRESENT,Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode thereby making it the true RGB interface along with the remaining three signals VSYNC HSYNC and DOTCLK" "0,1"
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newline
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bitfld.long 0x00 27. "VSYNC_POL,Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period" "0,1"
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newline
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bitfld.long 0x00 26. "HSYNC_POL,Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period" "0,1"
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newline
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bitfld.long 0x00 25. "DOTCLK_POL,Default is data launched at negative edge of DOTCLK and captured at positive edge" "0,1"
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newline
|
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bitfld.long 0x00 24. "ENABLE_POL,Default 0 active low during valid data transfer on each horizontal line" "0,1"
|
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newline
|
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bitfld.long 0x00 21. "VSYNC_PERIOD_UNIT,Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 20. "VSYNC_PULSE_WIDTH_UNIT,Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles" "0,1"
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newline
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bitfld.long 0x00 19. "HALF_LINE,Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i" "0,1"
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newline
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bitfld.long 0x00 18. "HALF_LINE_MODE,When this bit is 0 the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line" "0,1"
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newline
|
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hexmask.long.tbyte 0x00 0.--17. 1. "VSYNC_PULSE_WIDTH,Number of units for which VSYNC signal is active"
|
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group.long 0x80++0x03
|
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line.long 0x00 "VDCTRL1,LCDIF VSYNC Mode and Dotclk Mode Control Register1"
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hexmask.long 0x00 0.--31. 1. "VSYNC_PERIOD,Total number of units between two positive or two negative edges of the VSYNC signal"
|
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group.long 0x90++0x03
|
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line.long 0x00 "VDCTRL2,LCDIF VSYNC Mode and Dotclk Mode Control Register2"
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hexmask.long.word 0x00 18.--31. 1. "HSYNC_PULSE_WIDTH,Number of DISPLAY CLOCK (pix_clk) cycles for which HSYNC signal is active"
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newline
|
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hexmask.long.tbyte 0x00 0.--17. 1. "HSYNC_PERIOD,Total number of DISPLAY CLOCK (pix_clk) cycles between two positive or two negative edges of the HSYNC signal"
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group.long 0xA0++0x03
|
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line.long 0x00 "VDCTRL3,LCDIF VSYNC Mode and Dotclk Mode Control Register3"
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bitfld.long 0x00 29. "MUX_SYNC_SIGNALS,When this bit is set the LCDIF block will internally mux HSYNC with LCD_D14 DOTCLK with LCD_D13 and ENABLE with LCD_D12 otherwise these signals will go out on separate pins" "0,1"
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newline
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bitfld.long 0x00 28. "VSYNC_ONLY,This bit must be set to 1 in the VSYNC mode of operation and 0 in the DOTCLK mode of operation" "0,1"
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newline
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hexmask.long.word 0x00 16.--27. 1. "HORIZONTAL_WAIT_CNT,In the DOTCLK mode wait for this number of clocks from falling edge (or rising if HSYNC_POL is 1) of HSYNC signal to account for horizontal back porch plus the number of DOTCLKs before the moving picture information begins"
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newline
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hexmask.long.word 0x00 0.--15. 1. "VERTICAL_WAIT_CNT,In the VSYNC interface mode wait for this number of DISPLAY CLOCK (pix_clk) cycles from the falling VSYNC edge (or rising if VSYNC_POL is 1) before starting LCD transactions and is applicable only if WAIT_FOR_VSYNC_EDGE is set"
|
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group.long 0xB0++0x03
|
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line.long 0x00 "VDCTRL4,LCDIF VSYNC Mode and Dotclk Mode Control Register4"
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bitfld.long 0x00 29.--31. "DOTCLK_DLY_SEL,This bitfield selects the amount of time by which the DOTCLK signal should be delayed before coming out of the LCD_DOTCK pin" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x00 18. "SYNC_SIGNALS_ON,Set this field to 1 if the LCD controller requires that the VSYNC or VSYNC/HSYNC/DOTCLK control signals should be active at least one frame before the data transfers actually start and remain active at least one frame after the data.." "0,1"
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newline
|
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hexmask.long.tbyte 0x00 0.--17. 1. "DOTCLK_H_VALID_DATA_CNT,Total number of DISPLAY CLOCK (pix_clk) cycles on each horizontal line that carry valid data in DOTCLK mode"
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group.long 0x190++0x03
|
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line.long 0x00 "BM_ERROR_STAT,Bus Master Error Status Register"
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hexmask.long 0x00 0.--31. 1. "ADDR,Virtual address at which bus master error occurred"
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group.long 0x1A0++0x03
|
|
line.long 0x00 "CRC_STAT,CRC Status Register"
|
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hexmask.long 0x00 0.--31. 1. "CRC_VALUE,Calculated CRC value"
|
|
rgroup.long 0x1B0++0x03
|
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line.long 0x00 "STAT,LCD Interface Status Register"
|
|
bitfld.long 0x00 31. "PRESENT," "0,1"
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newline
|
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bitfld.long 0x00 29. "LFIFO_FULL,Read only view of the signals that indicates LCD LFIFO is full" "0,1"
|
|
newline
|
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bitfld.long 0x00 28. "LFIFO_EMPTY,Read only view of the signals that indicates LCD LFIFO is empty" "0,1"
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|
newline
|
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bitfld.long 0x00 27. "TXFIFO_FULL,Read only view of the signals that indicates LCD TXFIFO is full" "0,1"
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|
newline
|
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bitfld.long 0x00 26. "TXFIFO_EMPTY,Read only view of the signals that indicates LCD TXFIFO is empty" "0,1"
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|
newline
|
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hexmask.long.word 0x00 0.--8. 1. "LFIFO_COUNT,Read only view of the current count in Latency buffer (LFIFO)"
|
|
group.long 0x210++0x03
|
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line.long 0x00 "AS_CTRL,LCDIF AS Buffer Control Register"
|
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hexmask.long.byte 0x00 24.--31. 1. "RVDS1,Reserved always set to zero"
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newline
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bitfld.long 0x00 23. "PS_DISABLE,When this bit is set by software the LCDIF will disable PS buffer data" "0,1"
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newline
|
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bitfld.long 0x00 21.--22. "INPUT_DATA_SWIZZLE,This field specifies how to swap the bytes either in the HW_LCDIF_DATA register or those fetched by the AXI master part of LCDIF" "0,1,2,3"
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newline
|
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bitfld.long 0x00 20. "ALPHA_INVERT,Setting this bit to logic 0 will not alter the alpha value" "0,1"
|
|
newline
|
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bitfld.long 0x00 16.--19. "ROP,Indicates a raster operation to perform when enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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hexmask.long.byte 0x00 8.--15. 1. "ALPHA,Alpha modifier used when the ALPHA_MULTIPLY or ALPHA_OVERRIDE values are programmed in REG_AS_CTRL[ALPHA_CTRL]"
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newline
|
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bitfld.long 0x00 4.--7. "FORMAT,Indicates the input buffer format for AS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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bitfld.long 0x00 3. "ENABLE_COLORKEY,Indicates that colorkey functionality is enabled for this alpha surface" "0,1"
|
|
newline
|
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bitfld.long 0x00 1.--2. "ALPHA_CTRL,Determines how the alpha value is constructed for this alpha surface" "0,1,2,3"
|
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newline
|
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bitfld.long 0x00 0. "AS_ENABLE,When this bit is set by software the LCDIF will start fetching AS buffer data in bus master mode and combine it with another buffer" "0,1"
|
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group.long 0x220++0x03
|
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line.long 0x00 "AS_BUF,Alpha Surface Buffer Pointer"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Address pointer for the alpha surface 0 buffer"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "AS_NEXT_BUF,no description available"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Address of the next frame that will be transmitted by LCDIF"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "AS_CLRKEYLOW,LCDIF Overlay Color Key Low"
|
|
hexmask.long.byte 0x00 24.--31. 1. "RSVD1,Reserved always set to zero"
|
|
newline
|
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hexmask.long.tbyte 0x00 0.--23. 1. "PIXEL,Low range of RGB color key applied to AS buffer"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "AS_CLRKEYHIGH,LCDIF Overlay Color Key High"
|
|
hexmask.long.byte 0x00 24.--31. 1. "RSVD1,Reserved always set to zero"
|
|
newline
|
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hexmask.long.tbyte 0x00 0.--23. 1. "PIXEL,High range of RGB color key applied to AS buffer"
|
|
tree.end
|
|
tree "MMDC"
|
|
base ad:0x40AB0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MDCTL,MMDC Core Control Register"
|
|
bitfld.long 0x00 31. "SDE_0,MMDC Enable CS0" "0: Disabled,1: SDE_0_1"
|
|
bitfld.long 0x00 30. "SDE_1,MMDC Enable CS1" "0: Disabled,1: SDE_1_1"
|
|
newline
|
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bitfld.long 0x00 24.--26. "ROW,Row Address Width" "0: 11 bits Row,1: 12 bits Row,2: 13 bits Row,3: 14 bits Row,4: 15 bits Row,5: 16 bits Row,?..."
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bitfld.long 0x00 20.--22. "COL,Column Address Width" "0: 9 bits column,1: 10 bits column,2: 11 bits column,3: 8 bits column,4: 12 bits column,?..."
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bitfld.long 0x00 19. "BL,Burst Length" "0: Burst Length 4 is used,1: Burst Length 8 is used"
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bitfld.long 0x00 16.--17. "DSIZ,DDR data bus size" "0: 16-bit data bus,1: 32-bit data bus,?..."
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group.long 0x04++0x03
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line.long 0x00 "MDPDC,MMDC Core Power Down Control Register"
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bitfld.long 0x00 28.--30. "PRCT_1,Precharge Timer - Chip Select 1" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 24.--26. "PRCT_0,Precharge Timer - Chip Select 0" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 16.--18. "tCKE,CKE minimum pulse width" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
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bitfld.long 0x00 12.--15. "PWDT_1,Power Down Timer - Chip Select 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. "PWDT_0,Power Down Timer - Chip Select 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 7. "SLOW_PD,Slow/fast power down" "0: Fast mode,1: Slow mode"
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bitfld.long 0x00 6. "BOTH_CS_PD,Parallel power down entry to both chip selects" "0: Each chip select can enter power down..,1: Chip selects can enter power down only if the.."
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bitfld.long 0x00 3.--5. "tCKSRX,Valid clock cycles before self-refresh exit" "0: tCKSRX_0,1: tCKSRX_1,?,?,?,?,6: tCKSRX_6,7: tCKSRX_7"
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bitfld.long 0x00 0.--2. "tCKSRE,Valid clock cycles after self-refresh entry" "0: tCKSRE_0,1: tCKSRE_1,?,?,?,?,6: tCKSRE_6,7: tCKSRE_7"
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group.long 0x0C++0x03
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line.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0"
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hexmask.long.byte 0x00 24.--31. 1. "tRFC,Refresh command to Active or Refresh command time"
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hexmask.long.byte 0x00 16.--23. 1. "tXS,Exit self refresh to non READ command"
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bitfld.long 0x00 13.--15. "tXP,Exit power down with DLL-on to any valid command" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
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bitfld.long 0x00 9.--12. "tXPDLL,Exit precharge power down with DLL frozen to commands requiring DLL" "0: tXPDLL_0,1: tXPDLL_1,2: tXPDLL_2,?,?,?,?,?,?,?,?,?,?,?,14: tXPDLL_14,15: tXPDLL_15"
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bitfld.long 0x00 4.--8. "tFAW,Four Active Window (all banks)" "0: 1 clock,1: 2 clocks,2: 3 clocks,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: 31 clocks,31: 32 clocks"
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bitfld.long 0x00 0.--3. "tCL,CAS Read Latency" "0: 3 cycles,1: 4 cycles,2: 5 cycles,3: 6 cycles,4: 7 cycles,5: 8 cycles,6: 9 cycles,7: 10 cycles,8: 11 cycles,9: - 0xF Reserved,?..."
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group.long 0x10++0x03
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line.long 0x00 "MDCFG1,MMDC Core Timing Configuration Register 1"
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bitfld.long 0x00 29.--31. "tRCD,Active command to internal read or write delay time (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,3: 4 clocks,4: 5 clocks,5: 6 clocks,6: 7 clocks,7: 8 clocks"
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bitfld.long 0x00 26.--28. "tRP,Precharge command period (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,3: 4 clocks,4: 5 clocks,5: 6 clocks,6: 7 clocks,7: 8 clocks"
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bitfld.long 0x00 21.--25. "tRC,Active to Active or Refresh command period (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: 31 clocks,31: 32 clocks"
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bitfld.long 0x00 16.--20. "tRAS,Active to Precharge command period (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: 31 clocks,?..."
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bitfld.long 0x00 15. "tRPA,Precharge-all command period" "0: Will be equal to,1: Will be equal to"
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bitfld.long 0x00 9.--11. "tWR,WRITE recovery time (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
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bitfld.long 0x00 5.--8. "tMRD,Mode Register Set command cycle (all banks)" "0: 1 clock,1: 2 clocks,2: 3 clocks,?,?,?,?,?,?,?,?,?,?,?,14: 15 clocks,15: 16 clocks"
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bitfld.long 0x00 0.--2. "tCWL,CAS Write Latency" "0: 1 cycles (LPDDR2/LPDDR3),1: 2 cycles (LPDDR2/LPDDR3),2: 3 cycles (LPDDR2/LPDDR3),3: 4 cycles (LPDDR2/LPDDR3),4: 5 cycles (LPDDR2/LPDDR3),5: 6 cycles (LPDDR2/LPDDR3),6: 7 cycles (LPDDR2/LPDDR3),?..."
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group.long 0x14++0x03
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line.long 0x00 "MDCFG2,MMDC Core Timing Configuration Register 2"
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hexmask.long.word 0x00 16.--24. 1. "tDLLK,DLL locking time"
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bitfld.long 0x00 6.--8. "tRTP,Internal READ command to Precharge command delay (same bank)" "0: tRTP_0,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
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bitfld.long 0x00 3.--5. "tWTR,Internal WRITE to READ command delay (same bank)" "0: tWTR_0,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
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bitfld.long 0x00 0.--2. "tRRD,Active to Active command period (all banks)" "0: tRRD_0,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,?..."
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group.long 0x18++0x03
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line.long 0x00 "MDMISC,MMDC Core Miscellaneous Register"
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rbitfld.long 0x00 31. "CS0_RDY,External status device on CS0" "0: Device in wake-up period,1: Device is ready for initialization"
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rbitfld.long 0x00 30. "CS1_RDY,External status device on CS1" "0: Device in wake-up period,1: Device is ready for initialization"
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bitfld.long 0x00 21. "CK1_GATING,Gating the secondary DDR clock" "0: MMDC drives two clocks toward the DDR memory,1: MMDC drives only one clock toward the DDR.."
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bitfld.long 0x00 20. "CALIB_PER_CS,Number of chip-select for calibration process" "0: Calibration is targeted to CS0,1: Calibration is targeted to CS1"
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bitfld.long 0x00 18. "LHD,Latency hiding disable" "0: Latency hiding on,1: Latency hiding disable"
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bitfld.long 0x00 16.--17. "WALAT,Write Additional latency" "0: No additional latency required,1: 1 cycle additional delay,2: 2 cycles additional delay,3: 3 cycles additional delay"
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bitfld.long 0x00 12. "BI_ON,Bank Interleaving On" "0: Banks are not interleaved and address will be..,1: Banks are interleaved and address will be.."
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bitfld.long 0x00 11. "LPDDR2_S2,LPDDR2 S2 device type indication" "0: LPDDR2-S4 device is used,1: LPDDR2-S2 device is used"
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bitfld.long 0x00 9.--10. "MIF3_MODE,Command prediction working mode" "0: Disable prediction,1: Enable prediction based on,2: Enable prediction based on,3: Enable prediction based on"
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bitfld.long 0x00 6.--8. "RALAT,Read Additional Latency" "0: no additional latency,1: 1 cycle additional latency,2: 2 cycles additional latency,3: 3 cycles additional latency,4: 4 cycles additional latency,5: 5 cycles additional latency,6: 6 cycles additional latency,7: 7 cycles additional latency"
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bitfld.long 0x00 5. "DDR_4_BANK,Number of banks per DDR device" "0: 8 banks device is being used,1: 4 banks device is being used"
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bitfld.long 0x00 3.--4. "DDR_TYPE,DDR TYPE" "?,1: LPDDR2 device is used,?,3: LPDDR3 device is used"
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bitfld.long 0x00 1. "RST,Software Reset" "0: Do nothing,1: Assert reset to the MMDC"
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group.long 0x1C++0x03
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line.long 0x00 "MDSCR,MMDC Core Special Command Register"
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hexmask.long.byte 0x00 24.--31. 1. "CMD_ADDR_MSB_MR_OP,Command/Address MSB"
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hexmask.long.byte 0x00 16.--23. 1. "CMD_ADDR_LSB_MR_ADDR,Command/Address LSB"
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bitfld.long 0x00 15. "CON_REQ,Configuration request" "0: No request to configure MMDC,1: A request to configure MMDC is valid"
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rbitfld.long 0x00 14. "CON_ACK,Configuration acknowledge" "0: Configuration of MMDC registers is forbidden,1: Configuration of MMDC registers is permitted"
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rbitfld.long 0x00 10. "MRR_READ_DATA_VALID,MRR read data valid" "0: Cleared upon the assertion of MRR command,1: Set after MRR data is valid and stored at.."
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bitfld.long 0x00 4.--6. "CMD,Command" "0: Normal operation,1: Precharge all command is sent independently..,2: Auto-Refresh Command (set correct CMD_CS),3: Load Mode Register Command (LPDDR2/LPDDR3 set..,4: ZQ calibration,5: Precharge all only if banks open (set correct..,6: MRR command (LPDDR2/LPDDR3 set correct CMD_CS..,?..."
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bitfld.long 0x00 3. "CMD_CS,Chip Select" "0: to Chip-select 0,1: to Chip-select 1"
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bitfld.long 0x00 0.--2. "CMD_BA,Bank Address" "0: bank address 0,1: bank address 1,2: bank address 2,?,?,?,?,7: bank address 7"
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group.long 0x20++0x03
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line.long 0x00 "MDREF,MMDC Core Refresh Control Register"
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hexmask.long.word 0x00 16.--31. 1. "REF_CNT,Refresh Counter at DDR clock period If REF_SEL equals '2' a refresh cycle will begin every amount of DDR cycles configured in this field"
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bitfld.long 0x00 14.--15. "REF_SEL,Refresh Selector" "0: Periodic refresh cycles will be triggered in..,1: Periodic refresh cycles will be triggered in..,2: Periodic refresh cycles will be triggered..,3: No refresh cycles will be triggered"
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bitfld.long 0x00 11.--13. "REFR,Refresh Rate" "0: 1 refresh,1: 2 refreshes,2: 3 refreshes,3: 4 refreshes,4: 5 refreshes,5: 6 refreshes,6: 7 refreshes,7: 8 refreshes"
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bitfld.long 0x00 0. "START_REF,Manual start of refresh cycle" "0: START_REF_0,1: Start a refresh cycle"
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group.long 0x2C++0x03
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line.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register"
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hexmask.long.word 0x00 16.--28. 1. "tDAI,Device auto initialization period.(maximum) This field is relevant only to LPDDR2/3 mode"
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bitfld.long 0x00 12.--14. "RTW_SAME,Read to write delay for the same chip-select" "0: RTW_SAME_0,1: RTW_SAME_1,2: 2 cycles (Default),3: RTW_SAME_3,4: RTW_SAME_4,5: RTW_SAME_5,6: RTW_SAME_6,7: RTW_SAME_7"
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bitfld.long 0x00 9.--11. "WTR_DIFF,Write to read delay for different chip-select" "0: WTR_DIFF_0,1: WTR_DIFF_1,2: WTR_DIFF_2,3: 3 cycles (Default),4: WTR_DIFF_4,5: WTR_DIFF_5,6: WTR_DIFF_6,7: WTR_DIFF_7"
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bitfld.long 0x00 6.--8. "WTW_DIFF,Write to write delay for different chip-select" "0: WTW_DIFF_0,1: WTW_DIFF_1,2: WTW_DIFF_2,3: 3 cycles (Default),4: WTW_DIFF_4,5: WTW_DIFF_5,6: WTW_DIFF_6,7: WTW_DIFF_7"
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bitfld.long 0x00 3.--5. "RTW_DIFF,Read to write delay for different chip-select" "0: RTW_DIFF_0,1: RTW_DIFF_1,2: 2 cycles (Default),3: RTW_DIFF_3,4: RTW_DIFF_4,5: RTW_DIFF_5,6: RTW_DIFF_6,7: RTW_DIFF_7"
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bitfld.long 0x00 0.--2. "RTR_DIFF,Read to read delay for different chip-select" "0: RTR_DIFF_0,1: RTR_DIFF_1,2: 2 cycles (Default),3: RTR_DIFF_3,4: RTR_DIFF_4,5: RTR_DIFF_5,6: RTR_DIFF_6,7: RTR_DIFF_7"
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group.long 0x30++0x03
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line.long 0x00 "MDOR,MMDC Core Out of Reset Delays Register"
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hexmask.long.byte 0x00 16.--23. 1. "tXPR,LPDDR2/"
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bitfld.long 0x00 8.--13. "SDE_to_RST,LPDDR2 mode: This field is not relevant and should remain in its default reset value" "?,?,?,3: SDE_to_RST_3,4: SDE_to_RST_4,?,?,?,?,?,?,?,?,?,?,?,16: 14 cycles - total of 200 us,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,62: SDE_to_RST_62,63: SDE_to_RST_63"
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bitfld.long 0x00 0.--5. "RST_to_CKE,LPDDR2: Idle time after first CKE assertion (JEDEC value is 200 us)" "?,?,?,3: RST_to_CKE_3,?,?,?,?,?,?,?,?,?,?,?,?,16: 14 cycles (JEDEC value for LPDDR2) - total..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,35: 33 cycles - total of 500 us,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,62: RST_to_CKE_62,63: RST_to_CKE_63"
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rgroup.long 0x34++0x03
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line.long 0x00 "MDMRR,MMDC Core MRR Data Register"
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hexmask.long.byte 0x00 24.--31. 1. "MRR_READ_DATA3,MRR DATA that arrived on DQ[31:24]"
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hexmask.long.byte 0x00 16.--23. 1. "MRR_READ_DATA2,MRR DATA that arrived on DQ[23:16]"
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hexmask.long.byte 0x00 8.--15. 1. "MRR_READ_DATA1,MRR DATA that arrived on DQ[15:8]"
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hexmask.long.byte 0x00 0.--7. 1. "MRR_READ_DATA0,MRR DATA that arrived on DQ[7:0]"
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group.long 0x38++0x03
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line.long 0x00 "MDCFG3LP,MMDC Core Timing Configuration Register 3"
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bitfld.long 0x00 16.--21. "RC_LP,Active to Active or Refresh command period (same bank)" "0: RC_LP_0,1: 2 clocks,2: 3 clocks,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,62: 63 clocks,?..."
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bitfld.long 0x00 8.--11. "tRCD_LP,Active command to internal read or write delay time (same bank)" "0: tRCD_LP_0,1: tRCD_LP_1,2: tRCD_LP_2,?,?,?,?,?,?,?,?,?,?,?,14: tRCD_LP_14,?..."
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bitfld.long 0x00 4.--7. "tRPpb_LP,Precharge (per bank) command period (same bank)" "0: tRPpb_LP_0,1: tRPpb_LP_1,2: tRPpb_LP_2,?,?,?,?,?,?,?,?,?,?,?,14: tRPpb_LP_14,?..."
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bitfld.long 0x00 0.--3. "tRPab_LP,Precharge (all banks) command period" "0: tRPab_LP_0,1: tRPab_LP_1,2: tRPab_LP_2,?,?,?,?,?,?,?,?,?,?,?,14: tRPab_LP_14,?..."
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group.long 0x3C++0x03
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line.long 0x00 "MDMR4,MMDC Core MR4 Derating Register"
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bitfld.long 0x00 8. "tRRD_DE,tRRD derating value" "0: Original tRRD is used,1: tRRD is derated in 1 cycle"
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bitfld.long 0x00 7. "tRP_DE,tRP derating value" "0: Original tRP is used,1: tRP is derated in 1 cycle"
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bitfld.long 0x00 6. "tRAS_DE,tRAS derating value" "0: Original tRAS is used,1: tRAS is derated in 1 cycle"
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bitfld.long 0x00 5. "tRC_DE,tRC derating value" "0: Original tRC is used,1: tRC is derated in 1 cycle"
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bitfld.long 0x00 4. "tRCD_DE,tRCD derating value" "0: Original tRCD is used,1: tRCD is derated in 1 cycle"
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rbitfld.long 0x00 1. "UPDATE_DE_ACK,Update Derated Values Acknowledge" "0,1"
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bitfld.long 0x00 0. "UPDATE_DE_REQ,Update Derated Values Request" "0: UPDATE_DE_REQ_0,1: Request to update the following values"
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group.long 0x40++0x03
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line.long 0x00 "MDASP,MMDC Core Address Space Partition Register"
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hexmask.long.byte 0x00 0.--6. 1. "CS0_END,Defines the absolute last address associated with CS0 with increments of 256Mb"
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group.long 0x400++0x03
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line.long 0x00 "MAARCR,MMDC Core AXI Reordering Control Register"
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bitfld.long 0x00 31. "ARCR_SEC_ERR_LOCK,Once set this bit locks ARCR_SEC_ERR_EN and prevents from its updating" "0: ARCR_SEC_ERR_EN is unlocked so can be updated..,1: ARCR_SEC_ERR_EN is locked so it can't be.."
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bitfld.long 0x00 30. "ARCR_SEC_ERR_EN,This bit defines whether security read/write access violation result in SLV Error response or in OKAY response Default value is" "0: security violation results in OKAY response..,1: security violation results in SLAVE Error.."
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bitfld.long 0x00 28. "ARCR_EXC_ERR_EN,This bit defines whether exclusive read/write access violation of AXI 6" "0: violation of AXI exclusive rules (6.2.4)..,1: violation of AXI exclusive rules (6.2.4).."
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bitfld.long 0x00 24. "ARCR_RCH_EN,This bit defines whether Real time channel is activated and bypassed all other pending accesses So accesses with QoS=='F' will be granted the highest priority in the optimization/reordering mechanism Default value is" "0: normal prioritization no bypassing,1: accesses with QoS=='F' bypass the arbitration"
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bitfld.long 0x00 20.--22. "ARCR_PAG_HIT,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 16.--18. "ARCR_ACC_HIT,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 8.--11. "ARCR_DYN_JMP,ARCR Dynamic Jump" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 4.--7. "ARCR_DYN_MAX,ARCR Dynamic Maximum" "0: ARCR_DYN_MAX_0,1: ARCR_DYN_MAX_1,?,?,?,?,?,?,?,?,?,?,?,?,?,15: ARCR_DYN_MAX_15"
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bitfld.long 0x00 0.--3. "ARCR_GUARD,ARCR Guard" "0: ARCR_GUARD_0,1: ARCR_GUARD_1,?,?,?,?,?,?,?,?,?,?,?,?,?,15: ARCR_GUARD_15"
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group.long 0x404++0x03
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line.long 0x00 "MAPSR,MMDC Core Power Saving Control and Status Register"
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rbitfld.long 0x00 25. "DVACK,DVFS/Self-Refresh acknowledge" "0,1"
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rbitfld.long 0x00 24. "LPACK,General low-power acknowledge" "0,1"
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bitfld.long 0x00 21. "DVFS,DVFS/Self-Refresh request" "0: no DVFS/Self-Refresh entry request,1: DVFS/Self-Refresh entry request"
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bitfld.long 0x00 20. "LPMD,General LPMD request" "0: no lpmd request,1: lpmd request"
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hexmask.long.byte 0x00 8.--15. 1. "PST,Automatic Power saving timer"
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rbitfld.long 0x00 6. "WIS,Write Idle Status" "0: not idle,1: WIS_1"
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rbitfld.long 0x00 5. "RIS,Read Idle Status" "0: not idle,1: RIS_1"
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rbitfld.long 0x00 4. "PSS,Power Saving Status" "0: not in power saving mode,1: power saving mode"
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bitfld.long 0x00 0. "PSD,Automatic Power Saving Disable" "0: power saving enabled,1: power saving disabled (default)"
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group.long 0x408++0x03
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line.long 0x00 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register0"
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hexmask.long.word 0x00 16.--31. 1. "EXC_ID_MONITOR1,This field defines ID for Exclusive monitor#1"
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hexmask.long.word 0x00 0.--15. 1. "EXC_ID_MONITOR0,This field defines ID for Exclusive monitor#0"
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group.long 0x40C++0x03
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line.long 0x00 "MAEXIDR1,MMDC Core Exclusive ID Monitor Register1"
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hexmask.long.word 0x00 16.--31. 1. "EXC_ID_MONITOR3,This field defines ID for Exclusive monitor#3"
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hexmask.long.word 0x00 0.--15. 1. "EXC_ID_MONITOR2,This field defines ID for Exclusive monitor#2"
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group.long 0x410++0x03
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line.long 0x00 "MADPCR0,MMDC Core Debug and Profiling Control Register 0"
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bitfld.long 0x00 9. "SBS,Step By Step trigger" "0: No access will be launched toward the DDR,1: Launch AXI pending access toward the DDR"
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bitfld.long 0x00 8. "SBS_EN,Step By Step debug Enable" "0: SBS_EN_0,1: SBS_EN_1"
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eventfld.long 0x00 3. "CYC_OVF,Total Profiling Cycles Count Overflow" "0: no overflow,1: CYC_OVF_1"
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bitfld.long 0x00 2. "PRF_FRZ,Profiling freeze" "0: profiling counters are not frozen,1: profiling counters are frozen"
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bitfld.long 0x00 1. "DBG_RST,Debug and Profiling Reset" "0: DBG_RST_0,1: DBG_RST_1"
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bitfld.long 0x00 0. "DBG_EN,Debug and Profiling Enable" "0: disable (default),1: DBG_EN_1"
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group.long 0x414++0x03
|
|
line.long 0x00 "MADPCR1,MMDC Core Debug and Profiling Control Register 1"
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|
hexmask.long.word 0x00 16.--31. 1. "PRF_AXI_ID_MASK,Profiling AXI ID Mask"
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|
hexmask.long.word 0x00 0.--15. 1. "PRF_AXI_ID,Profiling AXI ID"
|
|
rgroup.long 0x418++0x03
|
|
line.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "CYC_COUNT,Total Profiling cycle Count"
|
|
rgroup.long 0x41C++0x03
|
|
line.long 0x00 "MADPSR1,MMDC Core Debug and Profiling Status Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "BUSY_COUNT,Profiling Busy Cycles Count"
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "MADPSR2,MMDC Core Debug and Profiling Status Register 2"
|
|
hexmask.long 0x00 0.--31. 1. "RD_ACC_COUNT,Profiling Read Access Count"
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "MADPSR3,MMDC Core Debug and Profiling Status Register 3"
|
|
hexmask.long 0x00 0.--31. 1. "WR_ACC_COUNT,Profiling Write Access Count"
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "MADPSR4,MMDC Core Debug and Profiling Status Register 4"
|
|
hexmask.long 0x00 0.--31. 1. "RD_BYTES_COUNT,Profiling Read Bytes Count"
|
|
rgroup.long 0x42C++0x03
|
|
line.long 0x00 "MADPSR5,MMDC Core Debug and Profiling Status Register 5"
|
|
hexmask.long 0x00 0.--31. 1. "WR_BYTES_COUNT,Profiling Write Bytes Count"
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "MASBS0,MMDC Core Step By Step Address Register"
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|
hexmask.long 0x00 0.--31. 1. "SBS_ADDR,Step By Step Address"
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|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "MASBS1,MMDC Core Step By Step Address Attributes Register"
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hexmask.long.word 0x00 16.--31. 1. "SBS_AXI_ID,Step By Step AXI ID"
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bitfld.long 0x00 13.--15. "SBS_LEN,Step By Step Length" "0: burst of length 1,1: burst of length 2,?,?,?,?,?,7: burst of length 8"
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newline
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bitfld.long 0x00 12. "SBS_BUFF,Step By Step Buffered" "0,1"
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bitfld.long 0x00 10.--11. "SBS_BURST,Step By Step Burst" "0: SBS_BURST_0,1: SBS_BURST_1,2: SBS_BURST_2,?..."
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|
newline
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bitfld.long 0x00 7.--9. "SBS_SIZE,Step By Step Size" "0: SBS_SIZE_0,1: SBS_SIZE_1,2: SBS_SIZE_2,3: SBS_SIZE_3,4: SBS_SIZE_4,?..."
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|
bitfld.long 0x00 4.--6. "SBS_PROT,Step By Step Protection" "0,1,2,3,4,5,6,7"
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|
newline
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bitfld.long 0x00 2.--3. "SBS_LOCK,Step By Step Lock" "0,1,2,3"
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|
bitfld.long 0x00 1. "SBS_TYPE,Step By Step Request Type" "0: SBS_TYPE_0,1: SBS_TYPE_1"
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|
newline
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bitfld.long 0x00 0. "SBS_VLD,Step By Step Valid" "0: SBS_VLD_0,1: SBS_VLD_1"
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|
group.long 0x440++0x03
|
|
line.long 0x00 "MAGENP,MMDC Core General Purpose Register"
|
|
hexmask.long 0x00 0.--31. 1. "GP31_GP0,General purpose read/write bits"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW control register"
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bitfld.long 0x00 27.--31. "ZQ_EARLY_COMPARATOR_EN_TIMER,ZQ early comparator enable timer" "0: ZQ_EARLY_COMPARATOR_EN_TIMER_0,?,?,?,?,?,?,7: ZQ_EARLY_COMPARATOR_EN_TIMER_7,?,?,?,?,?,?,?,?,?,?,?,?,20: ZQ_EARLY_COMPARATOR_EN_TIMER_20,?,?,?,?,?,?,?,?,?,30: ZQ_EARLY_COMPARATOR_EN_TIMER_30,31: ZQ_EARLY_COMPARATOR_EN_TIMER_31"
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|
bitfld.long 0x00 26. "ZQ_PARA_EN,Device ZQ calibration parallel enable" "0: Device ZQ calibration is done in serial (CS0..,1: ZQ calibration of both CS is done in parallel"
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|
newline
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bitfld.long 0x00 23.--25. "TZQ_CS,Device ZQ short time" "?,?,2: 128 cycles (Default),3: 256 cycles,4: 512 cycles,5: 1024 cycles,?..."
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|
bitfld.long 0x00 20.--22. "TZQ_OPER,Device ZQ long/oper time" "?,?,2: TZQ_OPER_2,3: 256 cycles - Default,4: TZQ_OPER_4,5: 1024 cycles,?..."
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|
newline
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bitfld.long 0x00 17.--19. "TZQ_INIT,Device ZQ long/init time" "?,?,2: TZQ_INIT_2,3: TZQ_INIT_3,4: 512 cycles - Default,5: 1024 cycles,?..."
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|
bitfld.long 0x00 16. "ZQ_HW_FOR,Force ZQ automatic calibration process with the i" "0,1"
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|
newline
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rbitfld.long 0x00 11.--15. "ZQ_HW_PD_RES,ZQ HW calibration pull-down result" "0: Max,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Min"
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rbitfld.long 0x00 6.--10. "ZQ_HW_PU_RES,ZQ automatic calibration pull-up result" "0: Min,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Max"
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|
newline
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bitfld.long 0x00 2.--5. "ZQ_HW_PER,ZQ periodic calibration time" "0: ZQ calibration is performed every 1 ms,1: ZQ calibration is performed every 2 ms,2: ZQ calibration is performed every 4 ms,?,?,?,?,?,?,?,10: ZQ calibration is performed every 1 sec,?,?,?,14: ZQ calibration is performed every 16 sec,15: ZQ calibration is performed every 32 sec"
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|
bitfld.long 0x00 0.--1. "ZQ_MODE,ZQ calibration mode" "0: No ZQ calibration is issued,1: ZQ calibration is issued to i.MX ZQ..,2: ZQ calibration command long/short is issued..,3: ZQ calibration is issued to i.MX ZQ.."
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW control register"
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|
bitfld.long 0x00 27.--31. "ZQ_EARLY_COMPARATOR_EN_TIMER,ZQ early comparator enable timer" "0: ZQ_EARLY_COMPARATOR_EN_TIMER_0,?,?,?,?,?,?,7: ZQ_EARLY_COMPARATOR_EN_TIMER_7,?,?,?,?,?,?,?,?,?,?,?,?,20: ZQ_EARLY_COMPARATOR_EN_TIMER_20,?,?,?,?,?,?,?,?,?,30: ZQ_EARLY_COMPARATOR_EN_TIMER_30,31: ZQ_EARLY_COMPARATOR_EN_TIMER_31"
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|
bitfld.long 0x00 26. "ZQ_PARA_EN,Device ZQ calibration parallel enable" "0: Device ZQ calibration is done in serial (CS0..,1: ZQ calibration of both CS is done in parallel"
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|
newline
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bitfld.long 0x00 23.--25. "TZQ_CS,Device ZQ short time" "?,?,2: 128 cycles (Default),3: 256 cycles,4: 512 cycles,5: 1024 cycles,?..."
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|
bitfld.long 0x00 20.--22. "TZQ_OPER,Device ZQ long/oper time" "?,?,2: TZQ_OPER_2,3: 256 cycles - Default,4: TZQ_OPER_4,5: 1024 cycles,?..."
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|
newline
|
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bitfld.long 0x00 17.--19. "TZQ_INIT,Device ZQ long/init time" "?,?,2: TZQ_INIT_2,3: TZQ_INIT_3,4: 512 cycles - Default,5: 1024 cycles,?..."
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|
bitfld.long 0x00 16. "ZQ_HW_FOR,Force ZQ automatic calibration process with the i" "0,1"
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|
newline
|
|
rbitfld.long 0x00 11.--15. "ZQ_HW_PD_RES,ZQ HW calibration pull-down result" "0: Max,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Min"
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|
rbitfld.long 0x00 6.--10. "ZQ_HW_PU_RES,ZQ automatic calibration pull-up result" "0: Min,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Max"
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|
newline
|
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bitfld.long 0x00 2.--5. "ZQ_HW_PER,ZQ periodic calibration time" "0: ZQ calibration is performed every 1 ms,1: ZQ calibration is performed every 2 ms,2: ZQ calibration is performed every 4 ms,?,?,?,?,?,?,?,10: ZQ calibration is performed every 1 sec,?,?,?,14: ZQ calibration is performed every 16 sec,15: ZQ calibration is performed every 32 sec"
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|
bitfld.long 0x00 0.--1. "ZQ_MODE,ZQ calibration mode" "0: No ZQ calibration is issued,1: ZQ calibration is issued to i.MX ZQ..,2: ZQ calibration command long/short is issued..,3: ZQ calibration is issued to i.MX ZQ.."
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|
endif
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "MPZQSWCTRL,MMDC PHY ZQ SW control register"
|
|
bitfld.long 0x00 16.--17. "ZQ_CMP_OUT_SMP,Defines the amount of cycles between driving the ZQ signals to the ZQ pad and till sampling the comparator enable output while performing ZQ calibration process with the i" "0: ZQ_CMP_OUT_SMP_0,1: ZQ_CMP_OUT_SMP_1,2: ZQ_CMP_OUT_SMP_2,3: ZQ_CMP_OUT_SMP_3"
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bitfld.long 0x00 13. "USE_ZQ_SW_VAL,Use SW ZQ configured value for I/O pads resistor controls" "0: Fields ZQ_HW_PD_VAL & ZQ_HW_PU_VAL will be..,1: Fields ZQ_SW_PD_VAL & ZQ_SW_PU_VAL will be.."
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newline
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bitfld.long 0x00 12. "ZQ_SW_PD,ZQ software PU/PD calibration" "0: PU resistor calibration,1: PD resistor calibration"
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|
bitfld.long 0x00 7.--11. "ZQ_SW_PD_VAL,ZQ software pull-down resistance" "0: Max,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Min"
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|
newline
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bitfld.long 0x00 2.--6. "ZQ_SW_PU_VAL,ZQ software pull-up resistance" "0: Min,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Max"
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|
rbitfld.long 0x00 1. "ZQ_SW_RES,ZQ software calibration result" "0: Current ZQ calibration voltage is less than..,1: Current ZQ calibration voltage is more than.."
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|
newline
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bitfld.long 0x00 0. "ZQ_SW_FOR,ZQ SW calibration enable" "0,1"
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|
group.long 0x81C++0x03
|
|
line.long 0x00 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register"
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|
bitfld.long 0x00 28.--30. "rd_dq7_del,Read dqs0 to dq7 delay fine-tuning" "0: No change in dq7 delay,1: Add dq7 delay of 1 delay unit,2: Add dq7 delay of 2 delay units,3: Add dq7 delay of 3 delay units,4: Add dq7 delay of 4 delay units,5: Add dq7 delay of 5 delay units,6: Add dq7 delay of 6 delay units,7: Add dq7 delay of 7 delay units"
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bitfld.long 0x00 24.--26. "rd_dq6_del,Read dqs0 to dq6 delay fine-tuning" "0: No change in dq6 delay,1: Add dq6 delay of 1 delay unit,2: Add dq6 delay of 2 delay units,3: Add dq6 delay of 3 delay units,4: Add dq6 delay of 4 delay units,5: Add dq6 delay of 5 delay units,6: Add dq6 delay of 6 delay units,7: Add dq6 delay of 7 delay units"
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|
newline
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bitfld.long 0x00 20.--22. "rd_dq5_del,Read dqs0 to dq5 delay fine-tuning" "0: No change in dq5 delay,1: Add dq5 delay of 1 delay unit,2: Add dq5 delay of 2 delay units,3: Add dq5 delay of 3 delay units,4: Add dq5 delay of 4 delay units,5: Add dq5 delay of 5 delay units,6: Add dq5 delay of 6 delay units,7: Add dq5 delay of 7 delay units"
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|
bitfld.long 0x00 16.--18. "rd_dq4_del,Read dqs0 to dq4 delay fine-tuning" "0: No change in dq4 delay,1: Add dq4 delay of 1 delay unit,2: Add dq4 delay of 2 delay units,3: Add dq4 delay of 3 delay units,4: Add dq4 delay of 4 delay units,5: Add dq4 delay of 5 delay units,6: Add dq4 delay of 6 delay units,7: Add dq4 delay of 7 delay units"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "rd_dq3_del,Read dqs0 to dq3 delay fine-tuning" "0: No change in dq3 delay,1: Add dq3 delay of 1 delay unit,2: Add dq3 delay of 2 delay units,3: Add dq3 delay of 3 delay units,4: Add dq3 delay of 4 delay units,5: Add dq3 delay of 5 delay units,6: Add dq3 delay of 6 delay units,7: Add dq3 delay of 7 delay units"
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bitfld.long 0x00 8.--10. "rd_dq2_del,Read dqs0 to dq2 delay fine-tuning" "0: No change in dq2 delay,1: Add dq2 delay of 1 delay unit,2: Add dq2 delay of 2 delay units,3: Add dq2 delay of 3 delay units,4: Add dq2 delay of 4 delay units,5: Add dq2 delay of 5 delay units,6: Add dq2 delay of 6 delay units,7: Add dq2 delay of 7 delay units"
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|
newline
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bitfld.long 0x00 4.--6. "rd_dq1_del,Read dqs0 to dq1 delay fine-tuning" "0: No change in dq1 delay,1: Add dq1 delay of 1 delay unit,2: Add dq1 delay of 2 delay units,3: Add dq1 delay of 3 delay units,4: Add dq1 delay of 4 delay units,5: Add dq1 delay of 5 delay units,6: Add dq1 delay of 6 delay units,7: Add dq1 delay of 7 delay units"
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|
bitfld.long 0x00 0.--2. "rd_dq0_del,Read dqs0 to dq0 delay fine-tuning" "0: No change in dq0 delay,1: Add dq0 delay of 1 delay unit,2: Add dq0 delay of 2 delay units,3: Add dq0 delay of 3 delay units,4: Add dq0 delay of 4 delay units,5: Add dq0 delay of 5 delay units,6: Add dq0 delay of 6 delay units,7: Add dq0 delay of 7 delay units"
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register"
|
|
bitfld.long 0x00 28.--30. "rd_dq15_del,Read dqs1 to dq15 delay fine-tuning" "0: No change in dq15 delay,1: Add dq15 delay of 1 delay unit,2: Add dq15 delay of 2 delay units,3: Add dq15 delay of 3 delay units,4: Add dq15 delay of 4 delay units,5: Add dq15 delay of 5 delay units,6: Add dq15 delay of 6 delay units,7: Add dq15 delay of 7 delay units"
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|
bitfld.long 0x00 24.--26. "rd_dq14_del,Read dqs1 to dq14 delay fine-tuning" "0: No change in dq14 delay,1: Add dq14 delay of 1 delay unit,2: Add dq14 delay of 2 delay units,3: Add dq14 delay of 3 delay units,4: Add dq14 delay of 4 delay units,5: Add dq14 delay of 5 delay units,6: Add dq14 delay of 6 delay units,7: Add dq14 delay of 7 delay units"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "rd_dq13_del,Read dqs1 to dq13 delay fine-tuning" "0: No change in dq13 delay,1: Add dq13 delay of 1 delay unit,2: Add dq13 delay of 2 delay units,3: Add dq13 delay of 3 delay units,4: Add dq13 delay of 4 delay units,5: Add dq13 delay of 5 delay units,6: Add dq13 delay of 6 delay units,7: Add dq13 delay of 7 delay units"
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|
bitfld.long 0x00 16.--18. "rd_dq12_del,Read dqs1 to dq12 delay fine-tuning" "0: No change in dq12 delay,1: Add dq12 delay of 1 delay unit,2: Add dq12 delay of 2 delay units,3: Add dq12 delay of 3 delay units,4: Add dq12 delay of 4 delay units,5: Add dq12 delay of 5 delay units,6: Add dq12 delay of 6 delay units,7: Add dq12 delay of 7 delay units"
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|
newline
|
|
bitfld.long 0x00 12.--14. "rd_dq11_del,Read dqs1 to dq11 delay fine-tuning" "0: No change in dq11 delay,1: Add dq11 delay of 1 delay unit,2: Add dq11 delay of 2 delay units,3: Add dq11 delay of 3 delay units,4: Add dq11 delay of 4 delay units,5: Add dq11 delay of 5 delay units,6: Add dq11 delay of 6 delay units,7: Add dq11 delay of 7 delay units"
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|
bitfld.long 0x00 8.--10. "rd_dq10_del,Read dqs1 to dq10 delay fine-tuning" "0: No change in dq10 delay,1: Add dq10 delay of 1 delay unit,2: Add dq10 delay of 2 delay units,3: Add dq10 delay of 3 delay units,4: Add dq10 delay of 4 delay units,5: Add dq10 delay of 5 delay unit,6: Add dq10 delay of 6 delay units,7: Add dq10 delay of 7 delay units"
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|
newline
|
|
bitfld.long 0x00 4.--6. "rd_dq9_del,Read dqs1 to dq9 delay fine-tuning" "0: No change in dq9 delay,1: Add dq9 delay of 1 delay unit,2: Add dq9 delay of 2 delay units,3: Add dq9 delay of 3 delay units,4: Add dq9 delay of 4 delay units,5: Add dq9 delay of 5 delay units,6: Add dq9 delay of 6 delay units,7: Add dq9 delay of 7 delay units"
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|
bitfld.long 0x00 0.--2. "rd_dq8_del,Read dqs1 to dq8 delay fine-tuning" "0: No change in dq8 delay,1: Add dq8 delay of 1 delay unit,2: Add dq8 delay of 2 delay units,3: Add dq8 delay of 3 delay units,4: Add dq8 delay of 4 delay units,5: Add dq8 delay of 5 delay units,6: Add dq8 delay of 6 delay units,7: Add dq8 delay of 7 delay units"
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register"
|
|
bitfld.long 0x00 28.--30. "rd_dq23_del,Read dqs2 to dq23 delay fine-tuning" "0: No change in dq23 delay,1: Add dq23 delay of 1 delay unit,2: Add dq23 delay of 2 delay units,3: Add dq23 delay of 3 delay units,4: Add dq23 delay of 4 delay units,5: Add dq23 delay of 5 delay units,6: Add dq23 delay of 6 delay units,7: Add dq23 delay of 7 delay units"
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|
bitfld.long 0x00 24.--26. "rd_dq22_del,Read dqs2 to dq22 delay fine-tuning" "0: No change in dq22 delay,1: Add dq22 delay of 1 delay unit,2: Add dq22 delay of 2 delay units,3: Add dq22 delay of 3 delay units,4: Add dq22 delay of 4 delay units,5: Add dq22 delay of 5 delay units,6: Add dq22 delay of 6 delay units,7: Add dq22 delay of 7 delay units"
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|
newline
|
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bitfld.long 0x00 20.--22. "rd_dq21_del,Read dqs2 to dq21 delay fine-tuning" "0: No change in dq21 delay,1: Add dq21 delay of 1 delay unit,2: Add dq21 delay of 2 delay units,3: Add dq21 delay of 3 delay units,4: Add dq21 delay of 4 delay units,5: Add dq21 delay of 5 delay units,6: Add dq21 delay of 6 delay units,7: Add dq21 delay of 7 delay units"
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|
bitfld.long 0x00 16.--18. "rd_dq20_del,Read dqs2 to dq20 delay fine-tuning" "0: No change in dq20 delay,1: Add dq20 delay of 1 delay unit,2: Add dq20 delay of 2 delay units,3: Add dq20 delay of 3 delay units,4: Add dq20 delay of 4 delay units,5: Add dq20 delay of 5 delay units,6: Add dq20 delay of 6 delay units,7: Add dq20 delay of 7 delay units"
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|
newline
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bitfld.long 0x00 12.--14. "rd_dq19_del,Read dqs2 to dq19 delay fine-tuning" "0: No change in dq19 delay,1: Add dq19 delay of 1 delay unit,2: Add dq19 delay of 2 delay units,3: Add dq19 delay of 3 delay units,4: Add dq19 delay of 4 delay units,5: Add dq19 delay of 5 delay units,6: Add dq19 delay of 6 delay units,7: Add dq19 delay of 7 delay units"
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|
bitfld.long 0x00 8.--10. "rd_dq18_del,Read dqs2 to dq18 delay fine-tuning" "0: No change in dq18 delay,1: Add dq18 delay of 1 delay unit,2: Add dq18 delay of 2 delay units,3: Add dq18 delay of 3 delay units,4: Add dq18 delay of 4 delay units,5: Add dq18 delay of 5 delay units,6: Add dq18 delay of 6 delay units,7: Add dq18 delay of 7 delay units"
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|
newline
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bitfld.long 0x00 4.--6. "rd_dq17_del,Read dqs2 to dq17 delay fine-tuning" "0: No change in dq17 delay,1: Add dq17 delay of 1 delay unit,2: Add dq17 delay of 2 delay units,3: Add dq17 delay of 3 delay units,4: Add dq17 delay of 4 delay units,5: Add dq17 delay of 5 delay units,6: Add dq17 delay of 6 delay units,7: Add dq17 delay of 7 delay units"
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|
bitfld.long 0x00 0.--2. "rd_dq16_del,Read dqs2 to dq16 delay fine-tuning" "0: No change in dq16 delay,1: Add dq16 delay of 1 delay unit,2: Add dq16 delay of 2 delay units,3: Add dq16 delay of 3 delay units,4: Add dq16 delay of 4 delay units,5: Add dq16 delay of 5 delay units,6: Add dq16 delay of 6 delay units,7: Add dq16 delay of 7 delay units"
|
|
group.long 0x828++0x03
|
|
line.long 0x00 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register"
|
|
bitfld.long 0x00 28.--30. "rd_dq31_del,Read dqs3 to dq31 delay fine-tuning" "0: No change in dq31 delay,1: Add dq31 delay of 1 delay unit,2: Add dq31 delay of 2 delay units,3: Add dq31 delay of 3 delay units,4: Add dq31 delay of 4 delay units,5: Add dq31 delay of 5 delay units,6: Add dq31 delay of 6 delay units,7: Add dq31 delay of 7 delay units"
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|
bitfld.long 0x00 24.--26. "rd_dq30_del,Read dqs3 to dq30 delay fine-tuning" "0: No change in dq30 delay,1: Add dq30 delay of 1 delay unit,2: Add dq30 delay of 2 delay units,3: Add dq30 delay of 3 delay units,4: Add dq30 delay of 4 delay units,5: Add dq30 delay of 5 delay units,6: Add dq30 delay of 6 delay units,7: Add dq30 delay of 7 delay units"
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|
newline
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bitfld.long 0x00 20.--22. "rd_dq29_del,Read dqs3 to dq29 delay fine-tuning" "0: No change in dq29 delay,1: Add dq29 delay of 1 delay unit,2: Add dq29 delay of 2 delay units,3: Add dq29 delay of 3 delay units,4: Add dq29 delay of 4 delay units,5: Add dq29 delay of 5 delay units,6: Add dq29 delay of 6 delay units,7: Add dq29 delay of 7 delay units"
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|
bitfld.long 0x00 16.--18. "rd_dq28_del,Read dqs3 to dq28 delay fine-tuning" "0: No change in dq28 delay,1: Add dq28 delay of 1 delay unit,2: Add dq28 delay of 2 delay units,3: Add dq28 delay of 3 delay units,4: Add dq28 delay of 4 delay units,5: Add dq28 delay of 5 delay units,6: Add dq28 delay of 6 delay units,7: Add dq28 delay of 7 delay units"
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|
newline
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bitfld.long 0x00 12.--14. "rd_dq27_del,Read dqs3 to dq27 delay fine-tuning" "0: No change in dq27 delay,1: Add dq27 delay of 1 delay unit,2: Add dq27 delay of 2 delay units,3: Add dq27 delay of 3 delay units,4: Add dq27 delay of 4 delay units,5: Add dq27 delay of 5 delay units,6: Add dq27 delay of 6 delay units,7: Add dq27 delay of 7 delay units"
|
|
bitfld.long 0x00 8.--10. "rd_dq26_del,Read dqs3 to dq26 delay fine-tuning" "0: No change in dq26 delay,1: Add dq26 delay of 1 delay unit,2: Add dq26 delay of 2 delay units,3: Add dq26 delay of 3 delay units,4: Add dq26 delay of 4 delay units,5: Add dq26 delay of 5 delay units,6: Add dq26 delay of 6 delay units,7: Add dq26 delay of 7 delay units"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "rd_dq25_del,Read dqs3 to dq25 delay fine-tuning" "0: No change in dq25 delay,1: Add dq25 delay of 1 delay unit,2: Add dq25 delay of 2 delay units,3: Add dq25 delay of 3 delay units,4: Add dq25 delay of 4 delay units,5: Add dq25 delay of 5 delay units,6: Add dq25 delay of 6 delay units,7: Add dq25 delay of 7 delay units"
|
|
bitfld.long 0x00 0.--2. "rd_dq24_del,Read dqs3 to dq24 delay fine-tuning" "0: No change in dq24 delay,1: Add dq24 delay of 1 delay unit,2: Add dq24 delay of 2 delay units,3: Add dq24 delay of 3 delay units,4: Add dq24 delay of 4 delay units,5: Add dq24 delay of 5 delay units,6: Add dq24 delay of 6 delay units,7: Add dq24 delay of 7 delay units"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x83C++0x03
|
|
line.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS Gating Control Register 0"
|
|
bitfld.long 0x00 31. "RST_RD_FIFO,Reset Read Data FIFO and associated pointers" "0,1"
|
|
endif
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "MPRDDLCTL,MMDC PHY Read delay-lines Configuration Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "RD_DL_ABS_OFFSET3,Absolute read delay offset for Byte3"
|
|
hexmask.long.byte 0x00 16.--22. 1. "RD_DL_ABS_OFFSET2,Absolute read delay offset for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "RD_DL_ABS_OFFSET1,Absolute read delay offset for Byte1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "RD_DL_ABS_OFFSET0,Absolute read delay offset for Byte0"
|
|
rgroup.long 0x84C++0x03
|
|
line.long 0x00 "MPRDDLST,MMDC PHY Read delay-lines Status Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "RD_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by read delay-line 3"
|
|
hexmask.long.byte 0x00 16.--22. 1. "RD_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by read delay-line 2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "RD_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by read delay-line 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "RD_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by read delay-line 0"
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "MPWRDLCTL,MMDC PHY Write delay-lines Configuration Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "WR_DL_ABS_OFFSET3,Absolute write delay offset for Byte3"
|
|
hexmask.long.byte 0x00 16.--22. 1. "WR_DL_ABS_OFFSET2,Absolute write delay offset for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "WR_DL_ABS_OFFSET1,Absolute write delay offset for Byte1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "WR_DL_ABS_OFFSET0,Absolute write delay offset for Byte0"
|
|
rgroup.long 0x854++0x03
|
|
line.long 0x00 "MPWRDLST,MMDC PHY Write delay-lines Status Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "WR_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by write delay-line 3"
|
|
hexmask.long.byte 0x00 16.--22. 1. "WR_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by write delay-line 2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "WR_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by write delay-line 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "WR_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by write delay-line 0"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "MPSDCTRL,MMDC PHY CK Control Register"
|
|
bitfld.long 0x00 8.--9. "SDclk0_del,DDR clock0 delay fine tuning" "0: No change in DDR clock0 delay,1: Add DDR clock0 delay of 1 delay unit,2: Add DDR clock0 delay of 2 delay units,3: Add DDR clock0 delay of 3 delay units"
|
|
endif
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "MPZQLP2CTL,MMDC ZQ LPDDR2 HW Control Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "ZQ_LP2_HW_ZQCS,This register defines the period in cycles that it takes the memory device to perform a short ZQ calibration"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ZQ_LP2_HW_ZQCL,This register defines the period in cycles that it takes the memory device to perform a long ZQ calibration"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "ZQ_LP2_HW_ZQINIT,This register defines the period in cycles that it takes the memory device to perform a Init ZQ calibration"
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "MPRDDLHWCTL,MMDC PHY Read Delay HW Calibration Control Register"
|
|
bitfld.long 0x00 5. "HW_RD_DL_CMP_CYC,Automatic (HW) read sample cycle" "0,1"
|
|
bitfld.long 0x00 4. "HW_RD_DL_EN,Enable automatic (HW) read calibration" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 3. "HW_RD_DL_ERR3,Automatic (HW) read calibration error of Byte3" "0: No error was found in read delay-line 3..,1: An error was found in read delay-line 3.."
|
|
rbitfld.long 0x00 2. "HW_RD_DL_ERR2,Automatic (HW) read calibration error of Byte2" "0: No error was found in read delay-line 2..,1: An error was found in read delay-line 2.."
|
|
newline
|
|
rbitfld.long 0x00 1. "HW_RD_DL_ERR1,Automatic (HW) read calibration error of Byte1" "0: No error was found in read delay-line 1..,1: An error was found in read delay-line 1.."
|
|
rbitfld.long 0x00 0. "HW_RD_DL_ERR0,Automatic (HW) read calibration error of Byte0" "0: No error was found in read delay-line 0..,1: An error was found in read delay-line 0.."
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "MPWRDLHWCTL,MMDC PHY Write Delay HW Calibration Control Register"
|
|
bitfld.long 0x00 5. "HW_WR_DL_CMP_CYC,Write sample cycle" "0,1"
|
|
bitfld.long 0x00 4. "HW_WR_DL_EN,Enable automatic (HW) write calibration" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 3. "HW_WR_DL_ERR3,Automatic (HW) write calibration error of Byte3" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
rbitfld.long 0x00 2. "HW_WR_DL_ERR2,Automatic (HW) write calibration error of Byte2" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x00 1. "HW_WR_DL_ERR1,Automatic (HW) write calibration error of Byte1" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
rbitfld.long 0x00 0. "HW_WR_DL_ERR0,Automatic (HW) write calibration error of Byte0" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
rgroup.long 0x868++0x03
|
|
line.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0"
|
|
hexmask.long.byte 0x00 24.--30. 1. "HW_RD_DL_UP1,Automatic (HW) read calibration result of the upper boundary of Byte1"
|
|
hexmask.long.byte 0x00 16.--22. 1. "HW_RD_DL_LOW1,Automatic (HW) read calibration result of the lower boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "HW_RD_DL_UP0,Automatic (HW) read calibration result of the upper boundary of Byte0"
|
|
hexmask.long.byte 0x00 0.--6. 1. "HW_RD_DL_LOW0,Automatic (HW) read calibration result of the lower boundary of Byte0"
|
|
rgroup.long 0x86C++0x03
|
|
line.long 0x00 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1"
|
|
hexmask.long.byte 0x00 24.--30. 1. "HW_RD_DL_UP3,Automatic (HW) read calibration result of the upper boundary of Byte3"
|
|
hexmask.long.byte 0x00 16.--22. 1. "HW_RD_DL_LOW3,Automatic (HW) read calibration result of the lower boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "HW_RD_DL_UP2,Automatic (HW) read calibration result of the upper boundary of Byte2"
|
|
hexmask.long.byte 0x00 0.--6. 1. "HW_RD_DL_LOW2,Automatic (HW) read calibration result of the lower boundary of Byte2"
|
|
rgroup.long 0x870++0x03
|
|
line.long 0x00 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0"
|
|
hexmask.long.byte 0x00 24.--30. 1. "HW_WR_DL_UP1,Automatic (HW) write automatic (HW) write calibration result of the upper boundary of Byte1"
|
|
hexmask.long.byte 0x00 16.--22. 1. "HW_WR_DL_LOW1,Automatic (HW) write calibration result of the lower boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "HW_WR_DL_UP0,Automatic (HW) write calibration result of the upper boundary of Byte0"
|
|
hexmask.long.byte 0x00 0.--6. 1. "HW_WR_DL_LOW0,Automatic (HW) write calibration result of the lower boundary of Byte0"
|
|
rgroup.long 0x874++0x03
|
|
line.long 0x00 "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1"
|
|
hexmask.long.byte 0x00 24.--30. 1. "HW_WR_DL_UP3,Automatic (HW) write calibration result of the upper boundary of Byte3"
|
|
hexmask.long.byte 0x00 16.--22. 1. "HW_WR_DL_LOW3,Automatic (HW) write calibration result of the lower boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "HW_WR_DL_UP2,Automatic (HW) write calibration result of the upper boundary of Byte2"
|
|
hexmask.long.byte 0x00 0.--6. 1. "HW_WR_DL_LOW2,Automatic (HW) write calibration result of the lower boundary of Byte2"
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. "PDV2,MMDC Pre defined compare value2"
|
|
hexmask.long.word 0x00 0.--15. 1. "PDV1,MMDC Pre defined compare value2"
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA delay-line Configuration Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "PHY_CA_DL_UNIT,This field reflects the number of delay units that are actually used by CA(Command/Address of LPDDR2) delay-line"
|
|
hexmask.long.byte 0x00 16.--22. 1. "CA_DL_ABS_OFFSET,Absolute CA (Command/Address of LPDDRR2) offset"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "ZQ_PU_OFFSET,Programmable offset from -7 to 7 added to the MMDC_MPZQHWCTRL[ZQ_HW_PU_RES] field when ZQ_OFFSET_EN is enabled" "0: ZQ_PU_OFFSET_0,1: ZQ_PU_OFFSET_1,2: ZQ_PU_OFFSET_2,3: ZQ_PU_OFFSET_3,4: ZQ_PU_OFFSET_4,5: ZQ_PU_OFFSET_5,6: ZQ_PU_OFFSET_6,7: ZQ_PU_OFFSET_7,8: Offset is subtracted from ZQ_HW_PU_RES field,9: Offset is subtracted from ZQ_HW_PU_RES field,10: Offset is subtracted from ZQ_HW_PU_RES field,11: Offset is subtracted from ZQ_HW_PU_RES field,12: Offset is subtracted from ZQ_HW_PU_RES field,13: Offset is subtracted from ZQ_HW_PU_RES field,14: Offset is subtracted from ZQ_HW_PU_RES field,15: Offset is subtracted from ZQ_HW_PU_RES field"
|
|
bitfld.long 0x00 4.--7. "ZQ_PD_OFFSET,Programmable offset from -7 to 7 added to the MMDC_MPZQHWCTRL[ZQ_HW_PD_RES] field when ZQ_OFFSET_EN is enabled" "0: ZQ_PD_OFFSET_0,1: ZQ_PD_OFFSET_1,2: ZQ_PD_OFFSET_2,3: ZQ_PD_OFFSET_3,4: ZQ_PD_OFFSET_4,5: ZQ_PD_OFFSET_5,6: ZQ_PD_OFFSET_6,7: ZQ_PD_OFFSET_7,8: Offset is subtracted from ZQ_HW_PD_RES field,9: Offset is subtracted from ZQ_HW_PD_RES field,10: Offset is subtracted from ZQ_HW_PD_RES field,11: Offset is subtracted from ZQ_HW_PD_RES field,12: Offset is subtracted from ZQ_HW_PD_RES field,13: Offset is subtracted from ZQ_HW_PD_RES field,14: Offset is subtracted from ZQ_HW_PD_RES field,15: Offset is subtracted from ZQ_HW_PD_RES field"
|
|
newline
|
|
bitfld.long 0x00 3. "ZQ_OFFSET_EN,ZQ Offset Enable" "0: Hardware ZQ offset disabled,1: Hardware ZQ offset enabled"
|
|
bitfld.long 0x00 2. "READ_LEVEL_PATTERN,DQ calibration (LPDDR2/LPDDR3) read compare pattern" "0: Compare with read pattern 1010,1: Compare with read pattern 0011 (Used only in.."
|
|
newline
|
|
bitfld.long 0x00 1. "MPR_FULL_CMP,DQ calibration (LPDDR2/LPDDR3) full compare enable" "0,1"
|
|
bitfld.long 0x00 0. "MPR_CMP,DQ calibration (LPDDR2/LPDDR3) compare enable" "0,1"
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "MPSWDAR0,MMDC PHY SW Dummy Access Register"
|
|
rbitfld.long 0x00 5. "SW_DUM_CMP3,SW dummy read byte3 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
rbitfld.long 0x00 4. "SW_DUM_CMP2,SW dummy read byte2 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x00 3. "SW_DUM_CMP1,SW dummy read byte1 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
rbitfld.long 0x00 2. "SW_DUM_CMP0,SW dummy read byte0 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
bitfld.long 0x00 1. "SW_DUMMY_RD,SW dummy" "0,1"
|
|
bitfld.long 0x00 0. "SW_DUMMY_WR,SW dummy" "0,1"
|
|
rgroup.long 0x898++0x03
|
|
line.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD0,Dummy read data0"
|
|
rgroup.long 0x89C++0x03
|
|
line.long 0x00 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD1,Dummy read data1"
|
|
rgroup.long 0x8A0++0x03
|
|
line.long 0x00 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD2,Dummy read data2"
|
|
rgroup.long 0x8A4++0x03
|
|
line.long 0x00 "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD3,Dummy read data3"
|
|
rgroup.long 0x8A8++0x03
|
|
line.long 0x00 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD4,Dummy read data4"
|
|
rgroup.long 0x8AC++0x03
|
|
line.long 0x00 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD5,Dummy read data5"
|
|
rgroup.long 0x8B0++0x03
|
|
line.long 0x00 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD6,Dummy read data6"
|
|
rgroup.long 0x8B4++0x03
|
|
line.long 0x00 "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7"
|
|
hexmask.long 0x00 0.--31. 1. "DUM_RD7,Dummy read data7"
|
|
group.long 0x8B8++0x03
|
|
line.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register"
|
|
hexmask.long.word 0x00 16.--25. 1. "MU_UNIT_DEL_NUM,Number of delay units measured per cycle"
|
|
bitfld.long 0x00 11. "FRC_MSR,Force measurement on delay-lines" "0: No measurement is performed,1: Perform measurement process"
|
|
newline
|
|
bitfld.long 0x00 10. "MU_BYP_EN,Measure unit bypass enable" "0: The delay-lines use delay units as indicated..,1: The delay-lines use delay units as indicated.."
|
|
hexmask.long.word 0x00 0.--9. 1. "MU_BYP_VAL,Number of delay units for measurement bypass"
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "MPDCCR,MMDC Duty Cycle Control Register"
|
|
bitfld.long 0x00 28.--30. "RD_DQS3_FT_DCC,Read DQS duty cycle fine tuning control of Byte3" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
bitfld.long 0x00 25.--27. "RD_DQS2_FT_DCC,Read DQS duty cycle fine tuning control of Byte2" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
newline
|
|
bitfld.long 0x00 22.--24. "RD_DQS1_FT_DCC,Read DQS duty cycle fine tuning control of Byte1" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
bitfld.long 0x00 19.--21. "RD_DQS0_FT_DCC,Read DQS duty cycle fine tuning control of Byte0" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "CK_FT1_DCC,Secondary duty cycle fine tuning control of DDR clock" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?..."
|
|
bitfld.long 0x00 12.--14. "CK_FT0_DCC,Primary duty cycle fine tuning control of DDR clock" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?..."
|
|
newline
|
|
bitfld.long 0x00 9.--11. "WR_DQS3_FT_DCC,Write DQS duty cycle fine tuning control of Byte0" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
bitfld.long 0x00 6.--8. "WR_DQS2_FT_DCC,Write DQS duty cycle fine tuning control of Byte1" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
newline
|
|
bitfld.long 0x00 3.--5. "WR_DQS1_FT_DCC,Write DQS duty cycle fine tuning control of Byte1" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
bitfld.long 0x00 0.--2. "WR_DQS0_FT_DCC,Write DQS duty cycle fine tuning control of Byte0" "?,1: 51.5% low 48.5% high,2: 50% duty cycle (default),?,4: 48.5% low 51.5% high,?..."
|
|
tree.end
|
|
tree "IOMUXC1 (IOMUXC1 Register Index)"
|
|
base ad:0x40AC0000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTC$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTC$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 12. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C )
|
|
group.long ($2+0x50)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 12. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C )
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTD$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "12" "13" "14" "15" "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0xB0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 4. (strings "28" "29" "30" "31" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0xF0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTE$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "32" "33" "34" "35" "36" "37" "38" "39" "40" "41" "42" "43" "44" "45" "46" "47" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x140)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x180)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTF$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x1C0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTF$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSDHC1_IPP_WP_ON,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x204)++0x03
|
|
line.long 0x00 "_SELECT_INPUTD_IP_FLEXIO_SYN1_IPP_IND_FLEXIO$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART4_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART4_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART4_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART5_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART5_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART5_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x25C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART6_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART6_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART6_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART7_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x26C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART7_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART7_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C4_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C4_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x27C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C4_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 6. (strings "0" "1" "2" "3" "4" "5" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 )
|
|
group.long ($2+0x280)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM4_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x298++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM4_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x29C)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_PCS$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2AC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_SCK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2B0++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_SDI,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2B4++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_SDO,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2B8++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C5_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2BC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C5_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C5_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x04 )
|
|
group.long ($2+0x2C4)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM5_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2CC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM5_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x04 )
|
|
group.long ($2+0x2D0)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM6_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2D8++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM6_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 6. (strings "0" "1" "2" "3" "4" "5" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 )
|
|
group.long ($2+0x2DC)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM7_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2F4++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM7_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2F8++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C6_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2FC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C6_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C6_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C7_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C7_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x30C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C7_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x310)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_PCS$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_SCK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x324++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_SDI,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x328++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_SDO,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x32C++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSDHC1_IPP_CARD_DET,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSBO2_ULP1_IPP_IND_OTG_OC,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x334++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSBO2_ULP1_IPP_IND_OTG2_OC,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x338++0x03
|
|
line.long 0x00 "_SELECT_INPUTDA_IP_HS_USB2PHY_28FDSOI_USB_ID,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x33C++0x03
|
|
line.long 0x00 "_SELECT_INPUTVIDEO_IN_IPP_IND_DE,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESET1_b,SW_MUX_CTL_PAD_RESET1_b SW MUX Control Register"
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
newline
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
newline
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
tree.end
|
|
tree "IOMUXC1_DDR (IOMUXC1_DDR Register Index)"
|
|
base ad:0x40AD0000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ0,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x4 )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ2,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "2" "3" )(list 0x0 0x4 )
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ3,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ4,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ4,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ5,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "5" "6" )(list 0x0 0x4 )
|
|
group.long ($2+0x14)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ6,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ7,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "7" "8" )(list 0x0 0x4 )
|
|
group.long ($2+0x1C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "8" "9" )(list 0x0 0x4 )
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "9" "10" )(list 0x0 0x4 )
|
|
group.long ($2+0x24)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ10,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ11,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "11" "12" )(list 0x0 0x4 )
|
|
group.long ($2+0x2C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ12,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ13,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "13" "14" )(list 0x0 0x4 )
|
|
group.long ($2+0x34)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ14,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ15,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "15" "16" )(list 0x0 0x4 )
|
|
group.long ($2+0x3C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "16" "17" )(list 0x0 0x4 )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ17,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ18,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ18,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ19,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ19,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ20,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ20,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ21,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ21,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ22,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ22,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ23,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ23,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ24,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "24" "25" )(list 0x0 0x4 )
|
|
group.long ($2+0x60)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ$1,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ25,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ26,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ26,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ27,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ27,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ28,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ28,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ29,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ29,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ30,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ30,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ31,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQ31,SW_PAD_CTL_PAD_DDR_DQn SW PAD Control Register"
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS0,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_no_output_crosspoint_Vix_change,1: CRPOINT_TRIM_1_100mV_Vix_shift_down,2: CRPOINT_TRIM_2_100mV_Vix_shift_up,3: CRPOINT_TRIM_3_200mV_Vix_shift_up"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS0,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_right_shrink,2: DCYCLE_TRIM_2_left_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_No_adjustment,1: CRPOINT_TRIM_1__70_mV,2: CRPOINT_TRIM_2__70_mV,3: CRPOINT_TRIM_3__140_mV"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS1,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_no_output_crosspoint_Vix_change,1: CRPOINT_TRIM_1_100mV_Vix_shift_down,2: CRPOINT_TRIM_2_100mV_Vix_shift_up,3: CRPOINT_TRIM_3_200mV_Vix_shift_up"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS1,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_right_shrink,2: DCYCLE_TRIM_2_left_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_No_adjustment,1: CRPOINT_TRIM_1__70_mV,2: CRPOINT_TRIM_2__70_mV,3: CRPOINT_TRIM_3__140_mV"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS2,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_no_output_crosspoint_Vix_change,1: CRPOINT_TRIM_1_100mV_Vix_shift_down,2: CRPOINT_TRIM_2_100mV_Vix_shift_up,3: CRPOINT_TRIM_3_200mV_Vix_shift_up"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "2" "3" )(list 0x0 0x4 )
|
|
group.long ($2+0x88)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS$1,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_right_shrink,2: DCYCLE_TRIM_2_left_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_No_adjustment,1: CRPOINT_TRIM_1__70_mV,2: CRPOINT_TRIM_2__70_mV,3: CRPOINT_TRIM_3__140_mV"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQS3,SW_PAD_CTL_PAD_DDR_DQSn SW PAD Control Register"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_no_output_crosspoint_Vix_change,1: CRPOINT_TRIM_1_100mV_Vix_shift_down,2: CRPOINT_TRIM_2_100mV_Vix_shift_up,3: CRPOINT_TRIM_3_200mV_Vix_shift_up"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQM0,SW_PAD_CTL_PAD_DDR_DQMn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x4 )
|
|
group.long ($2+0x90)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQM$1,SW_PAD_CTL_PAD_DDR_DQMn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "1" "2" )(list 0x0 0x4 )
|
|
group.long ($2+0x94)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQM$1,SW_PAD_CTL_PAD_DDR_DQMn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQM2,SW_PAD_CTL_PAD_DDR_DQMn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQM3,SW_PAD_CTL_PAD_DDR_DQMn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_DQM3,SW_PAD_CTL_PAD_DDR_DQMn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA0,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA0,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA1,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA1,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA2,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA2,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA3,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "3" "4" )(list 0x0 0x4 )
|
|
group.long ($2+0xAC)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA$1,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA4,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA5,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA5,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA6,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "6" "7" )(list 0x0 0x4 )
|
|
group.long ($2+0xB8)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA$1,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "7" "8" )(list 0x0 0x4 )
|
|
group.long ($2+0xBC)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA$1,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "8" "9" )(list 0x0 0x4 )
|
|
group.long ($2+0xC0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA$1,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CA9,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CS0_B,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CS0_B,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CS1_B,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CS1_B,SW_PAD_CTL_PAD_DDR_n SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CKE0,SW_PAD_CTL_PAD_DDR_CKEn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CKE0,SW_PAD_CTL_PAD_DDR_CKEn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CKE1,SW_PAD_CTL_PAD_DDR_CKEn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CKE1,SW_PAD_CTL_PAD_DDR_CKEn SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
newline
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CLK0,SW_PAD_CTL_PAD_DDR_CLK0 SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_right_shrink,2: DCYCLE_TRIM_2_left_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_No_adjustment,1: CRPOINT_TRIM_1__70_mV,2: CRPOINT_TRIM_2__70_mV,3: CRPOINT_TRIM_3__140_mV"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_CLK0,SW_PAD_CTL_PAD_DDR_CLK0 SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
bitfld.long 0x00 10.--11. "CRPOINT_TRIM,Crosspoint Adjustment Field" "0: CRPOINT_TRIM_0_no_output_crosspoint_Vix_change,1: CRPOINT_TRIM_1_100mV_Vix_shift_down,2: CRPOINT_TRIM_2_100mV_Vix_shift_up,3: CRPOINT_TRIM_3_200mV_Vix_shift_up"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_ODT,SW_PAD_CTL_PAD_DDR_ODT SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_ODT,SW_PAD_CTL_PAD_DDR_ODT SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x4 )
|
|
group.long ($2+0xE0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_DDR_ZQ$1,SW_PAD_CTL_PAD_DDR_ZQn SW PAD Control Register"
|
|
bitfld.long 0x00 17.--18. "DDR_SELECT,DDR Select Field" "0: DDR_SELECT_0_DDR3_MODE,?,2: DDR_SELECT_2_LPDDR2_LPDDR3,3: DDR_SELECT_3_HSIC_USB mode"
|
|
repeat.end
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_HSIC_DATA,SW_PAD_CTL_PAD_HSIC_DATA SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 17.--18. "DDR_SELECT,DDR Select Field" "0: DDR_SELECT_0_DDR3_MODE,?,2: DDR_SELECT_2_LPDDR2_LPDDR3,3: DDR_SELECT_3_HSIC_USB mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_HSIC_DATA,SW_PAD_CTL_PAD_HSIC_DATA SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 17.--18. "DDR_SELECT,DDR Select Field" "0: DDR_SELECT_0_DDR3_MODE,?,2: DDR_SELECT_2_LPDDR2_LPDDR3,3: DDR_SELECT_3_HSIC_USB mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_HSIC_STROBE,SW_PAD_CTL_PAD_HSIC_STROBE SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 17.--18. "DDR_SELECT,DDR Select Field" "0: DDR_SELECT_0_DDR3_MODE,?,2: DDR_SELECT_2_LPDDR2_LPDDR3,3: DDR_SELECT_3_HSIC_USB mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_duty_cycle_change,1: DCYCLE_TRIM_1_duty_cycle_increased,2: DCYCLE_TRIM_2_duty_cycle_decreased,3: DCYCLE_TRIM_3_no_duty_cycle_change"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_HSIC_STROBE,SW_PAD_CTL_PAD_HSIC_STROBE SW PAD Control Register"
|
|
bitfld.long 0x00 19.--21. "DDR_ODT,On Die Termination Select Field" "0: DDR_ODT_0_No_Termination,1: DDR_ODT_1_120_Ohm,2: DDR_ODT_2_60_Ohm,3: DDR_ODT_3_40_Ohm,4: DDR_ODT_4_30_Ohm,5: DDR_ODT_5_24_Ohm,6: DDR_ODT_6_20_Ohm,7: DDR_ODT_7_17_Ohm"
|
|
bitfld.long 0x00 17.--18. "DDR_SELECT,DDR Select Field" "0: DDR_SELECT_0_DDR3_MODE,?,2: DDR_SELECT_2_LPDDR2_LPDDR3,3: DDR_SELECT_3_HSIC_USB mode"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "DDR_TRIM,Output Driver Delay Trim Field" "0: DDR_TRIM_0_0pS,1: DDR_TRIM_1_50pS,2: DDR_TRIM_2_100pS,3: DDR_TRIM_3_150pS"
|
|
bitfld.long 0x00 12.--13. "DCYCLE_TRIM,Duty Cycle Control Field" "0: DCYCLE_TRIM_0_no_pulse_shrink,1: DCYCLE_TRIM_1_left_shrink,2: DCYCLE_TRIM_2_right_shrink,3: DCYCLE_TRIM_3_right_shrink"
|
|
newline
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
endif
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_PUE,SW_PAD_CTL_GRP_PUE SW GRP Register"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_PUE_DAT,SW_PAD_CTL_GRP_PUE_DAT SW GRP Register"
|
|
bitfld.long 0x00 2. "PUE,Pull Up/Down or Keeper Selection Field" "0: PUE_0_Keeper_Selected,1: PUE_1_Pull_Up_Down_Selected"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_PKE,SW_PAD_CTL_GRP_PKE SW GRP Register"
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_PKE_DAT,SW_PAD_CTL_GRP_PKE_DAT SW GRP Register"
|
|
bitfld.long 0x00 3. "PKE,Pull Up/Pull Down/Keeper Enable Field" "0: PKE_0_Pull_Up_Down_and_Keeper_Disabled,1: PKE_1_Pull_Up_Down_or_Keeper_Enabled"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_PUS,SW_PAD_CTL_GRP_PUS SW GRP Register"
|
|
bitfld.long 0x00 4.--5. "PUS,Pull Up/Down Resistance Select Field" "0: PUS_0_100_kOhm_Pull_Down,1: PUS_1_47_Kohm_Pull_Up,2: PUS_2_100_kOhm_Pull_Up,3: PUS_3_22_kOhm_Pull_Up"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DS_ADDR,SW_PAD_CTL_GRP_DS_ADDR SW GRP Register"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DS_CTRL,SW_PAD_CTL_GRP_DS_CTRL SW GRP Register"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DS_DAT0,SW_PAD_CTL_GRP_DS_DAT0 SW GRP Register"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DS_DAT1,SW_PAD_CTL_GRP_DS_DAT1 SW GRP Register"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DS_DAT2,SW_PAD_CTL_GRP_DS_DAT2 SW GRP Register"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DS_DAT3,SW_PAD_CTL_GRP_DS_DAT3 SW GRP Register"
|
|
bitfld.long 0x00 6.--8. "DSE,Output Drive Strength Select Field" "0: DSE_0_Driver_Disabled,1: DSE_1_240_Ohm,2: DSE_2_240_Ohm_2___120_Ohm,3: DSE_3_240_3__80_Ohm,4: DSE_4_240_4___60_Ohm,5: DSE_5_240_5___48_Ohm,6: DSE_6_240_6___40_Ohm,7: DSE_7_240_7___34_Ohm"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_HYS,SW_PAD_CTL_GRP_HYS SW GRP Register"
|
|
bitfld.long 0x00 9. "HYS,Input Hysteresis Field" "0: HYS_0_CMOS_input,1: HYS_1_Schmitt_trigger_input"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_INSEL_DAT,SW_PAD_CTL_GRP_INSEL_DAT SW GRP Register"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_INSEL_DQS,SW_PAD_CTL_GRP_INSEL_DQS SW GRP Register"
|
|
bitfld.long 0x00 16. "DDR_INPUT,DDR/CMOS Input Select Field" "0: DDR_INPUT_0_CMOS_input_type,1: DDR_INPUT_1_Differential_input_mode"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "SW_PAD_CTL_GRP_DDRTYPE,SW_PAD_CTL_GRP_DDRTYPE SW GRP Register"
|
|
bitfld.long 0x00 17.--18. "DDR_SELECT,DDR Select Field" "0: DDR_SELECT_0_DDR3_MODE,?,2: DDR_SELECT_2_LPDDR2_LPDDR3,3: DDR_SELECT_3_HSIC_USB mode"
|
|
tree.end
|
|
tree "PORT"
|
|
tree "PORTD"
|
|
base ad:0x40AF0000
|
|
repeat 12. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
tree.end
|
|
tree "PORTE"
|
|
base ad:0x40B00000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
tree.end
|
|
tree "PORTA"
|
|
base ad:0x4103F000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
tree.end
|
|
tree "PORTB"
|
|
base ad:0x41040000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
tree.end
|
|
tree "PORTC"
|
|
base ad:0x40AE0000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
tree.end
|
|
tree "PORTF"
|
|
base ad:0x40B10000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "PCR$1,Pin Control Register $1"
|
|
eventfld.long 0x00 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected,1: no description available"
|
|
bitfld.long 0x00 16.--19. "IRQC,Interrupt Configuration" "0: Interrupt Status Flag (ISF) is disabled,1: ISF flag and DMA request on rising edge,2: ISF flag and DMA request on falling edge,3: ISF flag and DMA request on either edge,?,5: no description available,6: no description available,7: no description available,8: ISF flag and Interrupt when logic 0,9: ISF flag and Interrupt on rising-edge,10: ISF flag and Interrupt on falling-edge,11: ISF flag and Interrupt on either edge,12: ISF flag and Interrupt when logic 1,13: no description available,14: no description available,?..."
|
|
repeat.end
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
tree.end
|
|
tree.end
|
|
tree "DMA"
|
|
repeat 2. (list 0. 1.) (list ad:0x41008000 ad:0x40080000)
|
|
tree "DMA$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
rbitfld.long 0x00 31. "ACTIVE,DMA Active Status" "0: eDMA is idle,1: eDMA is executing a channel"
|
|
bitfld.long 0x00 17. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer"
|
|
newline
|
|
bitfld.long 0x00 16. "ECX,Error Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer in the.."
|
|
bitfld.long 0x00 10. "GRP1PRI,Channel Group 1 Priority" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "GRP0PRI,Channel Group 0 Priority" "0,1"
|
|
bitfld.long 0x00 7. "EMLM,Enable Minor Loop Mapping" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "CLM,Continuous Link Mode" "0: A minor loop channel link made to itself goes..,1: A minor loop channel link made to itself does.."
|
|
bitfld.long 0x00 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels"
|
|
newline
|
|
bitfld.long 0x00 4. "HOE,Halt On Error" "0: Normal operation,1: Any error causes the HALT bit to set"
|
|
bitfld.long 0x00 3. "ERGA,Enable Round Robin Group Arbitration" "0: Fixed priority arbitration is used for..,1: Round robin arbitration is used for selection.."
|
|
newline
|
|
bitfld.long 0x00 2. "ERCA,Enable Round Robin Channel Arbitration" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 1. "EDBG,Enable Debug" "0: no description available,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 0. "EBWR,Enable Buffered Writes" "0: no description available,1: no description available"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ES,Error Status Register"
|
|
bitfld.long 0x00 31. "VLD,VLD" "0: No ERR bits are set,1: At least one ERR bit is set indicating a.."
|
|
bitfld.long 0x00 16. "ECX,Transfer Canceled" "0: No canceled transfers,1: The last recorded entry was a canceled.."
|
|
newline
|
|
bitfld.long 0x00 15. "GPE,Group Priority Error" "0: No group priority error,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x00 14. "CPE,Channel Priority Error" "0: No channel priority error,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. "SAE,Source Address Error" "0: No source address configuration error,1: The last recorded error was a configuration.."
|
|
newline
|
|
bitfld.long 0x00 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x00 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: The last recorded error was a configuration.."
|
|
newline
|
|
bitfld.long 0x00 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x00 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x00 1. "SBE,Source Bus Error" "0: No source bus error,1: The last recorded error was a bus error on a.."
|
|
newline
|
|
bitfld.long 0x00 0. "DBE,Destination Bus Error" "0: No destination bus error,1: The last recorded error was a bus error on a.."
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ERQ,Enable Request Register"
|
|
bitfld.long 0x00 31. "ERQ31,Enable DMA Request 31" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
bitfld.long 0x00 30. "ERQ30,Enable DMA Request 30" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
newline
|
|
bitfld.long 0x00 29. "ERQ29,Enable DMA Request 29" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
bitfld.long 0x00 28. "ERQ28,Enable DMA Request 28" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
newline
|
|
bitfld.long 0x00 27. "ERQ27,Enable DMA Request 27" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
bitfld.long 0x00 26. "ERQ26,Enable DMA Request 26" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
newline
|
|
bitfld.long 0x00 25. "ERQ25,Enable DMA Request 25" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
|
bitfld.long 0x00 24. "ERQ24,Enable DMA Request 24" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 23. "ERQ23,Enable DMA Request 23" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 22. "ERQ22,Enable DMA Request 22" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 21. "ERQ21,Enable DMA Request 21" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
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bitfld.long 0x00 20. "ERQ20,Enable DMA Request 20" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 19. "ERQ19,Enable DMA Request 19" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 18. "ERQ18,Enable DMA Request 18" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 17. "ERQ17,Enable DMA Request 17" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 16. "ERQ16,Enable DMA Request 16" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 15. "ERQ15,Enable DMA Request 15" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
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bitfld.long 0x00 14. "ERQ14,Enable DMA Request 14" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 13. "ERQ13,Enable DMA Request 13" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
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bitfld.long 0x00 12. "ERQ12,Enable DMA Request 12" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 11. "ERQ11,Enable DMA Request 11" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
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bitfld.long 0x00 10. "ERQ10,Enable DMA Request 10" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 9. "ERQ9,Enable DMA Request 9" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 8. "ERQ8,Enable DMA Request 8" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 7. "ERQ7,Enable DMA Request 7" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
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bitfld.long 0x00 6. "ERQ6,Enable DMA Request 6" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 5. "ERQ5,Enable DMA Request 5" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
|
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bitfld.long 0x00 4. "ERQ4,Enable DMA Request 4" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 3. "ERQ3,Enable DMA Request 3" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 2. "ERQ2,Enable DMA Request 2" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 1. "ERQ1,Enable DMA Request 1" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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bitfld.long 0x00 0. "ERQ0,Enable DMA Request 0" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.."
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group.long 0x14++0x03
|
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line.long 0x00 "EEI,Enable Error Interrupt Register"
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bitfld.long 0x00 31. "EEI31,Enable Error Interrupt 31" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 30. "EEI30,Enable Error Interrupt 30" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 29. "EEI29,Enable Error Interrupt 29" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 28. "EEI28,Enable Error Interrupt 28" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 27. "EEI27,Enable Error Interrupt 27" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 26. "EEI26,Enable Error Interrupt 26" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 25. "EEI25,Enable Error Interrupt 25" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 24. "EEI24,Enable Error Interrupt 24" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 23. "EEI23,Enable Error Interrupt 23" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 22. "EEI22,Enable Error Interrupt 22" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 21. "EEI21,Enable Error Interrupt 21" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 20. "EEI20,Enable Error Interrupt 20" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 19. "EEI19,Enable Error Interrupt 19" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 18. "EEI18,Enable Error Interrupt 18" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 17. "EEI17,Enable Error Interrupt 17" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 16. "EEI16,Enable Error Interrupt 16" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 15. "EEI15,Enable Error Interrupt 15" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 14. "EEI14,Enable Error Interrupt 14" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 13. "EEI13,Enable Error Interrupt 13" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 12. "EEI12,Enable Error Interrupt 12" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 11. "EEI11,Enable Error Interrupt 11" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 10. "EEI10,Enable Error Interrupt 10" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 9. "EEI9,Enable Error Interrupt 9" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 8. "EEI8,Enable Error Interrupt 8" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 7. "EEI7,Enable Error Interrupt 7" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 6. "EEI6,Enable Error Interrupt 6" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 5. "EEI5,Enable Error Interrupt 5" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 4. "EEI4,Enable Error Interrupt 4" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 3. "EEI3,Enable Error Interrupt 3" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 2. "EEI2,Enable Error Interrupt 2" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 1. "EEI1,Enable Error Interrupt 1" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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bitfld.long 0x00 0. "EEI0,Enable Error Interrupt 0" "0: The error signal for corresponding channel..,1: The assertion of the error signal for.."
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wgroup.byte 0x18++0x00
|
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line.byte 0x00 "CEEI,Clear Enable Error Interrupt Register"
|
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bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x00 6. "CAEE,Clear All Enable Error Interrupts" "0: no description available,1: no description available"
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bitfld.byte 0x00 0.--4. "CEEI,Clear Enable Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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wgroup.byte 0x19++0x00
|
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line.byte 0x00 "SEEI,Set Enable Error Interrupt Register"
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bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x00 6. "SAEE,Sets All Enable Error Interrupts" "0: no description available,1: no description available"
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bitfld.byte 0x00 0.--4. "SEEI,Set Enable Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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wgroup.byte 0x1A++0x00
|
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line.byte 0x00 "CERQ,Clear Enable Request Register"
|
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bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
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bitfld.byte 0x00 6. "CAER,Clear All Enable Requests" "0: no description available,1: no description available"
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bitfld.byte 0x00 0.--4. "CERQ,Clear Enable Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.byte 0x1B++0x00
|
|
line.byte 0x00 "SERQ,Set Enable Request Register"
|
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bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
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bitfld.byte 0x00 6. "SAER,Set All Enable Requests" "0: no description available,1: no description available"
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bitfld.byte 0x00 0.--4. "SERQ,Set Enable Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.byte 0x1C++0x00
|
|
line.byte 0x00 "CDNE,Clear DONE Status Bit Register"
|
|
bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x00 6. "CADN,Clears All DONE Bits" "0: Clears only the TCDn_CSR[DONE] bit specified..,1: Clears all bits in TCDn_CSR[DONE]"
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bitfld.byte 0x00 0.--4. "CDNE,Clear DONE Bit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.byte 0x1D++0x00
|
|
line.byte 0x00 "SSRT,Set START Bit Register"
|
|
bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x00 6. "SAST,Set All START Bits (activates all channels)" "0: Set only the TCDn_CSR[START] bit specified in..,1: Set all bits in TCDn_CSR[START]"
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bitfld.byte 0x00 0.--4. "SSRT,Set START Bit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.byte 0x1E++0x00
|
|
line.byte 0x00 "CERR,Clear Error Register"
|
|
bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
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bitfld.byte 0x00 6. "CAEI,Clear All Error Indicators" "0: no description available,1: no description available"
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bitfld.byte 0x00 0.--4. "CERR,Clear Error Indicator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.byte 0x1F++0x00
|
|
line.byte 0x00 "CINT,Clear Interrupt Request Register"
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bitfld.byte 0x00 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
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bitfld.byte 0x00 6. "CAIR,Clear All Interrupt Requests" "0: no description available,1: no description available"
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bitfld.byte 0x00 0.--4. "CINT,Clear Interrupt Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INT,Interrupt Request Register"
|
|
eventfld.long 0x00 31. "INT31,Interrupt Request 31" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
|
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eventfld.long 0x00 30. "INT30,Interrupt Request 30" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 29. "INT29,Interrupt Request 29" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 28. "INT28,Interrupt Request 28" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 27. "INT27,Interrupt Request 27" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
|
|
eventfld.long 0x00 26. "INT26,Interrupt Request 26" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 25. "INT25,Interrupt Request 25" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 24. "INT24,Interrupt Request 24" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 23. "INT23,Interrupt Request 23" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
|
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eventfld.long 0x00 22. "INT22,Interrupt Request 22" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 21. "INT21,Interrupt Request 21" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 20. "INT20,Interrupt Request 20" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 19. "INT19,Interrupt Request 19" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 18. "INT18,Interrupt Request 18" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 17. "INT17,Interrupt Request 17" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
|
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eventfld.long 0x00 16. "INT16,Interrupt Request 16" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 15. "INT15,Interrupt Request 15" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 14. "INT14,Interrupt Request 14" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 13. "INT13,Interrupt Request 13" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 12. "INT12,Interrupt Request 12" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 11. "INT11,Interrupt Request 11" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 10. "INT10,Interrupt Request 10" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 9. "INT9,Interrupt Request 9" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
|
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eventfld.long 0x00 8. "INT8,Interrupt Request 8" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 7. "INT7,Interrupt Request 7" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 6. "INT6,Interrupt Request 6" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 5. "INT5,Interrupt Request 5" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 4. "INT4,Interrupt Request 4" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 3. "INT3,Interrupt Request 3" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 2. "INT2,Interrupt Request 2" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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eventfld.long 0x00 1. "INT1,Interrupt Request 1" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
|
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eventfld.long 0x00 0. "INT0,Interrupt Request 0" "0: The interrupt request for corresponding..,1: The interrupt request for corresponding.."
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group.long 0x2C++0x03
|
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line.long 0x00 "ERR,Error Register"
|
|
eventfld.long 0x00 31. "ERR31,Error In Channel 31" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 30. "ERR30,Error In Channel 30" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
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eventfld.long 0x00 29. "ERR29,Error In Channel 29" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
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eventfld.long 0x00 28. "ERR28,Error In Channel 28" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
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eventfld.long 0x00 27. "ERR27,Error In Channel 27" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 26. "ERR26,Error In Channel 26" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
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eventfld.long 0x00 25. "ERR25,Error In Channel 25" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 24. "ERR24,Error In Channel 24" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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eventfld.long 0x00 23. "ERR23,Error In Channel 23" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 22. "ERR22,Error In Channel 22" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
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eventfld.long 0x00 21. "ERR21,Error In Channel 21" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 20. "ERR20,Error In Channel 20" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 19. "ERR19,Error In Channel 19" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 18. "ERR18,Error In Channel 18" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 17. "ERR17,Error In Channel 17" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 16. "ERR16,Error In Channel 16" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 15. "ERR15,Error In Channel 15" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 14. "ERR14,Error In Channel 14" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 13. "ERR13,Error In Channel 13" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 12. "ERR12,Error In Channel 12" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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eventfld.long 0x00 11. "ERR11,Error In Channel 11" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 10. "ERR10,Error In Channel 10" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 9. "ERR9,Error In Channel 9" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 8. "ERR8,Error In Channel 8" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 7. "ERR7,Error In Channel 7" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 6. "ERR6,Error In Channel 6" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
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|
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eventfld.long 0x00 5. "ERR5,Error In Channel 5" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 4. "ERR4,Error In Channel 4" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x00 3. "ERR3,Error In Channel 3" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 2. "ERR2,Error In Channel 2" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x00 1. "ERR1,Error In Channel 1" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x00 0. "ERR0,Error In Channel 0" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "HRS,Hardware Request Status Register"
|
|
bitfld.long 0x00 31. "HRS31,Hardware Request Status Channel 31" "0: A hardware service request for channel 31 is..,1: A hardware service request for channel 31 is.."
|
|
bitfld.long 0x00 30. "HRS30,Hardware Request Status Channel 30" "0: A hardware service request for channel 30 is..,1: A hardware service request for channel 30 is.."
|
|
newline
|
|
bitfld.long 0x00 29. "HRS29,Hardware Request Status Channel 29" "0: A hardware service request for channel 29 is..,1: A hardware service request for channel 29 is.."
|
|
bitfld.long 0x00 28. "HRS28,Hardware Request Status Channel 28" "0: A hardware service request for channel 28 is..,1: A hardware service request for channel 28 is.."
|
|
newline
|
|
bitfld.long 0x00 27. "HRS27,Hardware Request Status Channel 27" "0: A hardware service request for channel 27 is..,1: A hardware service request for channel 27 is.."
|
|
bitfld.long 0x00 26. "HRS26,Hardware Request Status Channel 26" "0: A hardware service request for channel 26 is..,1: A hardware service request for channel 26 is.."
|
|
newline
|
|
bitfld.long 0x00 25. "HRS25,Hardware Request Status Channel 25" "0: A hardware service request for channel 25 is..,1: A hardware service request for channel 25 is.."
|
|
bitfld.long 0x00 24. "HRS24,Hardware Request Status Channel 24" "0: A hardware service request for channel 24 is..,1: A hardware service request for channel 24 is.."
|
|
newline
|
|
bitfld.long 0x00 23. "HRS23,Hardware Request Status Channel 23" "0: A hardware service request for channel 23 is..,1: A hardware service request for channel 23 is.."
|
|
bitfld.long 0x00 22. "HRS22,Hardware Request Status Channel 22" "0: A hardware service request for channel 22 is..,1: A hardware service request for channel 22 is.."
|
|
newline
|
|
bitfld.long 0x00 21. "HRS21,Hardware Request Status Channel 21" "0: A hardware service request for channel 21 is..,1: A hardware service request for channel 21 is.."
|
|
bitfld.long 0x00 20. "HRS20,Hardware Request Status Channel 20" "0: A hardware service request for channel 20 is..,1: A hardware service request for channel 20 is.."
|
|
newline
|
|
bitfld.long 0x00 19. "HRS19,Hardware Request Status Channel 19" "0: A hardware service request for channel 19 is..,1: A hardware service request for channel 19 is.."
|
|
bitfld.long 0x00 18. "HRS18,Hardware Request Status Channel 18" "0: A hardware service request for channel 18 is..,1: A hardware service request for channel 18 is.."
|
|
newline
|
|
bitfld.long 0x00 17. "HRS17,Hardware Request Status Channel 17" "0: A hardware service request for channel 17 is..,1: A hardware service request for channel 17 is.."
|
|
bitfld.long 0x00 16. "HRS16,Hardware Request Status Channel 16" "0: A hardware service request for channel 16 is..,1: A hardware service request for channel 16 is.."
|
|
newline
|
|
bitfld.long 0x00 15. "HRS15,Hardware Request Status Channel 15" "0: A hardware service request for channel 15 is..,1: A hardware service request for channel 15 is.."
|
|
bitfld.long 0x00 14. "HRS14,Hardware Request Status Channel 14" "0: A hardware service request for channel 14 is..,1: A hardware service request for channel 14 is.."
|
|
newline
|
|
bitfld.long 0x00 13. "HRS13,Hardware Request Status Channel 13" "0: A hardware service request for channel 13 is..,1: A hardware service request for channel 13 is.."
|
|
bitfld.long 0x00 12. "HRS12,Hardware Request Status Channel 12" "0: A hardware service request for channel 12 is..,1: A hardware service request for channel 12 is.."
|
|
newline
|
|
bitfld.long 0x00 11. "HRS11,Hardware Request Status Channel 11" "0: A hardware service request for channel 11 is..,1: A hardware service request for channel 11 is.."
|
|
bitfld.long 0x00 10. "HRS10,Hardware Request Status Channel 10" "0: A hardware service request for channel 10 is..,1: A hardware service request for channel 10 is.."
|
|
newline
|
|
bitfld.long 0x00 9. "HRS9,Hardware Request Status Channel 9" "0: A hardware service request for channel 9 is..,1: A hardware service request for channel 9 is.."
|
|
bitfld.long 0x00 8. "HRS8,Hardware Request Status Channel 8" "0: A hardware service request for channel 8 is..,1: A hardware service request for channel 8 is.."
|
|
newline
|
|
bitfld.long 0x00 7. "HRS7,Hardware Request Status Channel 7" "0: A hardware service request for channel 7 is..,1: A hardware service request for channel 7 is.."
|
|
bitfld.long 0x00 6. "HRS6,Hardware Request Status Channel 6" "0: A hardware service request for channel 6 is..,1: A hardware service request for channel 6 is.."
|
|
newline
|
|
bitfld.long 0x00 5. "HRS5,Hardware Request Status Channel 5" "0: A hardware service request for channel 5 is..,1: A hardware service request for channel 5 is.."
|
|
bitfld.long 0x00 4. "HRS4,Hardware Request Status Channel 4" "0: A hardware service request for channel 4 is..,1: A hardware service request for channel 4 is.."
|
|
newline
|
|
bitfld.long 0x00 3. "HRS3,Hardware Request Status Channel 3" "0: A hardware service request for channel 3 is..,1: A hardware service request for channel 3 is.."
|
|
bitfld.long 0x00 2. "HRS2,Hardware Request Status Channel 2" "0: A hardware service request for channel 2 is..,1: A hardware service request for channel 2 is.."
|
|
newline
|
|
bitfld.long 0x00 1. "HRS1,Hardware Request Status Channel 1" "0: A hardware service request for channel 1 is..,1: A hardware service request for channel 1 is.."
|
|
bitfld.long 0x00 0. "HRS0,Hardware Request Status Channel 0" "0: A hardware service request for channel 0 is..,1: A hardware service request for channel 0 is.."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "EARS,Enable Asynchronous Request in Stop Register"
|
|
bitfld.long 0x00 31. "EDREQ_31,Enable asynchronous DMA request in stop mode for channel 31" "0: Disable asynchronous DMA request for channel 31,1: Enable asynchronous DMA request for channel 31"
|
|
bitfld.long 0x00 30. "EDREQ_30,Enable asynchronous DMA request in stop mode for channel 30" "0: Disable asynchronous DMA request for channel 30,1: Enable asynchronous DMA request for channel 30"
|
|
newline
|
|
bitfld.long 0x00 29. "EDREQ_29,Enable asynchronous DMA request in stop mode for channel 29" "0: Disable asynchronous DMA request for channel 29,1: Enable asynchronous DMA request for channel 29"
|
|
bitfld.long 0x00 28. "EDREQ_28,Enable asynchronous DMA request in stop mode for channel 28" "0: Disable asynchronous DMA request for channel 28,1: Enable asynchronous DMA request for channel 28"
|
|
newline
|
|
bitfld.long 0x00 27. "EDREQ_27,Enable asynchronous DMA request in stop mode for channel 27" "0: Disable asynchronous DMA request for channel 27,1: Enable asynchronous DMA request for channel 27"
|
|
bitfld.long 0x00 26. "EDREQ_26,Enable asynchronous DMA request in stop mode for channel 26" "0: Disable asynchronous DMA request for channel 26,1: Enable asynchronous DMA request for channel 26"
|
|
newline
|
|
bitfld.long 0x00 25. "EDREQ_25,Enable asynchronous DMA request in stop mode for channel 25" "0: Disable asynchronous DMA request for channel 25,1: Enable asynchronous DMA request for channel 25"
|
|
bitfld.long 0x00 24. "EDREQ_24,Enable asynchronous DMA request in stop mode for channel 24" "0: Disable asynchronous DMA request for channel 24,1: Enable asynchronous DMA request for channel 24"
|
|
newline
|
|
bitfld.long 0x00 23. "EDREQ_23,Enable asynchronous DMA request in stop mode for channel 23" "0: Disable asynchronous DMA request for channel 23,1: Enable asynchronous DMA request for channel 23"
|
|
bitfld.long 0x00 22. "EDREQ_22,Enable asynchronous DMA request in stop mode for channel 22" "0: Disable asynchronous DMA request for channel 22,1: Enable asynchronous DMA request for channel 22"
|
|
newline
|
|
bitfld.long 0x00 21. "EDREQ_21,Enable asynchronous DMA request in stop mode for channel 21" "0: Disable asynchronous DMA request for channel 21,1: Enable asynchronous DMA request for channel 21"
|
|
bitfld.long 0x00 20. "EDREQ_20,Enable asynchronous DMA request in stop mode for channel 20" "0: Disable asynchronous DMA request for channel 20,1: Enable asynchronous DMA request for channel 20"
|
|
newline
|
|
bitfld.long 0x00 19. "EDREQ_19,Enable asynchronous DMA request in stop mode for channel 19" "0: Disable asynchronous DMA request for channel 19,1: Enable asynchronous DMA request for channel 19"
|
|
bitfld.long 0x00 18. "EDREQ_18,Enable asynchronous DMA request in stop mode for channel 18" "0: Disable asynchronous DMA request for channel 18,1: Enable asynchronous DMA request for channel 18"
|
|
newline
|
|
bitfld.long 0x00 17. "EDREQ_17,Enable asynchronous DMA request in stop mode for channel 17" "0: Disable asynchronous DMA request for channel 17,1: Enable asynchronous DMA request for channel 17"
|
|
bitfld.long 0x00 16. "EDREQ_16,Enable asynchronous DMA request in stop mode for channel 16" "0: Disable asynchronous DMA request for channel 16,1: Enable asynchronous DMA request for channel 16"
|
|
newline
|
|
bitfld.long 0x00 15. "EDREQ_15,Enable asynchronous DMA request in stop mode for channel 15" "0: Disable asynchronous DMA request for channel 15,1: Enable asynchronous DMA request for channel 15"
|
|
bitfld.long 0x00 14. "EDREQ_14,Enable asynchronous DMA request in stop mode for channel 14" "0: Disable asynchronous DMA request for channel 14,1: Enable asynchronous DMA request for channel 14"
|
|
newline
|
|
bitfld.long 0x00 13. "EDREQ_13,Enable asynchronous DMA request in stop mode for channel 13" "0: Disable asynchronous DMA request for channel 13,1: Enable asynchronous DMA request for channel 13"
|
|
bitfld.long 0x00 12. "EDREQ_12,Enable asynchronous DMA request in stop mode for channel 12" "0: Disable asynchronous DMA request for channel 12,1: Enable asynchronous DMA request for channel 12"
|
|
newline
|
|
bitfld.long 0x00 11. "EDREQ_11,Enable asynchronous DMA request in stop mode for channel 11" "0: Disable asynchronous DMA request for channel 11,1: Enable asynchronous DMA request for channel 11"
|
|
bitfld.long 0x00 10. "EDREQ_10,Enable asynchronous DMA request in stop mode for channel 10" "0: Disable asynchronous DMA request for channel 10,1: Enable asynchronous DMA request for channel 10"
|
|
newline
|
|
bitfld.long 0x00 9. "EDREQ_9,Enable asynchronous DMA request in stop mode for channel 9" "0: Disable asynchronous DMA request for channel 9,1: Enable asynchronous DMA request for channel 9"
|
|
bitfld.long 0x00 8. "EDREQ_8,Enable asynchronous DMA request in stop mode for channel 8" "0: Disable asynchronous DMA request for channel 8,1: Enable asynchronous DMA request for channel 8"
|
|
newline
|
|
bitfld.long 0x00 7. "EDREQ_7,Enable asynchronous DMA request in stop mode for channel 7" "0: Disable asynchronous DMA request for channel 7,1: Enable asynchronous DMA request for channel 7"
|
|
bitfld.long 0x00 6. "EDREQ_6,Enable asynchronous DMA request in stop mode for channel 6" "0: Disable asynchronous DMA request for channel 6,1: Enable asynchronous DMA request for channel 6"
|
|
newline
|
|
bitfld.long 0x00 5. "EDREQ_5,Enable asynchronous DMA request in stop mode for channel 5" "0: Disable asynchronous DMA request for channel 5,1: Enable asynchronous DMA request for channel 5"
|
|
bitfld.long 0x00 4. "EDREQ_4,Enable asynchronous DMA request in stop mode for channel 4" "0: Disable asynchronous DMA request for channel 4,1: Enable asynchronous DMA request for channel 4"
|
|
newline
|
|
bitfld.long 0x00 3. "EDREQ_3,Enable asynchronous DMA request in stop mode for channel 3" "0: Disable asynchronous DMA request for channel 3,1: Enable asynchronous DMA request for channel 3"
|
|
bitfld.long 0x00 2. "EDREQ_2,Enable asynchronous DMA request in stop mode for channel 2" "0: Disable asynchronous DMA request for channel 2,1: Enable asynchronous DMA request for channel 2"
|
|
newline
|
|
bitfld.long 0x00 1. "EDREQ_1,Enable asynchronous DMA request in stop mode for channel 1" "0: Disable asynchronous DMA request for channel 1,1: Enable asynchronous DMA request for channel 1"
|
|
bitfld.long 0x00 0. "EDREQ_0,Enable asynchronous DMA request in stop mode for channel 0" "0: Disable asynchronous DMA request for channel 0,1: Enable asynchronous DMA request for channel 0"
|
|
repeat 16. (strings "3" "2" "1" "0" "7" "6" "5" "4" "11" "10" "9" "8" "15" "14" "13" "12" )(list 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F )
|
|
group.byte ($2+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI$1,Channel Priority Register"
|
|
bitfld.byte 0x00 7. "ECP,Enable Channel Preemption" "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x00 6. "DPA,Disable Preempt Ability" "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel.."
|
|
newline
|
|
rbitfld.byte 0x00 4.--5. "GRPPRI,Channel n Current Group Priority" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. "CHPRI,Channel n Arbitration Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
repeat 16. (strings "19" "18" "17" "16" "23" "22" "21" "20" "27" "26" "25" "24" "31" "30" "29" "28" )(list 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F )
|
|
group.byte ($2+0x110)++0x00
|
|
line.byte 0x00 "DCHPRI$1,Channel Priority Register"
|
|
bitfld.byte 0x00 7. "ECP,Enable Channel Preemption" "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x00 6. "DPA,Disable Preempt Ability" "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel.."
|
|
newline
|
|
rbitfld.byte 0x00 4.--5. "GRPPRI,Channel n Current Group Priority" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. "CHPRI,Channel n Arbitration Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 32. (increment 0 1) (increment 0 0x01)
|
|
group.byte ($2+0x140)++0x00
|
|
line.byte 0x00 "DCHMID[$1],Channel n Master ID Register $1"
|
|
bitfld.byte 0x00 7. "EMI,Enable Master ID replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
rbitfld.byte 0x00 6. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
newline
|
|
rbitfld.byte 0x00 0.--3. "MID,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "TCD0_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1004++0x01
|
|
line.word 0x00 "TCD0_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1006++0x01
|
|
line.word 0x00 "TCD0_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1008++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1008++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1008++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x100C++0x03
|
|
line.long 0x00 "TCD0_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1010++0x03
|
|
line.long 0x00 "TCD0_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1014++0x01
|
|
line.word 0x00 "TCD0_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1016++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1016++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1018++0x03
|
|
line.long 0x00 "TCD0_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x101C++0x01
|
|
line.word 0x00 "TCD0_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x101E++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x101E++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1020++0x03
|
|
line.long 0x00 "TCD1_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1024++0x01
|
|
line.word 0x00 "TCD1_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1026++0x01
|
|
line.word 0x00 "TCD1_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1028++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1028++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1028++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x102C++0x03
|
|
line.long 0x00 "TCD1_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1030++0x03
|
|
line.long 0x00 "TCD1_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1034++0x01
|
|
line.word 0x00 "TCD1_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1036++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1036++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1038++0x03
|
|
line.long 0x00 "TCD1_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x103C++0x01
|
|
line.word 0x00 "TCD1_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x103E++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x103E++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1040++0x03
|
|
line.long 0x00 "TCD2_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1044++0x01
|
|
line.word 0x00 "TCD2_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1046++0x01
|
|
line.word 0x00 "TCD2_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1048++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1048++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1048++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x104C++0x03
|
|
line.long 0x00 "TCD2_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1050++0x03
|
|
line.long 0x00 "TCD2_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1054++0x01
|
|
line.word 0x00 "TCD2_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1056++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1056++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1058++0x03
|
|
line.long 0x00 "TCD2_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x105C++0x01
|
|
line.word 0x00 "TCD2_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x105E++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x105E++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1060++0x03
|
|
line.long 0x00 "TCD3_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1064++0x01
|
|
line.word 0x00 "TCD3_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1066++0x01
|
|
line.word 0x00 "TCD3_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1068++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1068++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1068++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x106C++0x03
|
|
line.long 0x00 "TCD3_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1070++0x03
|
|
line.long 0x00 "TCD3_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1074++0x01
|
|
line.word 0x00 "TCD3_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1076++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1076++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1078++0x03
|
|
line.long 0x00 "TCD3_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x107C++0x01
|
|
line.word 0x00 "TCD3_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x107E++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x107E++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1080++0x03
|
|
line.long 0x00 "TCD4_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1084++0x01
|
|
line.word 0x00 "TCD4_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1086++0x01
|
|
line.word 0x00 "TCD4_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1088++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1088++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1088++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x108C++0x03
|
|
line.long 0x00 "TCD4_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1090++0x03
|
|
line.long 0x00 "TCD4_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1094++0x01
|
|
line.word 0x00 "TCD4_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1096++0x01
|
|
line.word 0x00 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1096++0x01
|
|
line.word 0x00 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1098++0x03
|
|
line.long 0x00 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x109C++0x01
|
|
line.word 0x00 "TCD4_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x109E++0x01
|
|
line.word 0x00 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x109E++0x01
|
|
line.word 0x00 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x10A0++0x03
|
|
line.long 0x00 "TCD5_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10A4++0x01
|
|
line.word 0x00 "TCD5_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x10A6++0x01
|
|
line.word 0x00 "TCD5_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10A8++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10A8++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10A8++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10AC++0x03
|
|
line.long 0x00 "TCD5_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x10B0++0x03
|
|
line.long 0x00 "TCD5_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10B4++0x01
|
|
line.word 0x00 "TCD5_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x10B6++0x01
|
|
line.word 0x00 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10B6++0x01
|
|
line.word 0x00 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10B8++0x03
|
|
line.long 0x00 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x10BC++0x01
|
|
line.word 0x00 "TCD5_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x10BE++0x01
|
|
line.word 0x00 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x10BE++0x01
|
|
line.word 0x00 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x10C0++0x03
|
|
line.long 0x00 "TCD6_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10C4++0x01
|
|
line.word 0x00 "TCD6_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x10C6++0x01
|
|
line.word 0x00 "TCD6_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10C8++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10C8++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10C8++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10CC++0x03
|
|
line.long 0x00 "TCD6_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x10D0++0x03
|
|
line.long 0x00 "TCD6_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10D4++0x01
|
|
line.word 0x00 "TCD6_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x10D6++0x01
|
|
line.word 0x00 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10D6++0x01
|
|
line.word 0x00 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10D8++0x03
|
|
line.long 0x00 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x10DC++0x01
|
|
line.word 0x00 "TCD6_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x10DE++0x01
|
|
line.word 0x00 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x10DE++0x01
|
|
line.word 0x00 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x10E0++0x03
|
|
line.long 0x00 "TCD7_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10E4++0x01
|
|
line.word 0x00 "TCD7_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x10E6++0x01
|
|
line.word 0x00 "TCD7_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10E8++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10E8++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10E8++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10EC++0x03
|
|
line.long 0x00 "TCD7_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x10F0++0x03
|
|
line.long 0x00 "TCD7_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10F4++0x01
|
|
line.word 0x00 "TCD7_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x10F6++0x01
|
|
line.word 0x00 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10F6++0x01
|
|
line.word 0x00 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10F8++0x03
|
|
line.long 0x00 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x10FC++0x01
|
|
line.word 0x00 "TCD7_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x10FE++0x01
|
|
line.word 0x00 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x10FE++0x01
|
|
line.word 0x00 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "TCD8_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1104++0x01
|
|
line.word 0x00 "TCD8_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1106++0x01
|
|
line.word 0x00 "TCD8_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "TCD8_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "TCD8_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "TCD8_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1114++0x01
|
|
line.word 0x00 "TCD8_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1116++0x01
|
|
line.word 0x00 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1116++0x01
|
|
line.word 0x00 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1118++0x03
|
|
line.long 0x00 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x111C++0x01
|
|
line.word 0x00 "TCD8_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x111E++0x01
|
|
line.word 0x00 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x111E++0x01
|
|
line.word 0x00 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1120++0x03
|
|
line.long 0x00 "TCD9_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1124++0x01
|
|
line.word 0x00 "TCD9_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1126++0x01
|
|
line.word 0x00 "TCD9_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1128++0x03
|
|
line.long 0x00 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1128++0x03
|
|
line.long 0x00 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1128++0x03
|
|
line.long 0x00 "TCD9_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x112C++0x03
|
|
line.long 0x00 "TCD9_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1130++0x03
|
|
line.long 0x00 "TCD9_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1134++0x01
|
|
line.word 0x00 "TCD9_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1136++0x01
|
|
line.word 0x00 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1136++0x01
|
|
line.word 0x00 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1138++0x03
|
|
line.long 0x00 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x113C++0x01
|
|
line.word 0x00 "TCD9_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x113E++0x01
|
|
line.word 0x00 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x113E++0x01
|
|
line.word 0x00 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1140++0x03
|
|
line.long 0x00 "TCD10_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1144++0x01
|
|
line.word 0x00 "TCD10_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1146++0x01
|
|
line.word 0x00 "TCD10_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1148++0x03
|
|
line.long 0x00 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1148++0x03
|
|
line.long 0x00 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1148++0x03
|
|
line.long 0x00 "TCD10_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x114C++0x03
|
|
line.long 0x00 "TCD10_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1150++0x03
|
|
line.long 0x00 "TCD10_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1154++0x01
|
|
line.word 0x00 "TCD10_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1156++0x01
|
|
line.word 0x00 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1156++0x01
|
|
line.word 0x00 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1158++0x03
|
|
line.long 0x00 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x115C++0x01
|
|
line.word 0x00 "TCD10_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x115E++0x01
|
|
line.word 0x00 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x115E++0x01
|
|
line.word 0x00 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1160++0x03
|
|
line.long 0x00 "TCD11_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1164++0x01
|
|
line.word 0x00 "TCD11_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1166++0x01
|
|
line.word 0x00 "TCD11_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1168++0x03
|
|
line.long 0x00 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1168++0x03
|
|
line.long 0x00 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1168++0x03
|
|
line.long 0x00 "TCD11_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x116C++0x03
|
|
line.long 0x00 "TCD11_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1170++0x03
|
|
line.long 0x00 "TCD11_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1174++0x01
|
|
line.word 0x00 "TCD11_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1176++0x01
|
|
line.word 0x00 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1176++0x01
|
|
line.word 0x00 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1178++0x03
|
|
line.long 0x00 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x117C++0x01
|
|
line.word 0x00 "TCD11_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x117E++0x01
|
|
line.word 0x00 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x117E++0x01
|
|
line.word 0x00 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1180++0x03
|
|
line.long 0x00 "TCD12_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1184++0x01
|
|
line.word 0x00 "TCD12_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1186++0x01
|
|
line.word 0x00 "TCD12_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1188++0x03
|
|
line.long 0x00 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1188++0x03
|
|
line.long 0x00 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1188++0x03
|
|
line.long 0x00 "TCD12_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x118C++0x03
|
|
line.long 0x00 "TCD12_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1190++0x03
|
|
line.long 0x00 "TCD12_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1194++0x01
|
|
line.word 0x00 "TCD12_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1196++0x01
|
|
line.word 0x00 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1196++0x01
|
|
line.word 0x00 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1198++0x03
|
|
line.long 0x00 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x119C++0x01
|
|
line.word 0x00 "TCD12_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x119E++0x01
|
|
line.word 0x00 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x119E++0x01
|
|
line.word 0x00 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x11A0++0x03
|
|
line.long 0x00 "TCD13_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x11A4++0x01
|
|
line.word 0x00 "TCD13_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x11A6++0x01
|
|
line.word 0x00 "TCD13_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11A8++0x03
|
|
line.long 0x00 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11A8++0x03
|
|
line.long 0x00 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11A8++0x03
|
|
line.long 0x00 "TCD13_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11AC++0x03
|
|
line.long 0x00 "TCD13_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x11B0++0x03
|
|
line.long 0x00 "TCD13_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x11B4++0x01
|
|
line.word 0x00 "TCD13_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x11B6++0x01
|
|
line.word 0x00 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x11B6++0x01
|
|
line.word 0x00 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x11B8++0x03
|
|
line.long 0x00 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x11BC++0x01
|
|
line.word 0x00 "TCD13_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x11BE++0x01
|
|
line.word 0x00 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x11BE++0x01
|
|
line.word 0x00 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x11C0++0x03
|
|
line.long 0x00 "TCD14_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x11C4++0x01
|
|
line.word 0x00 "TCD14_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x11C6++0x01
|
|
line.word 0x00 "TCD14_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11C8++0x03
|
|
line.long 0x00 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11C8++0x03
|
|
line.long 0x00 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11C8++0x03
|
|
line.long 0x00 "TCD14_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11CC++0x03
|
|
line.long 0x00 "TCD14_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x11D0++0x03
|
|
line.long 0x00 "TCD14_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x11D4++0x01
|
|
line.word 0x00 "TCD14_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x11D6++0x01
|
|
line.word 0x00 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x11D6++0x01
|
|
line.word 0x00 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x11D8++0x03
|
|
line.long 0x00 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x11DC++0x01
|
|
line.word 0x00 "TCD14_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x11DE++0x01
|
|
line.word 0x00 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x11DE++0x01
|
|
line.word 0x00 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x11E0++0x03
|
|
line.long 0x00 "TCD15_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x11E4++0x01
|
|
line.word 0x00 "TCD15_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x11E6++0x01
|
|
line.word 0x00 "TCD15_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11E8++0x03
|
|
line.long 0x00 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11E8++0x03
|
|
line.long 0x00 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11E8++0x03
|
|
line.long 0x00 "TCD15_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11EC++0x03
|
|
line.long 0x00 "TCD15_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x11F0++0x03
|
|
line.long 0x00 "TCD15_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x11F4++0x01
|
|
line.word 0x00 "TCD15_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x11F6++0x01
|
|
line.word 0x00 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x11F6++0x01
|
|
line.word 0x00 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x11F8++0x03
|
|
line.long 0x00 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x11FC++0x01
|
|
line.word 0x00 "TCD15_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x11FE++0x01
|
|
line.word 0x00 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x11FE++0x01
|
|
line.word 0x00 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1200++0x03
|
|
line.long 0x00 "TCD16_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1204++0x01
|
|
line.word 0x00 "TCD16_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1206++0x01
|
|
line.word 0x00 "TCD16_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1208++0x03
|
|
line.long 0x00 "TCD16_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1208++0x03
|
|
line.long 0x00 "TCD16_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1208++0x03
|
|
line.long 0x00 "TCD16_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x120C++0x03
|
|
line.long 0x00 "TCD16_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1210++0x03
|
|
line.long 0x00 "TCD16_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1214++0x01
|
|
line.word 0x00 "TCD16_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1216++0x01
|
|
line.word 0x00 "TCD16_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1216++0x01
|
|
line.word 0x00 "TCD16_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1218++0x03
|
|
line.long 0x00 "TCD16_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x121C++0x01
|
|
line.word 0x00 "TCD16_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x121E++0x01
|
|
line.word 0x00 "TCD16_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x121E++0x01
|
|
line.word 0x00 "TCD16_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1220++0x03
|
|
line.long 0x00 "TCD17_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1224++0x01
|
|
line.word 0x00 "TCD17_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1226++0x01
|
|
line.word 0x00 "TCD17_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1228++0x03
|
|
line.long 0x00 "TCD17_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1228++0x03
|
|
line.long 0x00 "TCD17_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1228++0x03
|
|
line.long 0x00 "TCD17_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x122C++0x03
|
|
line.long 0x00 "TCD17_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1230++0x03
|
|
line.long 0x00 "TCD17_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1234++0x01
|
|
line.word 0x00 "TCD17_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1236++0x01
|
|
line.word 0x00 "TCD17_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1236++0x01
|
|
line.word 0x00 "TCD17_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1238++0x03
|
|
line.long 0x00 "TCD17_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x123C++0x01
|
|
line.word 0x00 "TCD17_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x123E++0x01
|
|
line.word 0x00 "TCD17_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x123E++0x01
|
|
line.word 0x00 "TCD17_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1240++0x03
|
|
line.long 0x00 "TCD18_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1244++0x01
|
|
line.word 0x00 "TCD18_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1246++0x01
|
|
line.word 0x00 "TCD18_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1248++0x03
|
|
line.long 0x00 "TCD18_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1248++0x03
|
|
line.long 0x00 "TCD18_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1248++0x03
|
|
line.long 0x00 "TCD18_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x124C++0x03
|
|
line.long 0x00 "TCD18_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1250++0x03
|
|
line.long 0x00 "TCD18_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1254++0x01
|
|
line.word 0x00 "TCD18_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1256++0x01
|
|
line.word 0x00 "TCD18_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1256++0x01
|
|
line.word 0x00 "TCD18_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1258++0x03
|
|
line.long 0x00 "TCD18_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x125C++0x01
|
|
line.word 0x00 "TCD18_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x125E++0x01
|
|
line.word 0x00 "TCD18_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x125E++0x01
|
|
line.word 0x00 "TCD18_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1260++0x03
|
|
line.long 0x00 "TCD19_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1264++0x01
|
|
line.word 0x00 "TCD19_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1266++0x01
|
|
line.word 0x00 "TCD19_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1268++0x03
|
|
line.long 0x00 "TCD19_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1268++0x03
|
|
line.long 0x00 "TCD19_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1268++0x03
|
|
line.long 0x00 "TCD19_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x126C++0x03
|
|
line.long 0x00 "TCD19_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1270++0x03
|
|
line.long 0x00 "TCD19_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1274++0x01
|
|
line.word 0x00 "TCD19_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1276++0x01
|
|
line.word 0x00 "TCD19_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1276++0x01
|
|
line.word 0x00 "TCD19_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1278++0x03
|
|
line.long 0x00 "TCD19_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x127C++0x01
|
|
line.word 0x00 "TCD19_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x127E++0x01
|
|
line.word 0x00 "TCD19_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x127E++0x01
|
|
line.word 0x00 "TCD19_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1280++0x03
|
|
line.long 0x00 "TCD20_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1284++0x01
|
|
line.word 0x00 "TCD20_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1286++0x01
|
|
line.word 0x00 "TCD20_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1288++0x03
|
|
line.long 0x00 "TCD20_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1288++0x03
|
|
line.long 0x00 "TCD20_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1288++0x03
|
|
line.long 0x00 "TCD20_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x128C++0x03
|
|
line.long 0x00 "TCD20_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1290++0x03
|
|
line.long 0x00 "TCD20_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1294++0x01
|
|
line.word 0x00 "TCD20_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1296++0x01
|
|
line.word 0x00 "TCD20_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1296++0x01
|
|
line.word 0x00 "TCD20_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1298++0x03
|
|
line.long 0x00 "TCD20_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x129C++0x01
|
|
line.word 0x00 "TCD20_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x129E++0x01
|
|
line.word 0x00 "TCD20_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x129E++0x01
|
|
line.word 0x00 "TCD20_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x12A0++0x03
|
|
line.long 0x00 "TCD21_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x12A4++0x01
|
|
line.word 0x00 "TCD21_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x12A6++0x01
|
|
line.word 0x00 "TCD21_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x12A8++0x03
|
|
line.long 0x00 "TCD21_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12A8++0x03
|
|
line.long 0x00 "TCD21_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12A8++0x03
|
|
line.long 0x00 "TCD21_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12AC++0x03
|
|
line.long 0x00 "TCD21_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x12B0++0x03
|
|
line.long 0x00 "TCD21_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x12B4++0x01
|
|
line.word 0x00 "TCD21_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x12B6++0x01
|
|
line.word 0x00 "TCD21_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x12B6++0x01
|
|
line.word 0x00 "TCD21_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x12B8++0x03
|
|
line.long 0x00 "TCD21_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x12BC++0x01
|
|
line.word 0x00 "TCD21_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x12BE++0x01
|
|
line.word 0x00 "TCD21_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x12BE++0x01
|
|
line.word 0x00 "TCD21_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x12C0++0x03
|
|
line.long 0x00 "TCD22_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x12C4++0x01
|
|
line.word 0x00 "TCD22_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x12C6++0x01
|
|
line.word 0x00 "TCD22_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x12C8++0x03
|
|
line.long 0x00 "TCD22_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12C8++0x03
|
|
line.long 0x00 "TCD22_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12C8++0x03
|
|
line.long 0x00 "TCD22_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12CC++0x03
|
|
line.long 0x00 "TCD22_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x12D0++0x03
|
|
line.long 0x00 "TCD22_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x12D4++0x01
|
|
line.word 0x00 "TCD22_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x12D6++0x01
|
|
line.word 0x00 "TCD22_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x12D6++0x01
|
|
line.word 0x00 "TCD22_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x12D8++0x03
|
|
line.long 0x00 "TCD22_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x12DC++0x01
|
|
line.word 0x00 "TCD22_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x12DE++0x01
|
|
line.word 0x00 "TCD22_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x12DE++0x01
|
|
line.word 0x00 "TCD22_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x12E0++0x03
|
|
line.long 0x00 "TCD23_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x12E4++0x01
|
|
line.word 0x00 "TCD23_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x12E6++0x01
|
|
line.word 0x00 "TCD23_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x12E8++0x03
|
|
line.long 0x00 "TCD23_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12E8++0x03
|
|
line.long 0x00 "TCD23_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12E8++0x03
|
|
line.long 0x00 "TCD23_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x12EC++0x03
|
|
line.long 0x00 "TCD23_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x12F0++0x03
|
|
line.long 0x00 "TCD23_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x12F4++0x01
|
|
line.word 0x00 "TCD23_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x12F6++0x01
|
|
line.word 0x00 "TCD23_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x12F6++0x01
|
|
line.word 0x00 "TCD23_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x12F8++0x03
|
|
line.long 0x00 "TCD23_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x12FC++0x01
|
|
line.word 0x00 "TCD23_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x12FE++0x01
|
|
line.word 0x00 "TCD23_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x12FE++0x01
|
|
line.word 0x00 "TCD23_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1300++0x03
|
|
line.long 0x00 "TCD24_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1304++0x01
|
|
line.word 0x00 "TCD24_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1306++0x01
|
|
line.word 0x00 "TCD24_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1308++0x03
|
|
line.long 0x00 "TCD24_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1308++0x03
|
|
line.long 0x00 "TCD24_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1308++0x03
|
|
line.long 0x00 "TCD24_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x130C++0x03
|
|
line.long 0x00 "TCD24_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1310++0x03
|
|
line.long 0x00 "TCD24_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1314++0x01
|
|
line.word 0x00 "TCD24_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1316++0x01
|
|
line.word 0x00 "TCD24_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1316++0x01
|
|
line.word 0x00 "TCD24_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1318++0x03
|
|
line.long 0x00 "TCD24_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x131C++0x01
|
|
line.word 0x00 "TCD24_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x131E++0x01
|
|
line.word 0x00 "TCD24_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x131E++0x01
|
|
line.word 0x00 "TCD24_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1320++0x03
|
|
line.long 0x00 "TCD25_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1324++0x01
|
|
line.word 0x00 "TCD25_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1326++0x01
|
|
line.word 0x00 "TCD25_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1328++0x03
|
|
line.long 0x00 "TCD25_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1328++0x03
|
|
line.long 0x00 "TCD25_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1328++0x03
|
|
line.long 0x00 "TCD25_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x132C++0x03
|
|
line.long 0x00 "TCD25_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1330++0x03
|
|
line.long 0x00 "TCD25_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1334++0x01
|
|
line.word 0x00 "TCD25_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1336++0x01
|
|
line.word 0x00 "TCD25_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1336++0x01
|
|
line.word 0x00 "TCD25_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1338++0x03
|
|
line.long 0x00 "TCD25_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x133C++0x01
|
|
line.word 0x00 "TCD25_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x133E++0x01
|
|
line.word 0x00 "TCD25_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x133E++0x01
|
|
line.word 0x00 "TCD25_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1340++0x03
|
|
line.long 0x00 "TCD26_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1344++0x01
|
|
line.word 0x00 "TCD26_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1346++0x01
|
|
line.word 0x00 "TCD26_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1348++0x03
|
|
line.long 0x00 "TCD26_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1348++0x03
|
|
line.long 0x00 "TCD26_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1348++0x03
|
|
line.long 0x00 "TCD26_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x134C++0x03
|
|
line.long 0x00 "TCD26_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1350++0x03
|
|
line.long 0x00 "TCD26_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1354++0x01
|
|
line.word 0x00 "TCD26_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1356++0x01
|
|
line.word 0x00 "TCD26_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1356++0x01
|
|
line.word 0x00 "TCD26_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1358++0x03
|
|
line.long 0x00 "TCD26_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x135C++0x01
|
|
line.word 0x00 "TCD26_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x135E++0x01
|
|
line.word 0x00 "TCD26_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x135E++0x01
|
|
line.word 0x00 "TCD26_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1360++0x03
|
|
line.long 0x00 "TCD27_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1364++0x01
|
|
line.word 0x00 "TCD27_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1366++0x01
|
|
line.word 0x00 "TCD27_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1368++0x03
|
|
line.long 0x00 "TCD27_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1368++0x03
|
|
line.long 0x00 "TCD27_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1368++0x03
|
|
line.long 0x00 "TCD27_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x136C++0x03
|
|
line.long 0x00 "TCD27_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1370++0x03
|
|
line.long 0x00 "TCD27_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1374++0x01
|
|
line.word 0x00 "TCD27_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1376++0x01
|
|
line.word 0x00 "TCD27_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1376++0x01
|
|
line.word 0x00 "TCD27_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1378++0x03
|
|
line.long 0x00 "TCD27_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x137C++0x01
|
|
line.word 0x00 "TCD27_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x137E++0x01
|
|
line.word 0x00 "TCD27_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x137E++0x01
|
|
line.word 0x00 "TCD27_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1380++0x03
|
|
line.long 0x00 "TCD28_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1384++0x01
|
|
line.word 0x00 "TCD28_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x1386++0x01
|
|
line.word 0x00 "TCD28_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1388++0x03
|
|
line.long 0x00 "TCD28_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1388++0x03
|
|
line.long 0x00 "TCD28_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1388++0x03
|
|
line.long 0x00 "TCD28_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x138C++0x03
|
|
line.long 0x00 "TCD28_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x1390++0x03
|
|
line.long 0x00 "TCD28_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1394++0x01
|
|
line.word 0x00 "TCD28_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x1396++0x01
|
|
line.word 0x00 "TCD28_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1396++0x01
|
|
line.word 0x00 "TCD28_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1398++0x03
|
|
line.long 0x00 "TCD28_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x139C++0x01
|
|
line.word 0x00 "TCD28_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x139E++0x01
|
|
line.word 0x00 "TCD28_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x139E++0x01
|
|
line.word 0x00 "TCD28_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x13A0++0x03
|
|
line.long 0x00 "TCD29_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x13A4++0x01
|
|
line.word 0x00 "TCD29_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x13A6++0x01
|
|
line.word 0x00 "TCD29_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x13A8++0x03
|
|
line.long 0x00 "TCD29_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13A8++0x03
|
|
line.long 0x00 "TCD29_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13A8++0x03
|
|
line.long 0x00 "TCD29_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13AC++0x03
|
|
line.long 0x00 "TCD29_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x13B0++0x03
|
|
line.long 0x00 "TCD29_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x13B4++0x01
|
|
line.word 0x00 "TCD29_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x13B6++0x01
|
|
line.word 0x00 "TCD29_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x13B6++0x01
|
|
line.word 0x00 "TCD29_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x13B8++0x03
|
|
line.long 0x00 "TCD29_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x13BC++0x01
|
|
line.word 0x00 "TCD29_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x13BE++0x01
|
|
line.word 0x00 "TCD29_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x13BE++0x01
|
|
line.word 0x00 "TCD29_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x13C0++0x03
|
|
line.long 0x00 "TCD30_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x13C4++0x01
|
|
line.word 0x00 "TCD30_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x13C6++0x01
|
|
line.word 0x00 "TCD30_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x13C8++0x03
|
|
line.long 0x00 "TCD30_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13C8++0x03
|
|
line.long 0x00 "TCD30_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13C8++0x03
|
|
line.long 0x00 "TCD30_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13CC++0x03
|
|
line.long 0x00 "TCD30_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x13D0++0x03
|
|
line.long 0x00 "TCD30_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x13D4++0x01
|
|
line.word 0x00 "TCD30_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x13D6++0x01
|
|
line.word 0x00 "TCD30_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x13D6++0x01
|
|
line.word 0x00 "TCD30_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x13D8++0x03
|
|
line.long 0x00 "TCD30_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x13DC++0x01
|
|
line.word 0x00 "TCD30_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x13DE++0x01
|
|
line.word 0x00 "TCD30_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x13DE++0x01
|
|
line.word 0x00 "TCD30_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x13E0++0x03
|
|
line.long 0x00 "TCD31_SADDR,TCD Source Address"
|
|
hexmask.long 0x00 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x13E4++0x01
|
|
line.word 0x00 "TCD31_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "SOFF,Source address signed offset"
|
|
group.word 0x13E6++0x01
|
|
line.word 0x00 "TCD31_ATTR,TCD Transfer Attributes"
|
|
bitfld.word 0x00 11.--15. "SMOD,Source Address Modulo" "0: SMOD_0,1: SMOD_1,2: SMOD_2,3: SMOD_3,4: SMOD_4,5: SMOD_5,6: SMOD_6,7: SMOD_7,8: SMOD_8,9: SMOD_9,?..."
|
|
bitfld.word 0x00 8.--10. "SSIZE,Source data transfer size" "0: SSIZE_0,1: SSIZE_1,2: SSIZE_2,3: no description available,?,5: no description available,?..."
|
|
newline
|
|
bitfld.word 0x00 3.--7. "DMOD,Destination Address Modulo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x13E8++0x03
|
|
line.long 0x00 "TCD31_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x00 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
hexmask.long.word 0x00 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13E8++0x03
|
|
line.long 0x00 "TCD31_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x00 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the..,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13E8++0x03
|
|
line.long 0x00 "TCD31_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x00 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x13EC++0x03
|
|
line.long 0x00 "TCD31_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x00 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
group.long 0x13F0++0x03
|
|
line.long 0x00 "TCD31_DADDR,TCD Destination Address"
|
|
hexmask.long 0x00 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x13F4++0x01
|
|
line.word 0x00 "TCD31_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x00 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
group.word 0x13F6++0x01
|
|
line.word 0x00 "TCD31_CITER_ELINKYES,TCD Current Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x13F6++0x01
|
|
line.word 0x00 "TCD31_CITER_ELINKNO,TCD Current Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x13F8++0x03
|
|
line.long 0x00 "TCD31_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x00 0.--31. 1. "DLASTSGA,DLASTSGA"
|
|
group.word 0x13FC++0x01
|
|
line.word 0x00 "TCD31_CSR,TCD Control and Status"
|
|
bitfld.word 0x00 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x00 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x00 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x00 3. "DREQ,Disable Request" "0: no description available,1: no description available"
|
|
bitfld.word 0x00 2. "INTHALF,Enable an interrupt when major counter is half complete" "0: The half-point interrupt is disabled,1: The half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x00 1. "INTMAJOR,Enable an interrupt when major iteration count completes" "0: The end-of-major loop interrupt is disabled,1: The end-of-major loop interrupt is enabled"
|
|
bitfld.word 0x00 0. "START,Channel Start" "0: The channel is not explicitly started,1: The channel is explicitly started via a.."
|
|
group.word 0x13FE++0x01
|
|
line.word 0x00 "TCD31_BITER_ELINKYES,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
bitfld.word 0x00 9.--13. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.word 0x13FE++0x01
|
|
line.word 0x00 "TCD31_BITER_ELINKNO,TCD Beginning Minor Loop Link Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x00 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x00 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
|
|
tree "GPIOA"
|
|
base ad:0x4100F000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x400F0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x400F0040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree "GPIOE"
|
|
base ad:0x400F0080
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree "GPIOF"
|
|
base ad:0x400F00C0
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x4100F040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "XRDC"
|
|
base ad:0x41014000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR,Control"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
rbitfld.long 0x00 8. "VAW,Virtualization aware" "0: Implementation is not virtualization aware,1: Implementation is virtualization aware"
|
|
newline
|
|
rbitfld.long 0x00 7. "MRF,Memory Region Format" "0: Kinetis format based on ARM Cortex-M..,1: SMPU family format"
|
|
rbitfld.long 0x00 1.--4. "HRL,Hardware Revision Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "GVLD,Global Valid (XRDC global enable/disable)" "0: XRDC is disabled,1: XRDC is enabled"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
rbitfld.long 0x00 8. "VAW,Virtualization aware" "0: Implementation is not virtualization aware,1: Implementation is virtualization aware"
|
|
newline
|
|
rbitfld.long 0x00 7. "MRF,Memory Region Format" "0: Kinetis format based on ARM Cortex-M..,1: SMPU family format"
|
|
rbitfld.long 0x00 1.--4. "HRL,Hardware Revision Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "GVLD,Global Valid (XRDC global enable/disable)" "0: XRDC is disabled,1: XRDC is enabled"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "HWCFG0,Hardware Configuration Register 0"
|
|
bitfld.long 0x00 28.--31. "MID,Module ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "NPAC,Number of PACs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "NMRC,Number of MRCs"
|
|
hexmask.long.byte 0x00 8.--15. 1. "NMSTR,Number of bus masters"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "NDID,Number of domains"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "HWCFG0,Hardware Configuration 0"
|
|
bitfld.long 0x00 28.--31. "MID,Module ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "NPAC,Number of PACs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "NMRC,Number of MRCs"
|
|
hexmask.long.byte 0x00 8.--15. 1. "NMSTR,Number of bus masters"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "NDID,Number of domains"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "HWCFG1,Hardware Configuration Register 1"
|
|
bitfld.long 0x00 0.--3. "DID,Domain identifier number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "HWCFG1,Hardware Configuration 1"
|
|
bitfld.long 0x00 0.--3. "DID,Domain identifier number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "HWCFG2,Hardware Configuration 2"
|
|
bitfld.long 0x00 31. "PIDP31,Process identifier" "0: Bus master 31 does not source a process..,1: Bus master 31 sources a process identifier.."
|
|
bitfld.long 0x00 30. "PIDP30,Process identifier" "0: Bus master 30 does not source a process..,1: Bus master 30 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 29. "PIDP29,Process identifier" "0: Bus master 29 does not source a process..,1: Bus master 29 sources a process identifier.."
|
|
bitfld.long 0x00 28. "PIDP28,Process identifier" "0: Bus master 28 does not source a process..,1: Bus master 28 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 27. "PIDP27,Process identifier" "0: Bus master 27 does not source a process..,1: Bus master 27 sources a process identifier.."
|
|
bitfld.long 0x00 26. "PIDP26,Process identifier" "0: Bus master 26 does not source a process..,1: Bus master 26 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 25. "PIDP25,Process identifier" "0: Bus master 25 does not source a process..,1: Bus master 25 sources a process identifier.."
|
|
bitfld.long 0x00 24. "PIDP24,Process identifier" "0: Bus master 24 does not source a process..,1: Bus master 24 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 23. "PIDP23,Process identifier" "0: Bus master 23 does not source a process..,1: Bus master 23 sources a process identifier.."
|
|
bitfld.long 0x00 22. "PIDP22,Process identifier" "0: Bus master 22 does not source a process..,1: Bus master 22 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 21. "PIDP21,Process identifier" "0: Bus master 21 does not source a process..,1: Bus master 21 sources a process identifier.."
|
|
bitfld.long 0x00 20. "PIDP20,Process identifier" "0: Bus master 20 does not source a process..,1: Bus master 20 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 19. "PIDP19,Process identifier" "0: Bus master 19 does not source a process..,1: Bus master 19 sources a process identifier.."
|
|
bitfld.long 0x00 18. "PIDP18,Process identifier" "0: Bus master 18 does not source a process..,1: Bus master 18 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 17. "PIDP17,Process identifier" "0: Bus master 17 does not source a process..,1: Bus master 17 sources a process identifier.."
|
|
bitfld.long 0x00 16. "PIDP16,Process identifier" "0: Bus master 16 does not source a process..,1: Bus master 16 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 15. "PIDP15,Process identifier" "0: Bus master 15 does not source a process..,1: Bus master 15 sources a process identifier.."
|
|
bitfld.long 0x00 14. "PIDP14,Process identifier" "0: Bus master 14 does not source a process..,1: Bus master 14 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 13. "PIDP13,Process identifier" "0: Bus master 13 does not source a process..,1: Bus master 13 sources a process identifier.."
|
|
bitfld.long 0x00 12. "PIDP12,Process identifier" "0: Bus master 12 does not source a process..,1: Bus master 12 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 11. "PIDP11,Process identifier" "0: Bus master 11 does not source a process..,1: Bus master 11 sources a process identifier.."
|
|
bitfld.long 0x00 10. "PIDP10,Process identifier" "0: Bus master 10 does not source a process..,1: Bus master 10 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 9. "PIDP9,Process identifier" "0: Bus master 9 does not source a process..,1: Bus master 9 sources a process identifier.."
|
|
bitfld.long 0x00 8. "PIDP8,Process identifier" "0: Bus master 8 does not source a process..,1: Bus master 8 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 7. "PIDP7,Process identifier" "0: Bus master 7 does not source a process..,1: Bus master 7 sources a process identifier.."
|
|
bitfld.long 0x00 6. "PIDP6,Process identifier" "0: Bus master 6 does not source a process..,1: Bus master 6 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 5. "PIDP5,Process identifier" "0: Bus master 5 does not source a process..,1: Bus master 5 sources a process identifier.."
|
|
bitfld.long 0x00 4. "PIDP4,Process identifier" "0: Bus master 4 does not source a process..,1: Bus master 4 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 3. "PIDP3,Process identifier" "0: Bus master 3 does not source a process..,1: Bus master 3 sources a process identifier.."
|
|
bitfld.long 0x00 2. "PIDP2,Process identifier" "0: Bus master 2 does not source a process..,1: Bus master 2 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 1. "PIDP1,Process identifier" "0: Bus master 1 does not source a process..,1: Bus master 1 sources a process identifier.."
|
|
bitfld.long 0x00 0. "PIDP0,Process identifier" "0: Bus master 0 does not source a process..,1: Bus master 0 sources a process identifier.."
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "HWCFG2,Hardware Configuration Register 2"
|
|
bitfld.long 0x00 31. "PIDP31,Process identifier" "0: Bus master 31 does not source a process..,1: Bus master 31 sources a process identifier.."
|
|
bitfld.long 0x00 30. "PIDP30,Process identifier" "0: Bus master 30 does not source a process..,1: Bus master 30 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 29. "PIDP29,Process identifier" "0: Bus master 29 does not source a process..,1: Bus master 29 sources a process identifier.."
|
|
bitfld.long 0x00 28. "PIDP28,Process identifier" "0: Bus master 28 does not source a process..,1: Bus master 28 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 27. "PIDP27,Process identifier" "0: Bus master 27 does not source a process..,1: Bus master 27 sources a process identifier.."
|
|
bitfld.long 0x00 26. "PIDP26,Process identifier" "0: Bus master 26 does not source a process..,1: Bus master 26 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 25. "PIDP25,Process identifier" "0: Bus master 25 does not source a process..,1: Bus master 25 sources a process identifier.."
|
|
bitfld.long 0x00 24. "PIDP24,Process identifier" "0: Bus master 24 does not source a process..,1: Bus master 24 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 23. "PIDP23,Process identifier" "0: Bus master 23 does not source a process..,1: Bus master 23 sources a process identifier.."
|
|
bitfld.long 0x00 22. "PIDP22,Process identifier" "0: Bus master 22 does not source a process..,1: Bus master 22 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 21. "PIDP21,Process identifier" "0: Bus master 21 does not source a process..,1: Bus master 21 sources a process identifier.."
|
|
bitfld.long 0x00 20. "PIDP20,Process identifier" "0: Bus master 20 does not source a process..,1: Bus master 20 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 19. "PIDP19,Process identifier" "0: Bus master 19 does not source a process..,1: Bus master 19 sources a process identifier.."
|
|
bitfld.long 0x00 18. "PIDP18,Process identifier" "0: Bus master 18 does not source a process..,1: Bus master 18 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 17. "PIDP17,Process identifier" "0: Bus master 17 does not source a process..,1: Bus master 17 sources a process identifier.."
|
|
bitfld.long 0x00 16. "PIDP16,Process identifier" "0: Bus master 16 does not source a process..,1: Bus master 16 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 15. "PIDP15,Process identifier" "0: Bus master 15 does not source a process..,1: Bus master 15 sources a process identifier.."
|
|
bitfld.long 0x00 14. "PIDP14,Process identifier" "0: Bus master 14 does not source a process..,1: Bus master 14 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 13. "PIDP13,Process identifier" "0: Bus master 13 does not source a process..,1: Bus master 13 sources a process identifier.."
|
|
bitfld.long 0x00 12. "PIDP12,Process identifier" "0: Bus master 12 does not source a process..,1: Bus master 12 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 11. "PIDP11,Process identifier" "0: Bus master 11 does not source a process..,1: Bus master 11 sources a process identifier.."
|
|
bitfld.long 0x00 10. "PIDP10,Process identifier" "0: Bus master 10 does not source a process..,1: Bus master 10 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 9. "PIDP9,Process identifier" "0: Bus master 9 does not source a process..,1: Bus master 9 sources a process identifier.."
|
|
bitfld.long 0x00 8. "PIDP8,Process identifier" "0: Bus master 8 does not source a process..,1: Bus master 8 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 7. "PIDP7,Process identifier" "0: Bus master 7 does not source a process..,1: Bus master 7 sources a process identifier.."
|
|
bitfld.long 0x00 6. "PIDP6,Process identifier" "0: Bus master 6 does not source a process..,1: Bus master 6 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 5. "PIDP5,Process identifier" "0: Bus master 5 does not source a process..,1: Bus master 5 sources a process identifier.."
|
|
bitfld.long 0x00 4. "PIDP4,Process identifier" "0: Bus master 4 does not source a process..,1: Bus master 4 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 3. "PIDP3,Process identifier" "0: Bus master 3 does not source a process..,1: Bus master 3 sources a process identifier.."
|
|
bitfld.long 0x00 2. "PIDP2,Process identifier" "0: Bus master 2 does not source a process..,1: Bus master 2 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x00 1. "PIDP1,Process identifier" "0: Bus master 1 does not source a process..,1: Bus master 1 sources a process identifier.."
|
|
bitfld.long 0x00 0. "PIDP0,Process identifier" "0: Bus master 0 does not source a process..,1: Bus master 0 sources a process identifier.."
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "MDACFG0,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "MDACFG0,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x101++0x00
|
|
line.byte 0x00 "MDACFG1,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x101++0x00
|
|
line.byte 0x00 "MDACFG1,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x102++0x00
|
|
line.byte 0x00 "MDACFG2,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x102++0x00
|
|
line.byte 0x00 "MDACFG2,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x103++0x00
|
|
line.byte 0x00 "MDACFG3,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "3" "4" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x103)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x104++0x00
|
|
line.byte 0x00 "MDACFG4,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x105++0x00
|
|
line.byte 0x00 "MDACFG5,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x105++0x00
|
|
line.byte 0x00 "MDACFG5,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x106++0x00
|
|
line.byte 0x00 "MDACFG6,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x106++0x00
|
|
line.byte 0x00 "MDACFG6,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x107++0x00
|
|
line.byte 0x00 "MDACFG7,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "7" "8" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x107)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "8" "9" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x108)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "9" "10" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x109)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "10" "11" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x10A)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "11" "12" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x10B)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "12" "13" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x10C)++0x00
|
|
line.byte 0x00 "MDACFG$1,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x10D++0x00
|
|
line.byte 0x00 "MDACFG13,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x00 7. "NCM,Non-CPU Master" "0: Bus master is a processor,1: Bus master is a non-processor"
|
|
bitfld.byte 0x00 0.--3. "NMDAR,Number of master domain assignment registers for bus master m" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x140++0x00
|
|
line.byte 0x00 "MRCFG0,Memory Region Configuration Register"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x140)++0x00
|
|
line.byte 0x00 "MRCFG$1,Memory Region Configuration"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x141++0x00
|
|
line.byte 0x00 "MRCFG1,Memory Region Configuration Register"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x142++0x00
|
|
line.byte 0x00 "MRCFG2,Memory Region Configuration"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x142++0x00
|
|
line.byte 0x00 "MRCFG2,Memory Region Configuration Register"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x143++0x00
|
|
line.byte 0x00 "MRCFG3,Memory Region Configuration"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "3" "4" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x143)++0x00
|
|
line.byte 0x00 "MRCFG$1,Memory Region Configuration Register"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.byte 0x144++0x00
|
|
line.byte 0x00 "MRCFG4,Memory Region Configuration"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x145++0x00
|
|
line.byte 0x00 "MRCFG5,Memory Region Configuration Register"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "5" "6" )(list 0x00 0x01 )
|
|
rgroup.byte ($2+0x145)++0x00
|
|
line.byte 0x00 "MRCFG$1,Memory Region Configuration"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.byte 0x146++0x00
|
|
line.byte 0x00 "MRCFG6,Memory Region Configuration Register"
|
|
bitfld.byte 0x00 0.--4. "NMRGD,Number of memory region descriptors for memory region controller n" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x200++0x03
|
|
line.long 0x00 "DERRLOC[0],Domain Error Location"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (increment 0 1) (increment 0 0x04)
|
|
rgroup.long ($2+0x200)++0x03
|
|
line.long 0x00 "DERRLOC[$1],Domain Error Location Register $1"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x204++0x03
|
|
line.long 0x00 "DERRLOC[1],Domain Error Location"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x208++0x03
|
|
line.long 0x00 "DERRLOC[2],Domain Error Location Register"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (increment 0 1) (increment 0 0x04)
|
|
rgroup.long ($2+0x208)++0x03
|
|
line.long 0x00 "DERRLOC[$1],Domain Error Location $1"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (increment 0 1) (increment 0 0x04)
|
|
rgroup.long ($2+0x20C)++0x03
|
|
line.long 0x00 "DERRLOC[$1],Domain Error Location Register $1"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (increment 0 1) (increment 0 0x04)
|
|
rgroup.long ($2+0x210)++0x03
|
|
line.long 0x00 "DERRLOC[$1],Domain Error Location $1"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x214++0x03
|
|
line.long 0x00 "DERRLOC[5],Domain Error Location Register"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x218++0x03
|
|
line.long 0x00 "DERRLOC[6],Domain Error Location"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (increment 0 1) (increment 0 0x04)
|
|
rgroup.long ($2+0x218)++0x03
|
|
line.long 0x00 "DERRLOC[$1],Domain Error Location Register $1"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x21C++0x03
|
|
line.long 0x00 "DERRLOC[7],Domain Error Location"
|
|
bitfld.long 0x00 16.--19. "PACINST,PAC instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "MRCINST,MRC instance"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "DERR_W0_0,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "DERR_W0_0,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x404++0x03
|
|
line.long 0x00 "DERR_W1_0,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x404++0x03
|
|
line.long 0x00 "DERR_W1_0,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "DERR_W3_0,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "DERR_W3_0,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x410++0x03
|
|
line.long 0x00 "DERR_W0_1,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x410++0x03
|
|
line.long 0x00 "DERR_W0_1,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x414++0x03
|
|
line.long 0x00 "DERR_W1_1,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x414++0x03
|
|
line.long 0x00 "DERR_W1_1,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "DERR_W3_1,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "DERR_W3_1,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "DERR_W0_2,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "DERR_W0_2,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "DERR_W1_2,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "DERR_W1_2,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "DERR_W3_2,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "DERR_W3_2,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "DERR_W0_3,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "DERR_W0_3,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "DERR_W1_3,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "DERR_W1_3,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "DERR_W3_3,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "DERR_W3_3,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "DERR_W0_4,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "DERR_W0_4,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
rgroup.long 0x444++0x03
|
|
line.long 0x00 "DERR_W1_4,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x444++0x03
|
|
line.long 0x00 "DERR_W1_4,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "DERR_W3_4,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "DERR_W3_4,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
rgroup.long 0x450++0x03
|
|
line.long 0x00 "DERR_W0_5,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x450++0x03
|
|
line.long 0x00 "DERR_W0_5,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
rgroup.long 0x454++0x03
|
|
line.long 0x00 "DERR_W1_5,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x454++0x03
|
|
line.long 0x00 "DERR_W1_5,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "DERR_W3_5,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "DERR_W3_5,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
rgroup.long 0x460++0x03
|
|
line.long 0x00 "DERR_W0_6,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x460++0x03
|
|
line.long 0x00 "DERR_W0_6,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x464++0x03
|
|
line.long 0x00 "DERR_W1_6,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x464++0x03
|
|
line.long 0x00 "DERR_W1_6,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "DERR_W3_6,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "DERR_W3_6,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "DERR_W0_16,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "DERR_W0_16,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "DERR_W1_16,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "DERR_W1_16,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "DERR_W3_16,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "DERR_W3_16,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "DERR_W0_17,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "DERR_W0_17,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x514++0x03
|
|
line.long 0x00 "DERR_W1_17,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x514++0x03
|
|
line.long 0x00 "DERR_W1_17,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "DERR_W3_17,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "DERR_W3_17,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
rgroup.long 0x520++0x03
|
|
line.long 0x00 "DERR_W0_18,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x520++0x03
|
|
line.long 0x00 "DERR_W0_18,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x524++0x03
|
|
line.long 0x00 "DERR_W1_18,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x524++0x03
|
|
line.long 0x00 "DERR_W1_18,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "DERR_W3_18,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "DERR_W3_18,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
rgroup.long 0x530++0x03
|
|
line.long 0x00 "DERR_W0_19,Domain Error Word0 Register"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x530++0x03
|
|
line.long 0x00 "DERR_W0_19,Domain Error Word0"
|
|
hexmask.long 0x00 0.--31. 1. "EADDR,Error address"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x534++0x03
|
|
line.long 0x00 "DERR_W1_19,Domain Error Word1 Register"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x534++0x03
|
|
line.long 0x00 "DERR_W1_19,Domain Error Word1"
|
|
bitfld.long 0x00 30.--31. "EST,Error state" "0: No access violation has been detected,1: No access violation has been detected,2: A single access violation has been detected,3: Multiple access violations for this domain.."
|
|
bitfld.long 0x00 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "ERW,Error read/" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 8.--10. "EATR,Error attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch..,7: Nonsecure privileged mode data access"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "EDID,Error domain identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "DERR_W3_19,Domain Error Word3 Register"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "DERR_W3_19,Domain Error Word3"
|
|
bitfld.long 0x00 30.--31. "RECR,Rearm Error Capture registers" "0,1,2,3"
|
|
endif
|
|
repeat 3. (strings "0" "1" "3" )(list 0x00 0x04 0x0C )
|
|
group.long ($2+0x700)++0x03
|
|
line.long 0x00 "PID$1,Process Identifier"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Register can be written by any secure..,1: Register can be written by any secure..,2: Register can only be written by a secure..,3: Register is locked (read-only) until the next.."
|
|
bitfld.long 0x00 28. "TSM,Three-state model" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 24. "ELK22H,Enable (LK2 = 2) special handling" "0,1"
|
|
rbitfld.long 0x00 16.--21. "LMNUM,Locked Master NUMber" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "PID,Process identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat.end
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "MDA_W0_0_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use MDAm[3:0] as the domain identifier,1: Use the input DID as the domain identifier,2: Use MDAm[3:2] concatenated with the low-order..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "MDA_W0_0_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use DID field of this register as the domain..,1: Use the input DID as the domain identifier,2: Use bits [3:2] of this register concatenated..,?..."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "MDA_W1_0_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use MDAm[3:0] as the domain identifier,1: Use the input DID as the domain identifier,2: Use MDAm[3:2] concatenated with the low-order..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "MDA_W1_0_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use DID field of this register as the domain..,1: Use the input DID as the domain identifier,2: Use bits [3:2] of this register concatenated..,?..."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "MDA_W0_1_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use MDAm[3:0] as the domain identifier,1: Use the input DID as the domain identifier,2: Use MDAm[3:2] concatenated with the low-order..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "MDA_W0_1_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use DID field of this register as the domain..,1: Use the input DID as the domain identifier,2: Use bits [3:2] of this register concatenated..,?..."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "MDA_W1_1_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use DID field of this register as the domain..,1: Use the input DID as the domain identifier,2: Use bits [3:2] of this register concatenated..,?..."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "MDA_W1_1_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use MDAm[3:0] as the domain identifier,1: Use the input DID as the domain identifier,2: Use MDAm[3:2] concatenated with the low-order..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "MDA_W0_2_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "MDA_W0_2_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "MDA_W0_3_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use MDAm[3:0] as the domain identifier,1: Use the input DID as the domain identifier,2: Use MDAm[3:2] concatenated with the low-order..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "MDA_W0_3_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use DID field of this register as the domain..,1: Use the input DID as the domain identifier,2: Use bits [3:2] of this register concatenated..,?..."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "MDA_W1_3_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use DID field of this register as the domain..,1: Use the input DID as the domain identifier,2: Use bits [3:2] of this register concatenated..,?..."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "MDA_W1_3_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PID,Process Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "PIDM,Process Identifier Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the..,1: No process identifier is included in the..,2: no description available,3: no description available"
|
|
bitfld.long 0x00 4.--5. "DIDS,DID Select" "0: Use MDAm[3:0] as the domain identifier,1: Use the input DID as the domain identifier,2: Use MDAm[3:2] concatenated with the low-order..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "MDA_W0_4_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "MDA_W0_4_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "MDA_W0_5_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "MDA_W0_5_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "MDA_W0_6_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "MDA_W0_6_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "MDA_W0_7_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "MDA_W0_7_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "MDA_W0_8_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "MDA_W0_8_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "MDA_W0_9_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "MDA_W0_9_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "MDA_W0_10_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "MDA_W0_10_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "MDA_W0_11_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "MDA_W0_11_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "MDA_W0_12_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "MDA_W0_12_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "MDA_W0_13_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "LPID,Logical partition Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "MDA_W0_13_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The Wr domain assignment is invalid,1: The Wr domain assignment is valid"
|
|
bitfld.long 0x00 30. "LK1,1-bit Lock" "0: Register can be written by any secure..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x00 29. "DFMT,Domain format" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 8. "DIDB,DID Bypass" "0: Use MDAn[3:0] as the domain identifier,1: Use the DID input as the domain identifier"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SA,Secure attribute" "0: Force the bus attribute for this master to..,1: Force the bus attribute for this master to..,2: Use the bus master's secure/nonsecure..,3: Use the bus master's secure/nonsecure.."
|
|
bitfld.long 0x00 4.--5. "PA,Privileged attribute" "0: Force the bus attribute for this master to user,1: Force the bus attribute for this master to..,2: Use the bus master's privileged/user..,3: Use the bus master's privileged/user.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
group.long 0x1040++0x03
|
|
line.long 0x00 "PDAC_W0_8,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1044++0x03
|
|
line.long 0x00 "PDAC_W1_8,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1048++0x03
|
|
line.long 0x00 "PDAC_W0_9,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x104C++0x03
|
|
line.long 0x00 "PDAC_W1_9,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1078++0x03
|
|
line.long 0x00 "PDAC_W0_15,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x107C++0x03
|
|
line.long 0x00 "PDAC_W1_15,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x10A0++0x03
|
|
line.long 0x00 "PDAC_W0_20,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10A4++0x03
|
|
line.long 0x00 "PDAC_W1_20,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x10A8++0x03
|
|
line.long 0x00 "PDAC_W0_21,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10AC++0x03
|
|
line.long 0x00 "PDAC_W1_21,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x10B0++0x03
|
|
line.long 0x00 "PDAC_W0_22,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10B4++0x03
|
|
line.long 0x00 "PDAC_W1_22,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x10B8++0x03
|
|
line.long 0x00 "PDAC_W0_23,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10BC++0x03
|
|
line.long 0x00 "PDAC_W1_23,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x10D8++0x03
|
|
line.long 0x00 "PDAC_W0_27,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10DC++0x03
|
|
line.long 0x00 "PDAC_W1_27,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "PDAC_W0_32,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "PDAC_W1_32,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "PDAC_W0_33,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "PDAC_W1_33,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "PDAC_W0_34,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "PDAC_W1_34,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1120++0x03
|
|
line.long 0x00 "PDAC_W0_36,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1124++0x03
|
|
line.long 0x00 "PDAC_W1_36,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1128++0x03
|
|
line.long 0x00 "PDAC_W0_37,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x112C++0x03
|
|
line.long 0x00 "PDAC_W1_37,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1130++0x03
|
|
line.long 0x00 "PDAC_W0_38,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1134++0x03
|
|
line.long 0x00 "PDAC_W1_38,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1138++0x03
|
|
line.long 0x00 "PDAC_W0_39,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x113C++0x03
|
|
line.long 0x00 "PDAC_W1_39,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1148++0x03
|
|
line.long 0x00 "PDAC_W0_41,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x114C++0x03
|
|
line.long 0x00 "PDAC_W1_41,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1150++0x03
|
|
line.long 0x00 "PDAC_W0_42,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1154++0x03
|
|
line.long 0x00 "PDAC_W1_42,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1160++0x03
|
|
line.long 0x00 "PDAC_W0_44,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1164++0x03
|
|
line.long 0x00 "PDAC_W1_44,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1168++0x03
|
|
line.long 0x00 "PDAC_W0_45,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x116C++0x03
|
|
line.long 0x00 "PDAC_W1_45,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1170++0x03
|
|
line.long 0x00 "PDAC_W0_46,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1174++0x03
|
|
line.long 0x00 "PDAC_W1_46,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1178++0x03
|
|
line.long 0x00 "PDAC_W0_47,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x117C++0x03
|
|
line.long 0x00 "PDAC_W1_47,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1180++0x03
|
|
line.long 0x00 "PDAC_W0_48,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1184++0x03
|
|
line.long 0x00 "PDAC_W1_48,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1188++0x03
|
|
line.long 0x00 "PDAC_W0_49,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x118C++0x03
|
|
line.long 0x00 "PDAC_W1_49,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1190++0x03
|
|
line.long 0x00 "PDAC_W0_50,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1194++0x03
|
|
line.long 0x00 "PDAC_W1_50,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1198++0x03
|
|
line.long 0x00 "PDAC_W0_51,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x119C++0x03
|
|
line.long 0x00 "PDAC_W1_51,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11A0++0x03
|
|
line.long 0x00 "PDAC_W0_52,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11A4++0x03
|
|
line.long 0x00 "PDAC_W1_52,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11A8++0x03
|
|
line.long 0x00 "PDAC_W0_53,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11AC++0x03
|
|
line.long 0x00 "PDAC_W1_53,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11B0++0x03
|
|
line.long 0x00 "PDAC_W0_54,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11B4++0x03
|
|
line.long 0x00 "PDAC_W1_54,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11B8++0x03
|
|
line.long 0x00 "PDAC_W0_55,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11BC++0x03
|
|
line.long 0x00 "PDAC_W1_55,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11C0++0x03
|
|
line.long 0x00 "PDAC_W0_56,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11C4++0x03
|
|
line.long 0x00 "PDAC_W1_56,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11C8++0x03
|
|
line.long 0x00 "PDAC_W0_57,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11CC++0x03
|
|
line.long 0x00 "PDAC_W1_57,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11D0++0x03
|
|
line.long 0x00 "PDAC_W0_58,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11D4++0x03
|
|
line.long 0x00 "PDAC_W1_58,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11D8++0x03
|
|
line.long 0x00 "PDAC_W0_59,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11DC++0x03
|
|
line.long 0x00 "PDAC_W1_59,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11E8++0x03
|
|
line.long 0x00 "PDAC_W0_61,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11EC++0x03
|
|
line.long 0x00 "PDAC_W1_61,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x11F8++0x03
|
|
line.long 0x00 "PDAC_W0_63,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11FC++0x03
|
|
line.long 0x00 "PDAC_W1_63,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1200++0x03
|
|
line.long 0x00 "PDAC_W0_64,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1204++0x03
|
|
line.long 0x00 "PDAC_W1_64,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1208++0x03
|
|
line.long 0x00 "PDAC_W0_65,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x120C++0x03
|
|
line.long 0x00 "PDAC_W1_65,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1210++0x03
|
|
line.long 0x00 "PDAC_W0_66,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1214++0x03
|
|
line.long 0x00 "PDAC_W1_66,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1218++0x03
|
|
line.long 0x00 "PDAC_W0_67,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x121C++0x03
|
|
line.long 0x00 "PDAC_W1_67,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1220++0x03
|
|
line.long 0x00 "PDAC_W0_68,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1224++0x03
|
|
line.long 0x00 "PDAC_W1_68,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1228++0x03
|
|
line.long 0x00 "PDAC_W0_69,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x122C++0x03
|
|
line.long 0x00 "PDAC_W1_69,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1238++0x03
|
|
line.long 0x00 "PDAC_W0_71,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x123C++0x03
|
|
line.long 0x00 "PDAC_W1_71,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1240++0x03
|
|
line.long 0x00 "PDAC_W0_72,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1244++0x03
|
|
line.long 0x00 "PDAC_W1_72,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1248++0x03
|
|
line.long 0x00 "PDAC_W0_73,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x124C++0x03
|
|
line.long 0x00 "PDAC_W1_73,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1250++0x03
|
|
line.long 0x00 "PDAC_W0_74,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1254++0x03
|
|
line.long 0x00 "PDAC_W1_74,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1258++0x03
|
|
line.long 0x00 "PDAC_W0_75,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x125C++0x03
|
|
line.long 0x00 "PDAC_W1_75,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1480++0x03
|
|
line.long 0x00 "PDAC_W0_144,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1484++0x03
|
|
line.long 0x00 "PDAC_W1_144,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1488++0x03
|
|
line.long 0x00 "PDAC_W0_145,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x148C++0x03
|
|
line.long 0x00 "PDAC_W1_145,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1490++0x03
|
|
line.long 0x00 "PDAC_W0_146,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1494++0x03
|
|
line.long 0x00 "PDAC_W1_146,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1498++0x03
|
|
line.long 0x00 "PDAC_W0_147,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x149C++0x03
|
|
line.long 0x00 "PDAC_W1_147,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14A0++0x03
|
|
line.long 0x00 "PDAC_W0_148,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14A4++0x03
|
|
line.long 0x00 "PDAC_W1_148,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14A8++0x03
|
|
line.long 0x00 "PDAC_W0_149,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14AC++0x03
|
|
line.long 0x00 "PDAC_W1_149,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14B0++0x03
|
|
line.long 0x00 "PDAC_W0_150,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14B4++0x03
|
|
line.long 0x00 "PDAC_W1_150,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14B8++0x03
|
|
line.long 0x00 "PDAC_W0_151,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14BC++0x03
|
|
line.long 0x00 "PDAC_W1_151,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14C0++0x03
|
|
line.long 0x00 "PDAC_W0_152,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14C4++0x03
|
|
line.long 0x00 "PDAC_W1_152,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14D0++0x03
|
|
line.long 0x00 "PDAC_W0_154,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14D4++0x03
|
|
line.long 0x00 "PDAC_W1_154,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14D8++0x03
|
|
line.long 0x00 "PDAC_W0_155,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14DC++0x03
|
|
line.long 0x00 "PDAC_W1_155,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14E0++0x03
|
|
line.long 0x00 "PDAC_W0_156,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14E4++0x03
|
|
line.long 0x00 "PDAC_W1_156,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14E8++0x03
|
|
line.long 0x00 "PDAC_W0_157,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14EC++0x03
|
|
line.long 0x00 "PDAC_W1_157,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x14F0++0x03
|
|
line.long 0x00 "PDAC_W0_158,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14F4++0x03
|
|
line.long 0x00 "PDAC_W1_158,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1500++0x03
|
|
line.long 0x00 "PDAC_W0_160,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1504++0x03
|
|
line.long 0x00 "PDAC_W1_160,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1508++0x03
|
|
line.long 0x00 "PDAC_W0_161,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x150C++0x03
|
|
line.long 0x00 "PDAC_W1_161,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1518++0x03
|
|
line.long 0x00 "PDAC_W0_163,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x151C++0x03
|
|
line.long 0x00 "PDAC_W1_163,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1520++0x03
|
|
line.long 0x00 "PDAC_W0_164,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1524++0x03
|
|
line.long 0x00 "PDAC_W1_164,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1528++0x03
|
|
line.long 0x00 "PDAC_W0_165,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x152C++0x03
|
|
line.long 0x00 "PDAC_W1_165,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1530++0x03
|
|
line.long 0x00 "PDAC_W0_166,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1534++0x03
|
|
line.long 0x00 "PDAC_W1_166,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1538++0x03
|
|
line.long 0x00 "PDAC_W0_167,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x153C++0x03
|
|
line.long 0x00 "PDAC_W1_167,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1540++0x03
|
|
line.long 0x00 "PDAC_W0_168,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1544++0x03
|
|
line.long 0x00 "PDAC_W1_168,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1548++0x03
|
|
line.long 0x00 "PDAC_W0_169,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x154C++0x03
|
|
line.long 0x00 "PDAC_W1_169,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1550++0x03
|
|
line.long 0x00 "PDAC_W0_170,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1554++0x03
|
|
line.long 0x00 "PDAC_W1_170,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1558++0x03
|
|
line.long 0x00 "PDAC_W0_171,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x155C++0x03
|
|
line.long 0x00 "PDAC_W1_171,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1560++0x03
|
|
line.long 0x00 "PDAC_W0_172,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1564++0x03
|
|
line.long 0x00 "PDAC_W1_172,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1568++0x03
|
|
line.long 0x00 "PDAC_W0_173,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x156C++0x03
|
|
line.long 0x00 "PDAC_W1_173,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1590++0x03
|
|
line.long 0x00 "PDAC_W0_178,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1594++0x03
|
|
line.long 0x00 "PDAC_W1_178,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1840++0x03
|
|
line.long 0x00 "PDAC_W0_264,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1844++0x03
|
|
line.long 0x00 "PDAC_W1_264,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1848++0x03
|
|
line.long 0x00 "PDAC_W0_265,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x184C++0x03
|
|
line.long 0x00 "PDAC_W1_265,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1878++0x03
|
|
line.long 0x00 "PDAC_W0_271,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x187C++0x03
|
|
line.long 0x00 "PDAC_W1_271,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1880++0x03
|
|
line.long 0x00 "PDAC_W0_272,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1884++0x03
|
|
line.long 0x00 "PDAC_W1_272,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x18D8++0x03
|
|
line.long 0x00 "PDAC_W0_283,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x18DC++0x03
|
|
line.long 0x00 "PDAC_W1_283,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1908++0x03
|
|
line.long 0x00 "PDAC_W0_289,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x190C++0x03
|
|
line.long 0x00 "PDAC_W1_289,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1910++0x03
|
|
line.long 0x00 "PDAC_W0_290,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1914++0x03
|
|
line.long 0x00 "PDAC_W1_290,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1918++0x03
|
|
line.long 0x00 "PDAC_W0_291,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x191C++0x03
|
|
line.long 0x00 "PDAC_W1_291,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1920++0x03
|
|
line.long 0x00 "PDAC_W0_292,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1924++0x03
|
|
line.long 0x00 "PDAC_W1_292,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1928++0x03
|
|
line.long 0x00 "PDAC_W0_293,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x192C++0x03
|
|
line.long 0x00 "PDAC_W1_293,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1930++0x03
|
|
line.long 0x00 "PDAC_W0_294,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1934++0x03
|
|
line.long 0x00 "PDAC_W1_294,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1938++0x03
|
|
line.long 0x00 "PDAC_W0_295,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x193C++0x03
|
|
line.long 0x00 "PDAC_W1_295,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1948++0x03
|
|
line.long 0x00 "PDAC_W0_297,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x194C++0x03
|
|
line.long 0x00 "PDAC_W1_297,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1950++0x03
|
|
line.long 0x00 "PDAC_W0_298,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1954++0x03
|
|
line.long 0x00 "PDAC_W1_298,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1958++0x03
|
|
line.long 0x00 "PDAC_W0_299,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x195C++0x03
|
|
line.long 0x00 "PDAC_W1_299,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1960++0x03
|
|
line.long 0x00 "PDAC_W0_300,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1964++0x03
|
|
line.long 0x00 "PDAC_W1_300,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1968++0x03
|
|
line.long 0x00 "PDAC_W0_301,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x196C++0x03
|
|
line.long 0x00 "PDAC_W1_301,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1970++0x03
|
|
line.long 0x00 "PDAC_W0_302,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1974++0x03
|
|
line.long 0x00 "PDAC_W1_302,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1988++0x03
|
|
line.long 0x00 "PDAC_W0_305,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x198C++0x03
|
|
line.long 0x00 "PDAC_W1_305,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1998++0x03
|
|
line.long 0x00 "PDAC_W0_307,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x199C++0x03
|
|
line.long 0x00 "PDAC_W1_307,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19A0++0x03
|
|
line.long 0x00 "PDAC_W0_308,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19A4++0x03
|
|
line.long 0x00 "PDAC_W1_308,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19A8++0x03
|
|
line.long 0x00 "PDAC_W0_309,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19AC++0x03
|
|
line.long 0x00 "PDAC_W1_309,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19B0++0x03
|
|
line.long 0x00 "PDAC_W0_310,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19B4++0x03
|
|
line.long 0x00 "PDAC_W1_310,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19B8++0x03
|
|
line.long 0x00 "PDAC_W0_311,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19BC++0x03
|
|
line.long 0x00 "PDAC_W1_311,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19C0++0x03
|
|
line.long 0x00 "PDAC_W0_312,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19C4++0x03
|
|
line.long 0x00 "PDAC_W1_312,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19D0++0x03
|
|
line.long 0x00 "PDAC_W0_314,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19D4++0x03
|
|
line.long 0x00 "PDAC_W1_314,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19E8++0x03
|
|
line.long 0x00 "PDAC_W0_317,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19EC++0x03
|
|
line.long 0x00 "PDAC_W1_317,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19F0++0x03
|
|
line.long 0x00 "PDAC_W0_318,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19F4++0x03
|
|
line.long 0x00 "PDAC_W1_318,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x19F8++0x03
|
|
line.long 0x00 "PDAC_W0_319,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x19FC++0x03
|
|
line.long 0x00 "PDAC_W1_319,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1A00++0x03
|
|
line.long 0x00 "PDAC_W0_320,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1A04++0x03
|
|
line.long 0x00 "PDAC_W1_320,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1A08++0x03
|
|
line.long 0x00 "PDAC_W0_321,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1A0C++0x03
|
|
line.long 0x00 "PDAC_W1_321,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1A18++0x03
|
|
line.long 0x00 "PDAC_W0_323,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1A1C++0x03
|
|
line.long 0x00 "PDAC_W1_323,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1C80++0x03
|
|
line.long 0x00 "PDAC_W0_400,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1C84++0x03
|
|
line.long 0x00 "PDAC_W1_400,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D08++0x03
|
|
line.long 0x00 "PDAC_W0_417,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D0C++0x03
|
|
line.long 0x00 "PDAC_W1_417,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D10++0x03
|
|
line.long 0x00 "PDAC_W0_418,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D14++0x03
|
|
line.long 0x00 "PDAC_W1_418,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D20++0x03
|
|
line.long 0x00 "PDAC_W0_420,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D24++0x03
|
|
line.long 0x00 "PDAC_W1_420,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D28++0x03
|
|
line.long 0x00 "PDAC_W0_421,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D2C++0x03
|
|
line.long 0x00 "PDAC_W1_421,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D30++0x03
|
|
line.long 0x00 "PDAC_W0_422,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D34++0x03
|
|
line.long 0x00 "PDAC_W1_422,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D38++0x03
|
|
line.long 0x00 "PDAC_W0_423,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D3C++0x03
|
|
line.long 0x00 "PDAC_W1_423,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D40++0x03
|
|
line.long 0x00 "PDAC_W0_424,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D44++0x03
|
|
line.long 0x00 "PDAC_W1_424,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D48++0x03
|
|
line.long 0x00 "PDAC_W0_425,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D4C++0x03
|
|
line.long 0x00 "PDAC_W1_425,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D50++0x03
|
|
line.long 0x00 "PDAC_W0_426,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D54++0x03
|
|
line.long 0x00 "PDAC_W1_426,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D58++0x03
|
|
line.long 0x00 "PDAC_W0_427,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D5C++0x03
|
|
line.long 0x00 "PDAC_W1_427,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D60++0x03
|
|
line.long 0x00 "PDAC_W0_428,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D64++0x03
|
|
line.long 0x00 "PDAC_W1_428,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D68++0x03
|
|
line.long 0x00 "PDAC_W0_429,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D6C++0x03
|
|
line.long 0x00 "PDAC_W1_429,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D70++0x03
|
|
line.long 0x00 "PDAC_W0_430,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D74++0x03
|
|
line.long 0x00 "PDAC_W1_430,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D78++0x03
|
|
line.long 0x00 "PDAC_W0_431,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D7C++0x03
|
|
line.long 0x00 "PDAC_W1_431,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D80++0x03
|
|
line.long 0x00 "PDAC_W0_432,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D84++0x03
|
|
line.long 0x00 "PDAC_W1_432,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D88++0x03
|
|
line.long 0x00 "PDAC_W0_433,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D8C++0x03
|
|
line.long 0x00 "PDAC_W1_433,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1D98++0x03
|
|
line.long 0x00 "PDAC_W0_435,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1D9C++0x03
|
|
line.long 0x00 "PDAC_W1_435,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x1DA8++0x03
|
|
line.long 0x00 "PDAC_W0_437,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by SNUM in the.."
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1DAC++0x03
|
|
line.long 0x00 "PDAC_W1_437,Peripheral Domain Access Control"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The PDACs assignment is invalid,1: The PDACs assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: Entire PDACs can be written,1: Entire PDACs can be written,2: Domain x can only update the DxACP field no..,3: PDACs is locked (read-only) until the next.."
|
|
group.long 0x2000++0x03
|
|
line.long 0x00 "MRGD_W0_0,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2004++0x03
|
|
line.long 0x00 "MRGD_W1_0,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2008++0x03
|
|
line.long 0x00 "MRGD_W2_0,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x200C++0x03
|
|
line.long 0x00 "MRGD_W3_0,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x200C++0x03
|
|
line.long 0x00 "MRGD_W3_0,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2020++0x03
|
|
line.long 0x00 "MRGD_W0_1,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2024++0x03
|
|
line.long 0x00 "MRGD_W1_1,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2028++0x03
|
|
line.long 0x00 "MRGD_W2_1,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x202C++0x03
|
|
line.long 0x00 "MRGD_W3_1,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x202C++0x03
|
|
line.long 0x00 "MRGD_W3_1,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2040++0x03
|
|
line.long 0x00 "MRGD_W0_2,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2044++0x03
|
|
line.long 0x00 "MRGD_W1_2,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2048++0x03
|
|
line.long 0x00 "MRGD_W2_2,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x204C++0x03
|
|
line.long 0x00 "MRGD_W3_2,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x204C++0x03
|
|
line.long 0x00 "MRGD_W3_2,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2060++0x03
|
|
line.long 0x00 "MRGD_W0_3,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2064++0x03
|
|
line.long 0x00 "MRGD_W1_3,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2068++0x03
|
|
line.long 0x00 "MRGD_W2_3,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x206C++0x03
|
|
line.long 0x00 "MRGD_W3_3,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x206C++0x03
|
|
line.long 0x00 "MRGD_W3_3,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2200++0x03
|
|
line.long 0x00 "MRGD_W0_16,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2204++0x03
|
|
line.long 0x00 "MRGD_W1_16,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2208++0x03
|
|
line.long 0x00 "MRGD_W2_16,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x220C++0x03
|
|
line.long 0x00 "MRGD_W3_16,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x220C++0x03
|
|
line.long 0x00 "MRGD_W3_16,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2220++0x03
|
|
line.long 0x00 "MRGD_W0_17,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2224++0x03
|
|
line.long 0x00 "MRGD_W1_17,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2228++0x03
|
|
line.long 0x00 "MRGD_W2_17,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x222C++0x03
|
|
line.long 0x00 "MRGD_W3_17,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x222C++0x03
|
|
line.long 0x00 "MRGD_W3_17,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2240++0x03
|
|
line.long 0x00 "MRGD_W0_18,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2244++0x03
|
|
line.long 0x00 "MRGD_W1_18,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2248++0x03
|
|
line.long 0x00 "MRGD_W2_18,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x224C++0x03
|
|
line.long 0x00 "MRGD_W3_18,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x224C++0x03
|
|
line.long 0x00 "MRGD_W3_18,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2260++0x03
|
|
line.long 0x00 "MRGD_W0_19,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2264++0x03
|
|
line.long 0x00 "MRGD_W1_19,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2268++0x03
|
|
line.long 0x00 "MRGD_W2_19,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x226C++0x03
|
|
line.long 0x00 "MRGD_W3_19,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x226C++0x03
|
|
line.long 0x00 "MRGD_W3_19,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2280++0x03
|
|
line.long 0x00 "MRGD_W0_20,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2284++0x03
|
|
line.long 0x00 "MRGD_W1_20,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2288++0x03
|
|
line.long 0x00 "MRGD_W2_20,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x228C++0x03
|
|
line.long 0x00 "MRGD_W3_20,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x228C++0x03
|
|
line.long 0x00 "MRGD_W3_20,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x22A0++0x03
|
|
line.long 0x00 "MRGD_W0_21,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x22A4++0x03
|
|
line.long 0x00 "MRGD_W1_21,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x22A8++0x03
|
|
line.long 0x00 "MRGD_W2_21,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x22AC++0x03
|
|
line.long 0x00 "MRGD_W3_21,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x22AC++0x03
|
|
line.long 0x00 "MRGD_W3_21,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x22C0++0x03
|
|
line.long 0x00 "MRGD_W0_22,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x22C4++0x03
|
|
line.long 0x00 "MRGD_W1_22,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x22C8++0x03
|
|
line.long 0x00 "MRGD_W2_22,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x22CC++0x03
|
|
line.long 0x00 "MRGD_W3_22,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x22CC++0x03
|
|
line.long 0x00 "MRGD_W3_22,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x22E0++0x03
|
|
line.long 0x00 "MRGD_W0_23,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x22E4++0x03
|
|
line.long 0x00 "MRGD_W1_23,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x22E8++0x03
|
|
line.long 0x00 "MRGD_W2_23,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x22EC++0x03
|
|
line.long 0x00 "MRGD_W3_23,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x22EC++0x03
|
|
line.long 0x00 "MRGD_W3_23,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2400++0x03
|
|
line.long 0x00 "MRGD_W0_32,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2404++0x03
|
|
line.long 0x00 "MRGD_W1_32,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2408++0x03
|
|
line.long 0x00 "MRGD_W2_32,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x240C++0x03
|
|
line.long 0x00 "MRGD_W3_32,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x240C++0x03
|
|
line.long 0x00 "MRGD_W3_32,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2420++0x03
|
|
line.long 0x00 "MRGD_W0_33,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2424++0x03
|
|
line.long 0x00 "MRGD_W1_33,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2428++0x03
|
|
line.long 0x00 "MRGD_W2_33,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x242C++0x03
|
|
line.long 0x00 "MRGD_W3_33,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x242C++0x03
|
|
line.long 0x00 "MRGD_W3_33,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2440++0x03
|
|
line.long 0x00 "MRGD_W0_34,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2444++0x03
|
|
line.long 0x00 "MRGD_W1_34,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2448++0x03
|
|
line.long 0x00 "MRGD_W2_34,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x244C++0x03
|
|
line.long 0x00 "MRGD_W3_34,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x244C++0x03
|
|
line.long 0x00 "MRGD_W3_34,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2460++0x03
|
|
line.long 0x00 "MRGD_W0_35,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2464++0x03
|
|
line.long 0x00 "MRGD_W1_35,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2468++0x03
|
|
line.long 0x00 "MRGD_W2_35,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x246C++0x03
|
|
line.long 0x00 "MRGD_W3_35,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x246C++0x03
|
|
line.long 0x00 "MRGD_W3_35,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2600++0x03
|
|
line.long 0x00 "MRGD_W0_48,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2604++0x03
|
|
line.long 0x00 "MRGD_W1_48,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2608++0x03
|
|
line.long 0x00 "MRGD_W2_48,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x260C++0x03
|
|
line.long 0x00 "MRGD_W3_48,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x260C++0x03
|
|
line.long 0x00 "MRGD_W3_48,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2620++0x03
|
|
line.long 0x00 "MRGD_W0_49,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2624++0x03
|
|
line.long 0x00 "MRGD_W1_49,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2628++0x03
|
|
line.long 0x00 "MRGD_W2_49,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x262C++0x03
|
|
line.long 0x00 "MRGD_W3_49,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x262C++0x03
|
|
line.long 0x00 "MRGD_W3_49,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2640++0x03
|
|
line.long 0x00 "MRGD_W0_50,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2644++0x03
|
|
line.long 0x00 "MRGD_W1_50,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2648++0x03
|
|
line.long 0x00 "MRGD_W2_50,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x264C++0x03
|
|
line.long 0x00 "MRGD_W3_50,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x264C++0x03
|
|
line.long 0x00 "MRGD_W3_50,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2660++0x03
|
|
line.long 0x00 "MRGD_W0_51,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2664++0x03
|
|
line.long 0x00 "MRGD_W1_51,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2668++0x03
|
|
line.long 0x00 "MRGD_W2_51,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x266C++0x03
|
|
line.long 0x00 "MRGD_W3_51,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x266C++0x03
|
|
line.long 0x00 "MRGD_W3_51,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2800++0x03
|
|
line.long 0x00 "MRGD_W0_64,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2804++0x03
|
|
line.long 0x00 "MRGD_W1_64,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2808++0x03
|
|
line.long 0x00 "MRGD_W2_64,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x280C++0x03
|
|
line.long 0x00 "MRGD_W3_64,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x280C++0x03
|
|
line.long 0x00 "MRGD_W3_64,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2820++0x03
|
|
line.long 0x00 "MRGD_W0_65,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2824++0x03
|
|
line.long 0x00 "MRGD_W1_65,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2828++0x03
|
|
line.long 0x00 "MRGD_W2_65,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x282C++0x03
|
|
line.long 0x00 "MRGD_W3_65,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x282C++0x03
|
|
line.long 0x00 "MRGD_W3_65,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2840++0x03
|
|
line.long 0x00 "MRGD_W0_66,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2844++0x03
|
|
line.long 0x00 "MRGD_W1_66,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2848++0x03
|
|
line.long 0x00 "MRGD_W2_66,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x284C++0x03
|
|
line.long 0x00 "MRGD_W3_66,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x284C++0x03
|
|
line.long 0x00 "MRGD_W3_66,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2860++0x03
|
|
line.long 0x00 "MRGD_W0_67,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2864++0x03
|
|
line.long 0x00 "MRGD_W1_67,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2868++0x03
|
|
line.long 0x00 "MRGD_W2_67,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x286C++0x03
|
|
line.long 0x00 "MRGD_W3_67,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x286C++0x03
|
|
line.long 0x00 "MRGD_W3_67,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2A00++0x03
|
|
line.long 0x00 "MRGD_W0_80,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2A04++0x03
|
|
line.long 0x00 "MRGD_W1_80,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2A08++0x03
|
|
line.long 0x00 "MRGD_W2_80,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2A0C++0x03
|
|
line.long 0x00 "MRGD_W3_80,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2A0C++0x03
|
|
line.long 0x00 "MRGD_W3_80,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2A20++0x03
|
|
line.long 0x00 "MRGD_W0_81,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2A24++0x03
|
|
line.long 0x00 "MRGD_W1_81,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2A28++0x03
|
|
line.long 0x00 "MRGD_W2_81,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2A2C++0x03
|
|
line.long 0x00 "MRGD_W3_81,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2A2C++0x03
|
|
line.long 0x00 "MRGD_W3_81,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2A40++0x03
|
|
line.long 0x00 "MRGD_W0_82,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2A44++0x03
|
|
line.long 0x00 "MRGD_W1_82,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2A48++0x03
|
|
line.long 0x00 "MRGD_W2_82,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2A4C++0x03
|
|
line.long 0x00 "MRGD_W3_82,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2A4C++0x03
|
|
line.long 0x00 "MRGD_W3_82,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2A60++0x03
|
|
line.long 0x00 "MRGD_W0_83,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2A64++0x03
|
|
line.long 0x00 "MRGD_W1_83,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2A68++0x03
|
|
line.long 0x00 "MRGD_W2_83,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2A6C++0x03
|
|
line.long 0x00 "MRGD_W3_83,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2A6C++0x03
|
|
line.long 0x00 "MRGD_W3_83,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2C00++0x03
|
|
line.long 0x00 "MRGD_W0_96,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2C04++0x03
|
|
line.long 0x00 "MRGD_W1_96,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2C08++0x03
|
|
line.long 0x00 "MRGD_W2_96,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2C0C++0x03
|
|
line.long 0x00 "MRGD_W3_96,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2C0C++0x03
|
|
line.long 0x00 "MRGD_W3_96,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2C20++0x03
|
|
line.long 0x00 "MRGD_W0_97,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2C24++0x03
|
|
line.long 0x00 "MRGD_W1_97,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2C28++0x03
|
|
line.long 0x00 "MRGD_W2_97,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2C2C++0x03
|
|
line.long 0x00 "MRGD_W3_97,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2C2C++0x03
|
|
line.long 0x00 "MRGD_W3_97,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2C40++0x03
|
|
line.long 0x00 "MRGD_W0_98,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2C44++0x03
|
|
line.long 0x00 "MRGD_W1_98,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2C48++0x03
|
|
line.long 0x00 "MRGD_W2_98,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2C4C++0x03
|
|
line.long 0x00 "MRGD_W3_98,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2C4C++0x03
|
|
line.long 0x00 "MRGD_W3_98,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2C60++0x03
|
|
line.long 0x00 "MRGD_W0_99,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2C64++0x03
|
|
line.long 0x00 "MRGD_W1_99,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2C68++0x03
|
|
line.long 0x00 "MRGD_W2_99,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2C6C++0x03
|
|
line.long 0x00 "MRGD_W3_99,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2C6C++0x03
|
|
line.long 0x00 "MRGD_W3_99,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2C80++0x03
|
|
line.long 0x00 "MRGD_W0_100,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2C84++0x03
|
|
line.long 0x00 "MRGD_W1_100,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2C88++0x03
|
|
line.long 0x00 "MRGD_W2_100,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2C8C++0x03
|
|
line.long 0x00 "MRGD_W3_100,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2C8C++0x03
|
|
line.long 0x00 "MRGD_W3_100,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2CA0++0x03
|
|
line.long 0x00 "MRGD_W0_101,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2CA4++0x03
|
|
line.long 0x00 "MRGD_W1_101,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2CA8++0x03
|
|
line.long 0x00 "MRGD_W2_101,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2CAC++0x03
|
|
line.long 0x00 "MRGD_W3_101,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2CAC++0x03
|
|
line.long 0x00 "MRGD_W3_101,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2CC0++0x03
|
|
line.long 0x00 "MRGD_W0_102,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2CC4++0x03
|
|
line.long 0x00 "MRGD_W1_102,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2CC8++0x03
|
|
line.long 0x00 "MRGD_W2_102,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2CCC++0x03
|
|
line.long 0x00 "MRGD_W3_102,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2CCC++0x03
|
|
line.long 0x00 "MRGD_W3_102,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
group.long 0x2CE0++0x03
|
|
line.long 0x00 "MRGD_W0_103,Memory Region Descriptor"
|
|
hexmask.long 0x00 5.--31. 1. "BASEADDR,Base Address"
|
|
group.long 0x2CE4++0x03
|
|
line.long 0x00 "MRGD_W1_103,Memory Region Descriptor"
|
|
bitfld.long 0x00 8.--12. "SZ,Region Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRD,Subregion disable"
|
|
group.long 0x2CE8++0x03
|
|
line.long 0x00 "MRGD_W2_103,Memory Region Descriptor"
|
|
bitfld.long 0x00 30. "SE,Semaphore enable" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 24.--27. "SNUM,Semaphore number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain 6 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain 5 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain 4 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain 3 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain 2 access control policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain 1 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain 0 access control policy" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x2CEC++0x03
|
|
line.long 0x00 "MRGD_W3_103,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,?,2: no description available,3: no description available"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x2CEC++0x03
|
|
line.long 0x00 "MRGD_W3_103,Memory Region Descriptor"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 29.--30. "LK2,Lock" "0: no description available,1: no description available,2: no description available,3: no description available"
|
|
endif
|
|
tree.end
|
|
tree "SEMA42"
|
|
repeat 2. (list 0. 1.) (list ad:0x4101B000 ad:0x401B0000)
|
|
tree "SEMA42_$1"
|
|
base $2
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "GATE3,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "GATE3,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "GATE2,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "2" "1" )(list 0x0 0x1 )
|
|
group.byte ($2+0x01)++0x00
|
|
line.byte 0x00 "GATE$1,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "1" "0" )(list 0x0 0x1 )
|
|
group.byte ($2+0x02)++0x00
|
|
line.byte 0x00 "GATE$1,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "GATE0,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "GATE7,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "GATE7,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "GATE6,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "GATE6,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "GATE5,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "GATE5,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "GATE4,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "4" "11" )(list 0x0 0x1 )
|
|
group.byte ($2+0x07)++0x00
|
|
line.byte 0x00 "GATE$1,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "GATE11,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "GATE10,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "GATE10,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "GATE9,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "GATE9,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "GATE8,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "GATE8,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "GATE15,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
repeat 2. (strings "15" "14" )(list 0x0 0x1 )
|
|
group.byte ($2+0x0C)++0x00
|
|
line.byte 0x00 "GATE$1,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
repeat 2. (strings "14" "13" )(list 0x0 0x1 )
|
|
group.byte ($2+0x0D)++0x00
|
|
line.byte 0x00 "GATE$1,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
repeat.end
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "GATE13,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.byte 0x0F++0x00
|
|
line.byte 0x00 "GATE12,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,GTFSM" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.byte 0x0F++0x00
|
|
line.byte 0x00 "GATE12,Gate Register"
|
|
bitfld.byte 0x00 0.--3. "GTFSM,Gate Finite State Machine" "0: The gate is unlocked (free),1: The gate has been locked by processor 0,2: The gate has been locked by processor 1,3: The gate has been locked by processor 2,4: The gate has been locked by processor 3,5: The gate has been locked by processor 4,6: The gate has been locked by processor 5,7: The gate has been locked by processor 6,8: The gate has been locked by processor 7,9: The gate has been locked by processor 8,10: The gate has been locked by processor 9,11: The gate has been locked by processor 10,12: The gate has been locked by processor 11,13: The gate has been locked by processor 12,14: The gate has been locked by processor 13,15: The gate has been locked by processor 14"
|
|
wgroup.word 0x42++0x01
|
|
line.word 0x00 "RSTGT_W,Reset Gate"
|
|
hexmask.word.byte 0x00 8.--15. 1. "RSTGDP,Reset Gate Data Pattern"
|
|
hexmask.word.byte 0x00 0.--7. 1. "RSTGTN,Reset Gate Number"
|
|
rgroup.word 0x42++0x01
|
|
line.word 0x00 "RSTGT_R,Reset Gate"
|
|
bitfld.word 0x00 14.--15. "ROZ,ROZ" "0,1,2,3"
|
|
bitfld.word 0x00 12.--13. "RSTGSM,Reset Gate Finite State Machine" "0: Idle waiting for the first data pattern,1: Waiting for the second data pattern,2: The 2-write sequence has completed,3: This state encoding is never used and.."
|
|
newline
|
|
bitfld.word 0x00 8.--11. "RSTGMS,Reset Gate Bus Master" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word.byte 0x00 0.--7. 1. "RSTGTN,Reset Gate Number"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.word 0x42++0x01
|
|
line.word 0x00 "RSTGT_R,Reset Gate"
|
|
bitfld.word 0x00 14.--15. "ROZ,ROZ" "0,1,2,3"
|
|
bitfld.word 0x00 12.--13. "RSTGSM,RSTGSM" "0: Idle waiting for the first data pattern,1: Waiting for the second data pattern,2: The 2-write sequence has completed,3: This state encoding is never used and.."
|
|
newline
|
|
bitfld.word 0x00 8.--11. "RSTGMS,RSTGMS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word.byte 0x00 0.--7. 1. "RSTGTN,RSTGTN"
|
|
wgroup.word 0x42++0x01
|
|
line.word 0x00 "RSTGT_W,Reset Gate"
|
|
hexmask.word.byte 0x00 8.--15. 1. "RSTGDP,RSTGDP"
|
|
hexmask.word.byte 0x00 0.--7. 1. "RSTGTN,RSTGTN"
|
|
endif
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "DMA_CH_MUX"
|
|
repeat 2. (list 0. 1.) (list ad:0x41020000 ad:0x40210000)
|
|
tree "DMA_CH_MUX$1"
|
|
base $2
|
|
repeat 32. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "CHCFG[$1],Channel 0 Configuration Register $1"
|
|
bitfld.long 0x00 31. "ENBL,DMA Mux Channel Enable" "0: DMA Mux channel is disabled,1: DMA Mux channel is enabled"
|
|
bitfld.long 0x00 30. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled,1: Triggering is enabled"
|
|
newline
|
|
bitfld.long 0x00 29. "A_ON,DMA Channel Always Enable" "0: DMA Channel Always ON function is disabled,1: DMA Channel Always ON function is enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SOURCE,DMA Channel Source (Slot Number)"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "LLWU"
|
|
base ad:0x41021000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PINS,Pin Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MODULES,Module Number"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DMAS,DMA Number"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FILTERS,Filter Number"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PE1,Pin Enable 1 register"
|
|
bitfld.long 0x00 30.--31. "WUPE15,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 28.--29. "WUPE14,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 26.--27. "WUPE13,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 24.--25. "WUPE12,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 22.--23. "WUPE11,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 20.--21. "WUPE10,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 18.--19. "WUPE9,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 16.--17. "WUPE8,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 14.--15. "WUPE7,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 12.--13. "WUPE6,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "WUPE5,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 8.--9. "WUPE4,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 6.--7. "WUPE3,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 4.--5. "WUPE2,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "WUPE1,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 0.--1. "WUPE0,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PE2,Pin Enable 2 register"
|
|
bitfld.long 0x00 30.--31. "Reserved31,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 28.--29. "Reserved30,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 26.--27. "Reserved29,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 24.--25. "Reserved28,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 22.--23. "Reserved27,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 20.--21. "Reserved26,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 18.--19. "Reserved25,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 16.--17. "Reserved24,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 14.--15. "Reserved23,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 12.--13. "Reserved22,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "Reserved21,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 8.--9. "Reserved20,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 6.--7. "Reserved19,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 4.--5. "Reserved18,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "Reserved17,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
bitfld.long 0x00 0.--1. "Reserved16,Wakeup pin enable for LLWU_Pn" "0: External input pin disabled as wakeup input,1: External input pin enabled with rising edge..,2: External input pin enabled with falling edge..,3: External input pin enabled with any change.."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ME,Module Interrupt Enable register"
|
|
rbitfld.long 0x00 7. "Reserved7,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
bitfld.long 0x00 6. "WUME6,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 5. "Reserved5,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
bitfld.long 0x00 4. "WUME4,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
newline
|
|
bitfld.long 0x00 3. "WUME3,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
bitfld.long 0x00 2. "WUME2,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
newline
|
|
bitfld.long 0x00 1. "WUME1,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
bitfld.long 0x00 0. "WUME0,Wakeup module enable for module n" "0: Internal module flag not used as wakeup source,1: Internal module flag used as wakeup source"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DE,Module DMA/Trigger Enable register"
|
|
bitfld.long 0x00 7. "Reserved7,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
bitfld.long 0x00 6. "Reserved6,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
newline
|
|
bitfld.long 0x00 5. "Reserved5,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
bitfld.long 0x00 4. "Reserved4,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
newline
|
|
bitfld.long 0x00 3. "Reserved3,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
bitfld.long 0x00 2. "Reserved2,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
newline
|
|
bitfld.long 0x00 1. "Reserved1,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
bitfld.long 0x00 0. "Reserved0,DMA/Trigger wakeup enable for module n" "0: Internal module request not enabled as a..,1: Internal module request enabled as a.."
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PF,Pin Flag register"
|
|
rbitfld.long 0x00 31. "Reserved31,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 30. "Reserved30,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 29. "Reserved29,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 28. "Reserved28,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 27. "Reserved27,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 26. "Reserved26,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 25. "Reserved25,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 24. "Reserved24,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 23. "Reserved23,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 22. "Reserved22,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 21. "Reserved21,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 20. "Reserved20,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 19. "Reserved19,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 18. "Reserved18,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
rbitfld.long 0x00 17. "Reserved17,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rbitfld.long 0x00 16. "Reserved16,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 15. "WUF15,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 14. "WUF14,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 13. "WUF13,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 12. "WUF12,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 11. "WUF11,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 10. "WUF10,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 9. "WUF9,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 8. "WUF8,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 7. "WUF7,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 6. "WUF6,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 5. "WUF5,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 4. "WUF4,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 3. "WUF3,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 2. "WUF2,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
newline
|
|
eventfld.long 0x00 1. "WUF1,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
eventfld.long 0x00 0. "WUF0,Wakeup flag for LLWU_Pn" "0: LLWU_Pn input was not a wakeup source,1: LLWU_Pn input was a wakeup source"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "MF,Module Interrupt Flag register"
|
|
bitfld.long 0x00 7. "Reserved7,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
bitfld.long 0x00 6. "MWUF6,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
newline
|
|
bitfld.long 0x00 5. "Reserved5,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
bitfld.long 0x00 4. "MWUF4,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
newline
|
|
bitfld.long 0x00 3. "MWUF3,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
bitfld.long 0x00 2. "MWUF2,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
newline
|
|
bitfld.long 0x00 1. "MWUF1,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
bitfld.long 0x00 0. "MWUF0,Wakeup flag for module n" "0: Module input was not a wakeup source,1: Module input was a wakeup source"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FILT,Pin Filter register"
|
|
eventfld.long 0x00 31. "FILTF4,Filter 4 Flag" "0: Pin Filter 1 was not a wakeup source,1: Pin Filter 1 was a wakeup source"
|
|
bitfld.long 0x00 29.--30. "FILTE4,Filter 4 Enable" "0: Filter disabled,1: Filter posedge detect enabled,2: Filter negedge detect enabled,3: Filter any edge detect enabled"
|
|
newline
|
|
bitfld.long 0x00 24.--28. "FILTSEL4,Filter 4 Pin Select" "0: Select LLWU_P0 for filter,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Select LLWU_P31 for filter"
|
|
eventfld.long 0x00 23. "FILTF3,Filter 3 Flag" "0: Pin Filter 1 was not a wakeup source,1: Pin Filter 1 was a wakeup source"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "FILTE3,Filter 3 Enable" "0: Filter disabled,1: Filter posedge detect enabled,2: Filter negedge detect enabled,3: Filter any edge detect enabled"
|
|
bitfld.long 0x00 16.--20. "FILTSEL3,Filter 3 Pin Select" "0: Select LLWU_P0 for filter,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Select LLWU_P31 for filter"
|
|
newline
|
|
eventfld.long 0x00 15. "FILTF2,Filter 2 Flag" "0: Pin Filter 2 was not a wakeup source,1: Pin Filter 2 was a wakeup source"
|
|
bitfld.long 0x00 13.--14. "FILTE2,Filter 2 Enable" "0: Filter disabled,1: Filter posedge detect enabled,2: Filter negedge detect enabled,3: Filter any edge detect enabled"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "FILTSEL2,Filter 2 Pin Select" "0: Select LLWU_P0 for filter,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Select LLWU_P31 for filter"
|
|
eventfld.long 0x00 7. "FILTF1,Filter 1 Flag" "0: Pin Filter 1 was not a wakeup source,1: Pin Filter 1 was a wakeup source"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "FILTE1,Filter 1 Enable" "0: Filter disabled,1: Filter posedge detect enabled,2: Filter negedge detect enabled,3: Filter any edge detect enabled"
|
|
bitfld.long 0x00 0.--4. "FILTSEL1,Filter 1 Pin Select" "0: Select LLWU_P0 for filter,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: Select LLWU_P31 for filter"
|
|
tree.end
|
|
sif cpuis("IMX7ULP-CM4")
|
|
tree "MU (MUA)"
|
|
base ad:0x41022000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VER,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PAR,Parameter Register"
|
|
hexmask.long 0x00 0.--31. 1. "PARAMETER,This bitfield contains the parameter settings of MUA"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "TR[$1],Transmit Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
rgroup.long ($2+0x40)++0x03
|
|
line.long 0x00 "RR[$1],Receive Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
repeat.end
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 28.--31. "GIPn,GIPn" "0: MUA general purpose interrupt n is not pending,1: MUA general purpose interrupt n is pending,?..."
|
|
rbitfld.long 0x00 24.--27. "RFn,RFn" "0: MUA RRn register is not full (default),1: MUA RRn register has received data from MUB..,?..."
|
|
newline
|
|
rbitfld.long 0x00 20.--23. "TEn,TEn" "0: MUA TRn register is not empty,1: MUA TRn register is empty (default),?..."
|
|
eventfld.long 0x00 10. "RAIP,RAIP" "0: Processor B-side did not enter reset,1: Processor B-side entered reset"
|
|
newline
|
|
eventfld.long 0x00 9. "RDIP,RDIP" "0: Processor B-side did not exit reset,1: Processor B-side exited from reset"
|
|
rbitfld.long 0x00 8. "FUP,FUP" "0: No flags updated initiated by the MUA in..,1: MUA initiated flags update processing"
|
|
newline
|
|
rbitfld.long 0x00 7. "RS,RS" "0: The MUB side of the MU is not in reset,1: The MUB side of the MU is in reset"
|
|
rbitfld.long 0x00 5.--6. "PM,PM" "0: The MUB processor is in Run Mode,1: The MUB processor is in WAIT Mode,2: no description available,3: no description available"
|
|
newline
|
|
rbitfld.long 0x00 4. "EP,EP" "0: The MUA side event is not pending (default),1: The MUA side event is pending"
|
|
eventfld.long 0x00 3. "NMIC,NMIC" "0: Default,1: Writing 1 clears the NMI bit in the MUB CR.."
|
|
newline
|
|
rbitfld.long 0x00 0.--2. "Fn,Fn" "0: Fn bit in the MUB CR register is written 0..,1: Fn bit in the MUB CR register is written 1,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 28.--31. "GIEn,GIEn" "0: Disables MUA General Interrupt n,1: Enables MUA General Interrupt n,?..."
|
|
bitfld.long 0x00 24.--27. "RIEn,RIEn" "0: Disables MUA Receive Interrupt n,1: Enables MUA Receive Interrupt n,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "TIEn,TIEn" "0: Disables MUA Transmit Interrupt n,1: Enables MUA Transmit Interrupt n,?..."
|
|
bitfld.long 0x00 16.--19. "GIRn,GIRn" "0: MUA General Interrupt n is not requested to..,1: MUA General Interrupt n is requested to the MUB,?..."
|
|
newline
|
|
bitfld.long 0x00 12. "RAIE,RAIE" "0: Disables Processor A General Purpose..,1: Enables Processor A General Purpose Interrupt.."
|
|
bitfld.long 0x00 9.--10. "BBOOT,Processor B Boot Config" "0: Boot from 0x0,1: Boot from DMEM Base,2: Boot from IMEM Base,?..."
|
|
newline
|
|
bitfld.long 0x00 8. "CLKE,MUB clock enable" "0: MUB platform clock gated when MUB enters a..,1: MUB platform clock kept running after MUB.."
|
|
bitfld.long 0x00 7. "RSTH,Processor B Reset Hold" "0: Release Processor B from reset,1: Hold Processor B in reset"
|
|
newline
|
|
bitfld.long 0x00 6. "RDIE,RDIE" "0: Disables Processor A General Purpose..,1: Enables Processor A General Purpose Interrupt.."
|
|
bitfld.long 0x00 5. "MUR,MUR" "0: N/A,1: Asserts the MU reset"
|
|
newline
|
|
bitfld.long 0x00 4. "BHR,BHR" "0: De-assert Hardware reset to the Processor B,1: Assert Hardware reset to the Processor B"
|
|
bitfld.long 0x00 3. "NMI,NMI" "0: Non-maskable interrupt is not issued to the..,1: Non-maskable interrupt is issued to the.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "Fn,Fn" "0: Clears the Fn bit in the SR register,1: Sets the Fn bit in the SR register,?..."
|
|
tree.end
|
|
endif
|
|
tree "WDOG (Watchdog Timer Unit)"
|
|
repeat 3. (list 0. 1. 2.) (list ad:0x41025000 ad:0x403D0000 ad:0x40430000)
|
|
tree "WDOG$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CS,Watchdog Control and Status Register"
|
|
bitfld.long 0x00 15. "WIN,Watchdog Window" "0: Window mode disabled,1: Window mode enabled"
|
|
eventfld.long 0x00 14. "FLG,Watchdog Interrupt Flag" "0: No interrupt occurred,1: An interrupt occurred"
|
|
newline
|
|
bitfld.long 0x00 13. "CMD32EN,Enables or disables WDOG support for 32-bit (otherwise 16-bit or 8-bit) refresh/unlock command write words" "0: Disables support for 32-bit refresh/unlock..,1: Enables support for 32-bit refresh/unlock.."
|
|
bitfld.long 0x00 12. "PRES,Watchdog prescaler" "0: 256 prescaler disabled,1: 256 prescaler enabled"
|
|
newline
|
|
rbitfld.long 0x00 11. "ULK,Unlock status" "0: WDOG is locked,1: WDOG is unlocked"
|
|
rbitfld.long 0x00 10. "RCS,Reconfiguration Success" "0: Reconfiguring WDOG,1: Reconfiguration is successful"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CLK,Watchdog Clock" "0: Bus clock,1: LPO clock,2: INTCLK (internal clock),3: ERCLK (external reference clock)"
|
|
bitfld.long 0x00 7. "EN,Watchdog Enable" "0: Watchdog disabled,1: Watchdog enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "INT,Watchdog Interrupt" "0: Watchdog interrupts are disabled,1: Watchdog interrupts are enabled"
|
|
bitfld.long 0x00 5. "UPDATE,Allow updates" "0: Updates not allowed,1: Updates allowed"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "TST,Watchdog Test" "0: Watchdog test mode disabled,1: Watchdog user mode enabled,2: Watchdog test mode enabled only the low byte..,3: Watchdog test mode enabled only the high byte.."
|
|
bitfld.long 0x00 2. "DBG,Debug Enable" "0: Watchdog disabled in chip debug mode,1: Watchdog enabled in chip debug mode"
|
|
newline
|
|
bitfld.long 0x00 1. "WAIT,Wait Enable" "0: Watchdog disabled in chip wait mode,1: Watchdog enabled in chip wait mode"
|
|
bitfld.long 0x00 0. "STOP,Stop Enable" "0: Watchdog disabled in chip stop mode,1: Watchdog enabled in chip stop mode"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CNT,Watchdog Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "CNTHIGH,High byte of the Watchdog Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CNTLOW,Low byte of the Watchdog Counter"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TOVAL,Watchdog Timeout Value Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TOVALHIGH,High byte of the timeout value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TOVALLOW,Low byte of the timeout value"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "WIN,Watchdog Window Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "WINHIGH,High byte of Watchdog Window"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WINLOW,Low byte of Watchdog Window"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "CRC"
|
|
base ad:0x41029000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,CRC Data register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "HU,CRC High Upper Byte"
|
|
hexmask.long.byte 0x00 16.--23. 1. "HL,CRC High Lower Byte"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LU,CRC Low Upper Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LL,CRC Low Lower Byte"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GPOLY,CRC Polynomial register"
|
|
hexmask.long.word 0x00 16.--31. 1. "HIGH,High Polynominal Half-word"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOW,Low Polynominal Half-word"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,CRC Control register"
|
|
bitfld.long 0x00 30.--31. "TOT,Type Of Transpose For Writes" "0: No transposition,1: Bits in bytes are transposed bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed no bits in a byte.."
|
|
bitfld.long 0x00 28.--29. "TOTR,Type Of Transpose For Read" "0: No transposition,1: Bits in bytes are transposed bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed no bits in a byte.."
|
|
newline
|
|
bitfld.long 0x00 26. "FXOR,Complement Read Of CRC Data Register" "0: No XOR on reading,1: Invert or complement the read value of the.."
|
|
bitfld.long 0x00 25. "WAS,Write CRC Data Register As Seed" "0: Writes to the CRC data register are data values,1: Writes to the CRC data register are seed values"
|
|
newline
|
|
bitfld.long 0x00 24. "TCRC,TCRC" "0: 16-bit CRC protocol,1: 32-bit CRC protocol"
|
|
tree.end
|
|
tree "LTC"
|
|
base ad:0x4102A000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MD,Mode Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ALG,Algorithm"
|
|
hexmask.long.word 0x00 4.--12. 1. "AAI,Additional Algorithm information"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "AS,Algorithm State" "0: UPDATE,1: INITIALIZE,2: FINALIZE,3: Initialize/Finalize"
|
|
bitfld.long 0x00 1. "ICV_TEST,ICV Checking / Test AES fault detection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ENC,Encrypt/Decrypt" "0: Decrypt,1: Encrypt"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "KS,Key Size Register"
|
|
bitfld.long 0x00 0.--4. "KS,Key Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DS,Data Size Register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DS,Data Size"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ICVS,ICV Size Register"
|
|
bitfld.long 0x00 0.--4. "ICVS,ICV Size in Bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "COM,Command Register"
|
|
bitfld.long 0x00 1. "AES,Reset AESA" "0: Do Not Reset,1: Reset AES Accelerator"
|
|
bitfld.long 0x00 0. "ALL,Reset All Internal Logic" "0: Do Not Reset,1: Reset all CHAs in use by this CCB"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTL,Control Register"
|
|
bitfld.long 0x00 31. "KAL,Key Register Access Lock" "0: Key Register is readable,1: Key Register is not readable"
|
|
bitfld.long 0x00 30. "KDF,Key Derivation Function" "0: Key Derivation Function Disabled,1: Key Derivation Function Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. "COS,Context Register Output Byte Swap" "0: Do Not Byte Swap Data,1: Byte Swap Data"
|
|
bitfld.long 0x00 22. "CIS,Context Register Input Byte Swap" "0: Do Not Byte Swap Data,1: Byte Swap Data"
|
|
newline
|
|
bitfld.long 0x00 21. "KOS,Key Register Output Byte Swap" "0: Do Not Byte Swap Data,1: Byte Swap Data"
|
|
bitfld.long 0x00 20. "KIS,Key Register Input Byte Swap" "0: Do Not Byte Swap Data,1: Byte Swap Data"
|
|
newline
|
|
bitfld.long 0x00 17. "OFS,Output FIFO Byte Swap" "0: Do Not Byte Swap Data,1: Byte Swap Data"
|
|
bitfld.long 0x00 16. "IFS,Input FIFO Byte Swap" "0: Do Not Byte Swap Data,1: Byte Swap Data"
|
|
newline
|
|
bitfld.long 0x00 13. "OFR,Output FIFO DMA Request Size" "0: DMA request size is 1 entry,1: DMA request size is 4 entries"
|
|
bitfld.long 0x00 12. "OFE,Output FIFO DMA Enable" "0: DMA Request and Done signals disabled for the..,1: DMA Request and Done signals enabled for the.."
|
|
newline
|
|
bitfld.long 0x00 9. "IFR,Input FIFO DMA Request Size" "0: DMA request size is 1 entry,1: DMA request size is 4 entries"
|
|
bitfld.long 0x00 8. "IFE,Input FIFO DMA Enable" "0: DMA Request and Done signals disabled for the..,1: DMA Request and Done signals enabled for the.."
|
|
newline
|
|
bitfld.long 0x00 0. "IM,Interrupt Mask" "0: Interrupt not masked,1: Interrupt masked"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CW,Clear Written Register"
|
|
bitfld.long 0x00 31. "CIF,Clear Input FIFO" "0,1"
|
|
bitfld.long 0x00 30. "COF,Clear Output FIFO" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CKR,Clear the Key Register" "0,1"
|
|
bitfld.long 0x00 5. "CCR,Clear the Context Register" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CICV,Clear the ICV Size Register" "0,1"
|
|
bitfld.long 0x00 2. "CDS,Clear the Data Size Register" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CM,Clear the Mode Register" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "STA,Status Register"
|
|
rbitfld.long 0x00 20. "EI,Error Interrupt" "0: NOT_ERROR_INT,1: Error Interrupt"
|
|
eventfld.long 0x00 16. "DI,Done Interrupt" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "AB,AESA Busy" "0: AESA_IDLE,1: AESA Busy"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "ESTA,Error Status Register"
|
|
bitfld.long 0x00 8.--11. "CL1,algorithms" "0: General Error,1: AES_ERROR,?..."
|
|
bitfld.long 0x00 0.--3. "ERRID1,Error ID 1" "?,1: MODE_ERROR,2: DATA_SIZE_ERROR,3: KEY_SIZE_ERROR,?,?,6: Data Arrived out of Sequence Error,?,?,?,10: ICV Check Failed,11: Internal Hardware Failure,12: CCM AAD Size Error (either 1. AAD flag in B0..,?,?,15: Invalid Crypto Engine Selected"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "AADSZ,AAD Size Register"
|
|
bitfld.long 0x00 31. "AL,AAD Last" "0,1"
|
|
bitfld.long 0x00 0.--3. "AADSZ,AAD size in Bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat 14. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "CTX_[$1],Context Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "CTX,CTX"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x200)++0x03
|
|
line.long 0x00 "KEY_[$1],Key Registers $1"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,KEY"
|
|
repeat.end
|
|
rgroup.long 0x4F0++0x03
|
|
line.long 0x00 "VID1,Version ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "IP_ID,ID(0x0034)"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MAJ_REV,Major revision number"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MIN_REV,Minor revision number"
|
|
rgroup.long 0x4F4++0x03
|
|
line.long 0x00 "VID2,Version ID 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "ARCH_ERA,Architectural ERA"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ECO_REV,ECO revision number"
|
|
rgroup.long 0x4F8++0x03
|
|
line.long 0x00 "CHAVID,CHA Version ID Register"
|
|
bitfld.long 0x00 4.--7. "AESVID,AES Version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "AESREV,AES Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x7C0++0x03
|
|
line.long 0x00 "FIFOSTA,FIFO Status Register"
|
|
bitfld.long 0x00 31. "OFF,Output FIFO Full" "0,1"
|
|
hexmask.long.byte 0x00 16.--22. 1. "OFL,Output FIFO Level"
|
|
newline
|
|
bitfld.long 0x00 15. "IFF,Input FIFO Full" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "IFL,Input FIFO Level"
|
|
wgroup.long 0x7E0++0x03
|
|
line.long 0x00 "IFIFO,Input Data FIFO"
|
|
hexmask.long 0x00 0.--31. 1. "IFIFO,IFIFO"
|
|
rgroup.long 0x7F0++0x03
|
|
line.long 0x00 "OFIFO,Output Data FIFO"
|
|
hexmask.long 0x00 0.--31. 1. "OFIFO,Output FIFO"
|
|
tree.end
|
|
tree "TRNG (TRNG0)"
|
|
base ad:0x4102C000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCTL,Miscellaneous Control Register"
|
|
bitfld.long 0x00 16. "PRGM,Programming Mode Select" "0,1"
|
|
rbitfld.long 0x00 13. "TSTOP_OK,TRNG_OK_TO_STOP" "0,1"
|
|
newline
|
|
eventfld.long 0x00 12. "ERR,Read: Error status" "0,1"
|
|
rbitfld.long 0x00 11. "TST_OUT,Read only: Test point inside ring oscillator" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 10. "ENT_VAL,Read only: Entropy Valid" "0,1"
|
|
rbitfld.long 0x00 9. "FCT_VAL,Read only: Frequency Count Valid" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "FCT_FAIL,Read only: Frequency Count Fail" "0,1"
|
|
bitfld.long 0x00 7. "FOR_SCLK,Force System Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RST_DEF,Reset Defaults" "0,1"
|
|
bitfld.long 0x00 5. "TRNG_ACC,TRNG Access Mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 4. "UNUSED4,This bit is unused" "0,1"
|
|
bitfld.long 0x00 2.--3. "OSC_DIV,Oscillator Divide" "0: use ring oscillator with no divide,1: use ring oscillator divided-by-2,2: use ring oscillator divided-by-4,3: use ring oscillator divided-by-8"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SAMP_MODE,Sample Mode" "0: use Von Neumann data into both Entropy..,1: use raw data into both Entropy shifter and..,2: use Von Neumann data into Entropy shifter,3: undefined/reserved"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SCMISC,Statistical Check Miscellaneous Register"
|
|
bitfld.long 0x00 16.--19. "RTY_CT,RETRY COUNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRUN_MAX,LONG RUN MAX LIMIT"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PKRRNG,Poker Range Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_RNG,Poker Range"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PKRMAX,Poker Maximum Limit Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "PKR_MAX,Poker Maximum Limit"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PKRSQ,Poker Square Calculation Result Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "PKR_SQ,Poker Square Calculation Result"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SDCTL,Seed Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "ENT_DLY,Entropy Delay"
|
|
hexmask.long.word 0x00 0.--15. 1. "SAMP_SIZE,Sample Size"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SBLIM,Sparse Bit Limit Register"
|
|
hexmask.long.word 0x00 0.--9. 1. "SB_LIM,Sparse Bit Limit"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "TOTSAM,Total Samples Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "TOT_SAM,Total Samples"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FRQMIN,Frequency Count Minimum Limit Register"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. "FRQ_MIN,Frequency Count Minimum Limit"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "FRQCNT,Frequency Count Register"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. "FRQ_CT,Frequency Count"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FRQMAX,Frequency Count Maximum Limit Register"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. "FRQ_MAX,Frequency Counter Maximum Limit"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SCMC,Statistical Check Monobit Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "MONO_CT,Monobit Count"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SCML,Statistical Check Monobit Limit Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MONO_RNG,Monobit Range"
|
|
hexmask.long.word 0x00 0.--15. 1. "MONO_MAX,Monobit Maximum Limit"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "SCR1C,Statistical Check Run Length 1 Count Register"
|
|
hexmask.long.word 0x00 16.--30. 1. "R1_1_CT,Runs of One Length 1 Count"
|
|
hexmask.long.word 0x00 0.--14. 1. "R1_0_CT,Runs of Zero Length 1 Count"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SCR1L,Statistical Check Run Length 1 Limit Register"
|
|
hexmask.long.word 0x00 16.--30. 1. "RUN1_RNG,Run Length 1 Range"
|
|
hexmask.long.word 0x00 0.--14. 1. "RUN1_MAX,Run Length 1 Maximum Limit"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "SCR2C,Statistical Check Run Length 2 Count Register"
|
|
hexmask.long.word 0x00 16.--29. 1. "R2_1_CT,Runs of One Length 2 Count"
|
|
hexmask.long.word 0x00 0.--13. 1. "R2_0_CT,Runs of Zero Length 2 Count"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SCR2L,Statistical Check Run Length 2 Limit Register"
|
|
hexmask.long.word 0x00 16.--29. 1. "RUN2_RNG,Run Length 2 Range"
|
|
hexmask.long.word 0x00 0.--13. 1. "RUN2_MAX,Run Length 2 Maximum Limit"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "SCR3C,Statistical Check Run Length 3 Count Register"
|
|
hexmask.long.word 0x00 16.--28. 1. "R3_1_CT,Runs of Ones Length 3 Count"
|
|
hexmask.long.word 0x00 0.--12. 1. "R3_0_CT,Runs of Zeroes Length 3 Count"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SCR3L,Statistical Check Run Length 3 Limit Register"
|
|
hexmask.long.word 0x00 16.--28. 1. "RUN3_RNG,Run Length 3 Range"
|
|
hexmask.long.word 0x00 0.--12. 1. "RUN3_MAX,Run Length 3 Maximum Limit"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "SCR4C,Statistical Check Run Length 4 Count Register"
|
|
hexmask.long.word 0x00 16.--27. 1. "R4_1_CT,Runs of One Length 4 Count"
|
|
hexmask.long.word 0x00 0.--11. 1. "R4_0_CT,Runs of Zero Length 4 Count"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCR4L,Statistical Check Run Length 4 Limit Register"
|
|
hexmask.long.word 0x00 16.--27. 1. "RUN4_RNG,Run Length 4 Range"
|
|
hexmask.long.word 0x00 0.--11. 1. "RUN4_MAX,Run Length 4 Maximum Limit"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "SCR5C,Statistical Check Run Length 5 Count Register"
|
|
hexmask.long.word 0x00 16.--26. 1. "R5_1_CT,Runs of One Length 5 Count"
|
|
hexmask.long.word 0x00 0.--10. 1. "R5_0_CT,Runs of Zero Length 5 Count"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SCR5L,Statistical Check Run Length 5 Limit Register"
|
|
hexmask.long.word 0x00 16.--26. 1. "RUN5_RNG,Run Length 5 Range"
|
|
hexmask.long.word 0x00 0.--10. 1. "RUN5_MAX,Run Length 5 Maximum Limit"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SCR6PC,Statistical Check Run Length 6+ Count Register"
|
|
hexmask.long.word 0x00 16.--26. 1. "R6P_1_CT,Runs of One Length 6+ Count"
|
|
hexmask.long.word 0x00 0.--10. 1. "R6P_0_CT,Runs of Zero Length 6+ Count"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "SCR6PL,Statistical Check Run Length 6+ Limit Register"
|
|
hexmask.long.word 0x00 16.--26. 1. "RUN6P_RNG,Run Length 6+ Range"
|
|
hexmask.long.word 0x00 0.--10. 1. "RUN6P_MAX,Run Length 6+ Maximum Limit"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 16.--19. "RETRY_CT,RETRY COUNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. "TFMB,Test Fail Mono Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TFP,Test Fail Poker" "0,1"
|
|
bitfld.long 0x00 13. "TFLR,Test Fail Long Run" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TFSB,Test Fail Sparse Bit" "0,1"
|
|
bitfld.long 0x00 11. "TF6PBR1,Test Fail 6 Plus Bit Run Sampling 1s" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "TF6PBR0,Test Fail 6 Plus Bit Run Sampling 0s" "0,1"
|
|
bitfld.long 0x00 9. "TF5BR1,Test Fail 5-Bit Run Sampling 1s" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "TF5BR0,Test Fail 5-Bit Run Sampling 0s" "0,1"
|
|
bitfld.long 0x00 7. "TF4BR1,Test Fail 4-Bit Run Sampling 1s" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TF4BR0,Test Fail 4-Bit Run Sampling 0s" "0,1"
|
|
bitfld.long 0x00 5. "TF3BR1,Test Fail 3-Bit Run Sampling 1s" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TF3BR0,Test Fail 3-Bit Run Sampling 0s" "0,1"
|
|
bitfld.long 0x00 3. "TF2BR1,Test Fail 2-Bit Run Sampling 1s" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TF2BR0,Test Fail 2-Bit Run Sampling 0s" "0,1"
|
|
bitfld.long 0x00 1. "TF1BR1,Test Fail 1-Bit Run Sampling 1s" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF1BR0,Test Fail 1-Bit Run Sampling 0s" "0,1"
|
|
repeat 16. (increment 0 1) (increment 0 0x4)
|
|
rgroup.long ($2+0x40)++0x03
|
|
line.long 0x00 "ENT[$1],Entropy Read Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "ENT,Entropy Value"
|
|
repeat.end
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "PKRCNT10,Statistical Check Poker Count 1 and 0 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_1_CT,Poker 1h Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_0_CT,Poker 0h Count"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "PKRCNT32,Statistical Check Poker Count 3 and 2 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_3_CT,Poker 3h Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_2_CT,Poker 2h Count"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "PKRCNT54,Statistical Check Poker Count 5 and 4 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_5_CT,Poker 5h Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_4_CT,Poker 4h Count"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "PKRCNT76,Statistical Check Poker Count 7 and 6 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_7_CT,Poker 7h Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_6_CT,Poker 6h Count"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "PKRCNT98,Statistical Check Poker Count 9 and 8 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_9_CT,Poker 9h Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_8_CT,Poker 8h Count"
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "PKRCNTBA,Statistical Check Poker Count B and A Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_B_CT,Poker Bh Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_A_CT,Poker Ah Count"
|
|
rgroup.long 0x98++0x03
|
|
line.long 0x00 "PKRCNTDC,Statistical Check Poker Count D and C Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_D_CT,Poker Dh Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_C_CT,Poker Ch Count"
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "PKRCNTFE,Statistical Check Poker Count F and E Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "PKR_F_CT,Poker Fh Count"
|
|
hexmask.long.word 0x00 0.--15. 1. "PKR_E_CT,Poker Eh Count"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "SEC_CFG,Security Configuration Register"
|
|
bitfld.long 0x00 2. "SK_VAL,Reserved" "0: See DRNG version,1: See DRNG version"
|
|
bitfld.long 0x00 1. "NO_PRGM,If set the TRNG registers cannot be programmed" "0: Programability of registers controlled only..,1: Overides Miscellaneous Control Register.."
|
|
newline
|
|
bitfld.long 0x00 0. "SH0,Reserved" "0: See DRNG version,1: See DRNG version"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "INT_CTRL,Interrupt Control Register"
|
|
hexmask.long 0x00 3.--31. 1. "UNUSED,Reserved but writeable"
|
|
bitfld.long 0x00 2. "FRQ_CT_FAIL,Same behavior as bit 0 above" "0: Same behavior as bit 0 above,1: Same behavior as bit 0 above"
|
|
newline
|
|
bitfld.long 0x00 1. "ENT_VAL,Same behavior as bit 0 above" "0: Same behavior as bit 0 above,1: Same behavior as bit 0 above"
|
|
bitfld.long 0x00 0. "HW_ERR,Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted" "0: Corresponding bit of INT_STATUS cleared,1: Corresponding bit of INT_STATUS active"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "INT_MASK,Mask Register"
|
|
bitfld.long 0x00 2. "FRQ_CT_FAIL,Same behavior as bit 0 above" "0: Same behavior as bit 0 above,1: Same behavior as bit 0 above"
|
|
bitfld.long 0x00 1. "ENT_VAL,Same behavior as bit 0 above" "0: Same behavior as bit 0 above,1: Same behavior as bit 0 above"
|
|
newline
|
|
bitfld.long 0x00 0. "HW_ERR,Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted" "0: Corresponding interrupt of INT_STATUS is masked,1: Corresponding bit of INT_STATUS is active"
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "INT_STATUS,Interrupt Status Register"
|
|
bitfld.long 0x00 2. "FRQ_CT_FAIL,Read only: Frequency Count Fail" "0: No hardware nor self test frequency errors,1: The frequency counter has detected a failure"
|
|
bitfld.long 0x00 1. "ENT_VAL,Read only: Entropy Valid" "0: Busy generation entropy,1: TRNG can be stopped and entropy is valid if"
|
|
newline
|
|
bitfld.long 0x00 0. "HW_ERR,Read: Error status" "0: HW_ERR_0,1: error detected"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "VID1,Version ID Register (MS)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IP_ID,Shows the IP ID"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MAJ_REV,Shows the IP's Major revision of the TRNG"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MIN_REV,Shows the IP's Minor revision of the TRNG"
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "VID2,Version ID Register (LS)"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ERA,Shows the compile options for the TRNG"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INTG_OPT,Shows the integration options for the TRNG"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "ECO_REV,Shows the IP's ECO revision of the TRNG"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CONFIG_OPT,Shows the IP's Configuaration options for the TRNG"
|
|
tree.end
|
|
tree "LPIT"
|
|
repeat 2. (list 0. 1.) (list ad:0x4102D000 ad:0x40270000)
|
|
tree "LPIT$1"
|
|
base $2
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "EXT_TRIG,Number of External Trigger Inputs"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CHANNEL,Number of Timer Channels"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MCR,Module Control Register"
|
|
bitfld.long 0x00 3. "DBG_EN,Debug Enable Bit" "0: Stop timer channels in Debug mode,1: Allow timer channels to continue to run in.."
|
|
bitfld.long 0x00 2. "DOZE_EN,DOZE Mode Enable Bit" "0: Stop timer channels in DOZE mode,1: Allow timer channels to continue to run in.."
|
|
newline
|
|
bitfld.long 0x00 1. "SW_RST,Software Reset Bit" "0: Timer channels and registers are not reset,1: Reset timer channels and registers"
|
|
bitfld.long 0x00 0. "M_CEN,Module Clock Enable" "0: Disable peripheral clock to timers,1: Enable peripheral clock to timers"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "MSR,Module Status Register"
|
|
eventfld.long 0x00 3. "TIF3,Channel 3 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
eventfld.long 0x00 2. "TIF2,Channel 2 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
newline
|
|
eventfld.long 0x00 1. "TIF1,Channel 1 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
eventfld.long 0x00 0. "TIF0,Channel 0 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MIER,Module Interrupt Enable Register"
|
|
bitfld.long 0x00 3. "TIE3,Channel 3 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 2. "TIE2,Channel 2 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "TIE1,Channel 1 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 0. "TIE0,Channel 0 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SETTEN,Set Timer Enable Register"
|
|
bitfld.long 0x00 3. "SET_T_EN_3,Set Timer 3 Enable" "0: SET_T_EN_3_0,1: Enables Timer Channel 3"
|
|
bitfld.long 0x00 2. "SET_T_EN_2,Set Timer 2 Enable" "0: SET_T_EN_2_0,1: Enables Timer Channel 2"
|
|
newline
|
|
bitfld.long 0x00 1. "SET_T_EN_1,Set Timer 1 Enable" "0: SET_T_EN_1_0,1: Enables Timer Channel 1"
|
|
bitfld.long 0x00 0. "SET_T_EN_0,Set Timer 0 Enable" "0: SET_T_EN_0_0,1: Enables Timer Channel 0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CLRTEN,Clear Timer Enable Register"
|
|
bitfld.long 0x00 3. "CLR_T_EN_3,Clear Timer 3 Enable" "0: CLR_T_EN_3_0,1: Clear the Timer Enable bit (TCTRL3[T_EN]) for.."
|
|
bitfld.long 0x00 2. "CLR_T_EN_2,Clear Timer 2 Enable" "0: CLR_T_EN_2_0,1: Clear the Timer Enable bit (TCTRL2[T_EN]) for.."
|
|
newline
|
|
bitfld.long 0x00 1. "CLR_T_EN_1,Clear Timer 1 Enable" "0: CLR_T_EN_1_0,1: Clear the Timer Enable bit (TCTRL1[T_EN]) for.."
|
|
bitfld.long 0x00 0. "CLR_T_EN_0,Clear Timer 0 Enable" "0: CLR_T_EN_0_0,1: Clear the Timer Enable bit (TCTRL0[T_EN]) for.."
|
|
endif
|
|
repeat 4. (increment 0 1)(increment 0 0x10)
|
|
tree "CHANNEL[$1]"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "TVAL,Timer Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "TMR_VAL,Timer Value"
|
|
rgroup.long ($2+0x24)++0x03
|
|
line.long 0x00 "CVAL,Current Timer Value"
|
|
hexmask.long 0x00 0.--31. 1. "TMR_CUR_VAL,Current Timer Value"
|
|
group.long ($2+0x28)++0x03
|
|
line.long 0x00 "TCTRL,Timer Control Register"
|
|
bitfld.long 0x00 24.--27. "TRG_SEL,Trigger Select" "0: Timer channel 0 - 3 trigger source is selected,1: Timer channel 0 - 3 trigger source is selected,2: Timer channel 0 - 3 trigger source is selected,3: Timer channel 0 - 3 trigger source is selected,?..."
|
|
bitfld.long 0x00 23. "TRG_SRC,Trigger Source" "0: Selects external triggers,1: Selects internal triggers"
|
|
newline
|
|
bitfld.long 0x00 18. "TROT,Timer Reload On Trigger" "0: Timer will not reload on the selected trigger,1: Timer will reload on the selected trigger"
|
|
bitfld.long 0x00 17. "TSOI,Timer Stop On Interrupt" "0: The channel timer does not stop after timeout,1: The channel timer will stop after a timeout.."
|
|
newline
|
|
bitfld.long 0x00 16. "TSOT,Timer Start On Trigger" "0: Timer starts to decrement immediately based..,1: Timer starts to decrement when a rising edge.."
|
|
bitfld.long 0x00 2.--3. "MODE,Timer Operation Mode" "0: 32-bit Periodic Counter,1: Dual 16-bit Periodic Counter,2: 32-bit Trigger Accumulator,3: 32-bit Trigger Input Capture"
|
|
newline
|
|
bitfld.long 0x00 1. "CHAIN,Chain Channel" "0: Channel Chaining is disabled,1: Channel Chaining is enabled"
|
|
bitfld.long 0x00 0. "T_EN,Timer Enable" "0: Timer Channel is disabled,1: Timer Channel is enabled"
|
|
endif
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "LPTIMER (LPTMR)"
|
|
repeat 2. (list 0. 1.) (list ad:0x4102E000 ad:0x4102F000)
|
|
tree "LPTMR$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR,Low Power Timer Control Status Register"
|
|
bitfld.long 0x00 8. "TDRE,Timer DMA Request Enable" "0: Timer DMA Request disabled,1: Timer DMA Request enabled"
|
|
eventfld.long 0x00 7. "TCF,Timer Compare Flag" "0: The value of CNR is not equal to CMR and..,1: The value of CNR is equal to CMR and increments"
|
|
newline
|
|
bitfld.long 0x00 6. "TIE,Timer Interrupt Enable" "0: Timer interrupt disabled,1: Timer interrupt enabled"
|
|
bitfld.long 0x00 4.--5. "TPS,Timer Pin Select" "0: Pulse counter input 0 is selected,1: Pulse counter input 1 is selected,2: Pulse counter input 2 is selected,3: Pulse counter input 3 is selected"
|
|
newline
|
|
bitfld.long 0x00 3. "TPP,Timer Pin Polarity" "0: Pulse Counter input source is active-high and..,1: Pulse Counter input source is active-low and.."
|
|
bitfld.long 0x00 2. "TFC,Timer Free-Running Counter" "0: CNR is reset whenever TCF is set,1: CNR is reset on overflow"
|
|
newline
|
|
bitfld.long 0x00 1. "TMS,Timer Mode Select" "0: Time Counter mode,1: Pulse Counter mode"
|
|
bitfld.long 0x00 0. "TEN,Timer Enable" "0: LPTMR is disabled and internal logic is reset,1: LPTMR is enabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSR,Low Power Timer Prescale Register"
|
|
bitfld.long 0x00 3.--6. "PRESCALE,Prescale Value" "0: Prescaler divides the prescaler clock by 2..,1: Prescaler divides the prescaler clock by 4..,2: Prescaler divides the prescaler clock by 8..,3: Prescaler divides the prescaler clock by 16..,4: Prescaler divides the prescaler clock by 32..,5: Prescaler divides the prescaler clock by 64..,6: Prescaler divides the prescaler clock by 128..,7: Prescaler divides the prescaler clock by 256..,8: Prescaler divides the prescaler clock by 512..,9: Prescaler divides the prescaler clock by 1024..,10: Prescaler divides the prescaler clock by..,11: Prescaler divides the prescaler clock by..,12: Prescaler divides the prescaler clock by..,13: Prescaler divides the prescaler clock by 16..,14: Prescaler divides the prescaler clock by 32..,15: Prescaler divides the prescaler clock by 65.."
|
|
bitfld.long 0x00 2. "PBYP,Prescaler Bypass" "0: Prescaler/glitch filter is enabled,1: Prescaler/glitch filter is bypassed"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "PCS,Prescaler Clock Select" "0: Prescaler/glitch filter clock 0 selected,1: Prescaler/glitch filter clock 1 selected,2: Prescaler/glitch filter clock 2 selected,3: Prescaler/glitch filter clock 3 selected"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPARE,Compare Value"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CNR,Low Power Timer Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "COUNTER,Counter Value"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TPM"
|
|
repeat 8. (list 0. 4. 5. 6. 7. 1. 2. 3.) (list ad:0x41030000 ad:0x40250000 ad:0x40260000 ad:0x40A10000 ad:0x40A20000 ad:0x41031000 ad:0x410A8000 ad:0x410A9000)
|
|
tree "TPM$1"
|
|
base $2
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "WIDTH,Counter Width"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TRIG,Trigger Count"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "CHAN,Channel Count"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,TPM Global Register"
|
|
bitfld.long 0x00 1. "RST,Software Reset" "0: Module is not reset,1: Module is reset"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SC,Status and Control"
|
|
bitfld.long 0x00 8. "DMA,DMA Enable" "0: Disables DMA transfers,1: Enables DMA transfers"
|
|
eventfld.long 0x00 7. "TOF,Timer Overflow Flag" "0: no description available,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 6. "TOIE,Timer Overflow Interrupt Enable" "0: no description available,1: Enable TOF interrupts"
|
|
bitfld.long 0x00 5. "CPWMS,Center-Aligned PWM Select" "0: no description available,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "CMOD,Clock Mode Selection" "0: TPM counter is disabled,1: TPM counter increments on every TPM counter..,2: TPM counter increments on rising edge of..,3: no description available"
|
|
bitfld.long 0x00 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CNT,Counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "COUNT,Counter value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MOD,Modulo"
|
|
hexmask.long.word 0x00 0.--15. 1. "MOD,Modulo value"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "STATUS,Capture and Compare Status"
|
|
eventfld.long 0x00 8. "TOF,Timer Overflow Flag" "0: no description available,1: no description available"
|
|
eventfld.long 0x00 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
newline
|
|
eventfld.long 0x00 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
eventfld.long 0x00 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
newline
|
|
eventfld.long 0x00 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
eventfld.long 0x00 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
newline
|
|
eventfld.long 0x00 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "COMBINE,Combine Channel Register"
|
|
bitfld.long 0x00 17. "COMSWAP2,Combine Channels 4 and 5 Swap" "0: Even channel is used for input capture and..,1: Odd channel is used for input capture and 1st.."
|
|
bitfld.long 0x00 16. "COMBINE2,Combine Channels 4 and 5" "0: Channels 4 and 5 are independent,1: Channels 4 and 5 are combined"
|
|
newline
|
|
bitfld.long 0x00 9. "COMSWAP1,Combine Channels 2 and 3 Swap" "0: Even channel is used for input capture and..,1: Odd channel is used for input capture and 1st.."
|
|
bitfld.long 0x00 8. "COMBINE1,Combine Channels 2 and 3" "0: Channels 2 and 3 are independent,1: Channels 2 and 3 are combined"
|
|
newline
|
|
bitfld.long 0x00 1. "COMSWAP0,Combine Channel 0 and 1 Swap" "0: Even channel is used for input capture and..,1: Odd channel is used for input capture and 1st.."
|
|
bitfld.long 0x00 0. "COMBINE0,Combine Channels 0 and 1" "0: Channels 0 and 1 are independent,1: Channels 0 and 1 are combined"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TRIG,Channel Trigger"
|
|
bitfld.long 0x00 5. "TRIG5,Channel 5 Trigger" "0: No effect,1: Configures trigger input 1 to be used by.."
|
|
bitfld.long 0x00 4. "TRIG4,Channel 4 Trigger" "0: No effect,1: Configures trigger input 0 to be used by.."
|
|
newline
|
|
bitfld.long 0x00 3. "TRIG3,Channel 3 Trigger" "0: No effect,1: Configures trigger input 1 to be used by.."
|
|
bitfld.long 0x00 2. "TRIG2,Channel 2 Trigger" "0: No effect,1: Configures trigger input 0 to be used by.."
|
|
newline
|
|
bitfld.long 0x00 1. "TRIG1,Channel 1 Trigger" "0: No effect,1: Configures trigger input 1 to be used by.."
|
|
bitfld.long 0x00 0. "TRIG0,Channel 0 Trigger" "0: No effect,1: Configures trigger input 0 to be used by.."
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "POL,Channel Polarity"
|
|
bitfld.long 0x00 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high,1: The channel polarity is active low"
|
|
bitfld.long 0x00 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high,1: The channel polarity is active low"
|
|
newline
|
|
bitfld.long 0x00 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high,1: The channel polarity is active low"
|
|
bitfld.long 0x00 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high,1: The channel polarity is active low"
|
|
newline
|
|
bitfld.long 0x00 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high,1: The channel polarity is active low"
|
|
bitfld.long 0x00 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high,1: The channel polarity is active low"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "FILTER,Filter Control"
|
|
bitfld.long 0x00 20.--23. "CH5FVAL,Channel 5 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "CH4FVAL,Channel 4 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CH3FVAL,Channel 3 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "CH2FVAL,Channel 2 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "CH1FVAL,Channel 1 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CH0FVAL,Channel 0 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "QDCTRL,Quadrature Decoder Control and Status"
|
|
bitfld.long 0x00 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase encoding mode,1: Count and direction encoding mode"
|
|
rbitfld.long 0x00 2. "QUADIR,Counter Direction in Quadrature Decode Mode" "0: Counter direction is decreasing (counter..,1: Counter direction is increasing (counter.."
|
|
newline
|
|
rbitfld.long 0x00 1. "TOFDIR,TOFDIR" "0: TOF bit was set on the bottom of counting,1: TOF bit was set on the top of counting"
|
|
bitfld.long 0x00 0. "QUADEN,QUADEN" "0: Quadrature decoder mode is disabled,1: Quadrature decoder mode is enabled"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CONF,Configuration"
|
|
bitfld.long 0x00 24.--25. "TRGSEL,Trigger Select" "?,1: Channel 0 pin input capture,2: Channel 1 pin input capture,3: Channel 0 or Channel 1 pin input capture"
|
|
bitfld.long 0x00 23. "TRGSRC,Trigger Source" "0: Trigger source selected by TRGSEL is external,1: Trigger source selected by TRGSEL is internal.."
|
|
newline
|
|
bitfld.long 0x00 22. "TRGPOL,Trigger Polarity" "0: Trigger is active high,1: Trigger is active low"
|
|
bitfld.long 0x00 19. "CPOT,Counter Pause On Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "CROT,Counter Reload On Trigger" "0: Counter is not reloaded due to a rising edge..,1: Counter is reloaded when a rising edge is.."
|
|
bitfld.long 0x00 17. "CSOO,Counter Stop On Overflow" "0: no description available,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 16. "CSOT,Counter Start on Trigger" "0: no description available,1: no description available"
|
|
bitfld.long 0x00 9. "GTBEEN,Global time base enable" "0: no description available,1: All channels use an externally generated.."
|
|
newline
|
|
bitfld.long 0x00 8. "GTBSYNC,Global Time Base Synchronization" "0: Global timebase synchronization disabled,1: Global timebase synchronization enabled"
|
|
bitfld.long 0x00 6.--7. "DBGMODE,Debug Mode" "0: no description available,?,?,3: no description available"
|
|
newline
|
|
bitfld.long 0x00 5. "DOZEEN,Doze Enable" "0: no description available,1: no description available"
|
|
endif
|
|
repeat 6. (increment 0 1)(increment 0 0x8)
|
|
tree "CHANNEL[$1]"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "CSC,Channel (n) Status and Control"
|
|
eventfld.long 0x00 7. "CHF,Channel Flag" "0: No channel event has occurred,1: A channel event has occurred"
|
|
bitfld.long 0x00 6. "CHIE,Channel Interrupt Enable" "0: Disable channel interrupts,1: Enable channel interrupts"
|
|
newline
|
|
bitfld.long 0x00 5. "MSB,Channel Mode Select" "0,1"
|
|
bitfld.long 0x00 4. "MSA,Channel Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ELSB,Edge or Level Select" "0,1"
|
|
bitfld.long 0x00 2. "ELSA,Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DMA,DMA Enable" "0: Disable DMA transfers,1: Enable DMA transfers"
|
|
group.long ($2+0x24)++0x03
|
|
line.long 0x00 "CV,Channel (n) Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "VAL,Channel Value"
|
|
endif
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "FLEXIO"
|
|
repeat 2. (list 0. 1.) (list ad:0x41032000 ad:0x40310000)
|
|
tree "FLEXIO$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "TRIGGER,Trigger Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PIN,Pin Number"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "TIMER,Timer Number"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SHIFTER,Shifter Number"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,FlexIO Control Register"
|
|
bitfld.long 0x00 31. "DOZEN,Doze Enable" "0: FlexIO enabled in Doze modes,1: FlexIO disabled in Doze modes"
|
|
bitfld.long 0x00 30. "DBGE,Debug Enable" "0: FlexIO is disabled in debug modes,1: FlexIO is enabled in debug modes"
|
|
newline
|
|
bitfld.long 0x00 2. "FASTACC,Fast Access" "0: Configures for normal register accesses to..,1: Configures for fast register accesses to FlexIO"
|
|
bitfld.long 0x00 1. "SWRST,Software Reset" "0: Software reset is disabled,1: Software reset is enabled all FlexIO.."
|
|
newline
|
|
bitfld.long 0x00 0. "FLEXEN,FlexIO Enable" "0: FlexIO module is disabled,1: FlexIO module is enabled"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PIN,Pin State Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Pin Data Input"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHIFTSTAT,Shifter Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SSF,Shifter Status Flag"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SHIFTERR,Shifter Error Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEF,Shifter Error Flags"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TIMSTAT,Timer Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TSF,Timer Status Flags"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SHIFTSIEN,Shifter Status Interrupt Enable"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SSIE,Shifter Status Interrupt Enable"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SHIFTEIEN,Shifter Error Interrupt Enable"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEIE,Shifter Error Interrupt Enable"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TIMIEN,Timer Interrupt Enable Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TEIE,Timer Status Interrupt Enable"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SHIFTSDEN,Shifter Status DMA Enable"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SSDE,Shifter Status DMA Enable"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SHIFTSTATE,Shifter State Register"
|
|
bitfld.long 0x00 0.--2. "STATE,Current State Pointer" "0,1,2,3,4,5,6,7"
|
|
repeat 8. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL[$1],Shifter Control N Register $1"
|
|
bitfld.long 0x00 24.--26. "TIMSEL,Timer Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of Shift clock,1: Shift on negedge of Shift clock"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open drain or bidirectional..,2: Shifter pin bidirectional output data,3: Shifter pin output"
|
|
bitfld.long 0x00 8.--12. "PINSEL,Shifter Pin Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low"
|
|
bitfld.long 0x00 0.--2. "SMOD,Shifter Mode" "0: Disabled,1: Receive mode,2: Transmit mode,?,4: Match Store mode,5: Match Continuous mode,6: no description available,7: no description available"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG[$1],Shifter Configuration N Register $1"
|
|
bitfld.long 0x00 16.--20. "PWIDTH,Parallel Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8. "INSRC,Input Source" "0: INSRC_0,1: Shifter N+1 Output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for..,?,2: Transmitter outputs stop bit value 0 on store..,3: Transmitter outputs stop bit value 1 on store.."
|
|
bitfld.long 0x00 0.--1. "SSTART,Shifter Start bit" "0: Start bit disabled for..,1: Start bit disabled for..,2: Transmitter outputs start bit value 0 before..,3: Transmitter outputs start bit value 1 before.."
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF[$1],Shifter Buffer N Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUF,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS[$1],Shifter Buffer N Bit Swapped Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUFBIS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS[$1],Shifter Buffer N Byte Swapped Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUFBYS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS[$1],Shifter Buffer N Bit Byte Swapped Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUFBBS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x400)++0x03
|
|
line.long 0x00 "TIMCTL[$1],Timer Control N Register $1"
|
|
bitfld.long 0x00 24.--29. "TRGSEL,Trigger Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low"
|
|
newline
|
|
bitfld.long 0x00 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected"
|
|
bitfld.long 0x00 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open drain or bidirectional output..,2: Timer pin bidirectional output data,3: Timer pin output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "PINSEL,Timer Pin Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TIMOD,Timer Mode" "0: Timer Disabled,1: Dual 8-bit counters baud mode,2: Dual 8-bit counters PWM high mode,3: Single 16-bit counter mode"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x480)++0x03
|
|
line.long 0x00 "TIMCFG[$1],Timer Configuration N Register $1"
|
|
bitfld.long 0x00 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and..,2: Timer output is logic one when enabled and on..,3: Timer output is logic zero when enabled and.."
|
|
bitfld.long 0x00 20.--21. "TIMDEC,Timer Decrement" "0: Decrement counter on FlexIO clock Shift clock..,1: Decrement counter on Trigger input (both..,2: Decrement counter on Pin input (both edges)..,3: Decrement counter on Trigger input (both.."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,?,2: Timer reset on Timer Pin equal to Timer Output,3: Timer reset on Timer Trigger equal to Timer..,4: Timer reset on Timer Pin rising edge,?,6: Timer reset on Trigger rising edge,7: Timer reset on Trigger rising or falling edge"
|
|
bitfld.long 0x00 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,2: Timer disabled on Timer compare (upper 8-bits..,3: Timer disabled on Timer compare (upper 8-bits..,4: Timer disabled on Pin rising or falling edge,5: Timer disabled on Pin rising or falling edge..,6: Timer disabled on Trigger falling edge,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,2: Timer enabled on Trigger high,3: Timer enabled on Trigger high and Pin high,4: Timer enabled on Pin rising edge,5: Timer enabled on Pin rising edge and Trigger..,6: Timer enabled on Trigger rising edge,7: Timer enabled on Trigger rising or falling edge"
|
|
bitfld.long 0x00 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,2: Stop bit is enabled on timer disable,3: Stop bit is enabled on timer compare and.."
|
|
newline
|
|
bitfld.long 0x00 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x500)++0x03
|
|
line.long 0x00 "TIMCMP[$1],Timer Compare N Register $1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMP,Timer Compare Value"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS[$1],Shifter Buffer N Nibble Byte Swapped Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUFNBS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS[$1],Shifter Buffer N Half Word Swapped Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUFHWS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS[$1],Shifter Buffer N Nibble Swapped Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "SHIFTBUFNIS,Shift Buffer"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "LPI2C"
|
|
repeat 8. (list 0. 4. 5. 6. 7. 1. 2. 3.) (list ad:0x41033000 ad:0x402B0000 ad:0x402C0000 ad:0x40A40000 ad:0x40A50000 ad:0x41034000 ad:0x41035000 ad:0x41036000)
|
|
tree "LPI2C$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 8.--11. "MRXFIFO,Master Receive FIFO Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "MTXFIFO,Master Transmit FIFO Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MCR,Master Control Register"
|
|
bitfld.long 0x00 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x00 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x00 3. "DBGEN,Debug Enable" "0: Master is disabled in debug mode,1: Master is enabled in debug mode"
|
|
bitfld.long 0x00 2. "DOZEN,Doze mode enable" "0: Master is enabled in Doze mode,1: Master is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x00 1. "RST,Software Reset" "0: Master logic is not reset,1: Master logic is reset"
|
|
bitfld.long 0x00 0. "MEN,Master Enable" "0: Master logic is disabled,1: Master logic is enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "MSR,Master Status Register"
|
|
rbitfld.long 0x00 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle,1: I2C Bus is busy"
|
|
rbitfld.long 0x00 24. "MBF,Master Busy Flag" "0: I2C Master is idle,1: I2C Master is busy"
|
|
newline
|
|
eventfld.long 0x00 14. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
eventfld.long 0x00 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled,1: Pin low timeout has occurred"
|
|
newline
|
|
eventfld.long 0x00 12. "FEF,FIFO Error Flag" "0: No error,1: Master sending or receiving data without a.."
|
|
eventfld.long 0x00 11. "ALF,Arbitration Lost Flag" "0: Master has not lost arbitration,1: Master has lost arbitration"
|
|
newline
|
|
eventfld.long 0x00 10. "NDF,NACK Detect Flag" "0: Unexpected NACK was not detected,1: Unexpected NACK was detected"
|
|
eventfld.long 0x00 9. "SDF,STOP Detect Flag" "0: Master has not generated a STOP condition,1: Master has generated a STOP condition"
|
|
newline
|
|
eventfld.long 0x00 8. "EPF,End Packet Flag" "0: Master has not generated a STOP or Repeated..,1: Master has generated a STOP or Repeated START.."
|
|
rbitfld.long 0x00 1. "RDF,Receive Data Flag" "0: Receive Data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x00 0. "TDF,Transmit Data Flag" "0: Transmit data is not requested,1: Transmit data is requested"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MIER,Master Interrupt Enable Register"
|
|
bitfld.long 0x00 14. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disabled,1: PLTIE_1"
|
|
newline
|
|
bitfld.long 0x00 12. "FEIE,FIFO Error Interrupt Enable" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x00 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. "NDIE,NACK Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 9. "SDIE,STOP Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "EPIE,End Packet Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MDER,Master DMA Enable Register"
|
|
bitfld.long 0x00 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0x00 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MCFGR0,Master Configuration Register 0"
|
|
bitfld.long 0x00 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless the the.."
|
|
bitfld.long 0x00 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
|
|
bitfld.long 0x00 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
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|
newline
|
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bitfld.long 0x00 0. "HREN,Host Request Enable" "0: Host request input is disabled,1: Host request input is enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. "PINCFG,Pin Configuration" "0: 2-pin open drain mode,1: 2-pin output only mode (ultra-fast mode),2: 2-pin push-pull mode,3: 4-pin push-pull mode,4: 2-pin open drain mode with separate LPI2C slave,5: 2-pin output only mode (ultra-fast mode) with..,6: 2-pin push-pull mode with separate LPI2C slave,7: 4-pin push-pull mode (inverted outputs)"
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|
bitfld.long 0x00 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled (1st data word equals MATCH0..,3: Match is enabled (any data word equals MATCH0..,4: Match is enabled (1st data word equals MATCH0..,5: Match is enabled (any data word equals MATCH0..,6: Match is enabled (1st data word AND MATCH1..,7: Match is enabled (any data word AND MATCH1.."
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|
newline
|
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bitfld.long 0x00 10. "TIMECFG,Timeout Configuration" "0: Pin Low Timeout Flag will set if SCL is low..,1: Pin Low Timeout Flag will set if either SCL.."
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|
bitfld.long 0x00 9. "IGNACK,IGNACK" "0: LPI2C Master will receive ACK and NACK normally,1: LPI2C Master will treat a received NACK as if.."
|
|
newline
|
|
bitfld.long 0x00 8. "AUTOSTOP,Automatic STOP Generation" "0: AUTOSTOP_0,1: STOP condition is automatically generated.."
|
|
bitfld.long 0x00 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
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|
group.long 0x28++0x03
|
|
line.long 0x00 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x00 24.--27. "FILTSDA,Glitch Filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 16.--19. "FILTSCL,Glitch Filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x00 8.--19. 1. "PINLOW,Pin Low Timeout"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
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|
hexmask.long.byte 0x00 16.--23. 1. "MATCH1,Match 1 Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MATCH0,Match 0 Value"
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|
repeat 2. (strings "0" "1" )(list 0x0 0x8 )
|
|
group.long ($2+0x48)++0x03
|
|
line.long 0x00 "MCCR$1,Master Clock Configuration Register $1"
|
|
bitfld.long 0x00 24.--29. "DATAVD,Data Valid Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. "SETHOLD,Setup Hold Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "CLKHI,Clock High Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--5. "CLKLO,Clock Low Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
repeat.end
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
bitfld.long 0x00 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
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|
bitfld.long 0x00 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x03
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|
line.long 0x00 "MFSR,Master FIFO Status Register"
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|
bitfld.long 0x00 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
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group.long 0x60++0x03
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line.long 0x00 "MTDR,Master Transmit Data Register"
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|
bitfld.long 0x00 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate STOP condition,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) START and transmit..,5: Generate (repeated) START and transmit..,6: Generate (repeated) START and transmit..,7: Generate (repeated) START and transmit.."
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|
hexmask.long.byte 0x00 0.--7. 1. "DATA,Transmit Data"
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|
rgroup.long 0x70++0x03
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|
line.long 0x00 "MRDR,Master Receive Data Register"
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|
bitfld.long 0x00 14. "RXEMPTY,RX Empty" "0: Receive FIFO is not empty,1: Receive FIFO is empty"
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|
hexmask.long.byte 0x00 0.--7. 1. "DATA,Receive Data"
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|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive Data Register is now empty"
|
|
bitfld.long 0x00 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit Data Register is now empty"
|
|
newline
|
|
bitfld.long 0x00 5. "FILTDZ,Filter Doze Enable" "0: Filter remains enabled in Doze mode,1: Filter is disabled in Doze mode"
|
|
bitfld.long 0x00 4. "FILTEN,Filter Enable" "0: Disable digital filter and output delay..,1: Enable digital filter and output delay.."
|
|
newline
|
|
bitfld.long 0x00 1. "RST,Software Reset" "0: Slave mode logic is not reset,1: Slave mode logic is reset"
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|
bitfld.long 0x00 0. "SEN,Slave Enable" "0: I2C Slave mode is disabled,1: I2C Slave mode is enabled"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "SSR,Slave Status Register"
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|
rbitfld.long 0x00 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle,1: I2C Bus is busy"
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|
rbitfld.long 0x00 24. "SBF,Slave Busy Flag" "0: I2C Slave is idle,1: I2C Slave is busy"
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|
newline
|
|
rbitfld.long 0x00 15. "SARF,SMBus Alert Response Flag" "0: SMBus Alert Response is disabled or not..,1: SMBus Alert Response is enabled and detected"
|
|
rbitfld.long 0x00 14. "GCF,General Call Flag" "0: Slave has not detected the General Call..,1: Slave has detected the General Call Address"
|
|
newline
|
|
rbitfld.long 0x00 13. "AM1F,Address Match 1 Flag" "0: Have not received an ADDR1 or ADDR0/ADDR1..,1: Have received an ADDR1 or ADDR0/ADDR1 range.."
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|
rbitfld.long 0x00 12. "AM0F,Address Match 0 Flag" "0: Have not received an ADDR0 matching address,1: Have received an ADDR0 matching address"
|
|
newline
|
|
eventfld.long 0x00 11. "FEF,FIFO Error Flag" "0: FIFO underflow or overflow was not detected,1: FIFO underflow or overflow was detected"
|
|
eventfld.long 0x00 10. "BEF,Bit Error Flag" "0: Slave has not detected a bit error,1: Slave has detected a bit error"
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|
newline
|
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eventfld.long 0x00 9. "SDF,STOP Detect Flag" "0: Slave has not detected a STOP condition,1: Slave has detected a STOP condition"
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|
eventfld.long 0x00 8. "RSF,Repeated Start Flag" "0: Slave has not detected a Repeated START..,1: Slave has detected a Repeated START condition"
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|
newline
|
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rbitfld.long 0x00 3. "TAF,Transmit ACK Flag" "0: Transmit ACK/NACK is not required,1: Transmit ACK/NACK is required"
|
|
rbitfld.long 0x00 2. "AVF,Address Valid Flag" "0: Address Status Register is not valid,1: Address Status Register is valid"
|
|
newline
|
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rbitfld.long 0x00 1. "RDF,Receive Data Flag" "0: Receive data is not ready,1: Receive data is ready"
|
|
rbitfld.long 0x00 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "SIER,Slave Interrupt Enable Register"
|
|
bitfld.long 0x00 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disabled,1: SARIE_1"
|
|
bitfld.long 0x00 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "AM1F,Address Match 1 Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 12. "AM0IE,Address Match 0 Interrupt Enable" "0: AM0IE_0,1: Disabled"
|
|
newline
|
|
bitfld.long 0x00 11. "FEIE,FIFO Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 10. "BEIE,Bit Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "SDIE,STOP Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 8. "RSIE,Repeated Start Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 2. "AVIE,Address Valid Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "SDER,Slave DMA Enable Register"
|
|
bitfld.long 0x00 2. "AVDE,Address Valid DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0x00 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or Address match 1..,3: Address match 0 (10-bit) or Address match 1..,4: Address match 0 (7-bit) or Address match 1..,5: Address match 0 (10-bit) or Address match 1..,6: From Address match 0 (7-bit) to Address match..,7: From Address match 0 (10-bit) to Address.."
|
|
bitfld.long 0x00 13. "HSMEN,High Speed Mode Enable" "0: Disables detection of HS-mode master code,1: Enables detection of HS-mode master code"
|
|
newline
|
|
bitfld.long 0x00 12. "IGNACK,Ignore NACK" "0: Slave will end transfer when NACK is detected,1: Slave will not end transfer when NACK detected"
|
|
bitfld.long 0x00 11. "RXCFG,Receive Data Configuration" "0: Reading the Receive Data register will return..,1: Reading the Receive Data register when the.."
|
|
newline
|
|
bitfld.long 0x00 10. "TXCFG,Transmit Flag Configuration" "0: Transmit Data Flag will only assert during a..,1: Transmit Data Flag will assert whenever the.."
|
|
bitfld.long 0x00 9. "SAEN,SMBus Alert Enable" "0: Disables match on SMBus Alert,1: Enables match on SMBus Alert"
|
|
newline
|
|
bitfld.long 0x00 8. "GCEN,General Call Enable" "0: General Call address is disabled,1: General Call address is enabled"
|
|
bitfld.long 0x00 3. "ACKSTALL,ACK SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "TXDSTALL,TX Data SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
bitfld.long 0x00 1. "RXSTALL,RX SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "ADRSTALL,Address SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x00 24.--27. "FILTSDA,Glitch Filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "FILTSCL,Glitch Filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "DATAVD,Data Valid Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. "CLKHOLD,Clock Hold Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. "ADDR1,Address 1 Value"
|
|
hexmask.long.word 0x00 1.--10. 1. "ADDR0,Address 0 Value"
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "SASR,Slave Address Status Register"
|
|
bitfld.long 0x00 14. "ANV,Address Not Valid" "0: Received Address (RADDR) is valid,1: Received Address (RADDR) is not valid"
|
|
hexmask.long.word 0x00 0.--10. 1. "RADDR,Received Address"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. "TXNACK,Transmit NACK" "0: Write a Transmit ACK for each received word,1: Write a Transmit NACK for each received word"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "STDR,Slave Transmit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "SRDR,Slave Receive Data Register"
|
|
bitfld.long 0x00 15. "SOF,Start Of Frame" "0: Indicates this is not the first data word..,1: Indicates this is the first data word since a.."
|
|
bitfld.long 0x00 14. "RXEMPTY,RX Empty" "0: The Receive Data Register is not empty,1: The Receive Data Register is empty"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA,Receive Data"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "I2S (Inter-Integrated Sound Bus Controller)"
|
|
repeat 2. (list 0. 1.) (list ad:0x41037000 ad:0x410AA000)
|
|
tree "I2S$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 16.--19. "FRAME,Frame Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "FIFO,FIFO Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DATALINE,Number of Datalines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TCSR,SAI Transmit Control Register"
|
|
bitfld.long 0x00 31. "TE,Transmitter Enable" "0: Transmitter is disabled,1: Transmitter is enabled or transmitter has.."
|
|
bitfld.long 0x00 30. "STOPE,Stop Enable" "0: Transmitter disabled in Stop mode,1: Transmitter enabled in Stop mode"
|
|
newline
|
|
bitfld.long 0x00 29. "DBGE,Debug Enable" "0: Transmitter is disabled in Debug mode after..,1: Transmitter is enabled in Debug mode"
|
|
bitfld.long 0x00 28. "BCE,Bit Clock Enable" "0: Transmit bit clock is disabled,1: Transmit bit clock is enabled"
|
|
newline
|
|
bitfld.long 0x00 25. "FR,FIFO Reset" "0: No effect,1: FIFO reset"
|
|
bitfld.long 0x00 24. "SR,Software Reset" "0: No effect,1: Software reset"
|
|
newline
|
|
eventfld.long 0x00 20. "WSF,Word Start Flag" "0: Start of word not detected,1: Start of word detected"
|
|
eventfld.long 0x00 19. "SEF,Sync Error Flag" "0: Sync error not detected,1: Frame sync error detected"
|
|
newline
|
|
eventfld.long 0x00 18. "FEF,FIFO Error Flag" "0: Transmit underrun not detected,1: Transmit underrun detected"
|
|
rbitfld.long 0x00 17. "FWF,FIFO Warning Flag" "0: No enabled transmit FIFO is empty,1: Enabled transmit FIFO is empty"
|
|
newline
|
|
rbitfld.long 0x00 16. "FRF,FIFO Request Flag" "0: Transmit FIFO watermark has not been reached,1: Transmit FIFO watermark has been reached"
|
|
bitfld.long 0x00 12. "WSIE,Word Start Interrupt Enable" "0: Disables interrupt,1: Enables interrupt"
|
|
newline
|
|
bitfld.long 0x00 11. "SEIE,Sync Error Interrupt Enable" "0: Disables interrupt,1: Enables interrupt"
|
|
bitfld.long 0x00 10. "FEIE,FIFO Error Interrupt Enable" "0: Disables the interrupt,1: Enables the interrupt"
|
|
newline
|
|
bitfld.long 0x00 9. "FWIE,FIFO Warning Interrupt Enable" "0: Disables the interrupt,1: Enables the interrupt"
|
|
bitfld.long 0x00 8. "FRIE,FIFO Request Interrupt Enable" "0: Disables the interrupt,1: Enables the interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "FWDE,FIFO Warning DMA Enable" "0: Disables the DMA request,1: Enables the DMA request"
|
|
bitfld.long 0x00 0. "FRDE,FIFO Request DMA Enable" "0: Disables the DMA request,1: Enables the DMA request"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "TCR1,SAI Transmit Configuration 1 Register"
|
|
bitfld.long 0x00 0.--3. "TFW,Transmit FIFO Watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2 Register"
|
|
bitfld.long 0x00 30.--31. "SYNC,Synchronous Mode" "0: Asynchronous mode,1: Synchronous with receiver,2: Synchronous with another SAI transmitter,3: Synchronous with another SAI receiver"
|
|
bitfld.long 0x00 29. "BCS,Bit Clock Swap" "0: Use the normal bit clock source,1: Swap the bit clock source"
|
|
newline
|
|
bitfld.long 0x00 28. "BCI,Bit Clock Input" "0: No effect,1: Internal logic is clocked as if bit clock was.."
|
|
bitfld.long 0x00 26.--27. "MSEL,MCLK Select" "0: Bus Clock selected,1: Master Clock (MCLK) 1 option selected,2: Master Clock (MCLK) 2 option selected,3: Master Clock (MCLK) 3 option selected"
|
|
newline
|
|
bitfld.long 0x00 25. "BCP,Bit Clock Polarity" "0: Bit clock is active high with drive outputs..,1: Bit clock is active low with drive outputs on.."
|
|
bitfld.long 0x00 24. "BCD,Bit Clock Direction" "0: Bit clock is generated externally in Slave mode,1: Bit clock is generated internally in Master.."
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Bit Clock Divide"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TCR3,SAI Transmit Configuration 3 Register"
|
|
bitfld.long 0x00 24.--25. "CFR,Channel FIFO Reset" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "TCE,Transmit Channel Enable" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "WDFL,Word Flag Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4 Register"
|
|
bitfld.long 0x00 28. "FCONT,FIFO Continue on Error" "0: On FIFO error the SAI will continue from the..,1: On FIFO error the SAI will continue from the.."
|
|
bitfld.long 0x00 26.--27. "FCOMB,FIFO Combine Mode" "0: FIFO combine mode disabled,1: FIFO combine mode enabled on FIFO reads (from..,2: FIFO combine mode enabled on FIFO writes (by..,3: FIFO combine mode enabled on FIFO reads (from.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "FPACK,FIFO Packing Mode" "0: FIFO packing is disabled,?,2: 8-bit FIFO packing is enabled,3: 16-bit FIFO packing is enabled"
|
|
bitfld.long 0x00 16.--20. "FRSZ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "SYWD,Sync Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "CHMOD,Channel Mode" "0: TDM mode transmit data pins are tri-stated..,1: Output mode transmit data pins are never.."
|
|
newline
|
|
bitfld.long 0x00 4. "MF,MSB First" "0: LSB is transmitted first,1: MSB is transmitted first"
|
|
bitfld.long 0x00 3. "FSE,Frame Sync Early" "0: Frame sync asserts with the first bit of the..,1: Frame sync asserts one bit before the first.."
|
|
newline
|
|
bitfld.long 0x00 2. "ONDEM,On Demand Mode" "0: Internal frame sync is generated continuously,1: Internal frame sync is generated when the.."
|
|
bitfld.long 0x00 1. "FSP,Frame Sync Polarity" "0: Frame sync is active high,1: Frame sync is active low"
|
|
newline
|
|
bitfld.long 0x00 0. "FSD,Frame Sync Direction" "0: Frame sync is generated externally in Slave..,1: Frame sync is generated internally in Master.."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TCR5,SAI Transmit Configuration 5 Register"
|
|
bitfld.long 0x00 24.--28. "WNW,Word N Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "W0W,Word 0 Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "FBT,First Bit Shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
wgroup.long ($2+0x20)++0x03
|
|
line.long 0x00 "TDR[$1],SAI Transmit Data Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "TDR,Transmit Data Register"
|
|
repeat.end
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
rgroup.long ($2+0x40)++0x03
|
|
line.long 0x00 "TFR[$1],SAI Transmit FIFO Register $1"
|
|
bitfld.long 0x00 31. "WCP,Write Channel Pointer" "0: No effect,1: FIFO combine is enabled for FIFO writes and.."
|
|
bitfld.long 0x00 16.--20. "WFP,Write FIFO Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "RFP,Read FIFO Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TMR,SAI Transmit Mask Register"
|
|
hexmask.long 0x00 0.--31. 1. "TWM,Transmit Word Mask"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "RCSR,SAI Receive Control Register"
|
|
bitfld.long 0x00 31. "RE,Receiver Enable" "0: Receiver is disabled,1: Receiver is enabled or receiver has been.."
|
|
bitfld.long 0x00 30. "STOPE,Stop Enable" "0: Receiver disabled in Stop mode,1: Receiver enabled in Stop mode"
|
|
newline
|
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bitfld.long 0x00 29. "DBGE,Debug Enable" "0: Receiver is disabled in Debug mode after..,1: Receiver is enabled in Debug mode"
|
|
bitfld.long 0x00 28. "BCE,Bit Clock Enable" "0: Receive bit clock is disabled,1: Receive bit clock is enabled"
|
|
newline
|
|
bitfld.long 0x00 25. "FR,FIFO Reset" "0: No effect,1: FIFO reset"
|
|
bitfld.long 0x00 24. "SR,Software Reset" "0: No effect,1: Software reset"
|
|
newline
|
|
eventfld.long 0x00 20. "WSF,Word Start Flag" "0: Start of word not detected,1: Start of word detected"
|
|
eventfld.long 0x00 19. "SEF,Sync Error Flag" "0: Sync error not detected,1: Frame sync error detected"
|
|
newline
|
|
eventfld.long 0x00 18. "FEF,FIFO Error Flag" "0: Receive overflow not detected,1: Receive overflow detected"
|
|
rbitfld.long 0x00 17. "FWF,FIFO Warning Flag" "0: No enabled receive FIFO is full,1: Enabled receive FIFO is full"
|
|
newline
|
|
rbitfld.long 0x00 16. "FRF,FIFO Request Flag" "0: Receive FIFO watermark not reached,1: Receive FIFO watermark has been reached"
|
|
bitfld.long 0x00 12. "WSIE,Word Start Interrupt Enable" "0: Disables interrupt,1: Enables interrupt"
|
|
newline
|
|
bitfld.long 0x00 11. "SEIE,Sync Error Interrupt Enable" "0: Disables interrupt,1: Enables interrupt"
|
|
bitfld.long 0x00 10. "FEIE,FIFO Error Interrupt Enable" "0: Disables the interrupt,1: Enables the interrupt"
|
|
newline
|
|
bitfld.long 0x00 9. "FWIE,FIFO Warning Interrupt Enable" "0: Disables the interrupt,1: Enables the interrupt"
|
|
bitfld.long 0x00 8. "FRIE,FIFO Request Interrupt Enable" "0: Disables the interrupt,1: Enables the interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "FWDE,FIFO Warning DMA Enable" "0: Disables the DMA request,1: Enables the DMA request"
|
|
bitfld.long 0x00 0. "FRDE,FIFO Request DMA Enable" "0: Disables the DMA request,1: Enables the DMA request"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "RCR1,SAI Receive Configuration 1 Register"
|
|
bitfld.long 0x00 0.--3. "RFW,Receive FIFO Watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2 Register"
|
|
bitfld.long 0x00 30.--31. "SYNC,Synchronous Mode" "0: Asynchronous mode,1: Synchronous with transmitter,2: Synchronous with another SAI receiver,3: Synchronous with another SAI transmitter"
|
|
bitfld.long 0x00 29. "BCS,Bit Clock Swap" "0: Use the normal bit clock source,1: Swap the bit clock source"
|
|
newline
|
|
bitfld.long 0x00 28. "BCI,Bit Clock Input" "0: No effect,1: Internal logic is clocked as if bit clock was.."
|
|
bitfld.long 0x00 26.--27. "MSEL,MCLK Select" "0: Bus Clock selected,1: Master Clock (MCLK) 1 option selected,2: Master Clock (MCLK) 2 option selected,3: Master Clock (MCLK) 3 option selected"
|
|
newline
|
|
bitfld.long 0x00 25. "BCP,Bit Clock Polarity" "0: Bit Clock is active high with drive outputs..,1: Bit Clock is active low with drive outputs on.."
|
|
bitfld.long 0x00 24. "BCD,Bit Clock Direction" "0: Bit clock is generated externally in Slave mode,1: Bit clock is generated internally in Master.."
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Bit Clock Divide"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "RCR3,SAI Receive Configuration 3 Register"
|
|
bitfld.long 0x00 24.--25. "CFR,Channel FIFO Reset" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "RCE,Receive Channel Enable" "0,1,2,3"
|
|
newline
|
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bitfld.long 0x00 0.--4. "WDFL,Word Flag Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4 Register"
|
|
bitfld.long 0x00 28. "FCONT,FIFO Continue on Error" "0: On FIFO error the SAI will continue from the..,1: On FIFO error the SAI will continue from the.."
|
|
bitfld.long 0x00 26.--27. "FCOMB,FIFO Combine Mode" "0: FIFO combine mode disabled,1: FIFO combine mode enabled on FIFO writes..,2: FIFO combine mode enabled on FIFO reads (by..,3: FIFO combine mode enabled on FIFO writes.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "FPACK,FIFO Packing Mode" "0: FIFO packing is disabled,?,2: 8-bit FIFO packing is enabled,3: 16-bit FIFO packing is enabled"
|
|
bitfld.long 0x00 16.--20. "FRSZ,Frame Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "SYWD,Sync Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. "MF,MSB First" "0: LSB is received first,1: MSB is received first"
|
|
newline
|
|
bitfld.long 0x00 3. "FSE,Frame Sync Early" "0: Frame sync asserts with the first bit of the..,1: Frame sync asserts one bit before the first.."
|
|
bitfld.long 0x00 2. "ONDEM,On Demand Mode" "0: Internal frame sync is generated continuously,1: Internal frame sync is generated when the.."
|
|
newline
|
|
bitfld.long 0x00 1. "FSP,Frame Sync Polarity" "0: Frame sync is active high,1: Frame sync is active low"
|
|
bitfld.long 0x00 0. "FSD,Frame Sync Direction" "0: Frame Sync is generated externally in Slave..,1: Frame Sync is generated internally in Master.."
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "RCR5,SAI Receive Configuration 5 Register"
|
|
bitfld.long 0x00 24.--28. "WNW,Word N Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "W0W,Word 0 Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "FBT,First Bit Shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
rgroup.long ($2+0xA0)++0x03
|
|
line.long 0x00 "RDR[$1],SAI Receive Data Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "RDR,Receive Data Register"
|
|
repeat.end
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
rgroup.long ($2+0xC0)++0x03
|
|
line.long 0x00 "RFR[$1],SAI Receive FIFO Register $1"
|
|
bitfld.long 0x00 16.--20. "WFP,Write FIFO Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "RCP,Receive Channel Pointer" "0: No effect,1: FIFO combine is enabled for FIFO reads and.."
|
|
newline
|
|
bitfld.long 0x00 0.--4. "RFP,Read FIFO Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "RMR,SAI Receive Mask Register"
|
|
hexmask.long 0x00 0.--31. 1. "RWM,Receive Word Mask"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "LPSPI"
|
|
repeat 4. (list 0. 2. 3. 1.) (list ad:0x41038000 ad:0x40290000 ad:0x402A0000 ad:0x41039000)
|
|
tree "LPSPI$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Module Identification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x00 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x00 3. "DBGEN,Debug Enable" "0: LPSPI module is disabled in debug mode,1: LPSPI module is enabled in debug mode"
|
|
bitfld.long 0x00 2. "DOZEN,Doze Mode Enable" "0: LPSPI module is enabled in Doze mode,1: LPSPI module is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x00 1. "RST,Software Reset" "0: Module is not reset,1: Module is reset"
|
|
bitfld.long 0x00 0. "MEN,Module Enable" "0: Module is disabled,1: Module is enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x00 13. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
newline
|
|
eventfld.long 0x00 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed,1: Receive FIFO has overflowed"
|
|
eventfld.long 0x00 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred,1: Transmit FIFO underrun has occurred"
|
|
newline
|
|
eventfld.long 0x00 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed,1: All transfers have completed"
|
|
eventfld.long 0x00 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed,1: Frame transfer has completed"
|
|
newline
|
|
eventfld.long 0x00 8. "WCF,Word Complete Flag" "0: Transfer of a received word has not yet..,1: Transfer of a received word has completed"
|
|
rbitfld.long 0x00 1. "RDF,Receive Data Flag" "0: Receive Data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x00 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 13. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 12. "REIE,Receive Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "TEIE,Transmit Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "FCIE,Frame Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 8. "WCIE,Word Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x00 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
bitfld.long 0x00 9. "FCDE,Frame Complete DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0x00 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO..,1: Received data is discarded unless the Data.."
|
|
bitfld.long 0x00 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "HRSEL,Host Request Select" "0: Host request input is the LPSPI_HREQ pin,1: Host request input is the input trigger"
|
|
bitfld.long 0x00 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 0. "HREN,Host Request Enable" "0: Host request is disabled,1: Host request is enabled"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled,1: PCS[3:2] are disabled"
|
|
bitfld.long 0x00 26. "OUTCFG,Output Configuration" "0: Output data retains last value when chip..,1: Output data is tristated when chip select is.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT is used..,1: SIN is used for both input and output data,2: SOUT is used for both input and output data,3: SOUT is used for input data and SIN is used.."
|
|
bitfld.long 0x00 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: 010b - Match is enabled if 1st data word..,3: 011b - Match is enabled if any data word..,4: 100b - Match is enabled if 1st data word..,5: 101b - Match is enabled if any data word..,6: 110b - Match is enabled if (1st data word AND..,7: 111b - Match is enabled if (any data word AND.."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "PCSPOL,Peripheral Chip Select Polarity" "0: The Peripheral Chip Select pin PCSx is active..,1: The Peripheral Chip Select pin PCSx is active..,?..."
|
|
bitfld.long 0x00 3. "NOSTALL,No Stall" "0: Transfers will stall when the transmit FIFO..,1: Transfers will not stall allowing transmit.."
|
|
newline
|
|
bitfld.long 0x00 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation is disabled,1: Automatic PCS generation is enabled"
|
|
bitfld.long 0x00 1. "SAMPLE,Sample Point" "0: Input data is sampled on SCK edge,1: Input data is sampled on delayed SCK edge"
|
|
newline
|
|
bitfld.long 0x00 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled,1: PCS[3:2] are disabled"
|
|
bitfld.long 0x00 26. "OUTCFG,Output Config" "0: Output data retains last value when chip..,1: Output data is tristated when chip select is.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT is used..,1: SIN is used for both input and output data,2: SOUT is used for both input and output data,3: SOUT is used for input data and SIN is used.."
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|
bitfld.long 0x00 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: 010b - Match is enabled if 1st data word..,3: 011b - Match is enabled if any data word..,4: 100b - Match is enabled if 1st data word..,5: 101b - Match is enabled if any data word..,6: 110b - Match is enabled if (1st data word AND..,7: 111b - Match is enabled if (any data word AND.."
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|
newline
|
|
bitfld.long 0x00 8.--11. "PCSPOL,Peripheral Chip Select Polarity" "0: The Peripheral Chip Select pin PCSx is active..,1: The Peripheral Chip Select pin PCSx is active..,?..."
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|
bitfld.long 0x00 3. "NOSTALL,No Stall" "0: Transfers will stall when the transmit FIFO..,1: Transfers will not stall allowing transmit.."
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|
newline
|
|
bitfld.long 0x00 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation is disabled,1: Automatic PCS generation is enabled"
|
|
bitfld.long 0x00 1. "SAMPLE,Sample Point" "0: Input data is sampled on SCK edge,1: Input data is sampled on delayed SCK edge"
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|
newline
|
|
bitfld.long 0x00 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DMR0,Data Match Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "MATCH0,Match 0 Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DMR1,Data Match Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCKDIV,SCK Divider"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FSR,FIFO Status Register"
|
|
bitfld.long 0x00 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low,1: The inactive state value of SCK is high"
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|
bitfld.long 0x00 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK..,1: Data is changed on the leading edge of SCK.."
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|
newline
|
|
bitfld.long 0x00 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
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|
bitfld.long 0x00 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],2: Transfer using LPSPI_PCS[2],3: Transfer using LPSPI_PCS[3]"
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|
newline
|
|
bitfld.long 0x00 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x00 22. "BYSW,Byte Swap" "0: Byte swap is disabled,1: Byte swap is enabled"
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|
newline
|
|
bitfld.long 0x00 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
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|
bitfld.long 0x00 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x00 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
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|
newline
|
|
bitfld.long 0x00 16.--17. "WIDTH,Transfer Width" "0: 1 bit transfer,1: 2 bit transfer,2: 4 bit transfer,?..."
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|
hexmask.long.word 0x00 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "TDR,Transmit Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "RSR,Receive Status Register"
|
|
bitfld.long 0x00 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty,1: RX FIFO is empty"
|
|
bitfld.long 0x00 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.."
|
|
rgroup.long 0x74++0x03
|
|
line.long 0x00 "RDR,Receive Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Receive Data"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "LPUART"
|
|
repeat 8. (list 0. 4. 5. 6. 7. 1. 2. 3.) (list ad:0x4103A000 ad:0x402D0000 ad:0x402E0000 ad:0x40A60000 ad:0x40A70000 ad:0x4103B000 ad:0x410AB000 ad:0x410AC000)
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|
tree "LPUART$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,LPUART Global Register"
|
|
bitfld.long 0x00 1. "RST,Software Reset" "0: Module is not reset,1: Module is reset"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,LPUART Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled,1: Input trigger is used instead of RXD pin input,2: Input trigger is used instead of CTS_B pin..,3: Input trigger is used to modulate the TXD pin.."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BAUD,LPUART Baud Rate Register"
|
|
bitfld.long 0x00 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation,1: Enables automatic address matching or data.."
|
|
bitfld.long 0x00 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation,1: Enables automatic address matching or data.."
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|
newline
|
|
bitfld.long 0x00 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit..,1: Receiver and transmitter use 10-bit data.."
|
|
bitfld.long 0x00 24.--28. "OSR,Oversampling Ratio" "0: Writing 0 to this field will result in an..,?,?,3: Oversampling ratio of 4 requires BOTHEDGE to..,4: Oversampling ratio of 5 requires BOTHEDGE to..,5: Oversampling ratio of 6 requires BOTHEDGE to..,6: Oversampling ratio of 7 requires BOTHEDGE to..,7: Oversampling ratio of 8,8: Oversampling ratio of 9,9: Oversampling ratio of 10,10: Oversampling ratio of 11,11: Oversampling ratio of 12,12: Oversampling ratio of 13,13: Oversampling ratio of 14,14: Oversampling ratio of 15,15: Oversampling ratio of 16,16: Oversampling ratio of 17,17: Oversampling ratio of 18,18: Oversampling ratio of 19,19: Oversampling ratio of 20,20: Oversampling ratio of 21,21: Oversampling ratio of 22,22: Oversampling ratio of 23,23: Oversampling ratio of 24,24: Oversampling ratio of 25,25: Oversampling ratio of 26,26: Oversampling ratio of 27,27: Oversampling ratio of 28,28: Oversampling ratio of 29,29: Oversampling ratio of 30,30: Oversampling ratio of 31,31: Oversampling ratio of 32"
|
|
newline
|
|
bitfld.long 0x00 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled,1: DMA request enabled"
|
|
bitfld.long 0x00 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled,1: DMA request enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled,1: DMA request enabled"
|
|
bitfld.long 0x00 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,2: Match On and Match Off,3: no description available"
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|
newline
|
|
bitfld.long 0x00 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising.."
|
|
bitfld.long 0x00 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word..,1: Resynchronization during received data word.."
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|
newline
|
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bitfld.long 0x00 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from STAT[LBKDIF] flag..,1: Hardware interrupt requested when.."
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|
bitfld.long 0x00 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from STAT[RXEDGIF] are..,1: Hardware interrupt is requested when.."
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|
newline
|
|
bitfld.long 0x00 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
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|
hexmask.long.word 0x00 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STAT,LPUART Status Register"
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|
eventfld.long 0x00 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected,1: LIN break character has been detected"
|
|
eventfld.long 0x00 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred,1: An active edge on the receive pin has occurred"
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|
newline
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|
bitfld.long 0x00 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.."
|
|
bitfld.long 0x00 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted,1: Receive data inverted"
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|
newline
|
|
bitfld.long 0x00 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the..,1: During receive standby state (RWU = 1) the.."
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|
bitfld.long 0x00 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of..,1: Break character is transmitted with length of.."
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|
newline
|
|
bitfld.long 0x00 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled"
|
|
rbitfld.long 0x00 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit,1: LPUART receiver active (RXD input not idle)"
|
|
newline
|
|
rbitfld.long 0x00 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full,1: Transmit data buffer empty"
|
|
rbitfld.long 0x00 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble..,1: Transmitter idle (transmission activity.."
|
|
newline
|
|
rbitfld.long 0x00 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty,1: Receive data buffer full"
|
|
eventfld.long 0x00 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line was detected"
|
|
newline
|
|
eventfld.long 0x00 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)"
|
|
eventfld.long 0x00 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected in the received character in.."
|
|
newline
|
|
eventfld.long 0x00 17. "FE,Framing Error Flag" "0: No framing error detected,1: Framing error"
|
|
eventfld.long 0x00 16. "PF,Parity Error Flag" "0: No parity error,1: Parity error"
|
|
newline
|
|
eventfld.long 0x00 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1"
|
|
eventfld.long 0x00 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,LPUART Control Register"
|
|
bitfld.long 0x00 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1"
|
|
bitfld.long 0x00 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode,1: TXD pin is an output in single-wire mode"
|
|
bitfld.long 0x00 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted,1: Transmit data inverted"
|
|
newline
|
|
bitfld.long 0x00 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled use polling,1: Hardware interrupt requested when OR is set"
|
|
bitfld.long 0x00 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled use polling,1: Hardware interrupt requested when NF is set"
|
|
newline
|
|
bitfld.long 0x00 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled use polling,1: Hardware interrupt requested when FE is set"
|
|
bitfld.long 0x00 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled use polling),1: Hardware interrupt requested when PF is set"
|
|
newline
|
|
bitfld.long 0x00 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled use..,1: Hardware interrupt requested when TDRE flag.."
|
|
bitfld.long 0x00 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled use..,1: Hardware interrupt requested when TC flag is 1"
|
|
newline
|
|
bitfld.long 0x00 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled use..,1: Hardware interrupt requested when RDRF flag.."
|
|
bitfld.long 0x00 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled use..,1: Hardware interrupt requested when IDLE flag.."
|
|
newline
|
|
bitfld.long 0x00 19. "TE,Transmitter Enable" "0: Transmitter disabled,1: Transmitter enabled"
|
|
bitfld.long 0x00 18. "RE,Receiver Enable" "0: Receiver disabled,1: Receiver enabled"
|
|
newline
|
|
bitfld.long 0x00 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for wakeup.."
|
|
bitfld.long 0x00 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
|
|
newline
|
|
bitfld.long 0x00 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled"
|
|
bitfld.long 0x00 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.."
|
|
bitfld.long 0x00 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,2: 4 idle characters,3: 8 idle characters,4: 16 idle characters,5: 32 idle characters,6: 64 idle characters,7: 128 idle characters"
|
|
newline
|
|
bitfld.long 0x00 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate..,1: Loop mode or single-wire mode where.."
|
|
bitfld.long 0x00 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode,1: LPUART is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x00 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.."
|
|
bitfld.long 0x00 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.."
|
|
newline
|
|
bitfld.long 0x00 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup,1: Configures RWU with address-mark wakeup"
|
|
bitfld.long 0x00 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit,1: Idle character bit count starts after stop bit"
|
|
newline
|
|
bitfld.long 0x00 1. "PE,Parity Enable" "0: No hardware parity generation or checking,1: Parity enabled"
|
|
bitfld.long 0x00 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DATA,LPUART Data Register"
|
|
rbitfld.long 0x00 15. "NOISY,NOISY" "0: The dataword was received without noise,1: The data was received with noise"
|
|
rbitfld.long 0x00 14. "PARITYE,PARITYE" "0: The dataword was received without a parity..,1: The dataword was received with a parity error"
|
|
newline
|
|
bitfld.long 0x00 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame..,1: The dataword was received with a frame error.."
|
|
rbitfld.long 0x00 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data,1: Receive buffer is empty data returned on read.."
|
|
newline
|
|
rbitfld.long 0x00 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this.."
|
|
bitfld.long 0x00 9. "R9T9,R9T9" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "R8T8,R8T8" "0,1"
|
|
bitfld.long 0x00 7. "R7T7,R7T7" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "R6T6,R6T6" "0,1"
|
|
bitfld.long 0x00 5. "R5T5,R5T5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "R4T4,R4T4" "0,1"
|
|
bitfld.long 0x00 3. "R3T3,R3T3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "R2T2,R2T2" "0,1"
|
|
bitfld.long 0x00 1. "R1T1,R1T1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "R0T0,R0T0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,LPUART Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. "MA1,Match Address 1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,LPUART Modem IrDA Register"
|
|
bitfld.long 0x00 18. "IREN,Infrared enable" "0: IR disabled,1: IR enabled"
|
|
bitfld.long 0x00 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR,1: 2/OSR,2: 3/OSR,3: 4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin,1: CTS input is the inverted Receiver Match result"
|
|
newline
|
|
bitfld.long 0x00 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is.."
|
|
bitfld.long 0x00 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high"
|
|
bitfld.long 0x00 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS,1: When a character is placed into an empty.."
|
|
newline
|
|
bitfld.long 0x00 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter,1: Enables clear-to-send operation"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,LPUART FIFO Register"
|
|
rbitfld.long 0x00 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty,1: Transmit buffer is empty"
|
|
rbitfld.long 0x00 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty,1: Receive buffer is empty"
|
|
newline
|
|
eventfld.long 0x00 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred..,1: At least one transmit buffer overflow has.."
|
|
eventfld.long 0x00 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred..,1: At least one receive buffer underflow has.."
|
|
newline
|
|
bitfld.long 0x00 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs,1: All data in the transmit FIFO/Buffer is.."
|
|
bitfld.long 0x00 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs,1: All data in the receive FIFO/buffer is.."
|
|
newline
|
|
bitfld.long 0x00 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially..,1: Enable RDRF assertion due to partially filled..,2: Enable RDRF assertion due to partially filled..,3: Enable RDRF assertion due to partially filled..,4: Enable RDRF assertion due to partially filled..,5: Enable RDRF assertion due to partially filled..,6: Enable RDRF assertion due to partially filled..,7: Enable RDRF assertion due to partially filled.."
|
|
bitfld.long 0x00 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to..,1: TXOF flag generates an interrupt to the host"
|
|
newline
|
|
bitfld.long 0x00 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to..,1: RXUF flag generates an interrupt to the host"
|
|
bitfld.long 0x00 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled,1: Transmit FIFO is enabled"
|
|
newline
|
|
rbitfld.long 0x00 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword,1: Transmit FIFO/Buffer depth = 4 datawords,2: Transmit FIFO/Buffer depth = 8 datawords,3: Transmit FIFO/Buffer depth = 16 datawords,4: Transmit FIFO/Buffer depth = 32 datawords,5: Transmit FIFO/Buffer depth = 64 datawords,6: Transmit FIFO/Buffer depth = 128 datawords,7: Transmit FIFO/Buffer depth = 256 datawords"
|
|
bitfld.long 0x00 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled,1: Receive FIFO is enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword,1: Receive FIFO/Buffer depth = 4 datawords,2: Receive FIFO/Buffer depth = 8 datawords,3: Receive FIFO/Buffer depth = 16 datawords,4: Receive FIFO/Buffer depth = 32 datawords,5: Receive FIFO/Buffer depth = 64 datawords,6: Receive FIFO/Buffer depth = 128 datawords,7: Receive FIFO/Buffer depth = 256 datawords"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,LPUART Watermark Register"
|
|
rbitfld.long 0x00 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "IOMUXC0 (IOMUXC1 Register Index)"
|
|
base ad:0x4103D000
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTC$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTC$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 12. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C )
|
|
group.long ($2+0x50)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 12. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C )
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTD$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "12" "13" "14" "15" "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0xB0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 4. (strings "28" "29" "30" "31" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0xF0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTE$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "32" "33" "34" "35" "36" "37" "38" "39" "40" "41" "42" "43" "44" "45" "46" "47" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x140)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESERVED$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x180)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTF$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
repeat 4. (strings "16" "17" "18" "19" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x1C0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_PTF$1,SW_MUX_CTL_PAD SW MUX Control Register"
|
|
bitfld.long 0x00 17. "OBE,Output Buffer Enable Field" "0: OBE_0_Disabled,1: OBE_1_Enabled"
|
|
bitfld.long 0x00 16. "IBE,Input Buffer Enable Field" "0: IBE_0_Disabled,1: IBE_1_Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 8.--11. "MUX_MODE,MUX Mode Select Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
newline
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
repeat.end
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSDHC1_IPP_WP_ON,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x204)++0x03
|
|
line.long 0x00 "_SELECT_INPUTD_IP_FLEXIO_SYN1_IPP_IND_FLEXIO$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART4_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART4_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART4_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART5_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART5_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART5_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x25C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART6_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART6_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART6_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART7_IPP_IND_LPUART_CTS_B,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x26C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART7_IPP_IND_LPUART_RXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPUART7_IPP_IND_LPUART_TXD,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C4_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C4_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x27C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C4_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 6. (strings "0" "1" "2" "3" "4" "5" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 )
|
|
group.long ($2+0x280)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM4_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x298++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM4_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x29C)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_PCS$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2AC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_SCK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2B0++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_SDI,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2B4++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI2_IPP_IND_LPSPI_SDO,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2B8++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C5_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2BC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C5_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C5_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x04 )
|
|
group.long ($2+0x2C4)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM5_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2CC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM5_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x04 )
|
|
group.long ($2+0x2D0)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM6_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2D8++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM6_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 6. (strings "0" "1" "2" "3" "4" "5" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 )
|
|
group.long ($2+0x2DC)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM7_IPP_IND_LPTPM_CH$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x2F4++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPTPM7_IPP_IND_LPTPM_CLK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2F8++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C6_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2FC++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C6_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C6_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C7_IPP_IND_LPI2C_HREQ,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C7_IPP_IND_LPI2C_SCL,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x30C++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPI2C7_IPP_IND_LPI2C_SDA,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x310)++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_PCS$1,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_SCK,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x324++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_SDI,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x328++0x03
|
|
line.long 0x00 "_SELECT_INPUTLPSPI3_IPP_IND_LPSPI_SDO,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x32C++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSDHC1_IPP_CARD_DET,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSBO2_ULP1_IPP_IND_OTG_OC,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x334++0x03
|
|
line.long 0x00 "_SELECT_INPUTUSBO2_ULP1_IPP_IND_OTG2_OC,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x338++0x03
|
|
line.long 0x00 "_SELECT_INPUTDA_IP_HS_USB2PHY_28FDSOI_USB_ID,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x33C++0x03
|
|
line.long 0x00 "_SELECT_INPUTVIDEO_IN_IPP_IND_DE,N_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 15. "INVERSION,Control the inversion of the pad->module input" "0: Disable inversion,1: Enable inversion"
|
|
bitfld.long 0x00 0.--2. "DAISY,Selects source pad for Module Input Function" "0,1,2,3,4,5,6,7"
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "SW_MUX_CTL_PAD_RESET1_b,SW_MUX_CTL_PAD_RESET1_b SW MUX Control Register"
|
|
bitfld.long 0x00 15. "LK,Lock Field" "0: LK_0_Disabled,1: LK_1_Enabled"
|
|
bitfld.long 0x00 6. "DSE,Drive Strength Enable Field" "0: DSE_0_Standard,1: DSE_1_Hi_Drive"
|
|
newline
|
|
bitfld.long 0x00 5. "ODE,Open-drain Enable Field" "0: ODE_0_Push_pull,1: ODE_1_Open_drain"
|
|
bitfld.long 0x00 2. "SRE,Slew Rate Enable Field" "0: SRE_0_Standard,1: SRE_1_Slow"
|
|
newline
|
|
bitfld.long 0x00 1. "PE,Pull-up Enable Field" "0: PE_0_pull_disabled,1: PE_1_pull_enabled"
|
|
bitfld.long 0x00 0. "PS,Pull Select Field" "0: PS_0_pull_down,1: PS_1_pull_up"
|
|
tree.end
|
|
tree "ADC"
|
|
repeat 2. (list 0. 1.) (list ad:0x41041000 ad:0x410AD000)
|
|
tree "ADC$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
bitfld.long 0x00 10. "CALOFSI,Calibration Offset Function Implemented" "0: Offset calibration and offset trimming not..,1: Offset calibration and offset trimming.."
|
|
bitfld.long 0x00 9. "IADCKI,Internal ADC Clock implemented" "0: Internal clock source not implemented,1: Internal clock source (and CFG[ADCKEN]).."
|
|
newline
|
|
bitfld.long 0x00 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required,1: Range control required"
|
|
bitfld.long 0x00 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported,1: Channel scaling supported,?,?,?,?,6: Channel scaling supported,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH).."
|
|
bitfld.long 0x00 1. "DIFFEN,Differential Supported" "0: Differential operation not supported,1: Differential operation supported"
|
|
newline
|
|
bitfld.long 0x00 0. "RES,Resolution" "0: Up to 13-bit differential/12-bit single ended..,1: Up to 16-bit differential/15-bit single ended.."
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "CMD_NUM,Command Buffer Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CV_NUM,Compare Value Number"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TRIG_NUM,Trigger Number"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CTRL,ADC Control Register"
|
|
bitfld.long 0x00 8. "RSTFIFO,Reset FIFO" "0: No effect,1: FIFO is reset"
|
|
bitfld.long 0x00 2. "DOZEN,Doze Enable" "0: ADC is enabled in Doze mode,1: ADC is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x00 1. "RST,Software Reset" "0: ADC logic is not reset,1: ADC logic is reset"
|
|
bitfld.long 0x00 0. "ADCEN,ADC Enable" "0: ADC is disabled,1: ADC is enabled"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STAT,ADC Status Register"
|
|
rbitfld.long 0x00 24.--27. "CMDACT,Command Active" "0: No command is currently in progress,1: Command 1 currently being executed,2: Command 2 currently being executed,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being..,8: Associated command number is currently being..,9: Associated command number is currently being..,?..."
|
|
rbitfld.long 0x00 16. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1.."
|
|
newline
|
|
rbitfld.long 0x00 8. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE,1: The ADC is processing a conversion running.."
|
|
eventfld.long 0x00 1. "FOF,Result FIFO Overflow Flag" "0: No result FIFO overflow has occurred since..,1: At least one result FIFO overflow has.."
|
|
newline
|
|
rbitfld.long 0x00 0. "RDY,Result FIFO Ready Flag" "0: Result FIFO data level not above watermark..,1: Result FIFO holding data above watermark level"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STAT,ADC Status Register"
|
|
rbitfld.long 0x00 24.--27. "CMDACT,Command Active" "0: No command is currently in progress,1: Command 1 currently being executed,2: Command 2 currently being executed,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being..,8: Associated command number is currently being..,9: Associated command number is currently being..,?..."
|
|
rbitfld.long 0x00 16. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1.."
|
|
newline
|
|
eventfld.long 0x00 1. "FOF,Result FIFO Overflow Flag" "0: No result FIFO overflow has occurred since..,1: At least one result FIFO overflow has.."
|
|
rbitfld.long 0x00 0. "RDY,Result FIFO Ready Flag" "0: Result FIFO data level not above watermark..,1: Result FIFO holding data above watermark level"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IE,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. "FOFIE,Result FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are not enabled,1: FIFO overflow interrupts are enabled"
|
|
bitfld.long 0x00 0. "FWMIE,FIFO Watermark Interrupt Enable" "0: FIFO watermark interrupts are not enabled,1: FIFO watermark interrupts are enabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DE,DMA Enable Register"
|
|
bitfld.long 0x00 0. "FWMDE,FIFO Watermark DMA Enable" "0: DMA request disabled,1: DMA request enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFG,ADC Configuration Register"
|
|
bitfld.long 0x00 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready.."
|
|
hexmask.long.byte 0x00 16.--23. 1. "PUDLY,Power Up Delay"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting,1: Option 2 setting,2: Option 3 setting,?..."
|
|
bitfld.long 0x00 4.--5. "PWRSEL,Power Configuration Select" "0: Level 1 (Lowest power setting),1: PWRSEL_1,2: PWRSEL_2,3: Level 4 (Highest power setting)"
|
|
newline
|
|
bitfld.long 0x00 0. "TPRICTRL,ADC trigger priority control" "0: If a higher priority trigger is detected..,1: If a higher priority trigger is received.."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PAUSE,ADC Pause Register"
|
|
bitfld.long 0x00 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
|
|
hexmask.long.word 0x00 0.--8. 1. "PAUSEDLY,Pause Delay"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FCTRL,ADC FIFO Control Register"
|
|
bitfld.long 0x00 16.--19. "FWMARK,Watermark level selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 0.--4. "FCOUNT,Result FIFO counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SWTRIG,Software Trigger Register"
|
|
bitfld.long 0x00 1. "SWT1,Software trigger 1 event" "0: No trigger 1 event generated,1: Trigger 1 event generated"
|
|
bitfld.long 0x00 0. "SWT0,Software trigger 0 event" "0: No trigger 0 event generated,1: Trigger 0 event generated"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0xC0)++0x03
|
|
line.long 0x00 "TCTRL[$1],Trigger Control Register $1"
|
|
bitfld.long 0x00 24.--27. "TCMD,Trigger command select" "0: Not a valid selection from the command buffer,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: Corresponding CMD is executed,8: Corresponding CMD is executed,9: Corresponding CMD is executed,?,?,?,?,?,15: CMD15 is executed"
|
|
bitfld.long 0x00 16.--19. "TDLY,Trigger delay select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8. "TPRI,Trigger priority setting" "0: Set to highest priority Level 1,1: Set to lower priority Level 2"
|
|
bitfld.long 0x00 0. "HTEN,Trigger enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
|
|
repeat.end
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "CMDL1,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "CMDH1,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
|
|
bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
bitfld.long 0x00 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled,?,2: Compare enabled,3: Compare enabled"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "CMDL2,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "CMDH2,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
|
|
bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
bitfld.long 0x00 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled,?,2: Compare enabled,3: Compare enabled"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CMDL3,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "CMDH3,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
|
|
bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
bitfld.long 0x00 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled,?,2: Compare enabled,3: Compare enabled"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CMDL4,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CMDH4,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
|
|
bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
bitfld.long 0x00 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled,?,2: Compare enabled,3: Compare enabled"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "CMDL5,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "CMDH5,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
|
|
bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CMDL6,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "CMDH6,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x130++0x03
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line.long 0x00 "CMDL7,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x134++0x03
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line.long 0x00 "CMDH7,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x138++0x03
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line.long 0x00 "CMDL8,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x13C++0x03
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line.long 0x00 "CMDH8,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x140++0x03
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line.long 0x00 "CMDL9,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x144++0x03
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line.long 0x00 "CMDH9,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x148++0x03
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line.long 0x00 "CMDL10,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x14C++0x03
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line.long 0x00 "CMDH10,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x150++0x03
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line.long 0x00 "CMDL11,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x154++0x03
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line.long 0x00 "CMDH11,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x158++0x03
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line.long 0x00 "CMDL12,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x15C++0x03
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line.long 0x00 "CMDH12,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x160++0x03
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line.long 0x00 "CMDL13,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x164++0x03
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line.long 0x00 "CMDH13,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
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bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
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newline
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bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
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group.long 0x168++0x03
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line.long 0x00 "CMDL14,ADC Command Low Buffer Register"
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bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
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bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
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newline
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bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
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bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
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group.long 0x16C++0x03
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line.long 0x00 "CMDH14,ADC Command High Buffer Register"
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bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
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bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
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newline
|
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bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "CMDL15,ADC Command Low Buffer Register"
|
|
bitfld.long 0x00 13. "CSCALE,Channel Scale" "0: Scale selected analog channel (Factor of 30/64),1: (Default) Full scale (Factor of 1)"
|
|
bitfld.long 0x00 6. "DIFF,Differential Mode Enable" "0: Single-ended mode,1: Differential mode"
|
|
newline
|
|
bitfld.long 0x00 5. "ABSEL,A-side vs" "0: When DIFF=0b0 the associated A-side channel..,1: When DIFF=0b0 the associated B-side channel.."
|
|
bitfld.long 0x00 0.--4. "ADCH,Input channel select" "0: Select CH0A or CH0B or CH0A/CH0B pair,1: Select CH1A or CH1B or CH1A/CH1B pair,2: Select CH2A or CH2B or CH2A/CH2B pair,3: Select CH3A or CH3B or CH3A/CH3B pair,4: Select corresponding channel CHnA or CHnB or..,5: Select corresponding channel CHnA or CHnB or..,6: Select corresponding channel CHnA or CHnB or..,7: Select corresponding channel CHnA or CHnB or..,8: Select corresponding channel CHnA or CHnB or..,9: Select corresponding channel CHnA or CHnB or..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: Select CH30A or CH30B or CH30A/CH30B pair,31: Select CH31A or CH31B or CH31A/CH31B pair"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "CMDH15,ADC Command High Buffer Register"
|
|
bitfld.long 0x00 24.--27. "NEXT,Next Command Select" "0: No next command defined,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer..,3: Select corresponding CMD command buffer..,4: Select corresponding CMD command buffer..,5: Select corresponding CMD command buffer..,6: Select corresponding CMD command buffer..,7: Select corresponding CMD command buffer..,8: Select corresponding CMD command buffer..,9: Select corresponding CMD command buffer..,?,?,?,?,?,15: Select CMD15 command buffer register as next.."
|
|
bitfld.long 0x00 16.--19. "LOOP,Loop Count Select" "0: Looping not enabled,1: Loop 1 time,2: Loop 2 times,3: Loop corresponding number of times,4: Loop corresponding number of times,5: Loop corresponding number of times,6: Loop corresponding number of times,7: Loop corresponding number of times,8: Loop corresponding number of times,9: Loop corresponding number of times,?,?,?,?,?,15: Loop 15 times"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "AVGS,Hardware Average Select" "0: Single conversion,1: 2 conversions averaged,2: 4 conversions averaged,3: 8 conversions averaged,4: 16 conversions averaged,5: 32 conversions averaged,6: 64 conversions averaged,7: 128 conversions averaged"
|
|
bitfld.long 0x00 8.--10. "STS,Sample Time Select" "0: no description available,1: no description available,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available"
|
|
newline
|
|
bitfld.long 0x00 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
|
|
repeat 4. (strings "1" "2" "3" "4" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x200)++0x03
|
|
line.long 0x00 "CV$1,Compare Value Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "CVH,Compare Value High"
|
|
hexmask.long.word 0x00 0.--15. 1. "CVL,Compare Value Low"
|
|
repeat.end
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "RESFIFO,ADC Data Result FIFO Register"
|
|
bitfld.long 0x00 31. "VALID,FIFO entry is valid" "0: FIFO is empty,1: FIFO record read from RESFIFO is valid"
|
|
bitfld.long 0x00 24.--27. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: Corresponding command buffer used as control..,8: Corresponding command buffer used as control..,9: Corresponding command buffer used as control..,?,?,?,?,?,15: CMD15 buffer used as control settings for.."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "LOOPCNT,Loop count value" "0: Result is from initial conversion in command,1: Result is from second conversion in command,2: no description available,3: no description available,4: no description available,5: no description available,6: no description available,7: no description available,8: no description available,9: no description available,?,?,?,?,?,15: no description available"
|
|
bitfld.long 0x00 16. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion,1: Trigger source 1 initiated this conversion"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "D,Data result"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "CMP"
|
|
repeat 2. (list 0. 1.) (list ad:0x41042000 ad:0x41043000)
|
|
tree "CMP$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
hexmask.long 0x00 0.--31. 1. "PARAM,Parameter Registers"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C0,CMP Control Register 0"
|
|
bitfld.long 0x00 31. "LINKEN,CMP to DAC link enable" "0: CMP to DAC link is disabled,1: CMP to DAC link is enabled"
|
|
bitfld.long 0x00 30. "DMAEN,DMA Enable" "0: DMA is disabled,1: DMA is enabled"
|
|
newline
|
|
bitfld.long 0x00 28. "IER,Comparator Interrupt Enable Rising" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x00 27. "IEF,Comparator Interrupt Enable Falling" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
eventfld.long 0x00 26. "CFR,Analog Comparator Flag Rising" "0: A rising edge has not been detected on COUT,1: A rising edge on COUT has occurred"
|
|
eventfld.long 0x00 25. "CFF,Analog Comparator Flag Falling" "0: A falling edge has not been detected on COUT,1: A falling edge on COUT has occurred"
|
|
newline
|
|
rbitfld.long 0x00 24. "COUT,Analog Comparator Output" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "FPR,Filter Sample Period"
|
|
newline
|
|
bitfld.long 0x00 15. "SE,Sample Enable" "0: Sampling mode is not selected,1: Sampling mode is selected"
|
|
bitfld.long 0x00 14. "WE,Windowing Enable" "0: Windowing mode is not selected,1: Windowing mode is selected"
|
|
newline
|
|
bitfld.long 0x00 12. "PMODE,Power Mode Select" "0: Low Speed (LS) comparison mode is selected,1: High Speed (HS) comparison mode is selected"
|
|
bitfld.long 0x00 11. "INVT,Comparator invert" "0: Does not invert the comparator output,1: Inverts the comparator output"
|
|
newline
|
|
bitfld.long 0x00 10. "COS,Comparator Output Select" "0: Set CMPO to equal COUT (filtered comparator..,1: Set CMPO to equal COUTA (unfiltered.."
|
|
bitfld.long 0x00 9. "OPE,Comparator Output Pin Enable" "0: no description available,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 8. "EN,Comparator Module Enable" "0: Analog Comparator is disabled,1: Analog Comparator is enabled"
|
|
bitfld.long 0x00 4.--6. "FILTER_CNT,Filter Sample Count" "0: Filter is disabled,1: 1 consecutive sample must agree (comparator..,2: 2 consecutive samples must agree,3: 3 consecutive samples must agree,4: 4 consecutive samples must agree,5: 5 consecutive samples must agree,6: 6 consecutive samples must agree,7: 7 consecutive samples must agree"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "HYSTCTR,Comparator hard block hysteresis control" "0: The hard block output has level 0 hysteresis..,1: The hard block output has level 1 hysteresis..,2: The hard block output has level 2 hysteresis..,3: The hard block output has level 3 hysteresis.."
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "C1,CMP Control Register 1"
|
|
bitfld.long 0x00 28.--30. "PSEL,Plus Input MUX Control" "0: Internal Positive Input 0 for Plus Channel --..,1: External Input 1 for Plus Channel --..,2: External Input 2 for Plus Channel --..,3: External Input 3 for Plus Channel --..,4: External Input 4 for Plus Channel --..,5: External Input 5 for Plus Channel --..,6: External Input 6 for Plus Channel --..,7: Internal 8b DAC output"
|
|
bitfld.long 0x00 24.--26. "MSEL,Minus Input MUX Control" "0: Internal Negative Input 0 for Minus Channel..,1: External Input 1 for Minus Channel --..,2: External Input 2 for Minus Channel --..,3: External Input 3 for Minus Channel --..,4: External Input 4 for Minus Channel --..,5: External Input 5 for Minus Channel --..,6: External Input 6 for Minus Channel --..,7: Internal 8b DAC output"
|
|
newline
|
|
bitfld.long 0x00 21. "CHN5,Channel 5 input enable" "0,1"
|
|
bitfld.long 0x00 20. "CHN4,Channel 4 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CHN3,Channel 3 input enable" "0,1"
|
|
bitfld.long 0x00 18. "CHN2,Channel 2 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "CHN1,Channel 1 input enable" "0,1"
|
|
bitfld.long 0x00 16. "CHN0,Channel 0 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DACOE,DAC Output Enable" "0: DAC output is enabled,1: DAC output is disabled"
|
|
bitfld.long 0x00 10. "DACEN,DAC Enable" "0: DAC is disabled,1: DAC is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "VRSEL,Supply Voltage Reference Source Select" "0: Vin1 is selected as resistor ladder network..,1: Vin2 is selected as resistor ladder network.."
|
|
bitfld.long 0x00 8. "DMODE,DAC Mode Selection" "0: DAC is selected to work in low speed and low..,1: DAC is selected to work in high speed high.."
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "VOSEL,DAC Output Voltage Select"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "C1,CMP Control Register 1"
|
|
bitfld.long 0x00 28.--30. "PSEL,Plus Input MUX Control" "0: Internal Posivite Input 0 for Plus Channel --..,1: External Input 1 for Plus Channel --..,2: External Input 2 for Plus Channel --..,3: External Input 3 for Plus Channel --..,4: External Input 4 for Plus Channel --..,5: External Input 5 for Plus Channel --..,6: External Input 6 for Plus Channel --..,7: Internal 8b DAC output"
|
|
bitfld.long 0x00 24.--26. "MSEL,Minus Input MUX Control" "0: Internal Negative Input 0 for Minus Channel..,1: External Input 1 for Minus Channel --..,2: External Input 2 for Minus Channel --..,3: External Input 3 for Minus Channel --..,4: External Input 4 for Minus Channel --..,5: External Input 5 for Minus Channel --..,6: External Input 6 for Minus Channel --..,7: Internal 8b DAC output"
|
|
newline
|
|
bitfld.long 0x00 21. "CHN5,Channel 5 input enable" "0,1"
|
|
bitfld.long 0x00 20. "CHN4,Channel 4 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CHN3,Channel 3 input enable" "0,1"
|
|
bitfld.long 0x00 18. "CHN2,Channel 2 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "CHN1,Channel 1 input enable" "0,1"
|
|
bitfld.long 0x00 16. "CHN0,Channel 0 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DACOE,DAC Output Enable" "0: DAC output is enabled,1: DAC output is disabled"
|
|
bitfld.long 0x00 10. "DACEN,DAC Enable" "0: DAC is disabled,1: DAC is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "VRSEL,Supply Voltage Reference Source Select" "0: Vin1 is selected as resistor ladder network..,1: Vin2 is selected as resistor ladder network.."
|
|
bitfld.long 0x00 8. "DMODE,DAC Mode Selection" "0: DAC is selected to work in low speed and low..,1: DAC is selected to work in high speed high.."
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "VOSEL,DAC Output Voltage Select"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "C2,CMP Control Register 2"
|
|
bitfld.long 0x00 30. "RRIE,Round-Robin interrupt enable" "0: The round-robin interrupt is disabled,1: The round-robin interrupt is enabled when a.."
|
|
bitfld.long 0x00 29. "FXMP,Fixed MUX Port" "0: The Plus port is fixed,1: The Minus port is fixed"
|
|
newline
|
|
bitfld.long 0x00 25.--27. "FXMXCH,Fixed channel selection" "0: External Reference Input 0 is selected as the..,1: External Reference Input 1 is selected as the..,2: External Reference Input 2 is selected as the..,3: External Reference Input 3 is selected as the..,4: External Reference Input 4 is selected as the..,5: External Reference Input 5 is selected as the..,?,7: The 8bit DAC is selected as the fixed.."
|
|
eventfld.long 0x00 21. "CH5F,CH5F" "0,1"
|
|
newline
|
|
eventfld.long 0x00 20. "CH4F,CH4F" "0,1"
|
|
eventfld.long 0x00 19. "CH3F,CH3F" "0,1"
|
|
newline
|
|
eventfld.long 0x00 18. "CH2F,CH2F" "0,1"
|
|
eventfld.long 0x00 17. "CH1F,CH1F" "0,1"
|
|
newline
|
|
eventfld.long 0x00 16. "CH0F,CH0F" "0,1"
|
|
bitfld.long 0x00 14.--15. "NSAM,Number of sample clocks" "0: The comparison result is sampled as soon as..,1: The sampling takes place 1 round-robin clock..,2: The sampling takes place 2 round-robin clock..,3: The sampling takes place 3 round-robin clock.."
|
|
newline
|
|
bitfld.long 0x00 8.--13. "INITMOD,Comparator and DAC initialization delay modulus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "ACOn,ACOn" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C3,CMP Control Register 3"
|
|
bitfld.long 0x00 28. "PCHCTEN,Positive Channel Continuous Mode Enable" "0: Positive channel is in Discrete Mode and..,1: Positive channel is in Continuous Mode and no.."
|
|
bitfld.long 0x00 24. "NCHCTEN,Negative Channel Continuous Mode Enable" "0: Negative channel is in Discrete Mode and..,1: Negative channel is in Continuous Mode and no.."
|
|
newline
|
|
bitfld.long 0x00 20. "RDIVE,Resistor Divider Enable" "0: The resistor is not enabled even when either..,1: The resistor is enabled because the inputs.."
|
|
bitfld.long 0x00 16. "DMCS,Discrete Mode Clock Selection" "0: Slow clock is selected for the timing..,1: Fast clock is selected for the timing.."
|
|
newline
|
|
bitfld.long 0x00 12.--14. "ACSAT,Analog Comparator Sampling Time control" "0: The sampling time equals to T,1: The sampling time equasl to 2*T,2: The sampling time equasl to 4*T,3: The sampling time equasl to 8*T,4: The sampling time equasl to 16*T,5: The sampling time equasl to 32*T,6: The sampling time equasl to 64*T,7: The sampling time equasl to 256*T"
|
|
bitfld.long 0x00 8.--10. "ACPH1TC,Analog Comparator Phase1 Timing Control" "0: Phase1 active time in one sampling period..,1: Phase1 active time in one sampling period..,2: Phase1 active time in one sampling period..,3: Phase1 active time in one sampling period..,4: Phase1 active time in one sampling period..,5: Phase1 active time in one sampling period..,6: Phase1 active time in one sampling period..,7: Phase1 active time in one sampling period.."
|
|
newline
|
|
bitfld.long 0x00 4.--6. "ACPH2TC,Analog Comparator Phase2 Timing Control" "0: Phase2 active time in one sampling period..,1: Phase2 active time in one sampling period..,2: Phase2 active time in one sampling period..,3: Phase2 active time in one sampling period..,4: Phase2 active time in one sampling period..,5: Phase2 active time in one sampling period..,6: Phase2 active time in one sampling period..,7: Phase2 active time in one sampling period.."
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "DAC"
|
|
repeat 2. (list 0. 1.) (list ad:0x41044000 ad:0x41045000)
|
|
tree "DAC$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version Identifier Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor version number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 0.--2. "FIFOSZ,FIFO size" "0: FIFO depth is 2,1: FIFO depth is 4,2: FIFO depth is 8,3: FIFO depth is 16,4: FIFO depth is 32,5: FIFO depth is 64,6: FIFO depth is 128,7: FIFO depth is 256"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DATA,DAC Data Register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DATA0,FIFO DATA0"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CR,DAC Status and Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "WML,Watermark Level Select"
|
|
bitfld.long 0x00 23. "DMAEN,DMA Enable Select" "0: DMA is disabled,1: DMA is enabled"
|
|
newline
|
|
bitfld.long 0x00 22. "SWRST,Software reset" "0,1"
|
|
bitfld.long 0x00 21. "FIFORST,FIFO Reset" "0: FIFORST_0,1: FIFO reset"
|
|
newline
|
|
bitfld.long 0x00 18. "UVIE,Underflow and overflow interrupt enable" "0: Underflow and overflow interrupt is disabled,1: Underflow and overflow interrupt is enabled"
|
|
bitfld.long 0x00 17. "SWMD,DAC FIFO Mode Select" "0: Normal mode,1: Swing back mode"
|
|
newline
|
|
bitfld.long 0x00 16. "FIFOEN,FIFO Enable" "0: FIFO is disabled and only one level buffer is..,1: FIFO is enabled"
|
|
bitfld.long 0x00 15. "DACEN,DAC Enable" "0: The DAC system is disabled,1: The DAC system is enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "DACRFS,DAC Reference Select" "0: The DAC selects DACREF_1 as the reference..,1: The DAC selects DACREF_2 as the reference.."
|
|
bitfld.long 0x00 13. "TRGSEL,DAC Trigger Select" "0: The DAC hardware trigger is selected,1: The DAC software trigger is selected"
|
|
newline
|
|
bitfld.long 0x00 12. "SWTRG,DAC Software Trigger" "0: The DAC soft trigger is not valid,1: The DAC soft trigger is valid"
|
|
bitfld.long 0x00 10. "WTMIE,Watermark Interrupt Enable" "0: Watermark interrupt is disabled,1: Watermark interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "EMPTIE,Nearly Empty Interrupt Enable" "0: FIFO Nearly Empty interrupt is disabled,1: FIFO Nearly Empty interrupt is enabled"
|
|
bitfld.long 0x00 8. "FULLIE,Full Interrupt Enable" "0: FIFO Full interrupt is disabled,1: FIFO Full interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "OVFF,Overflow Flag" "0: No overflow has occurred since the last time..,1: At least one FIFO overflow has occurred since.."
|
|
bitfld.long 0x00 3. "UDFF,Underflow Flag" "0: No underflow has occurred since the last time..,1: At least one trigger underflow has occurred.."
|
|
newline
|
|
bitfld.long 0x00 2. "WMF,FIFO Watermark Status Flag" "0: The DAC buffer read pointer has not reached..,1: The DAC buffer read pointer has reached the.."
|
|
bitfld.long 0x00 1. "NEMPTF,Nearly Empty Flag" "0: More than one data is available in the FIFO,1: One data is available in the FIFO"
|
|
newline
|
|
bitfld.long 0x00 0. "FULLF,Full Flag" "0: FIFO is not full,1: FIFO is full"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CR,DAC Status and Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "WML,Watermark Level Select"
|
|
bitfld.long 0x00 23. "DMAEN,DMA Enable Select" "0: DMA is disabled,1: DMA is enabled"
|
|
newline
|
|
bitfld.long 0x00 22. "SWRST,Software reset" "0,1"
|
|
bitfld.long 0x00 21. "FIFORST,FIFO Reset" "0: FIFORST_0,1: FIFO reset"
|
|
newline
|
|
bitfld.long 0x00 18. "UVIE,Underflow and overflow interrupt enable" "0: Underflow and overflow interrupt is disabled,1: Underflow and overflow interrupt is enabled"
|
|
bitfld.long 0x00 17. "SWMD,DAC FIFO Mode Select" "0: Normal mode,1: Swing back mode"
|
|
newline
|
|
bitfld.long 0x00 16. "FIFOEN,FIFO Enable" "0: FIFO is disabled and only one level buffer is..,1: FIFO is enabled"
|
|
bitfld.long 0x00 15. "DACEN,DAC Enable" "0: The DAC system is disabled,1: The DAC system is enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "DACRFS,DAC Reference Select" "0: The DAC selects DACREF_1 as the reference..,1: The DAC selects DACREF_2 as the reference.."
|
|
bitfld.long 0x00 13. "TRGSEL,DAC Trigger Select" "0: The DAC hardware trigger is selected,1: The DAC software trigger is selected"
|
|
newline
|
|
bitfld.long 0x00 12. "SWTRG,DAC Software Trigger" "0: The DAC soft trigger is not valid,1: The DAC soft trigger is valid"
|
|
bitfld.long 0x00 10. "WTMIE,Watermark Interrupt Enable" "0: Watermark interrupt is disabled,1: Watermark interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "EMPTIE,Nearly Empty Interrupt Enable" "0: FIFO Nearly Empty interrupt is disabled,1: FIFO Nearly Empty interrupt is enabled"
|
|
bitfld.long 0x00 8. "FULLIE,Full Interrupt Enable" "0: FIFO Full interrupt is enabled,1: FIFO Full interrupt is disabled"
|
|
newline
|
|
bitfld.long 0x00 4. "OVFF,Overflow Flag" "0: No overflow has occurred since the last time..,1: At least one FIFO overflow has occurred since.."
|
|
bitfld.long 0x00 3. "UDFF,Underflow Flag" "0: No underflow has occurred since the last time..,1: At least one trigger underflow has occurred.."
|
|
newline
|
|
bitfld.long 0x00 2. "WMF,FIFO Watermark Status Flag" "0: The DAC buffer read pointer has not reached..,1: The DAC buffer read pointer has reached the.."
|
|
bitfld.long 0x00 1. "NEMPTF,Nearly Empty Flag" "0: More than one data is available in the FIFO,1: One data is available in the FIFO"
|
|
newline
|
|
bitfld.long 0x00 0. "FULLF,Full Flag" "0: FIFO is not full,1: FIFO is full"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PTR,DAC FIFO Pointer Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DACRFP,DACRFP"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DACWFP,DACWFP"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CR2,DAC Status and Control Register 2"
|
|
bitfld.long 0x00 6. "IREF,Internal Current Reference Select" "0: Internal Current Reference not selected,1: Internal Current Reference selected"
|
|
bitfld.long 0x00 5. "IREF1,Internal ZTC (Zero Temperature Coefficient) Current Reference Select" "0: Internal ZTC Current Reference not selected,1: Internal ZTC Current Reference selected"
|
|
newline
|
|
bitfld.long 0x00 4. "IREF2,Internal PTAT (Proportional To Absolute Temperature) Current Reference Select" "0: Internal PTAT Current Reference not selected,1: Internal PTAT Current Reference selected"
|
|
bitfld.long 0x00 3. "BFHS,Buffer High Speed Select" "0: Buffer high speed not selected,1: Buffer high speed selected"
|
|
newline
|
|
bitfld.long 0x00 2. "BFMS,Buffer Middle Speed Select" "0: Buffer middle speed not selected,1: Buffer middle speed selected"
|
|
bitfld.long 0x00 1. "OEN,Optional Enable" "0: Output buffer is not bypassed,1: Output buffer is bypassed"
|
|
newline
|
|
bitfld.long 0x00 0. "BFEN,Buffer Enable" "0: Opamp is not used as buffer,1: Opamp is used as buffer"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ITRM,Internal Current Reference Trim Register"
|
|
bitfld.long 0x00 0.--2. "TRIM,Internal Current Trim Register" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "SVNS (Secure Non-Volatile Storage)"
|
|
base ad:0x41070000
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "HPLR,SNVS_HP Lock Register"
|
|
bitfld.long 0x00 18. "HAC_L,High Assurance Counter Lock When set prevents any writes to HPHACIVR HPHACR and HAC_EN bit of HPCOMR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 17. "HPSICR_L,HP Security Interrupt Control Register Lock When set prevents any writes to the HPSICR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 16. "HPSVCR_L,HP Security Violation Control Register Lock When set prevents any writes to the HPSVCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 9. "MKS_SL,Master Key Select Soft Lock When set prevents any writes to the MASTER_KEY_SEL field of the LPMKCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 8. "LPSECR_SL,LP Tamper Detectors Configuration Register Soft Lock When set prevents any writes to the LPTDCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 6. "LPSVCR_SL,LP Security Violation Control Register Soft Lock When set prevents any writes to the LPSVCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 5. "GPR_SL,General Purpose Register Soft Lock When set prevents any writes to the GPR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 4. "MC_SL,Monotonic Counter Soft Lock When set prevents any writes (increments) to the MC Registers and MC_ENV bit" "0: Write access (increment) is allowed,1: Write access (increment) is not allowed"
|
|
newline
|
|
bitfld.long 0x00 3. "LPCALB_SL,LP Calibration Soft Lock When set prevents any writes to the LP Calibration Value (LPCALB_VAL) and LP Calibration Enable (LPCALB_EN)" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 2. "SRTC_SL,Secure Real Time Counter Soft Lock When set prevents any writes to the SRTC Registers SRTC_ENV and SRTC_INV_EN bits" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 1. "ZMK_RSL,Zeroizable Master Key Read Soft Lock When set prevents any software reads to the ZMK Registers and ZMK_ECC_VALUE field of the LPMKCR" "0: Read access is allowed (only in software..,1: Read access is not allowed"
|
|
bitfld.long 0x00 0. "ZMK_WSL,Zeroizable Master Key Write Soft Lock When set prevents any writes (software and hardware) to the ZMK registers and the ZMK_HWP ZMK_VAL and ZMK_ECC_EN fields of the LPMKCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "HPLR,SNVS_HP Lock Register"
|
|
bitfld.long 0x00 18. "HAC_L,High Assurance Counter Lock When set prevents any writes to HPHACIVR HPHACR and HAC_EN bit of HPCOMR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 17. "HPSICR_L,HP Security Interrupt Control Register Lock When set prevents any writes to the HPSICR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 16. "HPSVCR_L,HP Security Violation Control Register Lock When set prevents any writes to the HPSVCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 9. "MKS_SL,Master Key Select Soft Lock When set prevents any writes to the MASTER_KEY_SEL field of the LPMKCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 8. "LPTDCR_SL,LP Tamper Detectors Configuration Register Soft Lock When set prevents any writes to the LPTDCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 6. "LPSVCR_SL,LP Security Violation Control Register Soft Lock When set prevents any writes to the LPSVCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 5. "GPR_SL,General Purpose Register Soft Lock When set prevents any writes to the GPR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 4. "MC_SL,Monotonic Counter Soft Lock When set prevents any writes (increments) to the MC Registers and MC_ENV bit" "0: Write access (increment) is allowed,1: Write access (increment) is not allowed"
|
|
newline
|
|
bitfld.long 0x00 3. "LPCALB_SL,LP Calibration Soft Lock When set prevents any writes to the LP Calibration Value (LPCALB_VAL) and LP Calibration Enable (LPCALB_EN)" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 2. "SRTC_SL,Secure Real Time Counter Soft Lock When set prevents any writes to the SRTC Registers SRTC_ENV and SRTC_INV_EN bits" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 1. "ZMK_RSL,Zeroizable Master Key Read Soft Lock When set prevents any software reads to the ZMK Registers and ZMK_ECC_VALUE field of the LPMKCR" "0: Read access is allowed (only in software..,1: Read access is not allowed"
|
|
bitfld.long 0x00 0. "ZMK_WSL,Zeroizable Master Key Write Soft Lock When set prevents any writes (software and hardware) to the ZMK registers and the ZMK_HWP ZMK_VAL and ZMK_ECC_EN fields of the LPMKCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HPCOMR,SNVS_HP Command Register"
|
|
bitfld.long 0x00 31. "NPSWA_EN,Non-Privileged Software Access Enable When set allows non-privileged software to access all SNVS registers including those that are privileged software read/write access only" "0,1"
|
|
bitfld.long 0x00 19. "HAC_STOP,High Assurance Counter Stop This bit can be set only when SSM is in soft fail state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "HAC_CLEAR,High Assurance Counter Clear When set it clears the High Assurance Counter Register" "0: HAC_CLEAR_0,1: Clear the HAC"
|
|
bitfld.long 0x00 17. "HAC_LOAD,High Assurance Counter Load When set it loads the High Assurance Counter Register with the value of the High Assurance Counter Load Register" "0: HAC_LOAD_0,1: Load the HAC"
|
|
newline
|
|
bitfld.long 0x00 16. "HAC_EN,High Assurance Counter Enable This bit controls the SSM transition from the soft fail to the hard fail state" "0: High Assurance Counter is disabled,1: High Assurance Counter is enabled"
|
|
bitfld.long 0x00 13. "MKS_EN,Master Key Select Enable When not set the one time programmable (OTP) master key is selected by default" "0: no description available,1: no description available"
|
|
newline
|
|
bitfld.long 0x00 12. "PROG_ZMK,Program Zeroizable Master Key This bit activates ZMK hardware programming mechanism" "0: PROG_ZMK_0,1: Activate hardware key programming mechanism"
|
|
bitfld.long 0x00 10. "SW_LPSV,LP Software Security Violation When set SNVS_LP treats this bit as a security violation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SW_FSV,Software Fatal Security Violation When set the system security monitor treats this bit as a fatal security violation" "0,1"
|
|
bitfld.long 0x00 8. "SW_SV,Software Security Violation When set the system security monitor treats this bit as a non-fatal security violation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "LP_SWR_DIS,LP Software Reset Disable When set disables the LP software reset" "0: LP software reset is enabled,1: LP software reset is disabled"
|
|
bitfld.long 0x00 4. "LP_SWR,LP Software Reset When set to 1 most registers in the SNVS_LP section are reset but the following registers are not reset by an LP software reset: Secure Real Time Counter Time Alarm Register This bit cannot be set when the LP_SWR_DIS bit is set" "0: No Action,1: Reset LP section"
|
|
newline
|
|
bitfld.long 0x00 2. "SSM_SFNS_DIS,SSM Soft Fail to Non-Secure State Transition Disable When set it disables the SSM transition from soft fail to non-secure state" "0: Soft Fail to Non-Secure State transition is..,1: Soft Fail to Non-Secure State transition is.."
|
|
bitfld.long 0x00 1. "SSM_ST_DIS,SSM Secure to Trusted State Transition Disable When set disables the SSM transition from secure to trusted state" "0: Secure to Trusted State transition is enabled,1: Secure to Trusted State transition is disabled"
|
|
newline
|
|
bitfld.long 0x00 0. "SSM_ST,SSM State Transition Transition state of the system security monitor" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "HPCR,SNVS_HP Control Register"
|
|
bitfld.long 0x00 27. "BTN_MASK,Button interrupt mask" "0,1"
|
|
bitfld.long 0x00 24.--26. "BTN_CONFIG,Button Configuration" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16. "HP_TS,HP Time Synchronize" "0: No Action,1: Synchronize the HP Time Counter to the LP.."
|
|
bitfld.long 0x00 10.--14. "HPCALB_VAL,HP Calibration Value Defines signed calibration value for the HP Real Time Counter" "0: +0 counts per each 32768 ticks of the counter,1: +1 counts per each 32768 ticks of the counter,2: +2 counts per each 32768 ticks of the counter,?,?,?,?,?,?,?,?,?,?,?,?,15: +15 counts per each 32768 ticks of the counter,16: -16 counts per each 32768 ticks of the counter,17: -15 counts per each 32768 ticks of the counter,?,?,?,?,?,?,?,?,?,?,?,?,30: -2 counts per each 32768 ticks of the counter,31: -1 counts per each 32768 ticks of the counter"
|
|
newline
|
|
bitfld.long 0x00 8. "HPCALB_EN,HP Real Time Counter Calibration Enabled Indicates that the time calibration mechanism is enabled" "0: HP Timer calibration disabled,1: HP Timer calibration enabled"
|
|
bitfld.long 0x00 4.--7. "PI_FREQ,Periodic Interrupt Frequency Defines frequency of the periodic interrupt" "0: - bit 0 of the HPRTCLR is selected as a..,1: - bit 1 of the HPRTCLR is selected as a..,2: - bit 2 of the HPRTCLR is selected as a..,3: - bit 3 of the HPRTCLR is selected as a..,4: - bit 4 of the HPRTCLR is selected as a..,5: - bit 5 of the HPRTCLR is selected as a..,6: - bit 6 of the HPRTCLR is selected as a..,7: - bit 7 of the HPRTCLR is selected as a..,8: - bit 8 of the HPRTCLR is selected as a..,9: - bit 9 of the HPRTCLR is selected as a..,10: - bit 10 of the HPRTCLR is selected as a..,11: - bit 11 of the HPRTCLR is selected as a..,12: - bit 12 of the HPRTCLR is selected as a..,13: - bit 13 of the HPRTCLR is selected as a..,14: - bit 14 of the HPRTCLR is selected as a..,15: - bit 15 of the HPRTCLR is selected as a.."
|
|
newline
|
|
bitfld.long 0x00 3. "PI_EN,HP Periodic Interrupt Enable The periodic interrupt can be generated only if the HP Real Time Counter is enabled" "0: HP Periodic Interrupt is disabled,1: HP Periodic Interrupt is enabled"
|
|
bitfld.long 0x00 2. "DIS_PI,Disable periodic interrupt in the functional interrupt" "0: Periodic interrupt will trigger a functional..,1: Disable periodic interrupt in the function.."
|
|
newline
|
|
bitfld.long 0x00 1. "HPTA_EN,HP Time Alarm Enable When set the time alarm interrupt is generated if the value in the HP Time Alarm Registers is equal to the value of the HP Real Time Counter" "0: HP Time Alarm Interrupt is disabled,1: HP Time Alarm Interrupt is enabled"
|
|
bitfld.long 0x00 0. "RTC_EN,HP Real Time Counter Enable" "0: RTC is disabled,1: RTC is enabled"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "HPSICR,SNVS_HP Security Interrupt Control Register"
|
|
bitfld.long 0x00 31. "LPSVI_EN,LP Security Violation Interrupt Enable This bit enables generating of the security interrupt to the host processor upon security violation signal from the LP section" "0: LP Security Violation Interrupt is Disabled,1: LP Security Violation Interrupt is Enabled"
|
|
bitfld.long 0x00 5. "IOMUX5_EN,External Tamper-detection Pad Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the External Tamper-detection Pad security violation" "0: External Tamper-detection Pad Interrupt is..,1: External Tamper-detection Pad Interrupt is.."
|
|
newline
|
|
bitfld.long 0x00 4. "SRC_EN,Internal Boot Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Internal Boot security violation" "0: Internal Boot Interrupt is Disabled,1: Internal Boot Interrupt is Enabled"
|
|
bitfld.long 0x00 2. "WDOG2_EN,Watchdog 2 Reset Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Watchdog 2 Reset security violation" "0: Watchdog 2 Reset Interrupt is Disabled,1: Watchdog 2 Reset Interrupt is Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "SJC_EN,JTAG Active Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the JTAG Active security violation" "0: JTAG Active Interrupt is Disabled,1: JTAG Active Interrupt is Enabled"
|
|
bitfld.long 0x00 0. "CAAM_EN,CAAM Security Violation Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the CAAM Security Violation security violation" "0: CAAM Security Violation Interrupt is Disabled,1: CAAM Security Violation Interrupt is Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HPSVCR,SNVS_HP Security Violation Control Register"
|
|
bitfld.long 0x00 30.--31. "LPSV_CFG,LP Security Violation Configuration This field configures the LP security violation source" "0: LP security violation is disabled,1: LP security violation is a non-fatal violation,2: LP security violation is a fatal violation,3: LP security violation is a fatal violation"
|
|
bitfld.long 0x00 5.--6. "IOMUX5_CFG,External Tamper-detection Pad Security Violation Configuration This field configures the External Tamper-detection Pad Security Violation Input" "0: External Tamper-detection Pad is disabled,1: External Tamper-detection Pad is a non-fatal..,2: External Tamper-detection Pad is a fatal..,3: External Tamper-detection Pad is a fatal.."
|
|
newline
|
|
bitfld.long 0x00 4. "SRC_CFG,Internal Boot Security Violation Configuration This field configures the Internal Boot Security Violation Input" "0: Internal Boot is a non-fatal violation,1: Internal Boot is a fatal violation"
|
|
bitfld.long 0x00 2. "WDOG2_CFG,Watchdog 2 Reset Security Violation Configuration This field configures the Watchdog 2 Reset Security Violation Input" "0: Watchdog 2 Reset is a non-fatal violation,1: Watchdog 2 Reset is a fatal violation"
|
|
newline
|
|
bitfld.long 0x00 1. "SJC_CFG,JTAG Active Security Violation Configuration This field configures the JTAG Active Security Violation Input" "0: JTAG Active is a non-fatal violation,1: JTAG Active is a fatal violation"
|
|
bitfld.long 0x00 0. "CAAM_CFG,CAAM Security Violation Security Violation Configuration This field configures the CAAM Security Violation Security Violation Input" "0: CAAM Security Violation is a non-fatal..,1: CAAM Security Violation is a fatal violation"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "HPSR,SNVS_HP Status Register"
|
|
rbitfld.long 0x00 31. "ZMK_ZERO,Zeroizable Master Key is Equal to Zero" "0: The ZMK is not zero,1: The ZMK is zero"
|
|
rbitfld.long 0x00 27. "OTPMK_ZERO,One Time Programmable Master Key is Equal to Zero" "0: The OTPMK is not zero,1: The OTPMK is zero"
|
|
newline
|
|
hexmask.long.word 0x00 16.--24. 1. "OTPMK_SYNDROME,One Time Programmable Master Key Syndrome In the case of a single-bit error the eight lower bits of this value indicate the bit number of error location"
|
|
rbitfld.long 0x00 12.--15. "SECURITY_CONFIG,Security Configuration This field reflects the settings of the sys_secure_boot input and the three security configuration inputs to SNVS" "0: FAB configuration,1: OPEN configuration,2: OPEN configuration,3: OPEN configuration,4: FIELD RETURN configuration,5: FIELD RETURN configuration,6: FIELD RETURN configuration,7: FIELD RETURN configuration,8: FAB configuration,9: CLOSED configuration,10: CLOSED configuration,11: CLOSED configuration,12: FIELD RETURN configuration,13: FIELD RETURN configuration,14: FIELD RETURN configuration,15: FIELD RETURN configuration"
|
|
newline
|
|
rbitfld.long 0x00 8.--11. "SSM_STATE,System Security Monitor State This field contains the encoded state of the SSM's state machine" "0: SSM_STATE_0,1: SSM_STATE_1,?,3: SSM_STATE_3,?,?,?,?,8: Init Intermediate (transition state between..,9: SSM_STATE_9,?,11: SSM_STATE_11,?,13: SSM_STATE_13,?,15: SSM_STATE_15"
|
|
eventfld.long 0x00 7. "BI,Button Interrupt Signal ipi_snvs_btn_int_b was asserted" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 6. "BTN,Button Value of the BTN input" "0,1"
|
|
rbitfld.long 0x00 4. "LPDIS,Low Power Disable If 1 the low power section has been disabled by means of an input signal to SNVS" "0,1"
|
|
newline
|
|
eventfld.long 0x00 1. "PI,Periodic Interrupt Indicates that periodic interrupt has occurred since this bit was last cleared" "0: No periodic interrupt occurred,1: A periodic interrupt occurred"
|
|
eventfld.long 0x00 0. "HPTA,HP Time Alarm Indicates that the HP Time Alarm has occurred since this bit was last cleared" "0: No time alarm interrupt occurred,1: A time alarm interrupt occurred"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "HPSVSR,SNVS_HP Security Violation Status Register"
|
|
rbitfld.long 0x00 31. "LP_SEC_VIO,LP Security Violation A security volation was detected in the SNVS low power section" "0,1"
|
|
eventfld.long 0x00 27. "ZMK_ECC_FAIL,Zeroizable Master Key Error Correcting Code Check Failure When set this bit triggers a bad key violation to the SSM and a security violation to the SNVS_LP section which clears security sensitive data" "0: ZMK ECC Failure was not detected,1: ZMK ECC Failure was detected"
|
|
newline
|
|
hexmask.long.word 0x00 16.--24. 1. "ZMK_SYNDROME,Zeroizable Master Key Syndrome The ZMK syndrome indicates the single-bit error location and parity for the ZMK register"
|
|
rbitfld.long 0x00 15. "SW_LPSV,LP Software Security Violation This bit is a read-only copy of the SW_LPSV bit in the HP Command Register" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 14. "SW_FSV,Software Fatal Security Violation This bit is a read-only copy of the SW_FSV bit in the HP Command Register" "0,1"
|
|
rbitfld.long 0x00 13. "SW_SV,Software Security Violation This bit is a read-only copy of the SW_SV bit in the HP Command Register" "0,1"
|
|
newline
|
|
eventfld.long 0x00 5. "IOMUX5,External Tamper-detection Pad security violation was detected" "0: No External Tamper-detection Pad security..,1: External Tamper-detection Pad security.."
|
|
eventfld.long 0x00 4. "SRC,Internal Boot security violation was detected" "0: No Internal Boot security violation was..,1: Internal Boot security violation was detected"
|
|
newline
|
|
eventfld.long 0x00 2. "WDOG2,Watchdog 2 Reset security violation was detected" "0: No Watchdog 2 Reset security violation was..,1: Watchdog 2 Reset security violation was.."
|
|
eventfld.long 0x00 1. "SJC,JTAG Active security violation was detected" "0: No JTAG Active security violation was detected,1: JTAG Active security violation was detected"
|
|
newline
|
|
eventfld.long 0x00 0. "CAAM,CAAM Security Violation security violation was detected" "0: No CAAM Security Violation security violation..,1: CAAM Security Violation security violation.."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "HPHACIVR,SNVS_HP High Assurance Counter IV Register"
|
|
hexmask.long 0x00 0.--31. 1. "HAC_COUNTER_IV,High Assurance Counter Initial Value This register is used to set the starting count value to the high assurance counter"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "HPHACR,SNVS_HP High Assurance Counter Register"
|
|
hexmask.long 0x00 0.--31. 1. "HAC_COUNTER,High Assurance Counter When the HAC_EN bit is set and the SSM is in the soft fail state this counter starts to count down with the system clock"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "HPRTCMR,SNVS_HP Real Time Counter MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. "RTC,HP Real Time Counter The most-significant 15 bits of the RTC"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HPRTCLR,SNVS_HP Real Time Counter LSB Register"
|
|
hexmask.long 0x00 0.--31. 1. "RTC,HP Real Time Counter least-significant 32 bits"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "HPTAMR,SNVS_HP Time Alarm MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. "HPTA_MS,HP Time Alarm most-significant 15 bits"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "HPTALR,SNVS_HP Time Alarm LSB Register"
|
|
hexmask.long 0x00 0.--31. 1. "HPTA_LS,HP Time Alarm 32 least-significant bits"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "LPLR,SNVS_LP Lock Register"
|
|
bitfld.long 0x00 9. "MKS_HL,Master Key Select Hard Lock When set prevents any writes to the MASTER_KEY_SEL field of the LP Master Key Control Register" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 8. "LPSECR_HL,LP Tamper Detectors Configuration Register Hard Lock When set prevents any writes to the LPTDCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 6. "LPSVCR_HL,LP Security Violation Control Register Hard Lock When set prevents any writes to the LPSVCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 5. "GPR_HL,General Purpose Register Hard Lock When set prevents any writes to the GPR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 4. "MC_HL,Monotonic Counter Hard Lock When set prevents any writes (increments) to the MC Registers and MC_ENV bit" "0: Write access (increment) is allowed,1: Write access (increment) is not allowed"
|
|
bitfld.long 0x00 3. "LPCALB_HL,LP Calibration Hard Lock When set prevents any writes to the LP Calibration Value (LPCALB_VAL) and LP Calibration Enable (LPCALB_EN)" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 2. "SRTC_HL,Secure Real Time Counter Hard Lock When set prevents any writes to the SRTC registers SRTC_ENV and SRTC_INV_EN bits" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 1. "ZMK_RHL,Zeroizable Master Key Read Hard Lock When set prevents any software reads to the ZMK registers and ZMK_ECC_VALUE field of the LPMKCR" "0: Read access is allowed (only in software..,1: Read access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 0. "ZMK_WHL,Zeroizable Master Key Write Hard Lock When set prevents any writes (software and hardware) to the ZMK registers and ZMK_HWP ZMK_VAL and ZMK_ECC_EN fields of the LPMKCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "LPLR,SNVS_LP Lock Register"
|
|
bitfld.long 0x00 9. "MKS_HL,Master Key Select Hard Lock When set prevents any writes to the MASTER_KEY_SEL field of the LP Master Key Control Register" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 8. "LPTDCR_HL,LP Tamper Detectors Configuration Register Hard Lock When set prevents any writes to the LPTDCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 6. "LPSVCR_HL,LP Security Violation Control Register Hard Lock When set prevents any writes to the LPSVCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 5. "GPR_HL,General Purpose Register Hard Lock When set prevents any writes to the GPR" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 4. "MC_HL,Monotonic Counter Hard Lock When set prevents any writes (increments) to the MC Registers and MC_ENV bit" "0: Write access (increment) is allowed,1: Write access (increment) is not allowed"
|
|
bitfld.long 0x00 3. "LPCALB_HL,LP Calibration Hard Lock When set prevents any writes to the LP Calibration Value (LPCALB_VAL) and LP Calibration Enable (LPCALB_EN)" "0: Write access is allowed,1: Write access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 2. "SRTC_HL,Secure Real Time Counter Hard Lock When set prevents any writes to the SRTC registers SRTC_ENV and SRTC_INV_EN bits" "0: Write access is allowed,1: Write access is not allowed"
|
|
bitfld.long 0x00 1. "ZMK_RHL,Zeroizable Master Key Read Hard Lock When set prevents any software reads to the ZMK registers and ZMK_ECC_VALUE field of the LPMKCR" "0: Read access is allowed (only in software..,1: Read access is not allowed"
|
|
newline
|
|
bitfld.long 0x00 0. "ZMK_WHL,Zeroizable Master Key Write Hard Lock When set prevents any writes (software and hardware) to the ZMK registers and ZMK_HWP ZMK_VAL and ZMK_ECC_EN fields of the LPMKCR" "0: Write access is allowed,1: Write access is not allowed"
|
|
endif
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LPCR,SNVS_LP Control Register"
|
|
bitfld.long 0x00 24. "GPR_Z_DIS,General Purpose Registers Zeroization Disable" "0,1"
|
|
bitfld.long 0x00 23. "PK_OVERRIDE,PMIC On Request Override The value written to PK_OVERRIDE will be asserted on output signal snvs_lp_pk_override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "PK_EN,PMIC On Request Enable The value written to PK_EN will be asserted on output signal snvs_lp_pk_en" "0,1"
|
|
bitfld.long 0x00 20.--21. "ON_TIME,The ON_TIME field is used to configure the period of time after BTN is asserted before pmic_en_b is asserted to turn on the SoC power" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "DEBOUNCE,This field configures the amount of debounce time for the BTN input signal" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "BTN_PRESS_TIME,This field configures the button press time out values for the PMIC Logic" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 10.--14. "LPCALB_VAL,LP Calibration Value Defines signed calibration value for SRTC" "0: +0 counts per each 32768 ticks of the counter..,1: +1 counts per each 32768 ticks of the counter..,2: +2 counts per each 32768 ticks of the counter..,?,?,?,?,?,?,?,?,?,?,?,?,15: +15 counts per each 32768 ticks of the..,16: -16 counts per each 32768 ticks of the..,17: -15 counts per each 32768 ticks of the..,?,?,?,?,?,?,?,?,?,?,?,?,30: -2 counts per each 32768 ticks of the..,31: -1 counts per each 32768 ticks of the.."
|
|
bitfld.long 0x00 8. "LPCALB_EN,LP Calibration Enable When set enables the SRTC calibration mechanism" "0: SRTC Time calibration is disabled,1: SRTC Time calibration is enabled"
|
|
newline
|
|
bitfld.long 0x00 7. "PWR_GLITCH_EN,Power Glitch Enable By default the detection of a power glitch does not cause the pmic_en_b signal to be asserted" "0,1"
|
|
bitfld.long 0x00 6. "TOP,Turn off System Power Asserting this bit causes a signal to be sent to the Power Management IC to turn off the system power" "0: Leave system power on,1: Turn off system power"
|
|
newline
|
|
bitfld.long 0x00 5. "DP_EN,Dumb PMIC Enabled When set software can control the system power" "0: Smart PMIC enabled,1: Dumb PMIC enabled"
|
|
bitfld.long 0x00 4. "SRTC_INV_EN,If this bit is 1 in the case of a security violation the SRTC stops counting and the SRTC is invalidated (SRTC_ENV bit is cleared)" "0: SRTC stays valid in the case of security..,1: SRTC is invalidated in the case of security.."
|
|
newline
|
|
bitfld.long 0x00 3. "LPWUI_EN,LP Wake-Up Interrupt Enable This interrupt line should be connected to the external pin and is intended to inform the external chip about an SNVS_LP event (tamper event MC rollover SRTC rollover or time alarm )" "0,1"
|
|
bitfld.long 0x00 2. "MC_ENV,Monotonic Counter Enabled and Valid When set the MC can be incremented (by write transaction to the LPSMCMR or LPSMCLR)" "0: MC is disabled or invalid,1: MC is enabled and valid"
|
|
newline
|
|
bitfld.long 0x00 1. "LPTA_EN,LP Time Alarm Enable When set the SNVS functional interrupt is asserted if the LP Time Alarm Register is equal to the 32 MSBs of the secure real time counter" "0: LP time alarm interrupt is disabled,1: LP time alarm interrupt is enabled"
|
|
bitfld.long 0x00 0. "SRTC_ENV,Secure Real Time Counter Enabled and Valid When set the SRTC becomes operational" "0: SRTC is disabled or invalid,1: SRTC is enabled and valid"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "LPMKCR,SNVS_LP Master Key Control Register"
|
|
hexmask.long.word 0x00 7.--15. 1. "ZMK_ECC_VALUE,Zeroizable Master Key Error Correcting Code Value This field is automatically calculated and set when one is written into ZMK_ECC_EN bit of this register"
|
|
bitfld.long 0x00 4. "ZMK_ECC_EN,Zeroizable Master Key Error Correcting Code Check Enable Writing one to this field automatically calculates and sets the ZMK ECC value in the ZMK_ECC_VALUE field of this register" "0: ZMK ECC check is disabled,1: ZMK ECC check is enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "ZMK_VAL,Zeroizable Master Key Valid When set the ZMK value can be selected by the master key control block for use by cryptographic modules" "0: ZMK is not valid,1: ZMK is valid"
|
|
bitfld.long 0x00 2. "ZMK_HWP,Zeroizable Master Key hardware Programming mode When set only the hardware key programming mechanism can set the ZMK and software cannot read it" "0: ZMK is in the software programming mode,1: ZMK is in the hardware programming mode"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "MASTER_KEY_SEL,Master Key Select These bits select the SNVS Master Key output when Master Key Select bits are enabled by MKS_EN bit in the HPCOMR" "0: Select one time programmable master key,1: Select one time programmable master key,2: no description available,3: no description available"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "LPSVCR,SNVS_LP Security Violation Control Register"
|
|
bitfld.long 0x00 5. "IOMUX5_EN,External Tamper-detection Pad Enable This bit enables External Tamper-detection Pad Input" "0: External Tamper-detection Pad is disabled in..,1: External Tamper-detection Pad is enabled in.."
|
|
bitfld.long 0x00 4. "SRC_EN,Internal Boot Enable This bit enables Internal Boot Input" "0: Internal Boot is disabled in the LP domain,1: Internal Boot is enabled in the LP domain"
|
|
newline
|
|
bitfld.long 0x00 2. "WDOG2_EN,Watchdog 2 Reset Enable This bit enables Watchdog 2 Reset Input" "0: Watchdog 2 Reset is disabled in the LP domain,1: Watchdog 2 Reset is enabled in the LP domain"
|
|
bitfld.long 0x00 1. "SJC_EN,JTAG Active Enable This bit enables JTAG Active Input" "0: JTAG Active is disabled in the LP domain,1: JTAG Active is enabled in the LP domain"
|
|
newline
|
|
bitfld.long 0x00 0. "CAAM_EN,CAAM Security Violation Enable This bit enables CAAM Security Violation Input" "0: CAAM Security Violation is disabled in the LP..,1: CAAM Security Violation is enabled in the LP.."
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "LPSECR,SNVS_LP Tamper Detectors Configuration Register"
|
|
bitfld.long 0x00 28. "OSCB,Oscillator Bypass When OSCB=1 the osc_bypass signal is asserted" "0: Normal SRTC clock oscillator not bypassed,1: Normal SRTC clock oscillator bypassed"
|
|
bitfld.long 0x00 15. "POR_OBSERV,Power On Reset (POR) Observability Flop The asynchronous reset input of this flop is connected directly to the output of the POR analog circuitry (external to the SNVS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PFD_OBSERV,System Power Fail Detector (PFD) Observability Flop The asynchronous reset input of this flop is connected directly to the inverted output of the PFD analog circuitry (external to the SNVS block)" "0,1"
|
|
bitfld.long 0x00 11. "ET1P,External Tampering 1 Polarity This bit is used to determine the polarity of external tamper 1" "0: External tamper 1 is active low,1: External tamper 1 is active high"
|
|
newline
|
|
bitfld.long 0x00 9. "ET1_EN,External Tampering 1 Enable When set external tampering 1 detection generates an LP security violation" "0: External tamper 1 is disabled,1: External tamper 1 is enabled"
|
|
bitfld.long 0x00 2. "MCR_EN,MC Rollover Enable When set an MC Rollover event generates an LP security violation" "0: MC rollover is disabled,1: MC rollover is enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "SRTCR_EN,SRTC Rollover Enable When set an SRTC rollover event generates an LP security violation" "0: SRTC rollover is disabled,1: SRTC rollover is enabled"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "LPTDCR,SNVS_LP Tamper Detectors Configuration Register"
|
|
bitfld.long 0x00 28. "OSCB,Oscillator Bypass When OSCB=1 the osc_bypass signal is asserted" "0: Normal SRTC clock oscillator not bypassed,1: Normal SRTC clock oscillator bypassed"
|
|
bitfld.long 0x00 15. "POR_OBSERV,Power On Reset (POR) Observability Flop The asynchronous reset input of this flop is connected directly to the output of the POR analog circuitry (external to the SNVS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PFD_OBSERV,System Power Fail Detector (PFD) Observability Flop The asynchronous reset input of this flop is connected directly to the inverted output of the PFD analog circuitry (external to the SNVS block)" "0,1"
|
|
bitfld.long 0x00 11. "ET1P,External Tampering 1 Polarity This bit is used to determine the polarity of external tamper 1" "0: External tamper 1 is active low,1: External tamper 1 is active high"
|
|
newline
|
|
bitfld.long 0x00 9. "ET1_EN,External Tampering 1 Enable When set external tampering 1 detection generates an LP security violation" "0: External tamper 1 is disabled,1: External tamper 1 is enabled"
|
|
bitfld.long 0x00 2. "MCR_EN,MC Rollover Enable When set an MC Rollover event generates an LP security violation" "0: MC rollover is disabled,1: MC rollover is enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "SRTCR_EN,SRTC Rollover Enable When set an SRTC rollover event generates an LP security violation" "0: SRTC rollover is disabled,1: SRTC rollover is enabled"
|
|
endif
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "LPSR,SNVS_LP Status Register"
|
|
rbitfld.long 0x00 31. "LPS,LP Section is Secured Indicates that the LP section is provisioned/programmed in the secure or trusted state" "0: LP section was not programmed in secure or..,1: LP section was programmed in secure or.."
|
|
rbitfld.long 0x00 30. "LPNS,LP Section is Non-Secured Indicates that LP section was provisioned/programmed in the non-secure state" "0: LP section was not programmed in the..,1: LP section was programmed in the non-secure.."
|
|
newline
|
|
eventfld.long 0x00 18. "SPO,Set Power Off The SPO bit is set when the power button is pressed longer than the configured debounce time" "0: Set Power Off was not detected,1: Set Power Off was detected"
|
|
eventfld.long 0x00 17. "EO,Emergency Off This bit is set when a power off is requested" "0: Emergency off was not detected,1: Emergency off was detected"
|
|
newline
|
|
eventfld.long 0x00 16. "ESVD,External Security Violation Detected Indicates that a security violation is detected on one of the HP security violation ports" "0: No external security violation,1: External security violation is detected"
|
|
eventfld.long 0x00 9. "ET1D,External Tampering 1 Detected" "0: External tampering 1 not detected,1: External tampering 1 detected"
|
|
newline
|
|
eventfld.long 0x00 3. "PGD,Power Supply Glitch Detected 0 No power supply glitch" "0,1"
|
|
eventfld.long 0x00 2. "MCR,Monotonic Counter Rollover" "0: MC has not reached its maximum value,1: MC has reached its maximum value"
|
|
newline
|
|
eventfld.long 0x00 1. "SRTCR,Secure Real Time Counter Rollover" "0: SRTC has not reached its maximum value,1: SRTC has reached its maximum value"
|
|
eventfld.long 0x00 0. "LPTA,LP Time Alarm" "0: No time alarm interrupt occurred,1: A time alarm interrupt occurred"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "LPSRTCMR,SNVS_LP Secure Real Time Counter MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. "SRTC,LP Secure Real Time Counter The most-significant 15 bits of the SRTC"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "LPSRTCLR,SNVS_LP Secure Real Time Counter LSB Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRTC,LP Secure Real Time Counter least-significant 32 bits This register can be programmed only when SRTC is not active and not locked meaning the SRTC_ENV SRTC_SL and SRTC_HL bits are not set"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "LPTAR,SNVS_LP Time Alarm Register"
|
|
hexmask.long 0x00 0.--31. 1. "LPTA,LP Time Alarm This register can be programmed only when the LP time alarm is disabled (LPTA_EN bit is not set)"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "LPSMCMR,SNVS_LP Secure Monotonic Counter MSB Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MC_ERA_BITS,Monotonic Counter Era Bits These bits are inputs to the module and typically connect to fuses"
|
|
hexmask.long.word 0x00 0.--15. 1. "MON_COUNTER,Monotonic Counter most-significant 16 Bits The MC is incremented by one when: A write transaction to the LPSMCMR or LPSMCLR register is detected"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "LPSMCLR,SNVS_LP Secure Monotonic Counter LSB Register"
|
|
hexmask.long 0x00 0.--31. 1. "MON_COUNTER,Monotonic Counter bits The MC is incremented by one when: A write transaction to the LPSMCMR or LPSMCLR Register is detected"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "LPPGDR,SNVS_LP Power Glitch Detector Register"
|
|
hexmask.long 0x00 0.--31. 1. "PGD,Power Glitch Detector Value"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "LPGPR0_legacy_alias,SNVS_LP General Purpose Register 0 (legacy alias)"
|
|
hexmask.long 0x00 0.--31. 1. "GPR,General Purpose Register When GPR_SL or GPR_HL bit is set the register cannot be programmed"
|
|
repeat 8. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x6C)++0x03
|
|
line.long 0x00 "LPZMKR[$1],SNVS_LP Zeroizable Master Key Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "ZMK,Zeroizable Master Key Each of these registers contains 32 bits of the 256-bit ZMK value"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x90)++0x03
|
|
line.long 0x00 "LPGPR_alias[$1],SNVS_LP General Purpose Registers 0"
|
|
hexmask.long 0x00 0.--31. 1. "GPR,General Purpose Register When GPR_SL or GPR_HL bit is set the register cannot be programmed"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "LPGPR[$1],SNVS_LP General Purpose Registers 0"
|
|
hexmask.long 0x00 0.--31. 1. "GPR,General Purpose Register When GPR_SL or GPR_HL bit is set the register cannot be programmed"
|
|
repeat.end
|
|
rgroup.long 0xBF8++0x03
|
|
line.long 0x00 "HPVIDR1,SNVS_HP Version ID Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. "IP_ID,SNVS block ID"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MAJOR_REV,SNVS block major version number"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MINOR_REV,SNVS block minor version number"
|
|
rgroup.long 0xBFC++0x03
|
|
line.long 0x00 "HPVIDR2,SNVS_HP Version ID Register 2"
|
|
abitfld.long 0x00 24.--31. "IP_ERA,IP Era" "0x00=0: Era 1 or 2,0x03=3: Era 3,0x04=4: Era 4,0x05=5: Era 5"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INTG_OPT,SNVS Integration Options"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "ECO_REV,SNVS ECO Revision"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CONFIG_OPT,SNVS Configuration Options"
|
|
tree.end
|
|
tree "ROMC"
|
|
repeat 2. (list 0. 1.) (list ad:0x41090000 ad:0x40900000)
|
|
tree "ROMC$1"
|
|
base $2
|
|
repeat 8. (strings "7" "6" "5" "4" "3" "2" "1" "0" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C )
|
|
group.long ($2+0xD4)++0x03
|
|
line.long 0x00 "ROMPATCHD$1,ROMC Data Registers"
|
|
hexmask.long 0x00 0.--31. 1. "DATAX,DATAX"
|
|
repeat.end
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "ROMPATCHCNTL,ROMC Control Register"
|
|
bitfld.long 0x00 29. "DIS,DIS" "0: Does not affect any ROMC functions (default),1: Disable all ROMC functions"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATAFIX,DATAFIX"
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "ROMPATCHENH,ROMC Enable Register High"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "ROMPATCHENL,ROMC Enable Register Low"
|
|
hexmask.long.word 0x00 0.--15. 1. "ENABLE,ENABLE"
|
|
repeat 16. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "ROMPATCHA[$1],ROMC Address Registers $1"
|
|
hexmask.long.tbyte 0x00 1.--22. 1. "ADDRX,ADDRX"
|
|
bitfld.long 0x00 0. "THUMBX,THUMBX" "0: ARM patch,1: THUMB patch (ignore if data fix)"
|
|
repeat.end
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "ROMPATCHSR,ROMC Status Register"
|
|
eventfld.long 0x00 17. "SW,SW" "0: no event or comparator collisions,1: a collision has occurred"
|
|
rbitfld.long 0x00 0.--5. "SOURCE,SOURCE" "0: Address Comparator 0 matched,1: Address Comparator 1 matched,?,?,?,?,?,?,?,?,?,?,?,?,?,15: Address Comparator 15 matched,?..."
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "EWM"
|
|
base ad:0x410A0000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRL,Control Register"
|
|
bitfld.byte 0x00 3. "INTEN,Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "INEN,Input Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "ASSIN,EWM_in's Assertion State Select" "0,1"
|
|
bitfld.byte 0x00 0. "EWMEN,EWM enable" "0,1"
|
|
wgroup.byte 0x01++0x00
|
|
line.byte 0x00 "SERV,Service Register"
|
|
hexmask.byte 0x00 0.--7. 1. "SERVICE,SERVICE"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "CMPL,Compare Low Register"
|
|
hexmask.byte 0x00 0.--7. 1. "COMPAREL,COMPAREL"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "CMPH,Compare High Register"
|
|
hexmask.byte 0x00 0.--7. 1. "COMPAREH,COMPAREH"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CLKCTRL,Clock Control Register"
|
|
bitfld.byte 0x00 0.--1. "CLKSEL,CLKSEL" "0,1,2,3"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "CLKPRESCALER,Clock Prescaler Register"
|
|
hexmask.byte 0x00 0.--7. 1. "CLK_DIV,CLK_DIV"
|
|
tree.end
|
|
tree "PMC0 (PMC)"
|
|
base ad:0x410A1000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,PMC 1 Version register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HSRUN,PMC 1 HSRUN mode register"
|
|
bitfld.long 0x00 24. "FBBEN,Forward Back Bias Enable" "0: FBB is disabled,1: FBB is enabled"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RUN,PMC 1 RUN mode register"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "VLPR,PMC 1 VLPR mode register"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "STOP,PMC 1 STOP mode register"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "VLPS,PMC 1 VLPS mode register"
|
|
bitfld.long 0x00 28. "RBBEN,Reverse Back Bias Enable" "0: RBB is disabled,1: RBB is enabled"
|
|
bitfld.long 0x00 16.--21. "LDOVL,LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
newline
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "LLS,PMC 1 LLS mode register"
|
|
bitfld.long 0x00 28. "RBBEN,Reverse Back Bias Enable" "0: RBB is disabled,1: RBB is enabled"
|
|
bitfld.long 0x00 16.--21. "LDOVL,Linear LDO Regulator Voltage Level" "0: LDO Voltage Level is 0.60V,1: LDO Voltage Level is 0.61V,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,49: LDO Voltage Level is 1.09V,50: LDO Voltage Level is 1.10V,?..."
|
|
newline
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "VLLS,PMC 1 VLLS mode register"
|
|
bitfld.long 0x00 5. "MONHVD,1.2V HP High-Voltage Detector" "0: The monitor is disabled,1: The monitor is enabled"
|
|
bitfld.long 0x00 4. "MONLVD,Low-Voltage Detector" "0: LP monitor is enabled,1: HP monitor is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOM,LDO Regulator Mode" "0: Linear LDO LP Regulator is enabled,1: Linear LDO HP Regulator is enabled"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "STATUS,PMC 1 Status register"
|
|
bitfld.long 0x00 24. "SRAMF,SRAM Flag" "0: No change request in the SRAMs,1: A change mode request is being processed in.."
|
|
bitfld.long 0x00 8. "LDOVLF,LDO Voltage Level Flag" "0: LDO Voltage Level is stable,1: LDO Voltage Level is changing"
|
|
newline
|
|
bitfld.long 0x00 5. "HVDV,1.2V High-Voltage Detector Value" "0: High-voltage event was not detected by the..,1: High-voltage event was detected by the 1.2V.."
|
|
bitfld.long 0x00 4. "HVDF,1.2V High-Voltage Detector Flag" "0: High-voltage event was not detected by the..,1: High-voltage event was detected by the 1.2V.."
|
|
newline
|
|
bitfld.long 0x00 1. "LVDV,1.2V Low-Voltage Detector Value" "0: Low-voltage event was not detected by the..,1: Low-voltage event was detected by the 1.2V.."
|
|
bitfld.long 0x00 0. "LVDF,1.2V Low-Voltage Detector Flag" "0: Low-voltage event was not detected by the..,1: Low-voltage event was detected by the 1.2V.."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CTRL,PMC 1 Control register"
|
|
bitfld.long 0x00 14. "ISOACK,Isolation Acknowledge" "0,1"
|
|
bitfld.long 0x00 10. "HVDRE,1.2V High-Voltage Detector Reset Enable" "0: 1.2V high-voltage detector reset is disabled,1: 1.2V high-voltage detector reset is enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "LVDRE,Low-Voltage Detector Reset Enable" "0: Low-voltage detector reset is disabled,1: Low-voltage detector reset is enabled"
|
|
bitfld.long 0x00 3. "HVDACK,1.2V High-Voltage Detector Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "HVDIE,1.2V High-Voltage Detector Interrupt Enable" "0: 1.2V high-voltage detector interrupt is..,1: 1.2V high-voltage detector interrupt is enabled"
|
|
bitfld.long 0x00 1. "LVDACK,1.2V Low-Voltage Detector Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LVDIE,Low-Voltage Detector Interrupt Enable" "0: Low-voltage detector interrupt is disabled,1: Low-voltage detector interrupt is enabled"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BCTRL,PMC 1 Biasing Control register"
|
|
bitfld.long 0x00 24.--27. "FBBPLEVEL,FBB P-Well Voltage Level" "0: No BIAS condition,1: Voltage level at 50mV,2: Voltage level at 150mV,3: Voltage level at 100mV,4: Voltage level at 350mV,5: Voltage level at 300mV,6: Voltage level at 200mV,7: Voltage level at 250mV,?..."
|
|
bitfld.long 0x00 16.--19. "FBBNLEVEL,FBB N-Well Voltage Level" "0: No BIAS condition,1: Voltage level at -50mV,2: Voltage level at -150mV,3: Voltage level at -100mV,4: Voltage level at -350mV,5: Voltage level at -300mV,6: Voltage level at -200mV,7: Voltage level at -250mV,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "RBBPLEVEL,RBB P-Well Voltage Level" "0: Voltage level at -0.5V,1: Voltage level at -0.6V,2: Voltage level at -0.7V,3: Voltage level at -0.8V,4: Voltage level at -0.9V,5: Voltage level at -1.0V,6: Voltage level at -1.1V,7: Voltage level at -1.2V,8: Voltage level at -1.3V,?..."
|
|
bitfld.long 0x00 0.--3. "RBBNLEVEL,RBB N-Well Voltage Level" "0: Voltage level at 0.5V,1: Voltage level at 0.6V,2: Voltage level at 0.7V,3: Voltage level at 0.8V,4: Voltage level at 0.9V,5: Voltage level at 1.0V,6: Voltage level at 1.1V,7: Voltage level at 1.2V,8: Voltage level at 1.3V,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SRAMCTRL,PMC 1 SRAMs Control register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRAM_STDY,PMC 1 SRAM Bank in Standby Mode"
|
|
tree.end
|
|
tree "SIM (SIM Memory Map)"
|
|
base ad:0x410A3000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SOPT1,SIM Systems Options Register 1"
|
|
bitfld.long 0x00 9. "EN_WDG2_HARD_RST,Watchdog 2 Reset Enable" "0,1"
|
|
bitfld.long 0x00 8. "EN_SNVS_HARD_RST,SNVS_HP system reset enable (Write Once)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "M4_MPU_DISABLE,Disables M4 MPU unit" "0,1"
|
|
bitfld.long 0x00 5. "M4_FPU_DISABLE,Disables M4 FPU unit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "MIPI_ISO_DISABLE,MIPI Isolation Disable" "0,1"
|
|
bitfld.long 0x00 2. "PMIC_STBY_REQ,PMIC Standby Request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EN_SEC_VIO,Security Violation Enable" "0,1"
|
|
bitfld.long 0x00 0. "A7_SW_RESET,SW reset for A7 domain" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SOPT1CFG,SIM SOPT1 Configuration Register"
|
|
bitfld.long 0x00 31. "DSI_RST_DPI_N,DSI Reset DPI Control" "0,1"
|
|
bitfld.long 0x00 30. "DSI_RST_ESC_N,DSI Reset Escape Control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DSI_RST_BYTE_N,DSI Reset Byte Control" "0,1"
|
|
bitfld.long 0x00 10. "QSPI_PULL_TIM_RELAX_b,QSPI OBE Assertion Control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "DSI_SD,DSI Shutdown Control" "0,1"
|
|
bitfld.long 0x00 8. "DSI_CM,DSI Color Mode Control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "DSI_PLL_EN,DSI PLL Enable" "0,1"
|
|
bitfld.long 0x00 1. "MASK_DPM_PANIC_IN,DPM Panic In Mask (Write Once)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "MASK_DPM_PANIC_OUT,DPM Panic Out Mask (Write Once)" "0,1"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "HSIC_CAL,HW SIM HSIC CAL Register"
|
|
bitfld.long 0x00 24.--28. "HSIC_ZQ_VOL_M1,HSIC ZQ pull-down resistance incremented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "HSIC_ZQ_VOL,HSIC ZQ pull-down resistance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "HSIC_ZQ_VOH_M1,HSIC ZQ pull-up resistance incremented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. "HSIC_ZQ_CAL_EN,HSIC ZQ compare enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "HSIC_ZQ_COMPARE,HSIC ZQ Compare" "0,1"
|
|
bitfld.long 0x00 0.--4. "HSIC_ZQ_VOH,HSIC ZQ pull-up resistance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "HSIC_CAL,HW SIM HSIC CAL Register"
|
|
bitfld.long 0x00 24.--28. "HSIC_ZQ_VOL_M1,HSIC ZQ pull-down resistence incremented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "HSIC_ZQ_VOL,HSIC ZQ pull-down resistence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "HSIC_ZQ_VOH_M1,HSIC ZQ pull-up resistence incremented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. "HSIC_ZQ_CAL_EN,HSIC ZQ compare enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "HSIC_ZQ_VOH,HSIC ZQ pull-up resistence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SNVS_MISC_CTRL,SNVS Misc Control Register"
|
|
bitfld.long 0x00 31. "COIN_CELL_CHARGE_EN,Enables Signal Isolation on SNVS Software Trims and Pull controls (PUS/PUE) until the software writes 1 to this register field" "0,1"
|
|
bitfld.long 0x00 0.--3. "OSC_CAP_TRIM,Trims to control the CAP on 32K Oscillator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "GPR0,HW SIM General Purpose Register 0"
|
|
bitfld.long 0x00 1. "OCOTP_CLK_DIS,OCOTP clocks disable" "0,1"
|
|
bitfld.long 0x00 0. "MTR_CLK_DIS,MBIST clocks disable" "0,1"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GPR1,HW SIM General Purpose Register 1"
|
|
bitfld.long 0x00 1. "USB_PHY_GLOBAL_WAKEUP_EN,USB PHY global wakeup enable" "0,1"
|
|
bitfld.long 0x00 0. "USB_PHY_VLLS_WAKEUP_EN,USB PHY VLLS wakeup enable" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GPR1,HW SIM General Purpose Register 1"
|
|
bitfld.long 0x00 1. "USB_PHY_NON_VLLS_WAKEUP_EN,USB PHY global wakeup enable" "0,1"
|
|
bitfld.long 0x00 0. "USB_PHY_WAKEUP_ISO_DISABLE,USB PHY VLLS wakeup enable" "0,1"
|
|
endif
|
|
repeat 2. (strings "2" "3" )(list 0x0 0x4 )
|
|
group.long ($2+0x34)++0x03
|
|
line.long 0x00 "GPR$1,HW SIM General Purpose Register $1"
|
|
repeat.end
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MISC_CTRL0,HW SIM MISC Register 0"
|
|
eventfld.long 0x00 29. "A7_TSTMR_COMP_IRQ_CTRL,Controls the compare of A7 reset as IRQ" "0,1"
|
|
bitfld.long 0x00 27. "A7_TO_M4_RST_IRQ_EN,Enables the assertion of A7 reset as IRQ/Wake-up to M4" "0,1"
|
|
newline
|
|
eventfld.long 0x00 26. "A7_TO_M4_RST_IRQ_CTRL,Controls the assertion of A7 reset as IRQ/Wake-up to M4" "0,1"
|
|
bitfld.long 0x00 25. "A7_TSTMR_COMP_EN,Enables the compare of A7 TS Timer versus a programmed value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "DISABLE_DDR_HW_AUTO_LP_MODE,Disable control to put DDR in self-refresh mode automatically by HW during low power modes" "0,1"
|
|
bitfld.long 0x00 23. "TESTCLK_OBE,Output Buffer Enable for LVDS TESTCLK_P/TESTCLK_N pad" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "TESTCLK_TRIM,Trim Delay for LVDS TESTCLK_P/TESTCLK_N pad" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 17.--19. "A7_OBS_CLK_DIV_RATIO,Selection of division rate (2**n) of A7 observation clock div rate = 2**n (n=0..7)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 13.--16. "A7_OBS_CLK_SRC_SEL,Selects the clock to be observed on A7 domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--12. "M4_OBS_CLK_DIV_RATIO,Selection of division rate (2**n) of M4 observation clock div rate = 2**n (n=0..7)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6.--9. "M4_OBS_CLK_SRC_SEL,Selects the clock to be observed on M4 domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. "OBS_CLK_ENABLE,Enable that clocks can be observed at M4 CLKOUT A7 CLKOUT and LVDS clock pads" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FB_DELAY_OE_EXTS,Flexbus control of fb_oe delay when exts is enabled" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MISC_CTRL0,HW SIM MISC Register 0"
|
|
eventfld.long 0x00 29. "A7_TSTMR_COMP_IRQ_CTRL,Controls the compare of A7 reset as IRQ" "0,1"
|
|
bitfld.long 0x00 27. "A7_TO_M4_RST_IRQ_EN,Enables the assertion of A7 reset as IRQ/Wake-up to M4" "0,1"
|
|
newline
|
|
eventfld.long 0x00 26. "A7_TO_M4_RST_IRQ_CTRL,Controls the assertion of A7 reset as IRQ/Wake-up to M4" "0,1"
|
|
bitfld.long 0x00 25. "A7_TSTMR_COMP_EN,Enables the compare of A7 TS Timer versus a programmed value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "DISABLE_DDR_HW_AUTO_LP_MODE,Disable control to put DDR in self-refresh mode automatically by HW during low power modes" "0,1"
|
|
bitfld.long 0x00 23. "TESTCLK_OBE,Output Buffer Enable for LVDS TESTCLK_P/TESTCLK_N pad" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "TESTCLK_TRIM,Trim Delay for LVDS TESTCLK_P/TESTCLK_N pad" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 17.--19. "A7_OBS_CLK_DIV_RATIO,Selection of division rate (2**n) of A7 observation clock div rate = 2**n (n=0..7)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 13.--16. "A7_OBS_CLK_SRC_SEL,Selects the clock to be observed on A7 domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--12. "M4_OBS_CLK_DIV_RATIO,Selection of division rate (2**n) of M4 observation clock div rate = 2**n (n=0..7)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6.--9. "M4_OBS_CLK_SRC_SEL,Selects the clock to be observed on M4 domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. "OBS_CLK_ENABLE,Enable that clocks can be observed at M4 CLKOUT A7 CLKOUT and LVDS clock pads" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FB_DELAY_OE_EXTS,Flexbus control of FB_OE_b signal delay when CSCR[EXTS] is enabled" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SIM_DGO_CTRL0,SIM DGO Control Register 0"
|
|
bitfld.long 0x00 31. "INT_EN_ACK6,Interrupt enable for WR_ACK_DGO_GP6 bit field" "0,1"
|
|
bitfld.long 0x00 30. "INT_EN_ACK5,Interrupt enable for WR_ACK_DGO_GP5 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "INT_EN_ACK4,Interrupt enable for WR_ACK_DGO_GP4 bit field" "0,1"
|
|
bitfld.long 0x00 28. "INT_EN_ACK3,Interrupt enable for WR_ACK_DGO_GP3 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "INT_EN_ACK2,Interrupt enable for WR_ACK_DGO_GP2 bit field" "0,1"
|
|
bitfld.long 0x00 26. "INT_EN_ACK1,Interrupt enable for WR_ACK_DGO_GP1 bit field" "0,1"
|
|
newline
|
|
eventfld.long 0x00 18. "WR_ACK_DGO_GP6,This bit field is set automatically when corresponding DGO_GP6 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 17. "WR_ACK_DGO_GP5,This bit field is set automatically when corresponding DGO_GP5 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 16. "WR_ACK_DGO_GP4,This bit field is set automatically when corresponding DGO_GP4 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 15. "WR_ACK_DGO_GP3,This bit field is set automatically when corresponding DGO_GP3 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 14. "WR_ACK_DGO_GP2,This bit field is set automatically when corresponding DGO_GP2 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 13. "WR_ACK_DGO_GP1,This bit field is set automatically when corresponding DGO_GP1 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "UPDATE_DGO_GP6,Writing 1 to this bit field indicates corresponding DGO_GP6 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 4. "UPDATE_DGO_GP5,Writing 1 to this bit field indicates corresponding DGO_GP5 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "UPDATE_DGO_GP4,Writing 1 to this bit field indicates corresponding DGO_GP4 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 2. "UPDATE_DGO_GP3,Writing 1 to this bit field indicates corresponding DGO_GP3 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UPDATE_DGO_GP2,Writing 1 to this bit field indicates corresponding DGO_GP2 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 0. "UPDATE_DGO_GP1,Writing 1 to this bit field indicates corresponding DGO_GP1 register has been updated with new values" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SIM_DGO_CTRL0,SIM DGO Control Register 0"
|
|
bitfld.long 0x00 31. "INT_EN_ACK6,Interrupt enable for WR_ACK_DGO_GP6 bit field" "0,1"
|
|
bitfld.long 0x00 30. "INT_EN_ACK5,Interrupt enable for WR_ACK_DGO_GP5 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "INT_EN_ACK4,Interrupt enable for WR_ACK_DGO_GP4 bit field" "0,1"
|
|
bitfld.long 0x00 28. "INT_EN_ACK3,Interrupt enable for WR_ACK_DGO_GP3 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "INT_EN_ACK2,Interrupt enable for WR_ACK_DGO_GP2 bit field" "0,1"
|
|
bitfld.long 0x00 26. "INT_EN_ACK1,Interrupt enable for WR_ACK_DGO_GP1 bit field" "0,1"
|
|
newline
|
|
eventfld.long 0x00 18. "WR_ACK_DGO_GP6,This bit field is set automatically when corresponding DGO_GP6 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 17. "WR_ACK_DGO_GP5,This bit field is set automatically when corresponding DGO_GP5 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 16. "WR_ACK_DGO_GP4,This bit field is set automatically when corresponding DGO_GP4 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 15. "WR_ACK_DGO_GP3,This bit field is set automatically when corresponding DGO_GP3 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 14. "WR_ACK_DGO_GP2,This bit field is set automatically when corresponding DGO_GP2 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 13. "WR_ACK_DGO_GP1,This bit field is set automatically when corresponding DGO_GP1 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "UPDATE_DGO_GP6,Writing HIGH to this bit field indicates corresponding DGO_GP6 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 4. "UPDATE_DGO_GP5,Writing HIGH to this bit field indicates corresponding DGO_GP5 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "UPDATE_DGO_GP4,Writing HIGH to this bit field indicates corresponding DGO_GP4 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 2. "UPDATE_DGO_GP3,Writing HIGH to this bit field indicates corresponding DGO_GP3 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UPDATE_DGO_GP2,Writing HIGH to this bit field indicates corresponding DGO_GP2 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 0. "UPDATE_DGO_GP1,Writing HIGH to this bit field indicates corresponding DGO_GP1 register has been updated with new values" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SIM_DGO_CTRL1,SIM DGO Control Register 1"
|
|
bitfld.long 0x00 31. "INT_EN_ACK11,Interrupt enable for WR_ACK_DGO_GP11 bit field" "0,1"
|
|
bitfld.long 0x00 30. "INT_EN_ACK10,Interrupt enable for WR_ACK_DGO_GP10 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "INT_EN_ACK9,Interrupt enable for WR_ACK_DGO_GP9 bit field" "0,1"
|
|
bitfld.long 0x00 28. "INT_EN_ACK8,Interrupt enable for WR_ACK_DGO_GP8 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "INT_EN_ACK7,Interrupt enable for WR_ACK_DGO_GP7 bit field" "0,1"
|
|
eventfld.long 0x00 17. "WR_ACK_DGO_GP11,This bit field is set automatically when corresponding DGO_GP11 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 16. "WR_ACK_DGO_GP10,This bit field is set automatically when corresponding DGO_GP10 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 15. "WR_ACK_DGO_GP9,This bit field is set automatically when corresponding DGO_GP9 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 14. "WR_ACK_DGO_GP8,This bit field is set automatically when corresponding DGO_GP8 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 13. "WR_ACK_DGO_GP7,This bit field is set automatically when corresponding DGO_GP7 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "UPDATE_DGO_GP11,Writing 1 to this bit field indicates corresponding DGO_GP11 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 3. "UPDATE_DGO_GP10,Writing 1 to this bit field indicates corresponding DGO_GP10 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UPDATE_DGO_GP9,Writing 1 to this bit field indicates corresponding DGO_GP9 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 1. "UPDATE_DGO_GP8,Writing 1 to this bit field indicates corresponding DGO_GP8 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPDATE_DGO_GP7,Writing 1 to this bit field indicates corresponding DGO_GP7 register has been updated with new values" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SIM_DGO_CTRL1,SIM DGO Control Register 1"
|
|
bitfld.long 0x00 31. "INT_EN_ACK11,Interrupt enable for WR_ACK_DGO_GP11 bit field" "0,1"
|
|
bitfld.long 0x00 30. "INT_EN_ACK10,Interrupt enable for WR_ACK_DGO_GP10 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "INT_EN_ACK9,Interrupt enable for WR_ACK_DGO_GP9 bit field" "0,1"
|
|
bitfld.long 0x00 28. "INT_EN_ACK8,Interrupt enable for WR_ACK_DGO_GP8 bit field" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "INT_EN_ACK7,Interrupt enable for WR_ACK_DGO_GP7 bit field" "0,1"
|
|
eventfld.long 0x00 17. "WR_ACK_DGO_GP11,This bit field is set automatically when corresponding DGO_GP11 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 16. "WR_ACK_DGO_GP10,This bit field is set automatically when corresponding DGO_GP10 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 15. "WR_ACK_DGO_GP9,This bit field is set automatically when corresponding DGO_GP9 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
eventfld.long 0x00 14. "WR_ACK_DGO_GP8,This bit field is set automatically when corresponding DGO_GP8 register is shadowed in DGO domain" "0,1"
|
|
eventfld.long 0x00 13. "WR_ACK_DGO_GP7,This bit field is set automatically when corresponding DGO_GP7 register is shadowed in DGO domain" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "UPDATE_DGO_GP11,Writing HIGH to this bit field indicates corresponding DGO_GP11 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 3. "UPDATE_DGO_GP10,Writing HIGH to this bit field indicates corresponding DGO_GP10 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UPDATE_DGO_GP9,Writing HIGH to this bit field indicates corresponding DGO_GP9 register has been updated with new values" "0,1"
|
|
bitfld.long 0x00 1. "UPDATE_DGO_GP8,Writing HIGH to this bit field indicates corresponding DGO_GP8 register has been updated with new values" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPDATE_DGO_GP7,Writing HIGH to this bit field indicates corresponding DGO_GP7 register has been updated with new values" "0,1"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SIM_DGO_GP1,SIM DGO General Purpose Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP1,SIM DGO General purpose register 1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SIM_DGO_GP2,SIM DGO general Purpose Register 2"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP2,SIM DGO General purpose register 2"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SIM_DGO_GP3,SIM DGO General Purpose Register 3"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP3,SIM DGO General purpose register 3"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SIM_DGO_GP4,SIM DGO General Purpose Register 4"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP4,SIM DGO General purpose register 4"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "SIM_DGO_GP5,SIM DGO General Purpose Register 5"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP5,SIM DGO General purpose register 5"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SIM_DGO_GP6,SIM DGO General Purpose Register 6"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP6,SIM DGO General purpose register 6"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "SIM_DGO_GP7,SIM DGO General Purpose Register 7"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP7,SIM DGO General purpose register 7"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "SIM_DGO_GP8,SIM DGO General Purpose Register 8"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP8,SIM DGO General purpose register 8"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "SIM_DGO_GP9,SIM DGO General Purpose Register 9"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP9,SIM DGO General purpose register 9"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SIM_DGO_GP10,SIM DGO General Purpose Register 10"
|
|
hexmask.long 0x00 0.--31. 1. "SIM_DGO_GP10,SIM DGO General purpose register 10"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "SIM_DGO_GP11,SIM DGO General Purpose Register 11"
|
|
bitfld.long 0x00 24.--25. "PTF_RANGE_CTRL,PTF Range Control" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PTE_RANGE_CTRL,PTE Range Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "PTC_RANGE_CTRL,PTC Range Control" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PTB_RANGE_CTRL,PTB Range Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "PTA_RANGE_CTRL,PTA Range Control" "0,1,2,3"
|
|
bitfld.long 0x00 12. "USB_PHY_VLLS_WAKEUP_EN,USB PHY VLLS wakeup enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "NMI_VLLS_WAKEUP_EN,Enables NMI pin as VLLS wakeup source (not necessary for non-VLLS modes)" "0,1"
|
|
bitfld.long 0x00 0. "DBG_SPIDEN_SPNIDEN,Debug secured access enable" "0,1"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "SIM_DGO_GP11,SIM DGO General Purpose Register 11"
|
|
bitfld.long 0x00 26.--29. "SIM_DGO_GP11_2,Reserved bit field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--25. "PTF_RANGE_CTRL,PTF Range Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PTE_RANGE_CTRL,PTE Range Control" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PTC_RANGE_CTRL,PTC Range Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "PTB_RANGE_CTRL,PTB Range Control" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PTA_RANGE_CTRL,PTA Range Control" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x00 1.--15. 1. "SIM_DGO_GP11_1,Reserved bit field"
|
|
bitfld.long 0x00 0. "DBG_SPIDEN_SPNIDEN,Debug secured access enable" "0,1"
|
|
endif
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "WKPU_WAKEUP_EN,WKPU Wake-up Enable"
|
|
hexmask.long 0x00 0.--31. 1. "WKPU_CH_WAKEUP_EN,Bit used to disable wake-up events through this channel"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "JTAG_ID_REG,Mirror of JTAG ID Register"
|
|
bitfld.long 0x00 28.--31. "PRN_PLUG,Part Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--27. "DESIGN_CENTER_IDCODE,Design Center ID Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
hexmask.long.word 0x00 12.--21. 1. "PIN_PLUG,Part Identification Number"
|
|
hexmask.long.word 0x00 1.--11. 1. "COMPANY_IDCODE,Company ID Code"
|
|
newline
|
|
bitfld.long 0x00 0. "JTAG_INIT_BIT,JTAG ID initial bit" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "A7_TSTMR_CMP_VAL_L,Lower A7 TS Timer compare value"
|
|
hexmask.long 0x00 0.--31. 1. "A7_TSTMR_CMP_VAL_L,Lower A7 TS Timer compare value"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "A7_TSTMR_CMP_VAL_H,Upper A7 TS Timer compare value"
|
|
hexmask.long 0x00 0.--31. 1. "A7_TSTMR_CMP_VAL_H,Upper A7 TS Timer compare value"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "COMP_CELL_OVERRIDE,Override Control for Compensation Codes"
|
|
rbitfld.long 0x00 24. "COMPOK,Compensation OK" "0,1"
|
|
rbitfld.long 0x00 20.--23. "NASRCP,4-bit PMOS compensation measured/generated codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "NASRCN,4-bit NMOS compensation measured/generated codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10. "FREEZE,Freeze" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FASTFREEZE,Fast-Freeze" "0,1"
|
|
bitfld.long 0x00 8. "READ_MODE,Read Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "RASRCP,4-bit PMOS compensation codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "RASRCN,4-bit NMOS compensation codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "TSTMRA"
|
|
base ad:0x410A3C00
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "LOW,Time Stamp Timer Register Low"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Time Stamp Timer Low"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "HIGH,Time Stamp Timer Register High"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Time Stamp Timer High"
|
|
tree.end
|
|
tree "TSTMRB"
|
|
base ad:0x410A3C08
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "LOW,Time Stamp Timer Register Low"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Time Stamp Timer Low"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "HIGH,Time Stamp Timer Register High"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Time Stamp Timer High"
|
|
tree.end
|
|
tree "MSMC (SMC)"
|
|
repeat 2. (list 0. 1.) (list ad:0x410A4000 ad:0x40410000)
|
|
tree "MSMC$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PARAM,Parameter Register"
|
|
bitfld.long 0x00 0. "PWRD_INDPT,Power Domains Independent" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PMPROT,Power Mode Protection register"
|
|
bitfld.long 0x00 7. "AHSRUN,Allow High Speed Run mode" "0: HSRUN is not allowed,1: HSRUN is allowed"
|
|
bitfld.long 0x00 5. "AVLP,Allow Very-Low-Power Modes" "0: VLPR VLPW and VLPS are not allowed,1: VLPR VLPW and VLPS are allowed"
|
|
newline
|
|
bitfld.long 0x00 3. "ALLS,Allow Low-Leakage Stop Mode" "0: LLS is not allowed,1: LLS is allowed"
|
|
bitfld.long 0x00 1. "AVLLS,Allow Very-Low-Leakage Stop Mode" "0: VLLS mode is not allowed,1: VLLS mode is allowed"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PMCTRL,Power Mode Control register"
|
|
eventfld.long 0x00 24. "STOPA,Stop Abort Flag" "0,1"
|
|
bitfld.long 0x00 16.--17. "PSTOPO,Partial Stop Option" "0: STOP - Normal Stop mode,1: PSTOP1 - Partial Stop with system and bus..,2: PSTOP2 - Partial Stop with system clock..,3: PSTOP3 - Partial Stop with system clock.."
|
|
newline
|
|
bitfld.long 0x00 8.--9. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,2: Very-Low-Power Run mode (VLPR),3: High Speed Run mode (HSRUN)"
|
|
bitfld.long 0x00 0.--2. "STOPM,Stop Mode Control" "0: Normal Stop (STOP),?,2: Very-Low-Power Stop (VLPS),3: Low-Leakage Stop (LLS),4: Very-Low-Leakage Stop (VLLS),?,6: STOPM_6,?..."
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "PMSTAT,Power Mode Status register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PMSTAT,Power Mode Status"
|
|
sif cpuis("IMX7ULP-CA7")
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SRS,System Reset Status"
|
|
bitfld.long 0x00 31. "TAMPER,Tamper Reset" "0: Reset not generated by tamper detection,1: Reset generated by tamper detection"
|
|
bitfld.long 0x00 30. "SECVIO,Security Violation Reset" "0: Reset not generated by security violation,1: Reset generated by security violation"
|
|
newline
|
|
bitfld.long 0x00 28. "JTAG,JTAG System Reset" "0: Reset not generated by JTAG system reset,1: Reset generated by JTAG system reset"
|
|
bitfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Reset not generated by VBAT system reset,1: Reset generated by VBAT system reset"
|
|
newline
|
|
bitfld.long 0x00 16. "CORE0,Core0 System Reset" "0: Reset not generated from Core0 system reset..,1: Reset generated from Core0 system reset source"
|
|
bitfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Reset not generated by core lockup or exception,1: Reset generated by core lockup or exception"
|
|
newline
|
|
bitfld.long 0x00 14. "SW,Software Reset" "0: Reset not generated by software request from..,1: Reset generated by software request from core"
|
|
bitfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Reset is not generated from the WatchDog..,1: Reset is generated from the WatchDog timeout"
|
|
newline
|
|
bitfld.long 0x00 12. "SCG,SCG Reset" "0: Reset is not generated from an SCG loss of..,1: Reset is generated from an SCG loss of lock.."
|
|
bitfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Reset not generated by Stop Controller Timeout,1: Reset generated by Stop Controller Timeout"
|
|
newline
|
|
bitfld.long 0x00 10. "RSTACK,Reset Timeout" "0: Reset not generated from Reset Controller..,1: Reset generated from Reset Controller Timeout"
|
|
bitfld.long 0x00 9. "MDM,MDM Reset" "0: Reset was not generated from the MDM reset..,1: Reset was generated from the MDM reset request"
|
|
newline
|
|
bitfld.long 0x00 8. "PIN,Pin Reset" "0: Reset was not generated from the assertion of..,1: Reset was generated from the assertion of.."
|
|
bitfld.long 0x00 7. "CORE,Core Reset" "0: Reset source was not core only reset,1: Reset source was core reset and reset the.."
|
|
newline
|
|
bitfld.long 0x00 5. "FATAL,Fatal Reset" "0: Reset was not generated by a fatal reset source,1: Reset was generated by a fatal reset source"
|
|
bitfld.long 0x00 4. "WARM,Warm Reset" "0: Reset not generated by Warm Reset source,1: Reset generated by Warm Reset source"
|
|
newline
|
|
bitfld.long 0x00 3. "HVD,HVD Reset" "0: Reset not generated by HVD,1: Reset generated by HVD"
|
|
bitfld.long 0x00 2. "LVD,LVD Reset" "0: Reset not generated by LVD,1: Reset generated by LVD"
|
|
newline
|
|
bitfld.long 0x00 1. "POR,POR Reset" "0: Reset not generated by POR,1: Reset generated by POR"
|
|
bitfld.long 0x00 0. "WAKEUP,Wakeup Reset" "0: Reset not generated by wakeup from VLLS mode,1: Reset generated by wakeup from VLLS mode"
|
|
endif
|
|
sif cpuis("IMX7ULP-CM4")
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SRS,System Reset Status"
|
|
bitfld.long 0x00 31. "TAMPER,Tamper Reset" "0: Reset not generated by tamper detection,1: Reset generated by tamper detection"
|
|
bitfld.long 0x00 30. "SECVIO,Security Violation Reset" "0: Reset not generated by security violation,1: Reset generated by security violation"
|
|
newline
|
|
bitfld.long 0x00 28. "JTAG,JTAG System Reset" "0: Reset not generated by JTAG system reset,1: Reset generated by JTAG system reset"
|
|
bitfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Reset not generated by VBAT system reset,1: Reset generated by VBAT system reset"
|
|
newline
|
|
bitfld.long 0x00 16. "CORE1,Core1 System Reset" "0: Reset not generated from Core1 system reset..,1: Reset generated from Core1 system reset source"
|
|
bitfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Reset not generated by core lockup or exception,1: Reset generated by core lockup or exception"
|
|
newline
|
|
bitfld.long 0x00 14. "SW,Software Reset" "0: Reset not generated by software request from..,1: Reset generated by software request from core"
|
|
bitfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Reset is not generated from the WatchDog..,1: Reset is generated from the WatchDog timeout"
|
|
newline
|
|
bitfld.long 0x00 12. "SCG,SCG Reset" "0: Reset is not generated from an SCG loss of..,1: Reset is generated from an SCG loss of lock.."
|
|
bitfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Reset not generated by Stop Controller Timeout,1: Reset generated by Stop Controller Timeout"
|
|
newline
|
|
bitfld.long 0x00 10. "RSTACK,Reset Timeout" "0: Reset not generated from Reset Controller..,1: Reset generated from Reset Controller Timeout"
|
|
bitfld.long 0x00 9. "MDM,MDM Reset" "0: Reset was not generated from the MDM reset..,1: Reset was generated from the MDM reset request"
|
|
newline
|
|
bitfld.long 0x00 8. "PIN,Pin Reset" "0: Reset was not generated from the assertion of..,1: Reset was generated from the assertion of.."
|
|
bitfld.long 0x00 7. "CORE,Core Reset" "0: Reset source was not core only reset,1: Reset source was core reset and reset the.."
|
|
newline
|
|
bitfld.long 0x00 5. "FATAL,Fatal Reset" "0: Reset was not generated by a fatal reset source,1: Reset was generated by a fatal reset source"
|
|
bitfld.long 0x00 4. "WARM,Warm Reset" "0: Reset not generated by Warm Reset source,1: Reset generated by Warm Reset source"
|
|
newline
|
|
bitfld.long 0x00 3. "HVD,HVD Reset" "0: Reset not generated by HVD,1: Reset generated by HVD"
|
|
bitfld.long 0x00 2. "LVD,LVD Reset" "0: Reset not generated by LVD,1: Reset generated by LVD"
|
|
newline
|
|
bitfld.long 0x00 1. "POR,POR Reset" "0: Reset not generated by POR,1: Reset generated by POR"
|
|
bitfld.long 0x00 0. "WAKEUP,Wakeup Reset" "0: Reset not generated by wakeup from VLLS mode,1: Reset generated by wakeup from VLLS mode"
|
|
endif
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RPC,Reset Pin Control"
|
|
bitfld.long 0x00 8. "FILTEN,Filter Enable" "0: Slow clock reset pin filter disabled,1: Slow clock reset pin filter enabled in Run.."
|
|
bitfld.long 0x00 0.--4. "FILTCFG,Reset Filter Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SSRS,Sticky System Reset Status"
|
|
eventfld.long 0x00 31. "TAMPER,Tamper Reset" "0: Reset not generated by tamper detection,1: Reset generated by tamper detection"
|
|
eventfld.long 0x00 30. "SECVIO,Security Violation Reset" "0: Reset not generated by Security Violation..,1: Reset generated by Security Violation detection"
|
|
newline
|
|
eventfld.long 0x00 28. "JTAG,JTAG System Reset" "0: Reset not generated by JTAG system reset,1: Reset generated by JTAG system reset"
|
|
eventfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Reset not generated by VBAT system reset,1: Reset generated by VBAT system reset"
|
|
newline
|
|
rbitfld.long 0x00 16. "CORE1,Core1 System Reset" "0: Reset not generated from Core1 system reset..,1: Reset generated from Core1 system reset source"
|
|
eventfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Reset not generated by core lockup,1: Reset generated by core lockup"
|
|
newline
|
|
eventfld.long 0x00 14. "SW,Software Reset" "0: Reset not generated by software request from..,1: Reset generated by software request from core"
|
|
eventfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Reset is not generated from the WatchDog..,1: Reset is generated from the WatchDog timeout"
|
|
newline
|
|
eventfld.long 0x00 12. "SCG,SCG Reset" "0: Reset is not generated from an SCG loss of..,1: Reset is generated from an SCG loss of lock.."
|
|
eventfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Reset not generated by Stop Controller Timeout,1: Reset generated by Stop Controller Timeout"
|
|
newline
|
|
eventfld.long 0x00 10. "RSTACK,Reset Timeout" "0: Reset not generated from Reset Controller..,1: Reset generated from Reset Controller Timeout"
|
|
eventfld.long 0x00 9. "MDM,MDM Reset" "0: Reset was not generated from the MDM reset..,1: Reset was generated from the MDM reset request"
|
|
newline
|
|
eventfld.long 0x00 8. "PIN,Pin Reset" "0: Reset was not generated from the RESET_B pin,1: Reset was generated from the RESET_B pin"
|
|
eventfld.long 0x00 5. "FATAL,Fatal Reset" "0: Reset was not generated by a fatal reset source,1: Reset was generated by a fatal reset source"
|
|
newline
|
|
eventfld.long 0x00 4. "WARM,Warm Reset" "0: Reset not generated by system reset source,1: Reset generated by system reset source"
|
|
eventfld.long 0x00 3. "HVD,HVD Reset" "0: Reset not generated by HVD,1: Reset generated by HVD"
|
|
newline
|
|
eventfld.long 0x00 2. "LVD,LVD Reset" "0: Reset not generated by LVD,1: Reset generated by LVD"
|
|
eventfld.long 0x00 1. "POR,POR Reset" "0: Reset not generated by POR,1: Reset generated by POR"
|
|
newline
|
|
eventfld.long 0x00 0. "WAKEUP,Wakeup Reset" "0: Reset not generated by wakeup from VLLS mode,1: Reset generated by wakeup from VLLS mode"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SSRS,Sticky System Reset Status"
|
|
eventfld.long 0x00 31. "TAMPER,Tamper Reset" "0: Reset not generated by tamper detection,1: Reset generated by tamper detection"
|
|
eventfld.long 0x00 30. "SECVIO,Security Violation Reset" "0: Reset not generated by Security Violation..,1: Reset generated by Security Violation detection"
|
|
newline
|
|
eventfld.long 0x00 28. "JTAG,JTAG System Reset" "0: Reset not generated by JTAG system reset,1: Reset generated by JTAG system reset"
|
|
eventfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Reset not generated by VBAT system reset,1: Reset generated by VBAT system reset"
|
|
newline
|
|
eventfld.long 0x00 16. "CORE0,Core0 Reset" "0: Reset not generated from Core0 reset source,1: Reset generated from Core0 reset source"
|
|
eventfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Reset not generated by core lockup,1: Reset generated by core lockup"
|
|
newline
|
|
eventfld.long 0x00 14. "SW,Software Reset" "0: Reset not generated by software request from..,1: Reset generated by software request from core"
|
|
eventfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Reset is not generated from the WatchDog..,1: Reset is generated from the WatchDog timeout"
|
|
newline
|
|
eventfld.long 0x00 12. "SCG,SCG Reset" "0: Reset is not generated from an SCG loss of..,1: Reset is generated from an SCG loss of lock.."
|
|
eventfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Reset not generated by Stop Controller Timeout,1: Reset generated by Stop Controller Timeout"
|
|
newline
|
|
eventfld.long 0x00 10. "RSTACK,Reset Timeout" "0: Reset not generated from Reset Controller..,1: Reset generated from Reset Controller Timeout"
|
|
eventfld.long 0x00 9. "MDM,MDM Reset" "0: Reset was not generated from the MDM reset..,1: Reset was generated from the MDM reset request"
|
|
newline
|
|
eventfld.long 0x00 8. "PIN,Pin Reset" "0: Reset was not generated from the RESET_B pin,1: Reset was generated from the RESET_B pin"
|
|
eventfld.long 0x00 5. "FATAL,Fatal Reset" "0: Reset was not generated by a fatal reset source,1: Reset was generated by a fatal reset source"
|
|
newline
|
|
eventfld.long 0x00 4. "WARM,Warm Reset" "0: Reset not generated by system reset source,1: Reset generated by system reset source"
|
|
eventfld.long 0x00 3. "HVD,HVD Reset" "0: Reset not generated by HVD,1: Reset generated by HVD"
|
|
newline
|
|
eventfld.long 0x00 2. "LVD,LVD Reset" "0: Reset not generated by LVD,1: Reset generated by LVD"
|
|
eventfld.long 0x00 1. "POR,POR Reset" "0: Reset not generated by POR,1: Reset generated by POR"
|
|
newline
|
|
eventfld.long 0x00 0. "WAKEUP,Wakeup Reset" "0: Reset not generated by wakeup from VLLS mode,1: Reset generated by wakeup from VLLS mode"
|
|
endif
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SRIE,System Reset Interrupt Enable"
|
|
bitfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "SW,Software Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 9. "MDM,MDM Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "PIN,Pin Reset" "0: Interrupt disabled,1: Interrupt enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SRIF,System Reset Interrupt Flag"
|
|
eventfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Reset source not pending,1: Reset source pending"
|
|
eventfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Reset source not pending,1: Reset source pending"
|
|
newline
|
|
eventfld.long 0x00 14. "SW,Software Reset" "0: Reset source not pending,1: Reset source pending"
|
|
eventfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Reset source not pending,1: Reset source pending"
|
|
newline
|
|
eventfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Reset source not pending,1: Reset source pending"
|
|
eventfld.long 0x00 9. "MDM,MDM Reset" "0: Reset source not pending,1: Reset source pending"
|
|
newline
|
|
eventfld.long 0x00 8. "PIN,Pin Reset" "0: Reset source not pending,1: Reset source pending"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CSRE,Core Software Reset Enable"
|
|
bitfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
rbitfld.long 0x00 16. "CORE1,Core1 System Reset" "0: Reset not generated from Core1 system reset..,1: Reset generated from Core1 system reset source"
|
|
newline
|
|
bitfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 14. "SW,Software Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "MDM,MDM Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 8. "PIN,Pin Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
endif
|
|
sif cpuis("IMX7ULP-CA7")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CSRE,Core Software Reset Enable"
|
|
bitfld.long 0x00 24. "VBAT,VBAT System Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 16. "CORE0,Core0 Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "LOCKUP,Lockup Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 14. "SW,Software Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "WDOG,Watchdog Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 11. "STOPACK,Stop Timeout Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "MDM,MDM Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
bitfld.long 0x00 8. "PIN,Pin Reset" "0: Core software reset disabled,1: Core software reset enabled"
|
|
endif
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MR,Mode Register"
|
|
hexmask.long 0x00 0.--31. 1. "BOOTCFG,Boot Configuration"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "FM,Force Mode Register"
|
|
hexmask.long 0x00 0.--31. 1. "FORCECFG,Boot Configuration"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "QUADSPI (QuadSPI)"
|
|
base ad:0x410A5000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "SCLKCFG,Serial Clock Configuration"
|
|
bitfld.long 0x00 17. "ISD3FA,Idle Signal Drive IOFA[3] Flash A" "0: IOFA[3] is driven to logic L,1: IOFA[3] is driven to logic H"
|
|
newline
|
|
bitfld.long 0x00 16. "ISD2FA,Idle Signal Drive IOFA[2] Flash A" "0: IOFA[2] is driven to logic L,1: IOFA[2] is driven to logic H"
|
|
bitfld.long 0x00 14. "MDIS,Module Disable" "0: Enable QuadSPI clocks,1: Allow external logic to disable QuadSPI clocks"
|
|
newline
|
|
bitfld.long 0x00 11. "CLR_TXF,Clear TX FIFO/Buffer" "0: No action,1: Read and write pointers of the TX Buffer are.."
|
|
bitfld.long 0x00 10. "CLR_RXF,Clear RX FIFO" "0: No action,1: Read and write pointers of the RX Buffer are.."
|
|
newline
|
|
bitfld.long 0x00 7. "DDR_EN,DDR mode enable" "0: 2x and 4x clocks are disabled for SDR..,1: 2x and 4x clocks are enabled supports both.."
|
|
bitfld.long 0x00 6. "DQS_EN,DQS enable" "0: DQS disabled,1: DQS enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "DQS_LAT_EN,DQS Latency Enable" "0: DQS Latency disabled,1: DQS feature with latency included enabled"
|
|
bitfld.long 0x00 2.--3. "END_CFG,Defines the endianness of the QuadSPI module" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 1. "SWRSTHD,Software reset for AHB domain" "0: SWRSTHD_0,1: AHB domain flops are reset"
|
|
bitfld.long 0x00 0. "SWRSTSD,Software reset for serial flash domain" "0: SWRSTSD_0,1: Serial Flash domain flops are reset"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "IPCR,IP Configuration Register"
|
|
bitfld.long 0x00 24.--27. "SEQID,Points to a sequence in the Look-up table" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATSZ,IP data transfer size"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FLSHCR,Flash Configuration Register"
|
|
bitfld.long 0x00 16.--17. "TDH,Serial flash data in hold time" "0: Data aligned with the posedge of Internal..,1: Data aligned with 2x serial flash half clock,2: Data aligned with 4x serial flash half clock,?..."
|
|
bitfld.long 0x00 8.--11. "TCSH,Serial flash CS hold time in terms of serial flash clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TCSS,Serial flash CS setup time in terms of serial flash clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BUF0CR,Buffer0 Configuration Register"
|
|
bitfld.long 0x00 31. "HP_EN,High Priority Enable" "0,1"
|
|
hexmask.long.byte 0x00 8.--14. 1. "ADATSZ,AHB data transfer size"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "MSTRID,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BUF1CR,Buffer1 Configuration Register"
|
|
hexmask.long.byte 0x00 8.--14. 1. "ADATSZ,AHB data transfer size"
|
|
bitfld.long 0x00 0.--3. "MSTRID,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BUF2CR,Buffer2 Configuration Register"
|
|
hexmask.long.byte 0x00 8.--14. 1. "ADATSZ,AHB data transfer size"
|
|
bitfld.long 0x00 0.--3. "MSTRID,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "BUF3CR,Buffer3 Configuration Register"
|
|
bitfld.long 0x00 31. "ALLMST,All master enable" "0,1"
|
|
hexmask.long.byte 0x00 8.--14. 1. "ADATSZ,AHB data transfer size"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "MSTRID,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BFGENCR,Buffer Generic Configuration Register"
|
|
bitfld.long 0x00 12.--15. "SEQID,Points to a sequence in the Look-up-table" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SOCCR,SOC Configuration Register"
|
|
hexmask.long 0x00 0.--31. 1. "SOCCFG,SOC Configuration For details refer to chip-specific QuadSPI information"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "BUF0IND,Buffer0 Top Index Register"
|
|
hexmask.long 0x00 3.--31. 1. "TPINDX0,Top index of buffer 0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BUF1IND,Buffer1 Top Index Register"
|
|
hexmask.long 0x00 3.--31. 1. "TPINDX1,Top index of buffer 1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "BUF2IND,Buffer2 Top Index Register"
|
|
hexmask.long 0x00 3.--31. 1. "TPINDX2,Top index of buffer 2"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SFAR,Serial Flash Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SFADR,Serial Flash Address"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "SFACR,Serial Flash Address Configuration Register"
|
|
bitfld.long 0x00 16. "WA,Word Addressable" "0: Byte addressable serial flash mode,1: Word (2 byte) addressable serial flash mode"
|
|
bitfld.long 0x00 0.--3. "CAS,Column Address Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "SMPR,Sampling Register"
|
|
bitfld.long 0x00 16.--18. "DDRSMP,DDR Sampling point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6. "FSDLY,Full Speed Delay selection for SDR instructions" "0: One clock cycle delay,1: Two clock cycles delay"
|
|
newline
|
|
bitfld.long 0x00 5. "FSPHS,Full Speed Phase selection for SDR instructions" "0: Select sampling at non-inverted clock,1: Select sampling at inverted clock"
|
|
bitfld.long 0x00 2. "HSDLY,Half Speed Delay selection for SDR instructions" "0: One clock cycle delay,1: Two clock cycle delay"
|
|
newline
|
|
bitfld.long 0x00 1. "HSPHS,Half Speed Phase selection for SDR instructions" "0: Select sampling at non-inverted clock,1: Select sampling at inverted clock"
|
|
bitfld.long 0x00 0. "HSENA,Half Speed serial flash clock Enable" "0: Disable divide by 2 of serial flash clock for..,1: Enable divide by 2 of serial flash clock for.."
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "RBSR,RX Buffer Status Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "RDCTR,Read Counter"
|
|
bitfld.long 0x00 8.--12. "RDBFL,RX Buffer Fill Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "RBCT,RX Buffer Control Register"
|
|
bitfld.long 0x00 8. "RXBRD,RX Buffer Readout" "0: RX Buffer content is read using the AHB Bus..,1: RX Buffer content is read using the IP Bus.."
|
|
bitfld.long 0x00 0.--3. "WMRK,RX Buffer Watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "TBSR,TX Buffer Status Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "TRCTR,Transmit Counter"
|
|
bitfld.long 0x00 8.--12. "TRBFL,TX Buffer Fill Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "TBDR,TX Buffer Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "TXDATA,TX Data On write access the data is written into the next available entry of the TX Buffer and the QPSI_TBSR[TRBFL] field is updated accordingly"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "TBCT,Tx Buffer Control Register"
|
|
bitfld.long 0x00 0.--3. "WMRK,Determines the watermark for the TX Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x15C++0x03
|
|
line.long 0x00 "SR,Status Register"
|
|
bitfld.long 0x00 29.--31. "DLPSMP,Data learning pattern sampling point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. "TXFULL,TX Buffer Full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "TXDMA,TXDMA" "0,1"
|
|
bitfld.long 0x00 25. "TXWA,TX Buffer watermark Available" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "TXEDA,Tx Buffer Enough Data Available" "0,1"
|
|
bitfld.long 0x00 23. "RXDMA,RX Buffer DMA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "RXFULL,RX Buffer Full" "0,1"
|
|
bitfld.long 0x00 16. "RXWE,RX Buffer Watermark Exceeded" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "AHB3FUL,AHB 3 Buffer Full" "0,1"
|
|
bitfld.long 0x00 13. "AHB2FUL,AHB 2 Buffer Full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "AHB1FUL,AHB 1 Buffer Full" "0,1"
|
|
bitfld.long 0x00 11. "AHB0FUL,AHB 0 Buffer Full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "AHB3NE,AHB 3 Buffer Not Empty" "0,1"
|
|
bitfld.long 0x00 9. "AHB2NE,AHB 2 Buffer Not Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "AHB1NE,AHB 1 Buffer Not Empty" "0,1"
|
|
bitfld.long 0x00 7. "AHB0NE,AHB 0 Buffer Not Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "AHBTRN,AHB Access Transaction pending" "0,1"
|
|
bitfld.long 0x00 5. "AHBGNT,AHB Command priority Granted: Asserted when another module has been granted priority of AHB Commands against IP Commands" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "AHB_ACC,AHB Access" "0,1"
|
|
bitfld.long 0x00 1. "IP_ACC,IP Access" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUSY,Module Busy" "0,1"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "FR,Flag Register"
|
|
eventfld.long 0x00 31. "DLPFF,Data Learning Pattern Failure Flag" "0,1"
|
|
eventfld.long 0x00 27. "TBFF,TX Buffer Fill Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x00 26. "TBUF,TX Buffer Underrun Flag" "0,1"
|
|
eventfld.long 0x00 23. "ILLINE,Illegal Instruction Error Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x00 17. "RBOF,RX Buffer Overflow Flag" "0,1"
|
|
eventfld.long 0x00 16. "RBDF,RX Buffer Drain Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x00 15. "ABSEF,AHB Sequence Error Flag" "0,1"
|
|
eventfld.long 0x00 14. "AITEF,AHB Illegal transaction error flag" "0,1"
|
|
newline
|
|
eventfld.long 0x00 13. "AIBSEF,AHB Illegal Burst Size Error Flag" "0,1"
|
|
eventfld.long 0x00 12. "ABOF,AHB Buffer Overflow Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x00 7. "IPAEF,IP Command Trigger during AHB Access Error Flag" "0,1"
|
|
eventfld.long 0x00 6. "IPIEF,IP Command Trigger could not be executed Error Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x00 4. "IPGEF,IP Command Trigger during AHB Grant Error Flag" "0,1"
|
|
eventfld.long 0x00 0. "TFF,IP Command Transaction Finished Flag" "0,1"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "RSER,Interrupt and DMA Request Select and Enable Register"
|
|
bitfld.long 0x00 31. "DLPFIE,Data Learning Pattern Failure Interrupt enable" "0: No DLPFF interrupt will be generated,1: DLPFF interrupt will be generated"
|
|
bitfld.long 0x00 27. "TBFIE,TX Buffer Fill Interrupt Enable" "0: No TBFF interrupt will be generated,1: TBFF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x00 26. "TBUIE,TX Buffer Underrun Interrupt Enable" "0: No TBUF interrupt will be generated,1: TBUF interrupt will be generated"
|
|
bitfld.long 0x00 25. "TBFDE,TX Buffer Fill DMA Enable" "0: No DMA request will be generated,1: DMA request will be generated"
|
|
newline
|
|
bitfld.long 0x00 23. "ILLINIE,Illegal Instruction Error Interrupt Enable" "0: No ILLINE interrupt will be generated,1: ILLINE interrupt will be generated"
|
|
bitfld.long 0x00 21. "RBDDE,RX Buffer Drain DMA Enable: Enables generation of DMA requests for RX Buffer Drain" "0: No DMA request will be generated,1: DMA request will be generated"
|
|
newline
|
|
bitfld.long 0x00 17. "RBOIE,RX Buffer Overflow Interrupt Enable" "0: No RBOF interrupt will be generated,1: RBOF interrupt will be generated"
|
|
bitfld.long 0x00 16. "RBDIE,RX Buffer Drain Interrupt Enable: Enables generation of IRQ requests for RX Buffer Drain" "0: No RBDF interrupt will be generated,1: RBDF Interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x00 15. "ABSEIE,AHB Sequence Error Interrupt Enable: Triggered by ABSEF flags of QSPI_FR" "0: No ABSEF interrupt will be generated,1: ABSEF interrupt will be generated"
|
|
bitfld.long 0x00 14. "AITIE,AHB Illegal transaction interrupt enable" "0: No AITEF interrupt will be generated,1: AITEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x00 13. "AIBSIE,AHB Illegal Burst Size Interrupt Enable" "0: No AIBSEF interrupt will be generated,1: AIBSEF interrupt will be generated"
|
|
bitfld.long 0x00 12. "ABOIE,AHB Buffer Overflow Interrupt Enable" "0: No ABOF interrupt will be generated,1: ABOF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x00 7. "IPAEIE,IP Command Trigger during AHB Access Error Interrupt Enable" "0: No IPAEF interrupt will be generated,1: IPAEF interrupt will be generated"
|
|
bitfld.long 0x00 6. "IPIEIE,IP Command Trigger during IP Access Error Interrupt Enable" "0: No IPIEF interrupt will be generated,1: IPIEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x00 4. "IPGEIE,IP Command Trigger during AHB Grant Error Interrupt Enable" "0: No IPGEF interrupt will be generated,1: IPGEF interrupt will be generated"
|
|
bitfld.long 0x00 0. "TFIE,Transaction Finished Interrupt Enable" "0: No TFF interrupt will be generated,1: TFF interrupt will be generated"
|
|
rgroup.long 0x168++0x03
|
|
line.long 0x00 "SPNDST,Sequence Suspend Status Register"
|
|
bitfld.long 0x00 9.--14. "DATLFT,Data left: Provides information about the amount of data left to be read in the suspended sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--7. "SPDBUF,Suspended Buffer: Provides the suspended buffer number" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0. "SUSPND,When set it signifies that a sequence is in suspended state" "0,1"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "SPTRCLR,Sequence Pointer Clear Register"
|
|
bitfld.long 0x00 8. "IPPTRC,IP Pointer Clear" "0,1"
|
|
bitfld.long 0x00 0. "BFPTRC,Buffer Pointer Clear" "0,1"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "SFA1AD,Serial Flash A1 Top Address"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. "TPADA1,Top address for Serial Flash A1"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "SFA2AD,Serial Flash A2 Top Address"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. "TPADA2,Top address for Serial Flash A2"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "DLPR,Data Learn Pattern Register"
|
|
hexmask.long 0x00 0.--31. 1. "DLPV,Data Learning Pattern Value: This value is used for data learning in DDR and DQS mode"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
rgroup.long ($2+0x200)++0x03
|
|
line.long 0x00 "RBDR$1,RX Buffer Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "RXDATA,RX Data"
|
|
repeat.end
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "LUTKEY,LUT Key Register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,The key to lock or unlock the LUT"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "LCKCR,LUT Lock Configuration Register"
|
|
bitfld.long 0x00 1. "UNLOCK,Unlocks the LUT when the following two conditions are met: 1" "0,1"
|
|
bitfld.long 0x00 0. "LOCK,Locks the LUT when the following condition is met: This register is written just after the LUTKEYLUT Key Register The LUT key register was written with 0x5AF05AF0 key" "0,1"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x310)++0x03
|
|
line.long 0x00 "LUT$1,Look-up Table register"
|
|
bitfld.long 0x00 26.--31. "INSTR1,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 24.--25. "PAD1,Pad information for INSTR1" "0: PAD1_0,1: PAD1_1,2: PAD1_2,3: PAD1_3"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "OPRND1,Operand for INSTR1"
|
|
bitfld.long 0x00 10.--15. "INSTR0,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PAD0,Pad information for INSTR0" "0: PAD0_0,1: PAD0_1,2: PAD0_2,3: PAD0_3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "OPRND0,Operand for INSTR0"
|
|
repeat.end
|
|
repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x350)++0x03
|
|
line.long 0x00 "LUT$1,Look-up Table register"
|
|
bitfld.long 0x00 26.--31. "INSTR1,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 24.--25. "PAD1,Pad information for INSTR1" "0: PAD1_0,1: PAD1_1,2: PAD1_2,3: PAD1_3"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "OPRND1,Operand for INSTR1"
|
|
bitfld.long 0x00 10.--15. "INSTR0,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PAD0,Pad information for INSTR0" "0: PAD0_0,1: PAD0_1,2: PAD0_2,3: PAD0_3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "OPRND0,Operand for INSTR0"
|
|
repeat.end
|
|
repeat 16. (strings "32" "33" "34" "35" "36" "37" "38" "39" "40" "41" "42" "43" "44" "45" "46" "47" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x390)++0x03
|
|
line.long 0x00 "LUT$1,Look-up Table register"
|
|
bitfld.long 0x00 26.--31. "INSTR1,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 24.--25. "PAD1,Pad information for INSTR1" "0: PAD1_0,1: PAD1_1,2: PAD1_2,3: PAD1_3"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "OPRND1,Operand for INSTR1"
|
|
bitfld.long 0x00 10.--15. "INSTR0,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PAD0,Pad information for INSTR0" "0: PAD0_0,1: PAD0_1,2: PAD0_2,3: PAD0_3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "OPRND0,Operand for INSTR0"
|
|
repeat.end
|
|
repeat 16. (strings "48" "49" "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "60" "61" "62" "63" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x3D0)++0x03
|
|
line.long 0x00 "LUT$1,Look-up Table register"
|
|
bitfld.long 0x00 26.--31. "INSTR1,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 24.--25. "PAD1,Pad information for INSTR1" "0: PAD1_0,1: PAD1_1,2: PAD1_2,3: PAD1_3"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "OPRND1,Operand for INSTR1"
|
|
bitfld.long 0x00 10.--15. "INSTR0,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PAD0,Pad information for INSTR0" "0: PAD0_0,1: PAD0_1,2: PAD0_2,3: PAD0_3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "OPRND0,Operand for INSTR0"
|
|
repeat.end
|
|
tree.end
|
|
tree "OTFAD"
|
|
base ad:0x410A5C00
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 31. "GE,Global OTFAD Enable" "0: OTFAD has decryption disabled and bypasses..,1: OTFAD has decryption enabled and processes.."
|
|
bitfld.long 0x00 30. "SKBP,Start key blob processing" "0: Key blob processing is not initiated,1: Properly-enabled key blob processing is.."
|
|
newline
|
|
bitfld.long 0x00 21. "CRCI,CRC Initialization" "0: CRC data register is unaffected,1: CRC data register is immediately initialized.."
|
|
bitfld.long 0x00 20. "CRCE,CRC Enable" "0: CRC-32 is disabled,1: CRC-32 for the context defined by CR[CCTRX].."
|
|
newline
|
|
bitfld.long 0x00 16.--17. "CCTX,CRC Context" "0: Enable CTX0 CRC check,1: Enable CTX1 CRC check,2: Enable CTX2 CRC check,3: Enable CTX3 CRC check"
|
|
bitfld.long 0x00 7. "RRAE,Restricted Register Access Enable" "0: Register access is fully enabled,1: Register access is restricted and only the CR.."
|
|
newline
|
|
bitfld.long 0x00 6. "KBCE,Key Blob CRC Enable" "0: CRC-32 during key blob processing is disabled,1: CRC-32 during key blob processing is enabled"
|
|
bitfld.long 0x00 5. "KBPE,Key Blob Processing Enable" "0: Key blob processing is disabled,1: Key blob processing is enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "KBSE,Key Blob Scramble Enable" "0: Key blob KEK scrambling is disabled,1: Key blob KEK scrambling is enabled"
|
|
bitfld.long 0x00 3. "FLDM,Force Logically Disabled Mode" "0: No effect on the operating mode,1: Force entry into LDM after a write with this.."
|
|
newline
|
|
bitfld.long 0x00 2. "FSVM,Force Security Violation Mode" "0: No effect on the operating mode,1: Force entry into SVM after a write with this.."
|
|
bitfld.long 0x00 1. "FERR,Force Error" "0: No effect on the SR[KBERE] indicator,1: SR[KBERR] is immediately set after a write.."
|
|
newline
|
|
bitfld.long 0x00 0. "IRQE,IRQE" "0: SR[KBERR] = 1 does not generate an interrupt..,1: SR[KBERR] = 1 generates an interrupt request"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 31. "KBD,Key Blob Processing Done" "0: Key blob processing was not enabled or is not..,1: Key blob processing was enabled and is complete"
|
|
rbitfld.long 0x00 30. "KBPE,Key Blob Processing Enable" "0: Key blob processing is not enabled,1: Key blob processing is enabled"
|
|
newline
|
|
rbitfld.long 0x00 29. "GEM,Global Enable Mode" "0: OTFAD is disabled and bypasses all data..,1: OTFAD is enabled and processes data fetched.."
|
|
rbitfld.long 0x00 28. "RRAM,Restricted Register Access Mode" "0: Register access is fully enabled,1: Register access is restricted and only the CR.."
|
|
newline
|
|
rbitfld.long 0x00 24.--27. "HRL,Hardware Revision Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 16.--19. "CTXIE,Context Integrity Error" "0: No key blob integrity error was detected for..,1: A key blob integrity error was detected in..,?..."
|
|
newline
|
|
rbitfld.long 0x00 8.--11. "CTXER,Context Error" "0: No key blob error was detected for context n,1: Either a key blob integrity error or a key..,?..."
|
|
rbitfld.long 0x00 4.--7. "NCTX,Number of Contexts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 2.--3. "MODE,Operating Mode" "0: Operating in Normal mode (NRM),1: Unused (reserved),2: no description available,3: Operating in Logically Disabled Mode (LDM)"
|
|
rbitfld.long 0x00 1. "MDPCP,MDPC Present" "0,1"
|
|
newline
|
|
eventfld.long 0x00 0. "KBERR,Key Blob Error" "0: No key blob error detected,1: One or more key blob errors has been detected"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CRC,Cyclic Redundancy Check Register"
|
|
hexmask.long 0x00 0.--31. 1. "CRCD,CRC Data"
|
|
endif
|
|
repeat 4. (increment 0 1)(increment 0 0x40)
|
|
tree "CTX[$1]"
|
|
sif cpuis("IMX7ULP-CM4")
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "CTX_KEY0,AES Key Word"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,AES Key"
|
|
group.long ($2+0x104)++0x03
|
|
line.long 0x00 "CTX_KEY1,AES Key Word"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,AES Key"
|
|
group.long ($2+0x108)++0x03
|
|
line.long 0x00 "CTX_KEY2,AES Key Word"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,AES Key"
|
|
group.long ($2+0x10C)++0x03
|
|
line.long 0x00 "CTX_KEY3,AES Key Word"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,AES Key"
|
|
group.long ($2+0x110)++0x03
|
|
line.long 0x00 "CTX_CTR0,AES Counter Word"
|
|
hexmask.long 0x00 0.--31. 1. "CTR,AES Counter"
|
|
group.long ($2+0x114)++0x03
|
|
line.long 0x00 "CTX_CTR1,AES Counter Word"
|
|
hexmask.long 0x00 0.--31. 1. "CTR,AES Counter"
|
|
group.long ($2+0x118)++0x03
|
|
line.long 0x00 "CTX_RGD_W0,AES Region Descriptor Word0"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. "SRTADDR,Start Address"
|
|
group.long ($2+0x11C)++0x03
|
|
line.long 0x00 "CTX_RGD_W1,AES Region Descriptor Word1"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. "ENDADDR,End Address"
|
|
bitfld.long 0x00 2. "RO,Read-Only" "0: The context registers can be accessed..,1: The context registers are read-only and.."
|
|
newline
|
|
bitfld.long 0x00 1. "ADE,AES Decryption Enable" "0: Bypass the fetched data,1: Perform the CTR-AES128 mode decryption on the.."
|
|
bitfld.long 0x00 0. "VLD,Valid" "0: Context is invalid,1: Context is valid"
|
|
endif
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "OCOTP_CTRL (OCOTP)"
|
|
base ad:0x410A6000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "HW_OCOTP_CTRL,OTP Controller Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "WR_UNLOCK,WR_UNLOCK"
|
|
rbitfld.long 0x00 15. "RSVD0,RSVD0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WORDLOCK,WORDLOCK" "0,1"
|
|
bitfld.long 0x00 13. "SUPPADD,SUPPADD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RELOAD_SHADOWS,RELOAD_SHADOWS" "0,1"
|
|
bitfld.long 0x00 9. "ERROR,ERROR" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "BUSY,BUSY" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADDR,ADDR"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HW_OCOTP_CTRL_SET,OTP Controller Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "WR_UNLOCK,WR_UNLOCK"
|
|
rbitfld.long 0x00 15. "RSVD0,RSVD0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WORDLOCK,WORDLOCK" "0,1"
|
|
bitfld.long 0x00 13. "SUPPADD,SUPPADD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RELOAD_SHADOWS,RELOAD_SHADOWS" "0,1"
|
|
bitfld.long 0x00 9. "ERROR,ERROR" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "BUSY,BUSY" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADDR,ADDR"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "HW_OCOTP_CTRL_CLR,OTP Controller Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "WR_UNLOCK,WR_UNLOCK"
|
|
eventfld.long 0x00 15. "RSVD0,RSVD0" "0,1"
|
|
newline
|
|
eventfld.long 0x00 14. "WORDLOCK,WORDLOCK" "0,1"
|
|
eventfld.long 0x00 13. "SUPPADD,SUPPADD" "0,1"
|
|
newline
|
|
eventfld.long 0x00 10. "RELOAD_SHADOWS,RELOAD_SHADOWS" "0,1"
|
|
eventfld.long 0x00 9. "ERROR,ERROR" "0,1"
|
|
newline
|
|
eventfld.long 0x00 8. "BUSY,BUSY" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADDR,ADDR"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "HW_OCOTP_CTRL_TOG,OTP Controller Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "WR_UNLOCK,WR_UNLOCK"
|
|
rbitfld.long 0x00 15. "RSVD0,RSVD0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WORDLOCK,WORDLOCK" "0,1"
|
|
bitfld.long 0x00 13. "SUPPADD,SUPPADD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RELOAD_SHADOWS,RELOAD_SHADOWS" "0,1"
|
|
bitfld.long 0x00 9. "ERROR,ERROR" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "BUSY,BUSY" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADDR,ADDR"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HW_OCOTP_PDN,OTP Controller PDN Register"
|
|
bitfld.long 0x00 0. "PDN,PDN" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "HW_OCOTP_DATA,OTP Controller Write Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "HW_OCOTP_READ_CTRL,OTP Controller Read Control Register"
|
|
hexmask.long 0x00 1.--31. 1. "RSVD0,RSVD0"
|
|
bitfld.long 0x00 0. "READ_FUSE,READ_FUSE" "0,1"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "HW_OCOTP_READ_FUSE_DATA,OTP Controller Read Fuse Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "HW_OCOTP_SW_STICKY,OTP Controller Sticky Bit Register"
|
|
hexmask.long 0x00 5.--31. 1. "RSVD1,RSVD1"
|
|
bitfld.long 0x00 2. "FIELD_RETURN_LOCK,FIELD_RETURN_LOCK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SRK_REVOKE_LOCK,SRK_REVOKE_LOCK" "0,1"
|
|
rbitfld.long 0x00 0. "RSVD0,RSVD0" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "HW_OCOTP_SCS,OTP Controller Software Controllable Signals Register"
|
|
bitfld.long 0x00 31. "LOCK,LOCK" "0,1"
|
|
hexmask.long 0x00 1.--30. 1. "SPARE,SPARE"
|
|
newline
|
|
bitfld.long 0x00 0. "HAB_JDE,HAB_JDE" "0,1"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "HW_OCOTP_SCS_SET,OTP Controller Software Controllable Signals Register"
|
|
bitfld.long 0x00 31. "LOCK,LOCK" "0,1"
|
|
hexmask.long 0x00 1.--30. 1. "SPARE,SPARE"
|
|
newline
|
|
bitfld.long 0x00 0. "HAB_JDE,HAB_JDE" "0,1"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "HW_OCOTP_SCS_CLR,OTP Controller Software Controllable Signals Register"
|
|
eventfld.long 0x00 31. "LOCK,LOCK" "0,1"
|
|
hexmask.long 0x00 1.--30. 1. "SPARE,SPARE"
|
|
newline
|
|
eventfld.long 0x00 0. "HAB_JDE,HAB_JDE" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "HW_OCOTP_SCS_TOG,OTP Controller Software Controllable Signals Register"
|
|
bitfld.long 0x00 31. "LOCK,LOCK" "0,1"
|
|
hexmask.long 0x00 1.--30. 1. "SPARE,SPARE"
|
|
newline
|
|
bitfld.long 0x00 0. "HAB_JDE,HAB_JDE" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "HW_OCOTP_OUT_STATUS,OTP Controller Output Status Register"
|
|
bitfld.long 0x00 20. "DED_RELOAD,DED_RELOAD" "0,1"
|
|
bitfld.long 0x00 19. "SEC_RELOAD,SEC_RELOAD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 15.--18. "FLAGSTATE,FLAGSTATE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 14. "PWOK,PWOK" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 13. "ACK,ACK" "0,1"
|
|
bitfld.long 0x00 12. "PROGFAIL,PROGFAIL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "LOCKED,LOCKED" "0,1"
|
|
bitfld.long 0x00 10. "DED,DED" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SEC,SEC" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "DOUT_40_32,DOUT_40_32"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "HW_OCOTP_OUT_STATUS_SET,OTP Controller Output Status Register"
|
|
bitfld.long 0x00 20. "DED_RELOAD,DED_RELOAD" "0,1"
|
|
bitfld.long 0x00 19. "SEC_RELOAD,SEC_RELOAD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 15.--18. "FLAGSTATE,FLAGSTATE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 14. "PWOK,PWOK" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 13. "ACK,ACK" "0,1"
|
|
bitfld.long 0x00 12. "PROGFAIL,PROGFAIL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "LOCKED,LOCKED" "0,1"
|
|
bitfld.long 0x00 10. "DED,DED" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SEC,SEC" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "DOUT_40_32,DOUT_40_32"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "HW_OCOTP_OUT_STATUS_CLR,OTP Controller Output Status Register"
|
|
eventfld.long 0x00 20. "DED_RELOAD,DED_RELOAD" "0,1"
|
|
eventfld.long 0x00 19. "SEC_RELOAD,SEC_RELOAD" "0,1"
|
|
newline
|
|
eventfld.long 0x00 15.--18. "FLAGSTATE,FLAGSTATE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 14. "PWOK,PWOK" "0,1"
|
|
newline
|
|
eventfld.long 0x00 13. "ACK,ACK" "0,1"
|
|
eventfld.long 0x00 12. "PROGFAIL,PROGFAIL" "0,1"
|
|
newline
|
|
eventfld.long 0x00 11. "LOCKED,LOCKED" "0,1"
|
|
eventfld.long 0x00 10. "DED,DED" "0,1"
|
|
newline
|
|
eventfld.long 0x00 9. "SEC,SEC" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "DOUT_40_32,DOUT_40_32"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "HW_OCOTP_OUT_STATUS_TOG,OTP Controller Output Status Register"
|
|
bitfld.long 0x00 20. "DED_RELOAD,DED_RELOAD" "0,1"
|
|
bitfld.long 0x00 19. "SEC_RELOAD,SEC_RELOAD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 15.--18. "FLAGSTATE,FLAGSTATE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 14. "PWOK,PWOK" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 13. "ACK,ACK" "0,1"
|
|
bitfld.long 0x00 12. "PROGFAIL,PROGFAIL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "LOCKED,LOCKED" "0,1"
|
|
bitfld.long 0x00 10. "DED,DED" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SEC,SEC" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "DOUT_40_32,DOUT_40_32"
|
|
rgroup.long 0xA0++0x03
|
|
line.long 0x00 "HW_OCOTP_STARTWORD,OTP Controller Output Startword Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "STARTWORD,STARTWORD"
|
|
rgroup.long 0xB0++0x03
|
|
line.long 0x00 "HW_OCOTP_VERSION,OTP Controller Version Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,MAJOR"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,MINOR"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "STEP,STEP"
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x10 )
|
|
rgroup.long ($2+0x480)++0x03
|
|
line.long 0x00 "HW_OCOTP_LOCK$1,OTP Controller Lock Control Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
repeat.end
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "HW_OCOTP_BOOT0,Value of OTP Bank2 Word0 (Boot Configuration Info.)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
repeat 5. (strings "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 )
|
|
group.long ($2+0x530)++0x03
|
|
line.long 0x00 "HW_OCOTP_BOOT$1,OTP Controller Boot Configuration Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
repeat.end
|
|
repeat 2. (strings "2" "3" )(list 0x00 0x10 )
|
|
group.long ($2+0x5E0)++0x03
|
|
line.long 0x00 "HW_OCOTP_ANA$1,OTP Controller Analog Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
repeat.end
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "HW_OCOTP_TESTER13,Value of OTP Bank9 Word3"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "HW_OCOTP_GP60,Value of OTP Bank24 Word0 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1010++0x03
|
|
line.long 0x00 "HW_OCOTP_GP61,Value of OTP Bank24 Word1 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1020++0x03
|
|
line.long 0x00 "HW_OCOTP_GP62,Value of OTP Bank24 Word2 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1030++0x03
|
|
line.long 0x00 "HW_OCOTP_GP63,Value of OTP Bank24 Word3 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1040++0x03
|
|
line.long 0x00 "HW_OCOTP_GP64,Value of OTP Bank24 Word4 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1050++0x03
|
|
line.long 0x00 "HW_OCOTP_GP65,Value of OTP Bank24 Word5 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1060++0x03
|
|
line.long 0x00 "HW_OCOTP_GP66,Value of OTP Bank24 Word6 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1070++0x03
|
|
line.long 0x00 "HW_OCOTP_GP67,Value of OTP Bank24 Word7 (GP6)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1080++0x03
|
|
line.long 0x00 "HW_OCOTP_GP70,Value of OTP Bank25 Word0 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1090++0x03
|
|
line.long 0x00 "HW_OCOTP_GP71,Value of OTP Bank25 Word1 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x10A0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP72,Value of OTP Bank25 Word2 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x10B0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP73,Value of OTP Bank25 Word3 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x10C0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP74,Value of OTP Bank25 Word4 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x10D0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP75,Value of OTP Bank25 Word5 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x10E0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP76,Value of OTP Bank25 Word6 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x10F0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP77,Value of OTP Bank25 Word7 (GP7)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "HW_OCOTP_GP80,Value of OTP Bank26 Word0 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "HW_OCOTP_GP81,Value of OTP Bank26 Word1 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1120++0x03
|
|
line.long 0x00 "HW_OCOTP_GP82,Value of OTP Bank26 Word2 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1130++0x03
|
|
line.long 0x00 "HW_OCOTP_GP83,Value of OTP Bank26 Word3 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1140++0x03
|
|
line.long 0x00 "HW_OCOTP_GP84,Value of OTP Bank26 Word4 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1150++0x03
|
|
line.long 0x00 "HW_OCOTP_GP85,Value of OTP Bank26 Word5 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1160++0x03
|
|
line.long 0x00 "HW_OCOTP_GP86,Value of OTP Bank26 Word6 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1170++0x03
|
|
line.long 0x00 "HW_OCOTP_GP87,Value of OTP Bank26 Word7 (GP8)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1180++0x03
|
|
line.long 0x00 "HW_OCOTP_GP90,Value of OTP Bank27 Word0 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x1190++0x03
|
|
line.long 0x00 "HW_OCOTP_GP91,Value of OTP Bank27 Word1 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x11A0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP92,Value of OTP Bank27 Word2 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x11B0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP93,Value of OTP Bank27 Word3 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x11C0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP94,Value of OTP Bank27 Word4 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x11D0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP95,Value of OTP Bank27 Word5 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x11E0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP96,Value of OTP Bank27 Word6 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
group.long 0x11F0++0x03
|
|
line.long 0x00 "HW_OCOTP_GP97,Value of OTP Bank27 Word7 (GP9)"
|
|
hexmask.long 0x00 0.--31. 1. "BITS,BITS"
|
|
tree.end
|
|
sif cpuis("IMX7ULP-CM4")
|
|
tree "MCM (Core Platform Miscellaneous Control Module)"
|
|
base ad:0xE0080000
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "PLASC,Crossbar Switch (AXBS) Slave Configuration"
|
|
hexmask.word.byte 0x00 0.--7. 1. "ASC,Each bit in the ASC field indicates whether there is a corresponding connection to the crossbar switch's slave input port"
|
|
rgroup.word 0x0A++0x01
|
|
line.word 0x00 "PLAMC,Crossbar Switch (AXBS) Master Configuration"
|
|
hexmask.word.byte 0x00 0.--7. 1. "AMC,Each bit in the AMC field indicates whether there is a corresponding connection to the AXBS master input port"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PLACR,Crossbar Switch (AXBS) Control Register"
|
|
bitfld.long 0x00 30. "TCRAML_Write_Protect,TCRAML_Write_Protect" "0,1"
|
|
bitfld.long 0x00 28.--29. "TCRAML_Priority,TCRAML_Priority" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 26. "TCRAMU_Write_Protect,TCRAMU_Write_Protect" "0,1"
|
|
bitfld.long 0x00 24.--25. "TCRAMU_Priority,TCRAMU_Priority" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 9. "ARB,Arbitration select" "0: Fixed-priority arbitration for the crossbar..,1: Round-robin arbitration for the crossbar.."
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "FADR,Fault address register"
|
|
hexmask.long 0x00 0.--31. 1. "ADDRESS,Fault address"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "FATR,Fault attributes register"
|
|
bitfld.long 0x00 31. "BEOVR,Bus error overrun" "0: No bus error overrun,1: Bus error overrun occurred"
|
|
bitfld.long 0x00 8.--11. "BEMN,Bus error master number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 7. "BEWT,Bus error write" "0: Read access,1: Write access"
|
|
bitfld.long 0x00 4.--5. "BESZ,Bus error size" "0: 8-bit access,1: 16-bit access,2: 32-bit access,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "BEMD,Bus error privilege level" "0: User mode,1: Supervisor/privileged mode"
|
|
bitfld.long 0x00 0. "BEDA,Bus error access type" "0: Instruction,1: BEDA_1"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FDR,Fault data register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Fault data"
|
|
tree.end
|
|
tree "MMCAU (CAU)"
|
|
base ad:0xE0081000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CASR,Status Register"
|
|
rbitfld.long 0x00 28.--31. "VER,CAU Version" "?,1: Initial CAU version,2: no description available,?..."
|
|
bitfld.long 0x00 1. "DPE,DES Parity Error" "0: No error detected,1: DES key parity error detected"
|
|
newline
|
|
bitfld.long 0x00 0. "IC,Illegal Command" "0: No illegal commands issued,1: Illegal command issued"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CAA,Accumulator"
|
|
hexmask.long 0x00 0.--31. 1. "ACC,Accumulator"
|
|
repeat 9. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "CA[$1],General Purpose Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "CAn,General Purpose Registers"
|
|
repeat.end
|
|
tree.end
|
|
tree "LMEM (LMEM64)"
|
|
base ad:0xE0082000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCCCR,Cache control register"
|
|
bitfld.long 0x00 31. "GO,Initiate Cache Command" "0: Write: no effect,1: Write: initiate command indicated by bits 27-24"
|
|
bitfld.long 0x00 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified.."
|
|
newline
|
|
bitfld.long 0x00 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines.."
|
|
bitfld.long 0x00 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified.."
|
|
newline
|
|
bitfld.long 0x00 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines.."
|
|
bitfld.long 0x00 3. "PCCR3,Forces no allocation on cache misses (must also have PCCR2 asserted)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCCR2,Forces all cacheable spaces to write through" "0,1"
|
|
bitfld.long 0x00 1. "ENWRBUF,Enable Write Buffer" "0: Write buffer disabled,1: Write buffer enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PCCLCR,Cache line control register"
|
|
bitfld.long 0x00 27. "LACC,Line access type" "0: LACC_0,1: LACC_1"
|
|
bitfld.long 0x00 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,2: LCMD_2,3: LCMD_3"
|
|
bitfld.long 0x00 22. "LCWAY,Line Command Way" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "LCIMB,Line Command Initial Modified Bit" "0,1"
|
|
bitfld.long 0x00 20. "LCIVB,Line Command Initial Valid Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "TDSEL,Tag/Data Select" "0: TDSEL_0,1: TDSEL_1"
|
|
bitfld.long 0x00 14. "WSEL,Way select" "0: WSEL_0,1: WSEL_1"
|
|
newline
|
|
hexmask.long.word 0x00 3.--13. 1. "CACHEADDR,Cache address"
|
|
bitfld.long 0x00 0. "LGO,Initiate Cache Line Command" "0: Write: no effect,1: Write: initiate line command indicated by.."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PCCSAR,Cache search address register"
|
|
hexmask.long 0x00 3.--31. 1. "PHYADDR,Physical Address"
|
|
bitfld.long 0x00 0. "LGO,Initiate Cache Line Command" "0: Write: no effect,1: Write: initiate line command indicated by.."
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PCCCVR,Cache read/write value register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Cache read/write Data"
|
|
tree.end
|
|
endif
|
|
tree "FGPIO (GPIO)"
|
|
tree "FGPIOA"
|
|
base ad:0xF9000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree "FGPIOB"
|
|
base ad:0xF9000040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDO,Port Data Output"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTSO,Port Set Output"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTCO,Port Clear Output"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x00 0.--31. 1. "PDD,Port Data Direction"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BDACP[$1],Port Byte Domain Access Control Register 0"
|
|
bitfld.long 0x00 31. "VLD,Valid" "0: The DxACP assignment is invalid,1: The DxACP assignment is valid"
|
|
bitfld.long 0x00 29.--30. "LK2,LK2" "0: Entire DxACP can be written,1: Entire DxACP can be written,2: Domain x can only update the DxACP field no..,3: DxACP is locked (read-only) until the next.."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "D7ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "D6ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "D5ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "D4ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
sif cpuis("IMX7ULP-CA7")
|
|
tree "MUB (Messaging Unit Processor B-side)"
|
|
base ad:0x40220000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VER,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x00 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PAR,Parameter Register"
|
|
hexmask.long 0x00 0.--31. 1. "PARAMETER,This bitfield contains the parameter settings of MUB"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "TR[$1],Transmit Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
rgroup.long ($2+0x40)++0x03
|
|
line.long 0x00 "RR[$1],Receive Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,DATA"
|
|
repeat.end
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 28.--31. "GIPn,GIPn" "0: MUB general purpose interrupt n is not pending,1: MUB general purpose interrupt n is pending,?..."
|
|
rbitfld.long 0x00 24.--27. "RFn,RFn" "0: MUB RRn register is not full (default),1: MUB RRn register has received data from MUA..,?..."
|
|
newline
|
|
rbitfld.long 0x00 20.--23. "TEn,TEn" "0: MUB TRn register is not empty,1: MUB TRn register is empty (default),?..."
|
|
rbitfld.long 0x00 8. "FUP,FUP" "0: No flags updated initiated by the MUB in..,1: MUB initiated flags update processing"
|
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rbitfld.long 0x00 7. "RS,RS" "0: The MUA side of the MU is not in reset,1: The MUA side of the MU is in reset"
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rbitfld.long 0x00 5.--6. "PM,PM" "0: The MUA processor is in Run Mode,1: The MUA processor is in WAIT Mode,2: no description available,3: no description available"
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rbitfld.long 0x00 4. "EP,EP" "0: The MUB side event is not pending (default),1: The MUB side event is pending"
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eventfld.long 0x00 3. "NMIC,NMIC" "0: Default,1: Writing 1 clears the NMI bit in the MUA CR.."
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rbitfld.long 0x00 0.--2. "Fn,Fn" "0: Fn bit in the MUA CR register is written 0..,1: Fn bit in the MUA CR register is written 1,?..."
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group.long 0x64++0x03
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line.long 0x00 "CR,Control Register"
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bitfld.long 0x00 28.--31. "GIEn,GIEn" "0: Disables MUB General Interrupt n,1: Enables MUB General Interrupt n,?..."
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bitfld.long 0x00 24.--27. "RIEn,RIEn" "0: Disables MUB Receive Interrupt n,1: Enables MUB Receive Interrupt n,?..."
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bitfld.long 0x00 20.--23. "TIEn,TIEn" "0: Disables MUB Transmit Interrupt n,1: Enables MUB Transmit Interrupt n,?..."
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bitfld.long 0x00 16.--19. "GIRn,GIRn" "0: MUB General Interrupt n is not requested to..,1: MUB General Interrupt n is requested to the MUA,?..."
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bitfld.long 0x00 8. "CLKE,MUA clock enable" "0: MUA platform clock gated when MUA enters a..,1: MUA platform clock kept running after MUA.."
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bitfld.long 0x00 4. "HRM,HRM" "0: BHR bit in MUA CR is not masked enables the..,1: BHR bit in MUA CR is masked disables the.."
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bitfld.long 0x00 3. "NMI,NMI" "0: Non-maskable interrupt is not issued to the..,1: Non-maskable interrupt is issued to the.."
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bitfld.long 0x00 0.--2. "Fn,Fn" "0: Clears the Fn bit in the SR register,1: Sets the Fn bit in the SR register,?..."
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tree.end
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endif
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autoindent.off
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newline
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