Files
Gen4_R-Car_Trace32/2_Trunk/mentxz4plus.men
2025-10-14 09:52:32 +09:00

706 lines
28 KiB
Plaintext

; --------------------------------------------------------------------------------
; @Title: TXZ4PLUS Specific Menu
; @Props: Released
; @Author: DAB
; @Changelog: 2022-03-30 DAB
; @Manufacturer: TOSHIBA - Toshiba
; @Core: Cortex-M4F
; @Chip: TMPM4G* TMPM4K* TMPM4M* TMPM4N*
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mentxz4plus.men 16339 2023-07-03 13:30:14Z pegold $
add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "AD" "per , ""AD (ADC),AD"""
)
if (cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "ADA" "per , ""ADA (12-bit Analog to Digital Converter(ADC)),ADA"""
menuitem "ADB" "per , ""ADB (12-bit Analog to Digital Converter(ADC)),ADB"""
menuitem "ADC" "per , ""ADC (12-bit Analog to Digital Converter(ADC)),ADC"""
menuitem "AMP" "per , ""AMP (Gain Op-AMP (AMP)),AMP"""
)
if (cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "CAN" "per , ""CAN (CAN Controller (CAN)),CAN"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "CANA" "per , ""CANA (CAN Controller (CAN)),CANA"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
popup "CANAMB (CAN Controller Mailbox RAM (CANMB))"
(
menuitem "CANAMB0" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB0"""
menuitem "CANAMB1" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB1"""
menuitem "CANAMB2" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB2"""
menuitem "CANAMB3" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB3"""
menuitem "CANAMB4" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB4"""
menuitem "CANAMB5" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB5"""
menuitem "CANAMB6" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB6"""
menuitem "CANAMB7" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB7"""
menuitem "CANAMB8" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB8"""
menuitem "CANAMB9" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB9"""
menuitem "CANAMB10" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB10"""
menuitem "CANAMB11" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB11"""
menuitem "CANAMB12" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB12"""
menuitem "CANAMB13" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB13"""
menuitem "CANAMB14" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB14"""
menuitem "CANAMB15" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB15"""
menuitem "CANAMB16" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB16"""
menuitem "CANAMB17" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB17"""
menuitem "CANAMB18" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB18"""
menuitem "CANAMB19" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB19"""
menuitem "CANAMB20" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB20"""
menuitem "CANAMB21" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB21"""
menuitem "CANAMB22" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB22"""
menuitem "CANAMB23" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB23"""
menuitem "CANAMB24" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB24"""
menuitem "CANAMB25" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB25"""
menuitem "CANAMB26" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB26"""
menuitem "CANAMB27" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB27"""
menuitem "CANAMB28" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB28"""
menuitem "CANAMB29" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB29"""
menuitem "CANAMB30" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB30"""
menuitem "CANAMB31" "per , ""CANAMB (CAN Controller Mailbox RAM (CANMB)),CANAMB31"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "CANB" "per , ""CANB (CAN Controller (CAN)),CANB"""
popup "CANBMB (CAN Controller Mailbox RAM (CANMB))"
(
menuitem "CANBMB0" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB0"""
menuitem "CANBMB1" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB1"""
menuitem "CANBMB2" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB2"""
menuitem "CANBMB3" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB3"""
menuitem "CANBMB4" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB4"""
menuitem "CANBMB5" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB5"""
menuitem "CANBMB6" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB6"""
menuitem "CANBMB7" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB7"""
menuitem "CANBMB8" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB8"""
menuitem "CANBMB9" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB9"""
menuitem "CANBMB10" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB10"""
menuitem "CANBMB11" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB11"""
menuitem "CANBMB12" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB12"""
menuitem "CANBMB13" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB13"""
menuitem "CANBMB14" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB14"""
menuitem "CANBMB15" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB15"""
menuitem "CANBMB16" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB16"""
menuitem "CANBMB17" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB17"""
menuitem "CANBMB18" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB18"""
menuitem "CANBMB19" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB19"""
menuitem "CANBMB20" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB20"""
menuitem "CANBMB21" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB21"""
menuitem "CANBMB22" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB22"""
menuitem "CANBMB23" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB23"""
menuitem "CANBMB24" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB24"""
menuitem "CANBMB25" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB25"""
menuitem "CANBMB26" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB26"""
menuitem "CANBMB27" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB27"""
menuitem "CANBMB28" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB28"""
menuitem "CANBMB29" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB29"""
menuitem "CANBMB30" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB30"""
menuitem "CANBMB31" "per , ""CANBMB (CAN Controller Mailbox RAM (CANMB)),CANBMB31"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*"))
(
menuitem "CEC" "per , ""CEC (Consumer Electronics Control (CEC)),CEC"""
)
menuitem "CG" "per , ""CG (Clock Generator (CG)),CG"""
if (cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "CRC" "per , ""CRC (CRC Calculation Circuit (CRC)),CRC"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
popup "DA (Digital analog converter (DAC))"
(
menuitem "DA0" "per , ""DA (Digital analog converter (DAC)),DA0"""
menuitem "DA1" "per , ""DA (Digital analog converter (DAC)),DA1"""
)
)
if (cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "DMA" "per , ""DMA (Direct Memory Access Controller (DMAC)),DMA"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "DMACA" "per , ""DMACA (DMA Controller),DMACA"""
menuitem "DMACB" "per , ""DMACB (DMA Controller),DMACB"""
)
menuitem "DNFA" "per , ""DNFA (DNF),DNFA"""
menuitem "DNFB" "per , ""DNFB (DNF),DNFB"""
if (cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "DNFC" "per , ""DNFC (Digital Noise Filter (DNF)),DNFC"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*"))
(
popup "EI2C (I2C Interface Version A (EI2C))"
(
if (cpuis("TMPM4KH*"))
(
menuitem "EI2C" "per , ""EI2C (I2C Interface Version A (EI2C)),EI2C"""
)
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "EI2C0" "per , ""EI2C (I2C Interface Version A (EI2C)),EI2C0"""
menuitem "EI2C1" "per , ""EI2C (I2C Interface Version A (EI2C)),EI2C1"""
)
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "EI2C2" "per , ""EI2C (I2C Interface Version A (EI2C)),EI2C2"""
)
menuitem "EI2C3" "per , ""EI2C (I2C Interface Version A (EI2C)),EI2C3"""
menuitem "EI2C4" "per , ""EI2C (I2C Interface Version A (EI2C)),EI2C4"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "EM" "per , ""EM (Ether Mac),EM"""
)
if (cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
popup "EN (Advanced Encoder Input (A-ENC32))"
(
if (cpuis("TMPM4KL*")||cpuis("TMPM4ML*"))
(
menuitem "EN" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN"""
)
menuitem "EN0" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN0"""
menuitem "EN1" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN1"""
menuitem "EN2" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN2"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "EXB" "per , ""EXB (External Bus Interface(EXB)),EXB"""
)
menuitem "FC" "per , ""FC,FC"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "FIR" "per , ""FIR (Finite Impulse Response),FIR"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*"))
(
popup "FURT (ARM Prime Cell PL011)"
(
if (cpuis("TMPM4GN*")||cpuis("TMPM4NN*"))
(
menuitem "FURT" "per , ""FURT (ARM Prime Cell PL011),FURT"""
)
menuitem "FURT0" "per , ""FURT (ARM Prime Cell PL011),FURT0"""
menuitem "FURT1" "per , ""FURT (ARM Prime Cell PL011),FURT1"""
)
popup "I2C (Inter-Integrated Circuit)"
(
if (cpuis("TMPM4KH*"))
(
menuitem "I2C" "per , ""I2C (Inter-Integrated Circuit),I2C"""
)
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
)
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit),I2C2"""
)
menuitem "I2C3" "per , ""I2C (Inter-Integrated Circuit),I2C3"""
menuitem "I2C4" "per , ""I2C (Inter-Integrated Circuit),I2C4"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
popup "I2S (Inter-Integrated Sound Bus Controller)"
(
menuitem "I2S0" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S0"""
menuitem "I2S1" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S1"""
)
)
menuitem "IA" "per , ""IA (Interrupt Control Registers A),IA"""
menuitem "IB" "per , ""IB (Interrupt Control Register B),IB"""
menuitem "IMN" "per , ""IMN (Interrupt Monitor Register),IMN"""
if (cpuis("TMPM4GN*")||cpuis("TMPM4NN*"))
(
menuitem "ISD" "per , ""ISD,ISD"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*"))
(
menuitem "ISDA" "per , ""ISDA (ISD),ISDA"""
menuitem "ISDB" "per , ""ISDB (ISD),ISDB"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GR*"))
(
menuitem "ISDC" "per , ""ISDC (ISD),ISDC"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "LTT" "per , ""LTT (Long Term Timer(LTTMR)),LTT"""
)
menuitem "LVD" "per , ""LVD (LVD0),LVD"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "MDMA" "per , ""MDMA (Malti Porpose Direct Memory Accsess(MDMA)),MDMA"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KN*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "NBD" "per , ""NBD (NBDIF),NBD"""
)
menuitem "OFD" "per , ""OFD (Oscillation Frequency Detector (OFD))"""
menuitem "PA" "per , ""PA (Port A)"""
menuitem "PB" "per , ""PB (Port B)"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "PC" "per , ""PC (Port C),PC"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KN*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "PD" "per , ""PD (Port D),PD"""
)
menuitem "PE" "per , ""PE (Port E)"""
menuitem "PF" "per , ""PF (Port F)"""
menuitem "PG" "per , ""PG (Port G)"""
menuitem "PH" "per , ""PH (Port H)"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GR*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "PJ" "per , ""PJ (Port J),PJ"""
)
menuitem "PK" "per , ""PK (Port K)"""
menuitem "PL" "per , ""PL (Port L)"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KN*")||cpuis("TMPM4MN*")||cpuis("TMPM4NQ*"))
(
menuitem "PM" "per , ""PM (Port M),PM"""
)
if (cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
popup "PMD"
(
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KH*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "PMD" "per , ""PMD,PMD"""
)
menuitem "PMD0" "per , ""PMD,PMD0"""
menuitem "PMD1" "per , ""PMD,PMD1"""
menuitem "PMD2" "per , ""PMD,PMD2"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "PN" "per , ""PN (Port N),PN"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "PP" "per , ""PP (Port P),PP"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*"))
(
menuitem "PR" "per , ""PR (Port R),PR"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "PT" "per , ""PT (Port T),PT"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GR*")||cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NQ*"))
(
menuitem "PU" "per , ""PU (Port U),PU"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KN*")||cpuis("TMPM4MN*")||cpuis("TMPM4NQ*"))
(
menuitem "PV" "per , ""PV (Port V),PV"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GR*"))
(
menuitem "PW" "per , ""PW (Port W),PW"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "PY" "per , ""PY (Port Y),PY"""
)
menuitem "RLM" "per , ""RLM (Low speed oscillation_power control_reset),RLM"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*"))
(
popup "RMC (Remote Control Signal Preprocessor (RMC))"
(
if (cpuis("TMPM4GN*")||cpuis("TMPM4NN*"))
(
menuitem "RMC" "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC"""
)
menuitem "RMC0" "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC0"""
menuitem "RMC1" "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC1"""
)
)
if (cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
popup "RPAR (RAM Parity (RAMP))"
(
menuitem "RPAR0" "per , ""RPAR (RAM Parity (RAMP)),RPAR0"""
menuitem "RPAR1" "per , ""RPAR (RAM Parity (RAMP)),RPAR1"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "RTC" "per , ""RTC (Real-time Counter),RTC"""
)
menuitem "SIWD" "per , ""SIWD (Watchdog Timer (SIWDT)),SIWD"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "SMI" "per , ""SMI (SMIF),SMI"""
popup "T32A (16-bit Timer_Event Counter (TB))"
(
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "T32A0" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A0"""
menuitem "T32A1" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A1"""
menuitem "T32A2" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A2"""
menuitem "T32A3" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A3"""
menuitem "T32A4" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A4"""
menuitem "T32A5" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A5"""
)
menuitem "T32A6" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A6"""
menuitem "T32A7" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A7"""
menuitem "T32A8" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A8"""
menuitem "T32A9" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A9"""
menuitem "T32A10" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A10"""
menuitem "T32A11" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A11"""
menuitem "T32A12" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A12"""
menuitem "T32A13" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A13"""
menuitem "T32A14" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A14"""
menuitem "T32A15" "per , ""T32A (16-bit Timer_Event Counter (TB)),T32A15"""
)
)
menuitem "TRM" "per , ""TRM (Internal High-speed Oscillation Adjustment),TRM"""
menuitem "TSEL" "per , ""TSEL (TRGSEL),TSEL"""
if (cpuis("TMPM4NR*")||cpuis("TMPM4GR*"))
(
popup "TSPI (Serial Peripheral Interface (TSPI))"
(
if (cpuis("TMPM4KH*"))
(
menuitem "TSPI" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI"""
)
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "TSPI0" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI0"""
menuitem "TSPI1" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI1"""
)
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "TSPI2" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI2"""
menuitem "TSPI3" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI3"""
menuitem "TSPI4" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI4"""
)
if (cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "TSPI5" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI5"""
menuitem "TSPI6" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI6"""
menuitem "TSPI7" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI7"""
)
menuitem "TSPI8" "per , ""TSPI (Serial Peripheral Interface (TSPI)),TSPI8"""
)
popup "TSSI"
(
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*"))
(
menuitem "TSSI" "per , ""TSSI,TSSI"""
)
menuitem "TSSI0" "per , ""TSSI,TSSI0"""
menuitem "TSSI1" "per , ""TSSI,TSSI1"""
)
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*"))
(
popup "UART (Universal Asynchronous Receiver/Transmitter)"
(
if (cpuis("TMPM4GN*")||cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "UART0" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART0"""
menuitem "UART1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
menuitem "UART2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART2"""
)
if (cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "UART3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
)
if (cpuis("TMPM4GQ*")||cpuis("TMPM4GR*")||cpuis("TMPM4NQ*")||cpuis("TMPM4NR*"))
(
menuitem "UART4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
)
menuitem "UART5" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART5"""
)
)
if (cpuis("TMPM4NN*"))
(
menuitem "USB" "per , ""USB (Universal Serial Bus),USB"""
)
if (cpuis("TMPM4NR*")||cpuis("TMPM4NQ*"))
(
menuitem "USBA" "per , ""USBA (USB interface),USBA"""
menuitem "USBB" "per , ""USBB (USB interface),USBB"""
)
if (cpuis("TMPM4KH*")||cpuis("TMPM4KL*")||cpuis("TMPM4KM*")||cpuis("TMPM4KN*")||cpuis("TMPM4ML*")||cpuis("TMPM4MM*")||cpuis("TMPM4MN*"))
(
menuitem "VE" "per , ""VE (Advanced Vector Engine Plus (A-VE+)),VE"""
)
)
)