346 lines
10 KiB
Plaintext
346 lines
10 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Kinetis W3x Specific Menu
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; @Props: Released
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; @Author: JAM, ADR
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; @Changelog: 2019-05-16 JAM
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; 2022-01-24 ADR
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; @Manufacturer: NXP - NXP Semiconductors
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; @Core: Cortex-M0P
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; @Chip: MKW36A512VFP4, MKW36A512VHT4, MKW36Z512VFP4, MKW36Z512VHT4,
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; MKW36A512VFP4R, MKW36A512VHT4R
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menkinetisw3x.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0+)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0+),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "ADC0" "per , ""ADC0 (Analog-to-Digital Converter)"""
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menuitem "BTLE_RF" "per , ""BTLE_RF"""
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menuitem "CAN0" "per , ""CAN0 (CAN)"""
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menuitem "CMP0" "per , ""CMP0 (High-Speed Comparator (CMP) Voltage Reference (VREF) Digital-to-Analog Converter (DAC) and Analog Mux (ANMUX))"""
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menuitem "CMT" "per , ""CMT (Carrier Modulator Transmitter)"""
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menuitem "DCDC" "per , ""DCDC (DC to DC Converter)"""
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menuitem "DMA0" "per , ""DMA0 (DMA)"""
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menuitem "DMAMUX0" "per , ""DMAMUX0 (DMAMUX)"""
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popup "FGPIO (General Purpose Input/Output)"
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(
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menuitem "FGPIOA" "per , ""FGPIO (General Purpose Input/Output),FGPIOA"""
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menuitem "FGPIOB" "per , ""FGPIO (General Purpose Input/Output),FGPIOB"""
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menuitem "FGPIOC" "per , ""FGPIO (General Purpose Input/Output),FGPIOC"""
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)
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menuitem "FTFE" "per , ""FTFE (Flash Memory Interface)"""
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menuitem "FTFE_FLASHCONFIG" "per , ""FTFE_FLASHCONFIG (Flash configuration field)"""
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menuitem "GENFSK" "per , ""GENFSK (GENERIC FSK)"""
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popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
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(
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menuitem "GPIOA" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
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menuitem "GPIOB" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
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menuitem "GPIOC" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
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)
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popup "I2C (Inter-Integrated Circuit)"
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(
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menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
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menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
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)
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menuitem "LLWU" "per , ""LLWU (Low leakage wakeup unit)"""
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menuitem "LPTMR0" "per , ""LPTMR0 (Low Power Timer)"""
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popup "LPUART (Universal Asynchronous Receiver/Transmitter)"
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(
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menuitem "LPUART0" "per , ""LPUART (Universal Asynchronous Receiver/Transmitter),LPUART0"""
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menuitem "LPUART1" "per , ""LPUART (Universal Asynchronous Receiver/Transmitter),LPUART1"""
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)
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menuitem "LTC0" "per , ""LTC0 (LTC)"""
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menuitem "MCG" "per , ""MCG (Multipurpose Clock Generator module)"""
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menuitem "MCM" "per , ""MCM (Core Platform Miscellaneous Control Module)"""
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menuitem "MTB" "per , ""MTB (Micro Trace Buffer)"""
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menuitem "MTBDWT" "per , ""MTBDWT (MTB data watchpoint and trace)"""
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menuitem "PIT" "per , ""PIT"""
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menuitem "PMC" "per , ""PMC (Power Management Controller)"""
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popup "PORT"
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(
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menuitem "PORTA" "per , ""PORT,PORTA"""
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menuitem "PORTB" "per , ""PORT,PORTB"""
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menuitem "PORTC" "per , ""PORT,PORTC"""
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)
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menuitem "RCM" "per , ""RCM (Reset Control Module)"""
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menuitem "RFSYS" "per , ""RFSYS (System register file)"""
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menuitem "ROM" "per , ""ROM (System ROM)"""
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menuitem "RSIM" "per , ""RSIM"""
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menuitem "RTC" "per , ""RTC (Real-time Counter)"""
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menuitem "SIM" "per , ""SIM (System Integration Module)"""
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menuitem "SMC" "per , ""SMC (System Mode Controller)"""
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popup "SPI (Serial Peripheral Interface)"
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(
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menuitem "SPI0" "per , ""SPI (Serial Peripheral Interface),SPI0"""
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menuitem "SPI1" "per , ""SPI (Serial Peripheral Interface),SPI1"""
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)
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popup "TPM (Timer/PWM Module)"
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(
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menuitem "TPM0" "per , ""TPM (Timer/PWM Module),TPM0"""
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menuitem "TPM1" "per , ""TPM (Timer/PWM Module),TPM1"""
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menuitem "TPM2" "per , ""TPM (Timer/PWM Module),TPM2"""
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)
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menuitem "TRNG0" "per , ""TRNG0"""
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menuitem "VREF" "per , ""VREF (Voltage Reference)"""
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menuitem "XCVR_ANALOG" "per , ""XCVR_ANALOG"""
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menuitem "XCVR_MISC" "per , ""XCVR_MISC"""
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menuitem "XCVR_PHY" "per , ""XCVR_PHY"""
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menuitem "XCVR_PKT_RAM" "per , ""XCVR_PKT_RAM"""
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menuitem "XCVR_PLL_DIG" "per , ""XCVR_PLL_DIG"""
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menuitem "XCVR_RX_DIG" "per , ""XCVR_RX_DIG"""
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menuitem "XCVR_TSM" "per , ""XCVR_TSM"""
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menuitem "XCVR_TX_DIG" "per , ""XCVR_TX_DIG"""
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)
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)
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