228 lines
3.9 KiB
ArmAsm
228 lines
3.9 KiB
ArmAsm
.text
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.globl _start
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.globl _exit.crt0
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.globl watchdogTrigger
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#ifdef __thumb__
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# define subs sub
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# define ands and
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# define muls mul
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#endif
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_start:
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/* init SCTLR, VBAR and CPSR */
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mov r1, #1
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mrc p15,0x0,r0,c1,c0,0x0
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and r0, r0, r1
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ldr r1, .SCTLR_VALUE
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orr r0, r0, r1
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mcr p15,0x0,r0,c1,c0,0x0
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ldr r0, .ISR_VECTOR_BASE
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mcr p15,0x0,r0,c12,c0,0x0
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ldr r0, .CPSR_VALUE
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msr CPSR, R0
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#if !defined(__SOFTFP__)
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bl fpu_init
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#endif
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/* check MPIDR - jump to _start_secondary*/
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mrc p15,0x0,r0,c0,c0,0x5
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mov r1, #3
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ands r0, r1, r0
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bne _start_secondary
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/* set stack and frame pointer */
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ldr r1, .SP
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mov r0, #7
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bic r1, r0
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mov r0, #0
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mov sp, r1
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mov fp, r0
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mov lr, r0
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/* copy data from FLASH to SRAM */
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ldr r4, .DATA_S
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ldr r5, .DATA_LADDR
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ldr r6, .DATA_SIZE
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cmp r4, r5
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beq data_done
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data_copy:
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ldrb r0, [r5]
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strb r0, [r4]
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add r4, r4, #1
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add r5, r5, #1
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subs r6, r6, #1
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bne data_copy
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data_done:
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/* clear .bss-section */
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ldr r4, .BSS_S
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ldr r5, .BSS_E
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mov r0, #0
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b bss_check
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bss_clear:
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strb r0, [r4]
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add r4, r4, #1
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bss_check:
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cmp r5, r4
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bne bss_clear
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bss_done:
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/* initialize Watchdog */
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ldr r3, .WDG_INIT
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cmp r3, #0
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beq wdg_init_done
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bl crt0_veneer
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wdg_init_done:
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/* register the WatchdogHook */
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ldr r3, .WDG_TRIGGER
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ldr r4, .WDG_HOOK
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str r3, [r4]
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/* initialization of e.g. static objects */
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ldr r4, .INIT_S
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ldr r5, .INIT_E
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b init_check
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init:
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ldr r3,[r4]
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bl crt0_veneer
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add r4, r4, #4
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init_check:
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cmp r5, r4
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bne init
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init_done:
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gomain:
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ldr r3, .MAIN
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bl crt0_veneer
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_exit.crt0:
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/* we should never get here */
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b _exit.crt0
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_hang:
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/* default fault handler */
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b _hang
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crt0_veneer:
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/* make a THUMB/ARM generic veneer call to r3 */
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/* lr is set by preceding bl instruction */
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mov r0, #0
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mov r1, #0
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bx r3
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.org 0x100
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_start_secondary:
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/* check MPIDR, calculate stackpointer */
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mrc p15,0x0,r0,c0,c0,0x5
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mov r1, #3
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ands r0, r0, r1
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ldr r1, .STACK_SIZE
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muls r1, r1, r0
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/* set stack and frame pointer */
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ldr r2, .SP_MP
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add r1, r1, r2
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mov r2, #7
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bic r1, r2
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mov r2, #0
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mov sp, r1
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mov fp, r2
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ldr r3, .BACKGROUND
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blx r3
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b _exit.crt0
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#if !defined(__SOFTFP__)
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fpu_init:
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ldr r1, .CPACR_VALUE
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mrc p15,0x0,r0,c1,c0,0x2
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orr r0, r0, r1
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mcr p15,0x0,r0,c1,c0,0x2
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isb
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ldr r0, .FPEXC_VALUE
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vmsr FPEXC, r0
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bx r14
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#endif
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.align 2
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.SP:
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.word __stack_end
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.SP_MP:
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.word __stack_start_mp
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.STACK_SIZE:
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.word __stack_size
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.BSS_S:
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.word __bss_start
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.BSS_E:
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.word __bss_end
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.INIT_S:
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.word __init_array_start
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.INIT_E:
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.word __init_array_end
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.DATA_S:
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.word __data_vaddr
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.DATA_LADDR:
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.word __data_laddr
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.DATA_SIZE:
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.word __data_size
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#ifndef WATCHDOG
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.WDG_INIT:
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.word 0x0
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.WDG_TRIGGER:
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.word 0x0
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#else
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.WDG_INIT:
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.word WatchdogInit
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.WDG_TRIGGER:
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.word WatchdogTrigger
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#endif
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.WDG_HOOK:
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.word watchdogTrigger
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.MAIN:
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.word main
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.BACKGROUND:
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.word background
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#ifdef __thumb__
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.SCTLR_VALUE:
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.word 0x40C50078
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.CPSR_VALUE:
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.word 0x000001F3
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#else
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.SCTLR_VALUE:
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.word 0x00C50078
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.CPSR_VALUE:
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.word 0x000001D3
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#endif
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.ISR_VECTOR_BASE:
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.word isr_vector_base
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#if defined(__ARM_FP)
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.CPACR_VALUE:
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.word 0x00f00000
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.FPEXC_VALUE:
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.word 0x40000000
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#endif
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.section .isr_vector,"ax"
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isr_vector_base:
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b _start
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b _hang
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b _hang
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b _hang
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b _hang
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b _hang
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b _hang
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.section .data
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watchdogTrigger:
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.word 0x0
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.section .text
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.weak background
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background:
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nop
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1:
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wfe
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b 1b
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