331 lines
9.9 KiB
Plaintext
331 lines
9.9 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: eMMC FLASH Program script by the core for the RCARV3H Evaluation Board
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; @Description:
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; eMMC FLASH KLMBG4GESD
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; The eMMC is connected to the SDHI Controller
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;
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; Prerequisites:
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; * Connect Debug Cable/Combiprobe to CN29 JTAG
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; * set CortexR7 as boot core
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; MD[7..6] = 0y00 -> SW3[1..2] = 0y00
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; * activate Coresight on JTAG1 (CN29)
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; MD10 = 0 -> SW20[3] = 1
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; MD[21..20] = 0y10 -> SW20[4..5] = 0y01
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;
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; SRAM: 0xE6328000
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; SDHI(MMC) controller Base: 0xEE140000
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;
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; @Keywords: ARM, Cortex-R7, RCarV3H
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; @Author: jjeong
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; @Board: R-CarV3H System Evaluation Board "Condor", V3H Starter Kit
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; @Chip: RCARV3H-CR7
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: rcarv3h-cr7-emmc.cmm 12742 2023-11-17 08:05:09Z mschaeffner $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&MMC_BASE=0xEE140000
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; ------------------------------------------------------------------------------
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; Setup CPU
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RESet
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SYStem.RESet
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SYStem.CPU R8A77960-CR7
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SYStem.MemAccess DAP
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SYStem.JtagClock CTCK 10MHz
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Trace.DISable
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SYStem.Up
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; --------------------------------------------------------------------------------
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; enable the SRAM & MPU - alternative execute BootROM e.g. Go/Wait/Break
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IF TRUE()
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(
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; enable SRAM
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Data.Set AD:0xE67F0018 %LE %Long 0x1
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; disable MPU
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Data.Set C15:0x1 %Long 0xC50078
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; disable all regions
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PRIVATE &i
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&i=0
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RePeaT 16.
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(
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; set MRNR
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Data.Set C15:0x26 %Long &i
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; clear RSER
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Data.Set C15:0x216 %Long 0x0
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&i=&i+1.
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)
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; setup regions for simplicity only region 0&1
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; region 0: 0x00000000--0xffffffff - Shareable Device - all permissions
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Data.Set C15:0x26 %Long 0x0
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Data.Set C15:0x16 %Long 0x0
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Data.Set C15:0x216 %Long 0x3f
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Data.Set C15:0x416 %Long 0x305
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; region 1: 0xe6300000--0xe637ffff - non-cacheable - all permissions
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Data.Set C15:0x26 %Long 0x1
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Data.Set C15:0x16 %Long 0xe6300000
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Data.Set C15:0x216 %Long 0x25
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Data.Set C15:0x416 %Long 0x30c
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; enable MPU
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Data.Set C15:0x1 %Long Data.Long(C15:0x1)|0x1
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)
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ELSE
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(
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Go.direct 0x268
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WAIT !STATE.RUN() 0.2s
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IF STATE.RUN()
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Break.direct
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)
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; ------------------------------------------------------------------------------
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; Flash Controller Power & Clock Enable
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; ------------------------------------------------------------------------------
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; Flash Pin Mux Configuration
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GOSUB PIN_MUX
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GOSUB POWERON_MMC0
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GOSUB CLKINIT_MMC0
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GOSUB INIT_MMC0
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GOSUB WDOG_DISABLE
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GOSUB READ_ID_TEST
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LOCAL &pdd
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&pdd=OS.PresentDemoDirectory()
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Break.RESet
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FLASHFILE.RESet
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//FLASHFILE.CONFIG <MMC Base Address>
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FLASHFILE.CONFIG &MMC_BASE
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//FLASHFILE.TARGET <code range> <data range> <Algorithm file>
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FLASHFILE.TARGET 0xE6328000++0x1FFF EA:0xE632A000++0x43FF &pdd/flash/byte/emmc_shsdhi.bin /KEEP /STACKSIZE 0x200 /DUALPORT
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GOSUB CLK_DOWN_400KHz
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FLASHFILE.GETID
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GOSUB CLK_UP_20MHz
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//Get EXTended CSD registers
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FLASHFILE.GETEXTCSD
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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//When you access to the other partition on the flash
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; FLASHFILE.SETEXTCSD 179. 0x00 ; access: partition null, no boot, access: no boot partition
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; FLASHFILE.SETEXTCSD 179. 0x48 ; access: partition null
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; FLASHFILE.SETEXTCSD 179. 0x49 ; access: partition boot 1
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; FLASHFILE.SETEXTCSD 179. 0x4A ; access: partition boot 2
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FLASHFILE.DUMP 0x0 ; Read eMMC
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;FLASHFILE.ERASE 0x0--0xFFFFF ; Erase eMMC
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;FLASHFILE.LOAD * 0x0 ; Write eMMC
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ENDDO
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POWERON_MMC0:
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//poweronmmc0, Bit12,13,14 clear
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&value=0xFFFF8FDF
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Data.Set A:0xE6150900 %Long ~(&value)
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Data.Set A:0xE615013C %Long &value
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PRINT "MSTPSR3: 0x" Data.Long(A:0xE6150048) ; //bit 12,13,14 have to be cleared.
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RETURN
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//InitMmc0PinFunction
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PIN_MUX:
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//eMMC pin mapping
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//VI1_DATA3 : MMC_CMD
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//VI1_DATA4 : MMC_DAT0
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//VI1_DATA8 : MMC_CLK
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&value=0x44440000
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE6060214 %Long &value ;PFC_IPSR5 [31:16]
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&value=0x44444444
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE6060218 %Long &value ;PFC_IPSR6 [31:0]
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&value=0x00000004
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE606021C %Long &value ;PFC_IPSR7 [3:0]
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&value=0x01FFFF
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE606010C %Long &value ;PFC_GPSR3
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&value=0x00000077
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE606031C %Long &value ;PFC_DRVCTRL7
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&value=0x77777777
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE6060320 %Long &value ;PFC_DRVCTRL8
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&value=0x77700000
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Data.Set A:0xE6060000 %Long ~(&value) ;PFC_PMMR
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Data.Set A:0xE6060324 %Long &value ;PFC_DRVCTRL9
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//Function: Each bit in POCCTRL0 must be set according to IO voltage level that is supplied to the pin.
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//0: 1.8v 1: 3.3v
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&value=0xFF0000FF
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Data.Set A:0xE6060000 %Long ~(&value)
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Data.Set A:0xE6060384 %Long &value ;PFC_POCCTRL1
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&value=0x0
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Data.Set A:0xE6060000 %Long ~(&value)
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Data.Set A:0xE60603C0 %Long &value ;TDSELCTRL0
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RETURN
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CLK_UP_20MHz:
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PER.Set.simple A:&MMC_BASE+0x0090 %Long 0x0
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//*((volatile uint32_t*)MMC_CH0_SD_CLK_CTRL) = 0x101; //1/4 ; 20Mhz
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PER.Set.simple A:&MMC_BASE+0x0090 %Quad 0x101
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//*((volatile uint32_t*)(MMC_CH0_SCC_DTCNTL)) = 0x00080000; // SCC_DTCNTL.TAPEN=0
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PER.Set.simple A:&MMC_BASE+0x1000 %Long 0x00080000
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//*((volatile uint32_t*)(MMC_CH0_SCC_TAPSET)) = 2; // SCC_TAPSET
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PER.Set.simple A:&MMC_BASE+0x1008 %Long 0x2
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//*((volatile uint32_t*)(MMC_CH0_SCC_CKSEL)) = 0x00000000; // SCC_CKSEL=0
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PER.Set.simple A:&MMC_BASE+0x1018 %Long 0x0
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RETURN
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CLK_DOWN_400KHz:
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// *((volatile uint32_t*)MMC_CH0_SD_CLK_CTRL) = 0x00000000; // Automatic Control=Disable, Clock Output=Disable
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PER.Set.simple A:&MMC_BASE+0x0090 %Long 0x0
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// *((volatile uint32_t*)MMC_CH0_SD_CLK_CTRL) = 0x180; //1/512 ; 400KHz
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PER.Set.simple A:&MMC_BASE+0x0090 %Quad 0x120
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//*((volatile uint32_t*)(MMC_CH0_SCC_DTCNTL)) = 0x00080000; // SCC_DTCNTL.TAPEN=0
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PER.Set.simple A:&MMC_BASE+0x1000 %Long 0x00080000
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//*((volatile uint32_t*)(MMC_CH0_SCC_TAPSET)) = 2; // SCC_TAPSET
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PER.Set.simple A:&MMC_BASE+0x1008 %Long 0x2
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//*((volatile uint32_t*)(MMC_CH0_SCC_CKSEL)) = 0x00000000; // SCC_CKSEL=0
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PER.Set.simple A:&MMC_BASE+0x1018 %Long 0x0
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RETURN
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CLKINIT_MMC0:
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//clock init
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&value=0x1|(0x2<<2)
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Data.Set A:0xE6150900 %Long ~(&value)
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Data.Set A:0xE6150074 %Long &value ;SD0 ;for rcharv3h
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Data.Set A:0xE6150078 %Long &value ;SD1
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Data.Set A:0xE6150268 %Long &value ;SD2
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Data.Set A:0xE615026C %Long &value ;SD3
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RETURN
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INIT_MMC0:
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//SW Reset for the MMC memory
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Data.Set A:&MMC_BASE+0x380 %LE %Quad 0x0
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WAIT 100.ms
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Data.Set A:&MMC_BASE+0x380 %LE %Quad 0x7
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// *((volatile uint32_t*)MMC_CH0_HOST_MODE) = 0x00000000; // SD_BUF access width = 64-bit
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PER.Set.simple A:&MMC_BASE+0x0390 %Long 0x0
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// *((volatile uint32_t*)MMC_CH0_SD_OPTION) = 0x0000C0EE; // Bus width = 1bit, timeout=MAX
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PER.Set.simple A:&MMC_BASE+0x00A0 %Long 0xc0EE
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// *((volatile uint32_t*)MMC_CH0_SD_CLK_CTRL) = 0x00000000; // Automatic Control=Disable, Clock Output=Disable
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PER.Set.simple A:&MMC_BASE+0x0090 %Long 0x0
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// *((volatile uint32_t*)MMC_CH0_SD_CLK_CTRL) = 0x180; //1/512 ; 400KHz
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PER.Set.simple A:&MMC_BASE+0x0090 %Quad 0x180
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//*((volatile uint32_t*)(MMC_CH0_SCC_DTCNTL)) = 0x00080000; // SCC_DTCNTL.TAPEN=0
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PER.Set.simple A:&MMC_BASE+0x1000 %Long 0x00080000
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//*((volatile uint32_t*)(MMC_CH0_SCC_TAPSET)) = 2; // SCC_TAPSET
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PER.Set.simple A:&MMC_BASE+0x1008 %Long 0x2
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//*((volatile uint32_t*)(MMC_CH0_SCC_CKSEL)) = 0x00000000; // SCC_CKSEL=0
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PER.Set.simple A:&MMC_BASE+0x1018 %Long 0x0
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// *((volatile uint32_t*)MMC_CH0_SD_INFO1_MASK) = 0x0001031D; // all mask (0x0000FFFE in HWM)
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PER.Set.simple A:&MMC_BASE+0x0080 %Quad 0x1031D
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// *((volatile uint32_t*)MMC_CH0_SD_INFO2_MASK) = 0x00008B7F; // all mask (0x00007F80 in HWM)
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PER.Set.simple A:&MMC_BASE+0x0088 %Quad 0x8B7F
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RETURN
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READ_ID_TEST:
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//CMD0
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RePeaT 2.
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(
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//MMC_CH0_SD_INFO1
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PER.Set.simple A:&MMC_BASE+0x0070 %Long 0xFFFE ;clear resp end BIT0
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// SendMmc0Cmd0(0x00000000);
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PER.Set.simple A:&MMC_BASE+0x0010 %Long 0x0 ;arg
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PER.Set.simple A:&MMC_BASE+0x0000 %Quad 0x0 ;cmd
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WAIT 100.ms
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)
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//CMD1
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RePeaT 10.
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(
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//SendMmc0Command(MMC_CMD1,ocr);
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//MMC_CH0_SD_INFO1
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PER.Set.simple A:&MMC_BASE+0x0070 %Long 0xFFFE ;clear resp end BIT0
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PER.Set.simple A:&MMC_BASE+0x0010 %Long 0x40FF8080 ;arg
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PER.Set.simple A:&MMC_BASE+0x0000 %Quad 0x701 ;cmd
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WAIT 100.ms
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&resp=Data.Long(A:&MMC_BASE+0x0030)
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//print "CMD1 resp: 0x" &resp
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IF (&resp&0x80000000)==0x80000000
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(
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GOTO jump_cmd2
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)
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)
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PRINT "CMD1 fail"
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END
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jump_cmd2:
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//CMD2
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PER.Set.simple A:&MMC_BASE+0x0070 %Long 0xFFFE ;clear resp end BIT0
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PER.Set.simple A:&MMC_BASE+0x0010 %Long 0x0 ;arg
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PER.Set.simple A:&MMC_BASE+0x0000 %Quad 0x2 ;cmd
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WAIT 10.ms
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//CMD3
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PER.Set.simple A:&MMC_BASE+0x0070 %Long 0xFFFE ;clear resp end BIT0
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PER.Set.simple A:&MMC_BASE+0x0010 %Long 0x10000 ;arg
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PER.Set.simple A:&MMC_BASE+0x0000 %Quad 0x3 ;cmd
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WAIT 10.ms
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//CMD10
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PER.Set.simple A:&MMC_BASE+0x0070 %Long 0xFFFE ;clear resp end BIT0
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PER.Set.simple A:&MMC_BASE+0x0010 %Long 0x10000 ;arg
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PER.Set.simple A:&MMC_BASE+0x0000 %Quad 0x0000000A ;cmd
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WAIT 10.ms
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//Response2
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PRINT "CID register"
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PRINT "[127:104] 0x" Data.Long(A:&MMC_BASE+0x0060)
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PRINT "[103:72] 0x" Data.Long(A:&MMC_BASE+0x0050)
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PRINT "[71:40] 0x" Data.Long(A:&MMC_BASE+0x0040)
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PRINT "[39:8] 0x" Data.Long(A:&MMC_BASE+0x0030)
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RETURN
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WDOG_DISABLE:
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//RCLK Watchdog Timer disable
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Data.Set ZAXI:0xE6020004 %Long 0xA5A5A500|0x00 ; Write 0 to the RCLK Watchdog Timer Control Register A
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Data.Set ZAXI:0xE6020008 %Long 0xA5A5A500|0x00 ; Write 0 to the RCLK Watchdog Timer Control Register B
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//System Watchdog Timer disable
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Data.Set ZAXI:0xE6030004 %Long 0xA5A5A500|0x00 ; Write 0 to the System Watchdog Timer Control Register A
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Data.Set ZAXI:0xE6030008 %Long 0xA5A5A500|0x00 ; Write 0 to the System Watchdog Timer Control Register B
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RETURN
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