289 lines
10 KiB
Plaintext
289 lines
10 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Hyper Flash Program script for IMXRT1052 on IMXRT1050-EVK
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; @Description:
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; The KL512S (Spansion Hyper flash) is connected to the FLEXSPI controller
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;
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; SRAM: 0x20001000
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; FlexSPI(controller) Base: 0x402A8000
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; FlexSPI AHB memory mapped ADDRESS: 0x60000000
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;
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; Prerequisites:
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; SW7: 0y0110
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;
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; @Keywords: ARM, Cortex-M7
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; @Author: JIM
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; @Board: IMXRT1050-EVK
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; @Chip: IMXRT1051 IMXRT1052
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: imxrt105x-hyper.cmm 12110 2023-05-12 06:56:23Z jjeong $
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PRIVATE ¶meters ¶m_prepareonly
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ENTRY %LINE ¶meters
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¶m_prepareonly=(STRing.SCAN(STRing.UPpeR("¶meters"),"PREPAREONLY",0)!=-1)
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&FLEXSPI_AHB_BASE=0x60000000 ;FLEXSPI0 memory mapped address, not controller address
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&FLEXSPI_BASE=0x402A8000 ;FLEXSPI0 controller base address
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IF SYStem.MODE()<5
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(
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WINCLEAR
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AREA.view
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; initialize and start the debugger
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SYStem.RESet
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SYStem.CPU IMXRT1052
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SYStem.CONFIG.DEBUGPORTTYPE SWD
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SYStem.Up
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)
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GOSUB DisableWatchdog
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GOSUB clockInit
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GOSUB IOMUXconfig
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GOSUB FLEXSPIconfig
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GOSUB READ_ID_TEST
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FLASH.RESet
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FLASH.Create 0x60000000++0xffffff 0x40000 TARGET Word
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FLASH.TARGET 0x20001000 EAHB:0x20003000 0x2000 ~~/demo/arm/flash/word/hyper_flexspi.bin /DualPort /STACKSIZE 0x400
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; flash alias
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FLASH.CreateALIAS 0x08000000++0xffffff 0x60000000
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IF ¶m_prepareonly
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ENDDO
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; ReProgram Flash
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;FLASH.ReProgram ALL
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;Data.LOAD.Elf * ; or Data.LOAD.Binary * 0x60000000
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;FLASH.ReProgram OFF
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ENDDO
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; --------------------------------------------------------------------------------
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FLEXSPIconfig:
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(
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//unlock
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Data.Set A:&FLEXSPI_BASE+0x018 %LE %Long 0x5AF05AF0
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Data.Set A:&FLEXSPI_BASE+0x01C %LE %Long 2
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//controller init
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Data.Set A:&FLEXSPI_BASE+0x000 %LE %Long 0xFFFFA030 ;big , 0x4 little endian
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Data.Set A:&FLEXSPI_BASE+0x004 %LE %Long 0xFFFFFFFF
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Data.Set A:&FLEXSPI_BASE+0x008 %LE %Long 0x200801F7
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Data.Set A:&FLEXSPI_BASE+0x00C %LE %Long 0x78
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Data.Set A:&FLEXSPI_BASE+0x020 %LE %Long 0x80000000
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Data.Set A:&FLEXSPI_BASE+0x024 %LE %Long 0x80000000
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Data.Set A:&FLEXSPI_BASE+0x028 %LE %Long 0x80000000
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Data.Set A:&FLEXSPI_BASE+0x060 %LE %Long 0x00010000
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//timing
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Data.Set A:&FLEXSPI_BASE+0x070 %LE %Long 0x00001C63
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Data.Set A:&FLEXSPI_BASE+0x074 %LE %Long 0x00001C63
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Data.Set A:&FLEXSPI_BASE+0x078 %LE %Long 0x00001C63
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Data.Set A:&FLEXSPI_BASE+0x07C %LE %Long 0x00001C63
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Data.Set A:&FLEXSPI_BASE+0x080 %LE %Long 0x00002900
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Data.Set A:&FLEXSPI_BASE+0x084 %LE %Long 0x00002900
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Data.Set A:&FLEXSPI_BASE+0x088 %LE %Long 0x00002900
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Data.Set A:&FLEXSPI_BASE+0x08C %LE %Long 0x00002900
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Data.Set A:&FLEXSPI_BASE+0x0C0 %LE %Long 0x79
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Data.Set A:&FLEXSPI_BASE+0x0C4 %LE %Long 0x0100
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Data.Set A:&FLEXSPI_BASE+0x200 %LE %Long 0x8B1887A0
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Data.Set A:&FLEXSPI_BASE+0x204 %LE %Long 0xA7048F10
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Data.Set A:&FLEXSPI_BASE+0x208 %LE %Long 0x000
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//AHB update automatically even though the window size is < 1KB
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Data.Set A:&FLEXSPI_BASE+0x00C %LE %Long Data.Long(A:&FLEXSPI_BASE+0x00C)&~0x20
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RETURN
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)
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IOMUXconfig:
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(
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//pin mux
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Data.Set A:0x401F81D4 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_FLEXSPIB_DATA03, 1U);
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Data.Set A:0x401F81D8 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_FLEXSPIB_DATA02, 1U);
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Data.Set A:0x401F81DC %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_FLEXSPIB_DATA01, 1U);
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Data.Set A:0x401F81E0 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_03_FLEXSPIB_DATA00, 1U);
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Data.Set A:0x401F81E4 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_04_FLEXSPIB_SCLK, 1U);
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Data.Set A:0x401F81E8 %LE %Long 0x11 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 1U);
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Data.Set A:0x401F81EC %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U);
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Data.Set A:0x401F81F0 %LE %Long 0x11 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 1U);
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Data.Set A:0x401F81F4 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U);
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Data.Set A:0x401F81F8 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U);
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Data.Set A:0x401F81FC %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U);
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Data.Set A:0x401F8200 %LE %Long 0x01 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U);
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//pin config
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Data.Set A:0x401F83DC %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 0x10F1u);
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Data.Set A:0x401F83E0 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10F1u);
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Data.Set A:0x401F83D4 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_04_FLEXSPIB_SCLK, 0x10F1u);
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Data.Set A:0x401F83D8 %LE %Long 0x130F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0x0130F1u);
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Data.Set A:0x401F83E4 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10F1u);
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Data.Set A:0x401F83E8 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10F1u);
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Data.Set A:0x401F83EC %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10F1u);
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Data.Set A:0x401F83F0 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10F1u);
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Data.Set A:0x401F83D0 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_03_FLEXSPIB_DATA00, 0x10F1u);
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Data.Set A:0x401F83CC %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_02_FLEXSPIB_DATA01, 0x10F1u);
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Data.Set A:0x401F83C8 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_FLEXSPIB_DATA02, 0x10F1u);
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Data.Set A:0x401F83C4 %LE %Long 0x00F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_FLEXSPIB_DATA03, 0x10F1u);
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RETURN
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)
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clockInit: ;()
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(
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// Enable all clocks
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Data.Set A:0x400FC068 %Long 0xffffffff
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Data.Set A:0x400FC06C %Long 0xffffffff
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Data.Set A:0x400FC070 %Long 0xffffffff
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Data.Set A:0x400FC074 %Long 0xffffffff
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Data.Set A:0x400FC078 %Long 0xffffffff
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Data.Set A:0x400FC07C %Long 0xffffffff
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Data.Set A:0x400FC080 %Long 0xffffffff ;CCGR6.CG5[11:10]: FLEXSPI enable clk
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Data.Set A:0x400D8000 %Long 0x00012042
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Data.Set A:0x400D8030 %Long 0x00002001
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Data.Set A:0x400D8100 %Long 0x58535858
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Data.Set A:0x400D8010 %Long 0x00003000
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Data.Set A:0x400D8010 %Long 0x80003000
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Data.Set A:0x400D80F0 %Long 0x4f5a6363
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Data.Set A:0x400FC010 %Long 0x1 ;CCM_CACRR
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Data.Set A:0x400FC014 %Long 0x000A8200
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Data.Set A:0x400FC024 %Long 0x06490B03
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Data.Set A:0x400FC018 %Long 0x2DAE8324 ;CCM_CBCMR
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Data.Set A:0x400FC018 %Long 0x35AE8304
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Data.Set A:0x400FC01C %Long 0x67900001
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Data.Set A:0x400FC01C %Long 0x67300001
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Data.Set A:0x400FC024 %Long 0x06490B03
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Data.Set A:0x400D8000 %Long 0x80002042
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Data.Set A:0x400D8030 %Long 0x80002001 ;CCM_ANALOG_PLL_SYSn
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Data.Set A:0x400D8010 %Long 0x80003000 ;CCM_ANALOG_PLL_USB1n
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Data.Set A:0x400FC080 %Long 0x00FC33C0 ;CCGR6.CG5[11:10]: FLEXSPI enable clk
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Data.Set A:0x400D80F0 %Long 0x0F1A2318
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Data.Set A:0x400FC01C %Long 0x66930001 ;CCM_CSCMR1, FLEXSPI_PODF[25:23]
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Data.Set A:0x400FC080 %Long 0x00FC3FC0
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Data.Set A:0x400FC080 %Long 0x00FC33C0
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Data.Set A:0x400D80F0 %Long 0x0F1A235A
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Data.Set A:0x400FC01C %Long 0x64130001 ;CCM_CSCMR1, FLEXSPI_PODF[25:23]
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Data.Set A:0x400FC080 %Long 0x00FC3FC0
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RETURN
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)
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READ_ID_TEST:
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(
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PRINT "READ_ID_TEST..."
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PRIVATE &data
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GOSUB HYPER_WRITE_WORD "0x555" "0xFF" ; addr 0x555 <- RESET
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GOSUB HYPER_WRITE_WORD "0x555" "0x98" ; addr 0x555 <- CFI
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GOSUB HYPER_READ_LONG "0x0" ; READ addr 0x0 LONG word
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RETURNVALUES &data
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PRINT "Read 0x" (&data&0xFFFF) "(Manufacture ID)"
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PRINT "Read 0x" ((&data>>16.)&0xFFFF) "(Device ID)"
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GOSUB HYPER_WRITE_WORD "0x555" "0xF0" ; addr 0x555 <- RESET
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RETURN
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)
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HYPER_WRITE_WORD:
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(
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PRIVATE &addr &data
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PARAMETERS &addr &data
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PRIVATE &addr_0 &addr_1 &addr_2 &addr_3 &data_up &data_down
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&addr_0=(&addr>>19.)&0xFF
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&addr_1=(&addr>>11.)&0xFF
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&addr_2=(&addr>>3.)&0xFF
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&addr_3=(&addr&0x7)
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&data_up=(&data>>8.)&0xFF
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&data_down=(&data)&0xFF
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Data.Set A:&FLEXSPI_BASE+0x080 %LE %Long 0x80000900 ;FLASHCR2
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Data.Set A:&FLEXSPI_BASE+0x014 %LE %Long -1 ;INTR clear
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Data.Set A:&FLEXSPI_BASE+0x0BC %LE %Long 0x1 ;IPTXFCR
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Data.Set A:&FLEXSPI_BASE+0x0B8 %LE %Long 0x1 ;IPRXFCR
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Data.Set A:&FLEXSPI_BASE+0x0A0 %LE %Long 0x0 ;IPCR0, SFAR
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Data.Set A:&FLEXSPI_BASE+0x250 %LE %Long ((0x21<<10.)|(3<<8.)|&addr_0)<<16.|((0x21<<10.)|(3<<8.)|0x20) ;CMD_DDR(0x21) , Octal, inst: 0x20
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Data.Set A:&FLEXSPI_BASE+0x254 %LE %Long ((0x21<<10.)|(3<<8.)|&addr_2)<<16.|((0x21<<10.)|(3<<8.)|&addr_1)
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Data.Set A:&FLEXSPI_BASE+0x258 %LE %Long ((0x21<<10.)|(3<<8.)|&addr_3)<<16.|((0x21<<10.)|(3<<8.)|0x00)
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Data.Set A:&FLEXSPI_BASE+0x25C %LE %Long ((0x21<<10.)|(3<<8.)|&data_down)<<16.|((0x21<<10.)|(3<<8.)|&data_up)
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Data.Set A:&FLEXSPI_BASE+0x0A4 %LE %Long (5.<<16.)
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Data.Set A:&FLEXSPI_BASE+0x0B0 %LE %Long 1 ;start
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WAIT 100.ms
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RETURN
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)
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HYPER_READ_LONG:
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(
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PRIVATE &addr
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PARAMETERS &addr
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PRIVATE &data
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Data.Set A:&FLEXSPI_BASE+0x080 %LE %Long 0x80000900 ;FLASHCR2
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Data.Set A:&FLEXSPI_BASE+0x014 %LE %Long -1 ;INTR clear
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Data.Set A:&FLEXSPI_BASE+0xBC %Long 0x1 ;IPTXFCR
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Data.Set A:&FLEXSPI_BASE+0xB8 %Long 0x1 ;IPRXFCR
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Data.Set A:&FLEXSPI_BASE+0xA0 %Long &addr ;IPCR0, SFAR
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Data.Set A:&FLEXSPI_BASE+0x250 %Long ((0x22<<10.)|(3<<8.)|0x18)<<16.|((0x21<<10.)|(3<<8.)|0xA0)
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Data.Set A:&FLEXSPI_BASE+0x254 %Long ((0x2D<<10.)|(3<<8.)|0x0B)<<16.|((0x23<<10.)|(3<<8.)|0x10)
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Data.Set A:&FLEXSPI_BASE+0x258 %Long ((0x00<<10.)|(3<<8.)|00)<<16.|((0x29<<10.)|(3<<8.)|0x04) ; 0x4 read byte size
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Data.Set A:&FLEXSPI_BASE+0x25C %Long 0x0
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Data.Set A:&FLEXSPI_BASE+0x0A4 %LE %Long (5.<<16.)
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Data.Set A:&FLEXSPI_BASE+0x0B0 %LE %Long 1 ;start
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WAIT 100.ms
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&data=Data.Long(A:&FLEXSPI_BASE+0x100)
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RETURN "&data"
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)
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DisableWatchdog:
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(
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Data.Assemble ST:0x20000000 ldr r1,[r0,#8]
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Data.Assemble , str r1,[r0,#8]
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Data.Assemble , ldr r1,[r0]
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Data.Assemble , orr r1,r1,#0x20
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Data.Assemble , str r1,[r0]
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Data.Assemble , str r2,[r0,#0x4] ; Key
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Data.Assemble , ldr r1,[r0]
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Data.Assemble , and r1,r1,#0x7f
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Data.Assemble , str r1,[r0]
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Data.Assemble , bkpt #0
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Register.Set R0 0x400BC000
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Register.Set R2 0xD928C520
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Register.Set PC 0x20000000
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Go
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WAIT !STATE.RUN()
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RETURN
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)
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