241 lines
8.2 KiB
Plaintext
241 lines
8.2 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: i.MX6 QUAD NAND FLASH Programming Script
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; @Description:
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; NAND FLASH(SAMSUNG,K9F4G08) is connected to the NAND_CS0
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;
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; S(D)RAM: 0x900000
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; APBH-Bridge-DMA Register : 0x110000
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; GPMI Register : 0x112000
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;
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;
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; @Author: jjeong
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; @Chip: IMX6QUAD
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; @Keywords: SAMSUNG K9F4G08 NAND
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; --------------------------------------------------------------------------------
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; $Id: imx6quad-nand2g08.cmm 11733 2023-01-16 08:55:12Z bschroefel $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&GPMI_BASE=0x112000
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&APBHDMA_BASE=0x110000
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&DMABUFF_BASE=0x907000 ; any address in the ram for using dma access
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; reset chip, connect to core #0 only
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RESet
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SYStem.RESet
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SYStem.CPU iMX6Quad
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CORE.ASSIGN 1
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SYStem.Option ResBreak OFF
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IF VERSION.BUILD()<92177.
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(
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SYStem.Option WaitReset 1.3s
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)
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ELSE
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(
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SYStem.Option WaitIDCODE 1.5s
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)
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TrOnchip.Set DABORT OFF
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TrOnchip.Set PABORT OFF
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TrOnchip.Set UNDEF OFF
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Trace.METHOD Onchip
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SYStem.Up
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Data.Set C15:0x1 %Long (Data.Long(C15:0x1)&~(0x1005)) ; disable interrupt and mmu
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Data.Set A:0x020d8000 %Long 0x01C00521
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Data.Set A:0x020bc000 %Word 0x30 ;Watchdog disable
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Data.Set A:0x020c0000 %Word 0x30 ;Watchdog disable
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GOSUB NAND_SETUP
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GOSUB READ_ID_TEST
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Break.RESet
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FLASHFILE.RESet
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//FLASHFILE.config <APBH-Bridge-DMA> <GPMI reg>
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FLASHFILE.CONFIG 0x110000 0x112000
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// FLASHFILE.TARGET <<code range>> <<data range>> <<algorithm file>>
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FLASHFILE.TARGET 0x900000++0x3fff EAHB:0x904000++0x3fff ~~/demo/arm/flash/byte/nand2g08_gpmimx6.bin /KEEP /STACKSIZE 0x500 /dualport
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FLASHFILE.GETID
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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FLASHFILE.DUMP 0x0 ; Read NAND
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;FLASHFILE.ERASE 0x0--0xFFFFF /EraseBadBlock ; Erase NAND
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;FLASHFILE.LOAD * 0x0 ; Write NAND
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;FLASHFILE.DUMP 0x0 /spare ; Read NAND spare area
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ENDDO
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NAND_SETUP:
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Data.Set 0x020C8100 %Long 0x5058505B ;HW_ANADIG_PFD_528_RW
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Data.Set 0x020C4078 %Long 0x00FFFFFF ;CCM_CCGR4
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Data.Set 0x020C402C %Long 0x007036C1 ;CCM_CS2CDR
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Data.Set 0x020C402C %Long 0x007236C1 ;CCM_CS2CDR
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Data.Set 0x020C402C %Long 0x000236C1 ;CCM_CS2CDR
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Data.Set 0x020C402C %Long 0x007236C1
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Data.Set 0x020C4078 %Long 0xFFFFFFFF ;CCM_CCGR4
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Data.Set 0x020C4080 %Long 0xFFFFFFFF ;CCM_CCGR6
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Data.Set 0x020C4068 %Long 0xFFFFFFFF ;CCM_CCGR0
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Data.Set 0x00112000 %Long 0xC0000000 ;HW_GPMI_CTRL0_WR
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Data.Set 0x00112008 %Long 0x40000000 ;HW_GPMI_CTRL0_CLR
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Data.Set 0x00112008 %Long 0x80000000 ;HW_GPMI_CTRL0_CLR
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Data.Set 0x00112004 %Long 0x80000000 ;HW_GPMI_CTRL0_SET
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Data.Set 0x00112008 %Long 0xC0000000 ;HW_GPMI_CTRL0_CLR
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Data.Set 0x00112028 %Long 0x1000 ;HW_GPMI_ECCCTRL_CLR
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Data.Set 0x00112070 %Long 0x00030303 ;HW_GPMI_TIMING0_WR
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Data.Set 0x00112080 %Long 0xFFFF0000 ;HW_GPMI_TIMING1_WR
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//gpmi_nand_pinmux_config
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Data.Set 0x020E02E0 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_RB0
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Data.Set 0x020E06C8 %Long 0xF0E0 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_RB0
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Data.Set 0x020E02E4 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_CS0
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Data.Set 0x020E06CC %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_CS0
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Data.Set 0x020E02E8 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_CS1
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Data.Set 0x020E06D0 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_CS1
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Data.Set 0x020E02EC %Long 0x0 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_CS2
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Data.Set 0x020E06D4 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_CS2
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Data.Set 0x020E02F0 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_CS3
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Data.Set 0x020E06D8 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_CS3
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Data.Set 0x020E02D4 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_CLE
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Data.Set 0x020E06BC %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_CLE
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Data.Set 0x020E02D8 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_ALE
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Data.Set 0x020E06C0 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_ALE
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Data.Set 0x020E02DC %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_WP_B
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Data.Set 0x020E06C4 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_WP_B
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Data.Set 0x020E02FC %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D0
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Data.Set 0x020E06E4 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D0
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Data.Set 0x020E0300 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D1
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Data.Set 0x020E06E8 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D1
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Data.Set 0x020E0304 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D2
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Data.Set 0x020E06EC %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D2
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Data.Set 0x020E0308 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D3
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Data.Set 0x020E06F0 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D3
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Data.Set 0x020E030C %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D4
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Data.Set 0x020E06F4 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D4
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Data.Set 0x020E0310 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D5
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Data.Set 0x020E06F8 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D5
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Data.Set 0x020E0314 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D6
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Data.Set 0x020E06FC %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D6
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Data.Set 0x020E0318 %Long 0x0 ;IOMUXC_SW_MUX_CTL_PAD_NANDF_D7
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Data.Set 0x020E0700 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_NANDF_D7
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Data.Set 0x020E02F4 %Long 0x1 ;IOMUXC_SW_MUX_CTL_PAD_SD4_CMD
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Data.Set 0x020E06DC %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_SD4_CMD
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Data.Set 0x020E02F8 %Long 0x1 ;IOMUXC_SW_MUX_CTL_PAD_SD4_CLK
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Data.Set 0x020E06E0 %Long 0x000100B1 ;IOMUXC_SW_PAD_CTL_PAD_SD4_CLK
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Data.Set 0x020E031C %Long 0x2 ;IOMUXC_SW_MUX_CTL_PAD_SD4_DAT0
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Data.Set 0x020E0704 %Long 0xB1 ;IOMUXC_SW_PAD_CTL_PAD_SD4_DAT0
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Data.Set 0x00112068 %Long 0x1 ;GPMI_CTRL1_CLR
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Data.Set 0x00112064 %Long 0x0 ;GPMI_CTRL1_SET
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Data.Set 0x00112060 %Long 0xC ;GPMI_CTRL1
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Data.Set 0x00110008 %Long 0xC0000000 ;APBH_CTRL0_CLR
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Data.Set 0x00110030 %Long 0x10000 ;APBH_CHANNEL_CTRLn
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Data.Set 0x00110018 %Long 0x1 ;APBH_CTRL1_CLR
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RETURN
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READ_ID_TEST:
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(
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//Write Command
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Data.Set A:&DMABUFF_BASE+0x00 %LE %Long 0x90 ;cmd
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Data.Set A:&DMABUFF_BASE+0x04 %LE %Long 0x00000000 ;next_buff
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Data.Set A:&DMABUFF_BASE+0x08 %LE %Long 0x0001409A ;gdma0.cmd
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Data.Set A:&DMABUFF_BASE+0x0C %LE %Long (&DMABUFF_BASE+0x00) ;gdma0.buff_ptr
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Data.Set A:&DMABUFF_BASE+0x10 %LE %Long 0x00c20001 ;gdma0.pioword[0]
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Data.Set A:&DMABUFF_BASE+0x14 %LE %Long 0x00000000 ;gdma0.pioword[1]
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Data.Set A:&DMABUFF_BASE+0x18 %LE %Long 0x00000000 ;gdma0.pioword[2]
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Data.Set A:&DMABUFF_BASE+0x1C %LE %Long 0x00000000 ;gdma0.pioword[3]
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GOSUB DoDMA
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//Write Address
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Data.Set A:&DMABUFF_BASE+0x00 %LE %Long 0x00000000 ;address
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Data.Set A:&DMABUFF_BASE+0x04 %LE %Long 0x00000000 ;next_buff
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Data.Set A:&DMABUFF_BASE+0x08 %LE %Long 0x0001109A ;gdma0.cmd
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Data.Set A:&DMABUFF_BASE+0x0C %LE %Long (&DMABUFF_BASE+0x00) ;gdma0.buff_ptr
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Data.Set A:&DMABUFF_BASE+0x10 %LE %Long 0x00C40001 ;gdma0.pioword[0]
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Data.Set A:&DMABUFF_BASE+0x14 %LE %Long 0x00000000 ;gdma0.pioword[1]
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GOSUB DoDMA
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//Read Data
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Data.Set A:&DMABUFF_BASE+0x00 %LE %Long 0x00000000
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Data.Set A:&DMABUFF_BASE+0x04 %LE %Long 0x00000000
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Data.Set A:&DMABUFF_BASE+0x08 %LE %Long 0x00041089
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Data.Set A:&DMABUFF_BASE+0x0C %LE %Long (&DMABUFF_BASE+0x00)
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Data.Set A:&DMABUFF_BASE+0x10 %LE %Long 0x01C00004
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Data.Set A:&DMABUFF_BASE+0x14 %LE %Long 0x00C40001
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Data.Set A:&DMABUFF_BASE+0x18 %LE %Long 0x00000000
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GOSUB DoDMA
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&data=Data.Long(A:&DMABUFF_BASE+0x00)
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PRINT "1st 0x" (&data&0x0FF) " (Manufacturer)"
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PRINT "2nd 0x" ((&data>>8.)&0x0FF) " (Device ID)"
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PRINT "3rd 0x" ((&data>>16.)&0x0FF)
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PRINT "4th 0x" ((&data>>24.)&0x0FF)
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RETURN
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)
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DoDMA:
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(
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//reset channel NAND0
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Data.Set A:&APBHDMA_BASE+0x34 %LE %Long 0x00010000 ;(APBH_CHANNEL_CTRLn)
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Data.Set A:&APBHDMA_BASE+0x08 %LE %Long 0x00000001 ;HW_APBH_CTRL0_CLR
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Data.Set A:&APBHDMA_BASE+0x18 %LE %Long 0x00000001 ;HW_APBH_CTRL1_CLR
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//HW_APBH_CH0_NXTCMDAR
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Data.Set A:(&APBHDMA_BASE+0x110) %LE %Long (&DMABUFF_BASE+0x4) ;HW_APBH_CH0_NXTCMDAR
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Data.Set A:(&APBHDMA_BASE+0x140) %LE %Long 0x00000001 ;HW_APBH_CH0_SEMA
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//check status
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//print data.long(A:&APBHDMA_BASE+0x010)
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WAIT 100.ms
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Data.Set A:(&APBHDMA_BASE+0x018) %LE %Long 0x1 ; HW_APBH_CTRL1 (0x1<<chan)
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RETURN
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)
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