114 lines
2.9 KiB
Plaintext
114 lines
2.9 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: ARMADA380 NAND FLASH Programming Script
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; @Description:
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; NAND FLASH(MICRON, MT29F8G08ABACAWP) is connected
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;
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; SRAM: 0x40000000
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; NAND FLASH CONtroller(CPU-specific): 0xD00D0000
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;
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; @Author: jjeong
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; @Chip: 88F6820
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; @Keywords: MICRON MT29F8G08 NAND
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; --------------------------------------------------------------------------------
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; $Id: armada38x-nand8g08.cmm 11733 2023-01-16 08:55:12Z bschroefel $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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//RESet
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SYStem.RESet
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SYStem.CPU 88F6820
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CORE.ASSIGN 1.
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TrOnchip.Set RESET OFF
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SYStem.Up
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Break.direct 0x40000000 /Write
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Go.direct
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WAIT !STATE.RUN()
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Break.RESet
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PER.Set.simple C15:0x1 %Long (Data.Long(C15:0x1)&(~0x1004))
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// mux pin configuration for NAND
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Data.Set SD:0xD0018008 %LE %Long 0x55000000
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Data.Set SD:0xD001800C %LE %Long 0x05050050
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Data.Set SD:0xD0018010 %LE %Long 0x55555555
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Data.Set SD:0xD0018014 %LE %Long 0x5565
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Data.Set SD:0xD0018208 %LE %Long 0x03380001 ;SOC Multiplex register
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//NAND CONtorller CS0 Timing Register
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Data.Set SD:0xD00D0004 %Long 0xFC3FcF7F
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//NAND CONtorller CS1 Timing Register
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Data.Set SD:0xD00D000c %Long 0x00FF83FF
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//NDCR
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Data.Set SD:0xD00D0000 %LE %Long 0x11875000
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Break.RESet
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FLASHFILE.RESet
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//FLASHFILE.CONFIG <<NAND Flash Controller Basement Address>> 0x0 0x0
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FLASHFILE.CONFIG 0xD00D0000 0x0 0x0
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//FLASHFILE.TARGET <<code range>> <<data range>> <<algorithm file>>
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FLASHFILE.TARGET D:0x40000000++0x1fff 0x40002000++0x2fff ~~/demo/arm/flash/byte/nand8g08xs224_armada.bin /KEEP /STACKSIZE 0x400
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FLASHFILE.GETID
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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FLASHFILE.GETONFI
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FLASHFILE.DUMP 0x0 ; Read NAND
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;FLASHFILE.ERASE 0x0--0xFFFFF /EraseBadBlock ; Erase NAND
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;FLASHFILE.LOAD * 0x0 ; Write NAND
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;FLASHFILE.DUMP 0x0 /spare ; Read NAND spare area
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ENDDO
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READ_ID_TEST:
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//NAND CONtorller CS0 Timing Register
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Data.Set SD:0xD00D0004 %Long 0xFC3FcF7F
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//NAND CONtorller CS1 Timing Register
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Data.Set SD:0xD00D000c %Long 0x00FF83FF
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Data.Set D:0xD00D0014 %Long 0xFFFF
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//NDCR
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Data.Set SD:0xD00D0000 %LE %Long 0x1003d000
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//NDCB0, In DMA-disabled mode, the core can write the 12bytes of commands directly to NDCB0
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Data.Set SD:0xD00D0048 %LE %Long 0x00610090 ; cmd NDCB0
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Data.Set SD:0xD00D0048 %LE %Long 0x0 ; addr NDCB1
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Data.Set SD:0xD00D0048 %LE %Long 0x0 ; NDCB2
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WAIT 200.ms
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PRINT Data.Long(D:0xD00D0014)
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//NDDB
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&data=Data.Long(a:0xD00D0040)
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PRINT "1st 0x" (&data&0x0FF) " (Manufacturer)"
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PRINT "2nd 0x" ((&data>>8.)&0x0FF) " (Device ID)"
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PRINT "3rd 0x" ((&data>>16.)&0x0FF)
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PRINT "4th 0x" ((&data>>24.)&0x0FF)
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&data=Data.Long(a:0xD00D0040) ;dummy
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RETURN
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