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Gen4_R-Car_Trace32/2_Trunk/demo/arm/flash/am654x-ospi.cmm
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: OSPI FLASH Program script for the AM654x
; @Description:
; The MT35XU512 (Cypress) is connected to the OSPI_CS0 controller
;
; SRAM:
; OSPI(controller) Base: 0x47040000
; OSPI memory mapped ADDRESS:
;
; Prerequisites: Switch Settings
;
; @Chip:
; @Board:
; @Author: JIM
; @Keywords: Micron
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: am654x-ospi.cmm 11733 2023-01-16 08:55:12Z bschroefel $
PRIVATE &parameters
ENTRY %LINE &parameters
PRIVATE &param_prepareonly &param_dualport
&parameters=STRing.UPpeR("&parameters")
&param_prepareonly=(STRing.SCAN("&parameters","PREPAREONLY",0)!=-1)
&param_dualport=STRing.SCANAndExtract("&parameters","DUALPORT=","1")
LOCAL &pdd
&pdd=OS.PresentDemoDirectory()
; --------------------------------------------------------------------------------
LOCAL &OSPI_BASE &OSPI_MEMORY_BASE
&OSPI_BASE=0x47040000
&OSPI_MEMORY_BASE=0x50000000 ; flash contents memory mapped address
WinCLEAR
//open the master core(CM3) to disable WDOG
; --------------------------------------------------------------------------------
; open an other debugger instance for the Cortex-M3
IF !INTERCOM.PING(CM3)
TargetSystem.NewInstance CM3 /ARCHitecture ARM
; --------------------------------------------------------------------------------
; initialize and start the debugger
InterCom CM3 RESet
InterCom CM3 SYStem.RESet
InterCom CM3 SYStem.CPU AM6548-CM3
IF COMBIPROBE()||UTRACE()
(
InterCom CM3 SYStem.CONFIG.CONNECTOR MIPI34 ; because of converter LA-3782
)
InterCom CM3 SYStem.Option EnReset OFF
InterCom CM3 SYStem.Option DUALPORT ON
InterCom CM3 SYStem.MemAccess DAP
InterCom CM3 Trace.DISable
InterCom CM3 SYStem.CONFIG SLAVE OFF ; CM3 is the master core
; disable a clock gate; you can't connect otherwise
InterCom CM3 SYStem.Mode Prepare
InterCom CM3 Data.Set EDBG:0x400003f0 %Long 0x00190000
InterCom CM3 Data.Set EDBG:0x40000350 %Long 0x00102098
InterCom CM3 SYStem.Up
; --------------------------------------------------------------------------------
; stop DMSC watchdog
InterCom CM3 Data.Set 0x44135120 %Long 0x4658fc21
InterCom CM3 Data.Set 0x44135124 %Long 0x3ac4f102
InterCom CM3 Data.Set 0x44135150 %Long 0x0000000a
; --------------------------------------------------------------------------------
; disable lockstep operation of second Cortex-R5F
InterCom CM3 Data.Set 0x45A50040 %Long 0x00000008 ; MCU_CLUSTER0_CONFIG_MMR
SYStem.CPU AM6548-CR5
CORE.ASSIGN 1.
SYStem.CONFIG SLAVE ON ; CR5 is the slave core
SYStem.Option RB off
SYStem.Option EnReset ON
SYStem.MemAccess DAP ;Enable to use the dualport
SYStem.Up
GOSUB CLK_INIT
GOSUB PIN_MUX
GOSUB OSPI_INIT
GOSUB CACHE_MMU_INIT
;GOSUB READ_ID_TEST
&pdd=OS.PresentDemoDirectory()
Break.RESet
FLASH.RESet
FLASH.Create 1. &OSPI_MEMORY_BASE++0x03FFFFFF 0x20000 TARGET Byte ; for MT35XU512 sector layout
IF ("&param_dualport"!="1")
FLASH.TARGET 0x41C00000 0x41C00000+0x2000 0x1000 ~~/demo/arm/flash/byte/snor_am752x.bin
ELSE
FLASH.TARGET 0x41C00000 E:0x41C00000+0x2000 0x1000 ~~/demo/arm/flash/byte/snor_am752x.bin /DUALPORT
; Re-enable I cache
Data.Set C15:0x1 %long (Data.Long(C15:0x1)|(0x1<<12.)) ; enable I cache
; Read FLASH Manufacturer and Device ID
SILENT.FLASH.SPI.CMD 1. 0x9F /READ 0x4 vm:0x0
IF (Data.Long(vm:0)&0xFFFF)==0x5B34 //S28HS512 id code
(
PRINT "spi flash is S28HS512"
GOSUB SPI_4B_ADDRMODE_ENABLE
SILENT.FLASH.SPI.CMD 1. 0x65 0x00 0x80 0x00 0x04 0x0 /READ 0x1 vm:0 ; Read Any Register to verify CFR3V
IF (Data.Byte(vm:0)&0x08)==0x00 //00: hybrid
(
PRINT "detect the flash is the hybrid mode"
FLASH.Delete 1.
FLASH.Create 1. (&OSPI_MEMORY_BASE+0x00000000)++0x0001FFFF 0x01000 TARGET Byte ; 32 x 4K
FLASH.Create 1. (&OSPI_MEMORY_BASE+0x00020000)++0x0001FFFF 0x20000 TARGET Byte ; 1 x 128k
FLASH.Create 1. (&OSPI_MEMORY_BASE+0x00040000)++(0x03FFFFFF-0x40000) 0x40000 TARGET Byte ; rest x 256k
)
ELSE // uniform mode
(
FLASH.Delete 1.
FLASH.Create 1. &OSPI_MEMORY_BASE++0x03FFFFFF 0x40000 TARGET Byte
)
)
; Flash script ends here if called with parameter PREPAREONLY
IF &param_prepareonly
ENDDO PREPAREDONE
; --------------------------------------------------------------------------------
; Flash programming example
DIALOG.YESNO "Program flash memory?"
LOCAL &progflash
ENTRY &progflash
IF &progflash
(
FLASH.ReProgram.ALL
Data.LOAD.auto *
;Data.LOAD.Binary * &OSPI_MEMORY_BASE
FLASH.ReProgram.off
; Reset device
PRINT "Please power-cycle the board after flash program is complete"
)
ENDDO
READ_ID_TEST:
(
; In case of errors you can try to read the ID via:
; GOSUB READ_ID_TEST
;
; Check the output of the AREA window.
; Expected output ID:
; 0x2C
; 0x5A (or 0x5B)
; 0x1A
; 0x10
; 0x41
; 0x00 (or 0x04)
; ... (Unique ID code)
LOCAL &rdata
&CTRLREG=&OSPI_BASE+0x090
&RXDATA0=&OSPI_BASE+0x0A0
&RXDATA1=&OSPI_BASE+0x0A4
&cmd=0x9f<<24. //cmd
&rd=0x1<<23. //rd data enable
&rd_num=0x7<<20. //7+1==8bytes
&cmd_exec=0x1 //cmd execution
Data.Set EZAXI:&CTRLREG %LE %Long (&cmd|&cmd_exec|&rd_num|&rd) ;write cmd + write data
WAIT 100.ms
&rdata=Data.Long(EZAXI:&RXDATA0) ;read lower , 8byte fifo
PRINT "1st 0x" (&rdata)&0xFF " (Manufacturer)" ; //RXFIFO0
PRINT "2nd 0x" (&rdata>>8.)&0xFF " (Device ID)"
PRINT "3rd 0x" (&rdata>>16.)&0xFF
PRINT "4th 0x" (&rdata>>24.)&0xFF
&rdata=Data.Long(EZAXI:&RXDATA1) ;read upper , 8byte fifo
PRINT "5th 0x" (&rdata)&0xFF
PRINT "6th 0x" (&rdata>>8.)&0xFF
PRINT "7th 0x" (&rdata>>16.)&0xFF
PRINT "8th 0x" (&rdata>>24.)&0xFF
RETURN
)
ENDDO
OSPI_INIT:
(
Data.Set EZAXI:&OSPI_BASE+0x0 %LE %Long 0x0
Data.Set EZAXI:&OSPI_BASE+0x4 %LE %Long 0x00000013 ; 4B Addr Read
Data.Set EZAXI:&OSPI_BASE+0x8 %LE %Long 0x00000012 ; 4B Addr Write
Data.Set EZAXI:&OSPI_BASE+0x0 %LE %Long 0x80800000
Data.Set EZAXI:&OSPI_BASE+0x14 %LE %Long 0x1003; 4B Address mode, 3B Addr: 0x1002
Data.Set EZAXI:&OSPI_BASE+0x10 %LE %Long 0x21
Data.Set EZAXI:&OSPI_BASE+0x1C %LE %Long 0xFFFFFFFF
Data.Set EZAXI:&OSPI_BASE+0xC %LE %Long (0xFF<<16.)|(0xFF<<8.) ; !!!!! OSPI_DEV_DELAY_REG because of writing !!!!!
Data.Set EZAXI:&OSPI_BASE+0x0 %LE %Long 0x00000081|(0x3<<19.)|(0xE<<10.) ; 0x3==baudrate_div8, enable usage of OSPI_CS0
Data.Set EZAXI:&OSPI_BASE+0x1C %LE %Long 0x04000000 ;ospi_setdirectcutoff, end of the flash address
RETURN
)
PIN_MUX:
(
;MMR_unlock
Data.Set 0x4301D008 %Long 0x68EF3490 ;CTRLMMR_WKUP_LOCK7_KICK0
Data.Set 0x4301D00C %Long 0xD172BC5A
Data.Set 0x4301C000 %Long 0x00040000 ;CTRLMMR_WKUP_PADCONFIG0
Data.Set 0x4301C004 %Long 0x00040000
Data.Set 0x4301C008 %Long 0x00040000
Data.Set 0x4301C00C %Long 0x00040000
Data.Set 0x4301C010 %Long 0x00040000
Data.Set 0x4301C014 %Long 0x00040000
Data.Set 0x4301C018 %Long 0x00040000
Data.Set 0x4301C01C %Long 0x00040000
Data.Set 0x4301C020 %Long 0x00040000
Data.Set 0x4301C024 %Long 0x00040000
Data.Set 0x4301C028 %Long 0x00040000
Data.Set 0x4301C02C %Long 0x00040000
Data.Set 0x4301C030 %Long 0x00040000
Data.Set 0x4301C038 %Long 0x00040001
Data.Set 0x4301C03C %Long 0x00040001
RETURN
)
CLK_INIT:
(
Data.Set 0x40F09008 %Long 0x68EF3490 ; CTRLMMR_MCU_LOCK2_KICK0
Data.Set 0x40F0900C %Long 0xD172BC5A
Data.Set 0x40d01010 %Long 0x68EF3490 ;MCU_PLL1_KICK0
Data.Set 0x40d01014 %Long 0x68EF3490 ;MCU_PLL1_KICK1
//freq == 166
Data.Set 0x40F08030 %Long 0x1 ;CTRLMMR_MCU_OSPI0_CLKSEL, 1h - CPSWHSDIV_CLKOUT4
Data.Set 0x40d01120 %Long 0x05000000 ;MCU_PLL1_HSDIV_CLKDIV, High Speed Divider Clock Divider Register
Data.Set 0x40d01124 %Long 0x8 ;MCU_PLL1_HSDIV_CTRL
WAIT 100.ms
Data.Set 0x40d01124 %Long 0x80000008
RETURN
)
CACHE_MMU_INIT:
(
PRIVATE &i &tmpReg
; Enable MPU and disable I and D caches
&tmpReg=Data.Long(C15:0x1)
&tmpReg=&tmpReg|0x1 ; enable MPU
&tmpReg=(&tmpReg&(~(0x1<<2.))) ; disable D cache
&tmpReg=(&tmpReg&(~(0x1<<12.))) ; disable I cache
Data.Set C15:0x1 %long &tmpReg
; Configure small region setup for flash programming
PER.Set.SaveIndex C15:0x026 %Long 0x0 C15:0x016 %Long 0x00000000 ; set default
PER.Set.SaveIndex C15:0x026 %Long 0x0 C15:0x216 %Long 0x0000003F
PER.Set.SaveIndex C15:0x026 %Long 0x0 C15:0x416 %Long 0x00001310
PER.Set.SaveIndex C15:0x026 %Long 0x1 C15:0x016 %Long 0x50000000 ; setup flash window
PER.Set.SaveIndex C15:0x026 %Long 0x1 C15:0x216 %Long 0x00000035
PER.Set.SaveIndex C15:0x026 %Long 0x1 C15:0x416 %Long 0x00001301
PER.Set.SaveIndex C15:0x026 %Long 0x2 C15:0x016 %Long 0x41C00000 ; setup buffer space
PER.Set.SaveIndex C15:0x026 %Long 0x2 C15:0x216 %Long 0x00000027
PER.Set.SaveIndex C15:0x026 %Long 0x2 C15:0x416 %Long 0x0000030C
; Reset all other MPU regions
&i=3.
while &i<16.
(
PER.Set.SaveIndex C15:0x026 %Long &i C15:0x016 %Long 0x0
PER.Set.SaveIndex C15:0x026 %Long &i C15:0x216 %Long 0x0
PER.Set.SaveIndex C15:0x026 %Long &i C15:0x416 %Long 0x0
&i=&i+1.
)
RETURN
)
// detect the flash address mode by the internal flash register (0x0080_0003)
// CR2V : should come 0x08(3B) or 0x88(4B)
SPI_4B_ADDRMODE_ENABLE:
(
SILENT.FLASH.SPI.CMD 1. 0x06
SILENT.FLASH.SPI.CMD 1. 0x71 0x80 0x00 0x03 0x88 ; write 0x88 to CR2V , switch 3B->4B address mode
Data.Set VM:0x0--0xFF %Long 0x0
SILENT.FLASH.SPI.CMD 1. 0x65 0x00 0x80 0x00 0x03 0x0 /READ 0x4 vm:0x0 ;4Bytes Address mode
&regData=Data.Byte(vm:0x0)
IF &regData!=0x88
(
PRinT "We expect 0x08 latency(dummy) cycles but we got the dummy cycle 0x" %Hex &regData
ENDDO
)
RETURN
)
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