104 lines
3.3 KiB
Plaintext
104 lines
3.3 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: eMMC FLASH Programming Script for AM3359 (BeagleBone Black)
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; @Description:
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; eMMC FLASH(Micron, MTFC4GLDEA, 4GB) is connected
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;
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; Internal SRAM: 0x40300000
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;
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; SD/MMC Controller Register : 0x481D8000
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;
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; @Author: jjeong
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; @Chip: AM3359
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; @Keywords: flash eMMC
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; --------------------------------------------------------------------------------
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; $Id: am3359-emmc.cmm 12049 2023-04-20 12:32:16Z bschroefel $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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SYStem.CPU AM3359
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SYStem.Up
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//Disable cache & mmu
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PER.Set.simple C15:0x1 %Long 0xc50078
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//Disable watchdog
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Data.Set A:0x44E35048 %Long 0xAAAA
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Data.Set A:0x44E35048 %Long 0x5555
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//Enable OCM memory
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B::Data.Set A:0x44E0002C %Long 0x2
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//Pin mux configuration
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Data.Set A:0x44E10880 %Long 0x2A ; conf_gpmc_csn1, GPMC_CSN1/GPMC_CLK/MMC1_CLK
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Data.Set A:0x44E10884 %Long 0x32 ; conf_gpmc_csn2, GPMC_CSN2/GPMC_BE1N/MMC1_CMD
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Data.Set A:0x44E10800 %Long 0x31 ; GPMC_AD0/MMC1_DAT0
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Data.Set A:0x44E10804 %Long 0x31 ; GPMC_AD1/MMC1_DAT1
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Data.Set A:0x44E10808 %Long 0x31 ; GPMC_AD2/MMC1_DAT2
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Data.Set A:0x44E1080C %Long 0x31 ; GPMC_AD3/MMC1_DAT3
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// CM_PER_MMC1_CLKCTRL , This register manages the MMC1 clocks.
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Data.Set A:0x44E000F4 %Long 0x00030002
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// pll configuration if you want to program fast
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;Data.Set A:<addr> %Long <data>
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//MMC controller configuration
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&MMC_BASE=0x481D8000
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Data.Set A:(&MMC_BASE+0x0240) %LE %Long 0x2e10080
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Data.Set A:(&MMC_BASE+0x0110) %LE %Long 0x2017 ; SD_SYSCONFIG
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Data.Set A:(&MMC_BASE+0x012C) %LE %Long 0x0600
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Data.Set A:(&MMC_BASE+0x0204) %LE %Long 0x0200
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Data.Set A:(&MMC_BASE+0x0228) %LE %Long 0x0c10 ; select power level 3.0v
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Data.Set A:(&MMC_BASE+0x0228) %LE %Long 0x0d10 ; power on for SD/MMC card
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Data.Set A:(&MMC_BASE+0x0234) %LE %Long 0x307f0033
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Data.Set A:(&MMC_BASE+0x022C) %LE %Long 0xE6807
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FLASHFILE.RESet
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//FLASHFILE.CONFIG <MMC Controller Base,(MMCHS_BLK-0x4)> 0x0 0x0
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FLASHFILE.CONFIG (&MMC_BASE+0x200) 0x0 0x0
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//FLASHFILE.target <Code_range> <Data_range> <Algorithm file>
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FLASHFILE.TARGET 0x40300000++0x1FFF 0x40302000++0x1FFF ~~/demo/arm/flash/byte/emmc_omap.bin /KEEP
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// the mmc clock has to be < 400khz to pass the MMC init state
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PER.Set.Field A:(&MMC_BASE+0x022C) %Long 0xFFC0 0x1a0 ; <400khz [15:6]=0x1a0
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//Get FLASH info
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FLASHFILE.GETID
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// MMC mode is switched to the transfer state (tran) after the FLASHFILE.GETID command
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// MMC allowes to access the higher clk speed on the transfer state
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PER.Set.Field A:(&MMC_BASE+0x022C) %Long 0xFFC0 0x2 ; change to the maximum clk [15:6]=0x2
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//Get EXTended CSD registers
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FLASHFILE.GETEXTCSD
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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//When you access to the other partition on the flash
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; FLASHFILE.SETEXTCSD 179. 0x00 ; access: partition null, no boot, access: no boot partition
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; FLASHFILE.SETEXTCSD 179. 0x48 ; access: partition null
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; FLASHFILE.SETEXTCSD 179. 0x49 ; access: partition boot 1
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; FLASHFILE.SETEXTCSD 179. 0x4A ; access: partition boot 2
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//Dump FLASH
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FLASHFILE.DUMP 0x0
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//Erase FLASH
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;FLASHFILE.ERASE 0x0--0xFFFFFF
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//Write FLASH
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;FLASHFILE.LOAD * 0x0
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//Verify FLASH
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;FLASHFILE.LOAD * 0x0 /ComPare
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ENDDO
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