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Gen4_R-Car_Trace32/2_Trunk/perstm32l010.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: STM32L010 On-Chip Peripherals
; @Props: Released
; @Author: DAB, NEJ
; @Changelog: 2022-03-25 DAB
; 2024-03-21 NEJ
; @Manufacturer: STM - ST Microelectronics N.V.
; @Doc: Generated (TRACE32, build: 167751.), based on:
; STM32L0x0.svd (Ver. 1.3)
; @Core: Cortex-M0+
; @Chip: STM32L010C6, STM32L010F4, STM32L010K4, STM32L010K8,
; STM32L010R8, STM32L010RB
; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perstm32l010.per 17686 2024-03-27 10:50:22Z kwisniewski $
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree.close "Core Registers (Cortex-M0+)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 0x8
if (CORENAME()=="CORTEXM1")
group.long 0x10++0x0b
line.long 0x00 "STCSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
textline " "
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
line.long 0x04 "STRVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
line.long 0x08 "STCVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
else
group.long 0x10++0x0b
line.long 0x00 "STCSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
textline " "
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
line.long 0x04 "STRVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
line.long 0x08 "STCVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
endif
if (CORENAME()=="CORTEXM1")
rgroup.long 0x1c++0x03
line.long 0x00 "STCR,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
textline " "
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
else
rgroup.long 0x1c++0x03
line.long 0x00 "STCR,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
textline " "
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
endif
rgroup.long 0xd00++0x03
line.long 0x00 "CPUID,CPU ID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
textline " "
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
group.long 0xd04++0x03
line.long 0x00 "ICSR,Interrupt Control State Register"
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
textline " "
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
textline " "
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
textline " "
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
if (CORENAME()=="CORTEXM0+")
group.long 0xd08++0x03
line.long 0x00 "VTOR,Vector Table Offset Register"
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
else
textline " "
endif
group.long 0xd0c++0x03
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
textline " "
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
group.long 0xd10++0x03
line.long 0x00 "SCR,System Control Register"
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
rgroup.long 0xd14++0x03
line.long 0x00 "CCR,Configuration and Control Register"
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
group.long 0xd1c++0x0b
line.long 0x00 "SHPR2,System Handler Priority Register 2"
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
line.long 0x04 "SHPR3,System Handler Priority Register 3"
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
line.long 0x08 "SHCSR,System Handler Control and State Register"
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
if (CORENAME()=="CORTEXM0+")
hgroup.long 0x08++0x03
hide.long 0x00 "ACTLR,Auxiliary Control Register"
else
textline " "
endif
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
textline " "
textline " "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
textline " "
textline " "
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
tree.end
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
tree.end
width 6.
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x00 "INT0,Interrupt Priority Register"
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
line.long 0x04 "INT1,Interrupt Priority Register"
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
line.long 0x08 "INT2,Interrupt Priority Register"
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
line.long 0x0C "INT3,Interrupt Priority Register"
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
line.long 0x10 "INT4,Interrupt Priority Register"
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
line.long 0x14 "INT5,Interrupt Priority Register"
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
line.long 0x18 "INT6,Interrupt Priority Register"
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
line.long 0x1C "INT7,Interrupt Priority Register"
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
tree.end
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 0xA
group.long 0xD30++0x03
line.long 0x00 "DFSR,Data Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
textline " "
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
textline " "
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
if (CORENAME()=="CORTEXM1")
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
textline " "
textfld " "
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
else
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
textline " "
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
endif
else
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
textline " "
textfld " "
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
else
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
textline " "
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
endif
endif
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Selector Register"
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
group.long 0xDF8++0x07
line.long 0x00 "DCRDR,Debug Core Register Data Register"
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
textline " "
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Breakpoint Unit (BPU)"
sif COMPonent.AVAILABLE("BPU")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
width 8.
group.long 0x00++0x03
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
group.long 0xC++0x03
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
else
newline
textline "BPU component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 14.
rgroup.long 0x00++0x03
line.long 0x00 "DW_CTRL,DW Control Register "
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x1c++0x03
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
group.long 0x20++0x0b
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
line.long 0x04 "DW_MASK0,DW Mask Register 0"
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
group.long 0x30++0x0b
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
tree "ADC (Analog-to-Digital Converter)"
base ad:0x40012400
group.long 0x0++0x17
line.long 0x0 "ISR,interrupt and status register"
bitfld.long 0x0 11. "EOCAL,End Of Calibration flag" "0,1"
bitfld.long 0x0 7. "AWD,Analog watchdog flag" "0,1"
bitfld.long 0x0 4. "OVR,ADC overrun" "0,1"
bitfld.long 0x0 3. "EOS,End of sequence flag" "0,1"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0,1"
bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0,1"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0,1"
line.long 0x4 "IER,interrupt enable register"
bitfld.long 0x4 11. "EOCALIE,End of calibration interrupt enable" "0,1"
bitfld.long 0x4 7. "AWDIE,Analog watchdog interrupt enable" "0,1"
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0,1"
bitfld.long 0x4 3. "EOSIE,End of conversion sequence interrupt enable" "0,1"
bitfld.long 0x4 2. "EOCIE,End of conversion interrupt enable" "0,1"
bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable" "0,1"
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0,1"
line.long 0x8 "CR,control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0,1"
bitfld.long 0x8 28. "ADVREGEN,ADC Voltage Regulator Enable" "0,1"
bitfld.long 0x8 4. "ADSTP,ADC stop conversion command" "0,1"
bitfld.long 0x8 2. "ADSTART,ADC start conversion command" "0,1"
bitfld.long 0x8 1. "ADDIS,ADC disable command" "0,1"
bitfld.long 0x8 0. "ADEN,ADC enable command" "0,1"
line.long 0xC "CFGR1,configuration register 1"
hexmask.long.byte 0xC 26.--30. 1. "AWDCH,Analog watchdog channel selection"
bitfld.long 0xC 23. "AWDEN,Analog watchdog enable" "0,1"
bitfld.long 0xC 22. "AWDSGL,Enable the watchdog on a single channel or on all channels" "0,1"
bitfld.long 0xC 16. "DISCEN,Discontinuous mode" "0,1"
bitfld.long 0xC 15. "AUTOFF,Auto-off mode" "0,1"
bitfld.long 0xC 14. "AUTDLY,Auto-delayed conversion mode" "0,1"
bitfld.long 0xC 13. "CONT,Single / continuous conversion mode" "0,1"
bitfld.long 0xC 12. "OVRMOD,Overrun management mode" "0,1"
bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection" "0,1,2,3"
bitfld.long 0xC 6.--8. "EXTSEL,External trigger selection" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 5. "ALIGN,Data alignment" "0,1"
bitfld.long 0xC 3.--4. "RES,Data resolution" "0,1,2,3"
bitfld.long 0xC 2. "SCANDIR,Scan sequence direction" "0,1"
bitfld.long 0xC 1. "DMACFG,Direct memery access configuration" "0,1"
bitfld.long 0xC 0. "DMAEN,Direct memory access enable" "0,1"
line.long 0x10 "CFGR2,configuration register 2"
bitfld.long 0x10 30.--31. "CKMODE,ADC clock mode" "0,1,2,3"
bitfld.long 0x10 9. "TOVS,Triggered Oversampling" "0,1"
hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
bitfld.long 0x10 2.--4. "OVSR,Oversampling ratio" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0. "OVSE,Oversampler Enable" "0,1"
line.long 0x14 "SMPR,sampling time register"
bitfld.long 0x14 0.--2. "SMPR,Sampling time selection" "0,1,2,3,4,5,6,7"
group.long 0x20++0x3
line.long 0x0 "TR,watchdog threshold register"
hexmask.long.word 0x0 16.--27. 1. "HT,Analog watchdog higher threshold"
hexmask.long.word 0x0 0.--11. 1. "LT,Analog watchdog lower threshold"
group.long 0x28++0x3
line.long 0x0 "CHSELR,channel selection register"
bitfld.long 0x0 18. "CHSEL18,Channel-x selection" "0,1"
bitfld.long 0x0 17. "CHSEL17,Channel-x selection" "0,1"
bitfld.long 0x0 16. "CHSEL16,Channel-x selection" "0,1"
bitfld.long 0x0 15. "CHSEL15,Channel-x selection" "0,1"
bitfld.long 0x0 14. "CHSEL14,Channel-x selection" "0,1"
bitfld.long 0x0 13. "CHSEL13,Channel-x selection" "0,1"
bitfld.long 0x0 12. "CHSEL12,Channel-x selection" "0,1"
bitfld.long 0x0 11. "CHSEL11,Channel-x selection" "0,1"
bitfld.long 0x0 10. "CHSEL10,Channel-x selection" "0,1"
bitfld.long 0x0 9. "CHSEL9,Channel-x selection" "0,1"
newline
bitfld.long 0x0 8. "CHSEL8,Channel-x selection" "0,1"
bitfld.long 0x0 7. "CHSEL7,Channel-x selection" "0,1"
bitfld.long 0x0 6. "CHSEL6,Channel-x selection" "0,1"
bitfld.long 0x0 5. "CHSEL5,Channel-x selection" "0,1"
bitfld.long 0x0 4. "CHSEL4,Channel-x selection" "0,1"
bitfld.long 0x0 3. "CHSEL3,Channel-x selection" "0,1"
bitfld.long 0x0 2. "CHSEL2,Channel-x selection" "0,1"
bitfld.long 0x0 1. "CHSEL1,Channel-x selection" "0,1"
bitfld.long 0x0 0. "CHSEL0,Channel-x selection" "0,1"
rgroup.long 0x40++0x3
line.long 0x0 "DR,data register"
hexmask.long.word 0x0 0.--15. 1. "DATA,Converted data"
group.long 0xB4++0x3
line.long 0x0 "CALFACT,ADC Calibration factor"
hexmask.long.byte 0x0 0.--6. 1. "CALFACT,Calibration factor"
group.long 0x308++0x3
line.long 0x0 "CCR,ADC common configuration register"
bitfld.long 0x0 25. "LFMEN,Low Frequency Mode enable" "0,1"
bitfld.long 0x0 24. "VLCDEN,VLCD enable" "0,1"
bitfld.long 0x0 23. "TSEN,Temperature sensor enable" "0,1"
bitfld.long 0x0 22. "VREFEN,VREFINT enable" "0,1"
hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler"
tree.end
tree "CRC (Cyclic Redundancy Check Calculation Unit)"
base ad:0x40023000
group.long 0x0++0xB
line.long 0x0 "DR,Data register"
hexmask.long 0x0 0.--31. 1. "DR,Data register bits"
line.long 0x4 "IDR,Independent data register"
hexmask.long.byte 0x4 0.--7. 1. "IDR,General-purpose 8-bit data register bits"
line.long 0x8 "CR,Control register"
bitfld.long 0x8 7. "REV_OUT,Reverse output data" "0,1"
bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "0,1,2,3"
bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "0,1,2,3"
bitfld.long 0x8 0. "RESET,RESET bit" "0,1"
group.long 0x10++0x7
line.long 0x0 "INIT,Initial CRC value"
hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value"
line.long 0x4 "POL,polynomial"
hexmask.long 0x4 0.--31. 1. "Polynomialcoefficients,Programmable polynomial"
tree.end
tree "DBGMCU (Debug Support)"
base ad:0x40015800
rgroup.long 0x0++0x3
line.long 0x0 "IDCODE,MCU Device ID Code Register"
hexmask.long.word 0x0 16.--31. 1. "REV_ID,Revision Identifier"
hexmask.long.word 0x0 0.--11. 1. "DEV_ID,Device Identifier"
group.long 0x4++0xB
line.long 0x0 "CR,Debug MCU Configuration Register"
bitfld.long 0x0 2. "DBG_STANDBY,Debug Standby Mode" "0,1"
bitfld.long 0x0 1. "DBG_STOP,Debug Stop Mode" "0,1"
bitfld.long 0x0 0. "DBG_SLEEP,Debug Sleep Mode" "0,1"
line.long 0x4 "APB1_FZ,APB Low Freeze Register"
bitfld.long 0x4 31. "DBG_LPTIMER_STOP,LPTIM1 counter stopped when core is halted" "0,1"
bitfld.long 0x4 22. "DBG_I2C2_STOP,I2C2 SMBUS timeout mode stopped when core is halted" "0,1"
bitfld.long 0x4 21. "DBG_I2C1_STOP,I2C1 SMBUS timeout mode stopped when core is halted" "0,1"
bitfld.long 0x4 12. "DBG_IWDG_STOP,Debug Independent Wachdog stopped when Core is halted" "0,1"
bitfld.long 0x4 11. "DBG_WWDG_STOP,Debug Window Wachdog stopped when Core is halted" "0,1"
bitfld.long 0x4 10. "DBG_RTC_STOP,Debug RTC stopped when Core is halted" "0,1"
newline
bitfld.long 0x4 4. "DBG_TIMER6_STOP,Debug Timer 6 stopped when Core is halted" "0,1"
bitfld.long 0x4 0. "DBG_TIMER2_STOP,Debug Timer 2 stopped when Core is halted" "0,1"
line.long 0x8 "APB2_FZ,APB High Freeze Register"
bitfld.long 0x8 6. "DBG_TIMER22_STO,Debug Timer 22 stopped when Core is halted" "0,1"
bitfld.long 0x8 2. "DBG_TIMER21_STOP,Debug Timer 21 stopped when Core is halted" "0,1"
tree.end
tree "DMA (Direct Memory Access)"
base ad:0x40020000
rgroup.long 0x0++0x3
line.long 0x0 "ISR,interrupt status register"
bitfld.long 0x0 27. "TEIF7,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 26. "HTIF7,Channel x half transfer flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 25. "TCIF7,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 24. "GIF7,Channel x global interrupt flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 23. "TEIF6,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 22. "HTIF6,Channel x half transfer flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 21. "TCIF6,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 20. "GIF6,Channel x global interrupt flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 19. "TEIF5,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 18. "HTIF5,Channel x half transfer flag (x = 1 ..7)" "0,1"
newline
bitfld.long 0x0 17. "TCIF5,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 16. "GIF5,Channel x global interrupt flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 15. "TEIF4,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 14. "HTIF4,Channel x half transfer flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 13. "TCIF4,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 12. "GIF4,Channel x global interrupt flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 11. "TEIF3,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 10. "HTIF3,Channel x half transfer flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 9. "TCIF3,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 8. "GIF3,Channel x global interrupt flag (x = 1 ..7)" "0,1"
newline
bitfld.long 0x0 7. "TEIF2,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 6. "HTIF2,Channel x half transfer flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 5. "TCIF2,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 4. "GIF2,Channel x global interrupt flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 3. "TEIF1,Channel x transfer error flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 2. "HTIF1,Channel x half transfer flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 1. "TCIF1,Channel x transfer complete flag (x = 1 ..7)" "0,1"
bitfld.long 0x0 0. "GIF1,Channel x global interrupt flag (x = 1 ..7)" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "IFCR,interrupt flag clear register"
bitfld.long 0x0 27. "CTEIF7,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 26. "CHTIF7,Channel x half transfer clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 25. "CTCIF7,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 24. "CGIF7,Channel x global interrupt clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 23. "CTEIF6,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 22. "CHTIF6,Channel x half transfer clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 21. "CTCIF6,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 20. "CGIF6,Channel x global interrupt clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 19. "CTEIF5,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 18. "CHTIF5,Channel x half transfer clear (x = 1 ..7)" "0,1"
newline
bitfld.long 0x0 17. "CTCIF5,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 16. "CGIF5,Channel x global interrupt clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 15. "CTEIF4,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 14. "CHTIF4,Channel x half transfer clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 13. "CTCIF4,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 12. "CGIF4,Channel x global interrupt clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 11. "CTEIF3,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 10. "CHTIF3,Channel x half transfer clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 9. "CTCIF3,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 8. "CGIF3,Channel x global interrupt clear (x = 1 ..7)" "0,1"
newline
bitfld.long 0x0 7. "CTEIF2,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 6. "CHTIF2,Channel x half transfer clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 5. "CTCIF2,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 4. "CGIF2,Channel x global interrupt clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 3. "CTEIF1,Channel x transfer error clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 2. "CHTIF1,Channel x half transfer clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 1. "CTCIF1,Channel x transfer complete clear (x = 1 ..7)" "0,1"
bitfld.long 0x0 0. "CGIF1,Channel x global interrupt clear (x = 1 ..7)" "0,1"
group.long 0x8++0xF
line.long 0x0 "CCR1,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR1,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR1,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR1,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0x1C++0xF
line.long 0x0 "CCR2,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR2,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR2,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR2,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0x30++0xF
line.long 0x0 "CCR3,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR3,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR3,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR3,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0x44++0xF
line.long 0x0 "CCR4,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR4,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR4,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR4,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0x58++0xF
line.long 0x0 "CCR5,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR5,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR5,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR5,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0x6C++0xF
line.long 0x0 "CCR6,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR6,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR6,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR6,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0x80++0xF
line.long 0x0 "CCR7,channel x configuration register"
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
bitfld.long 0x0 3. "TEIE,Transfer error interrupt enable" "0,1"
bitfld.long 0x0 2. "HTIE,Half transfer interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt enable" "0,1"
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
line.long 0x4 "CNDTR7,channel x number of data register"
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
line.long 0x8 "CPAR7,channel x peripheral address register"
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
line.long 0xC "CMAR7,channel x memory address register"
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
group.long 0xA8++0x3
line.long 0x0 "CSELR,channel selection register"
hexmask.long.byte 0x0 24.--27. 1. "C7S,DMA channel 7 selection"
hexmask.long.byte 0x0 20.--23. 1. "C6S,DMA channel 6 selection"
hexmask.long.byte 0x0 16.--19. 1. "C5S,DMA channel 5 selection"
hexmask.long.byte 0x0 12.--15. 1. "C4S,DMA channel 4 selection"
hexmask.long.byte 0x0 8.--11. 1. "C3S,DMA channel 3 selection"
hexmask.long.byte 0x0 4.--7. 1. "C2S,DMA channel 2 selection"
hexmask.long.byte 0x0 0.--3. 1. "C1S,DMA channel 1 selection"
tree.end
tree "EXTI (External Interrupt/Event Controller)"
base ad:0x40010400
group.long 0x0++0x17
line.long 0x0 "IMR,Interrupt mask register (EXTI_IMR)"
bitfld.long 0x0 29. "IM29,Interrupt Mask on line 27" "0,1"
bitfld.long 0x0 28. "IM28,Interrupt Mask on line 27" "0,1"
bitfld.long 0x0 26. "IM26,Interrupt Mask on line 27" "0,1"
bitfld.long 0x0 25. "IM25,Interrupt Mask on line 25" "0,1"
bitfld.long 0x0 24. "IM24,Interrupt Mask on line 24" "0,1"
bitfld.long 0x0 23. "IM23,Interrupt Mask on line 23" "0,1"
bitfld.long 0x0 22. "IM22,Interrupt Mask on line 22" "0,1"
bitfld.long 0x0 21. "IM21,Interrupt Mask on line 21" "0,1"
bitfld.long 0x0 20. "IM20,Interrupt Mask on line 20" "0,1"
bitfld.long 0x0 19. "IM19,Interrupt Mask on line 19" "0,1"
bitfld.long 0x0 18. "IM18,Interrupt Mask on line 18" "0,1"
bitfld.long 0x0 17. "IM17,Interrupt Mask on line 17" "0,1"
bitfld.long 0x0 16. "IM16,Interrupt Mask on line 16" "0,1"
bitfld.long 0x0 15. "IM15,Interrupt Mask on line 15" "0,1"
bitfld.long 0x0 14. "IM14,Interrupt Mask on line 14" "0,1"
newline
bitfld.long 0x0 13. "IM13,Interrupt Mask on line 13" "0,1"
bitfld.long 0x0 12. "IM12,Interrupt Mask on line 12" "0,1"
bitfld.long 0x0 11. "IM11,Interrupt Mask on line 11" "0,1"
bitfld.long 0x0 10. "IM10,Interrupt Mask on line 10" "0,1"
bitfld.long 0x0 9. "IM9,Interrupt Mask on line 9" "0,1"
bitfld.long 0x0 8. "IM8,Interrupt Mask on line 8" "0,1"
bitfld.long 0x0 7. "IM7,Interrupt Mask on line 7" "0,1"
bitfld.long 0x0 6. "IM6,Interrupt Mask on line 6" "0,1"
bitfld.long 0x0 5. "IM5,Interrupt Mask on line 5" "0,1"
bitfld.long 0x0 4. "IM4,Interrupt Mask on line 4" "0,1"
bitfld.long 0x0 3. "IM3,Interrupt Mask on line 3" "0,1"
bitfld.long 0x0 2. "IM2,Interrupt Mask on line 2" "0,1"
bitfld.long 0x0 1. "IM1,Interrupt Mask on line 1" "0,1"
bitfld.long 0x0 0. "IM0,Interrupt Mask on line 0" "0,1"
line.long 0x4 "EMR,Event mask register (EXTI_EMR)"
bitfld.long 0x4 29. "EM29,Event Mask on line 29" "0,1"
bitfld.long 0x4 28. "EM28,Event Mask on line 28" "0,1"
bitfld.long 0x4 26. "EM26,Event Mask on line 26" "0,1"
bitfld.long 0x4 25. "EM25,Event Mask on line 25" "0,1"
bitfld.long 0x4 24. "EM24,Event Mask on line 24" "0,1"
bitfld.long 0x4 23. "EM23,Event Mask on line 23" "0,1"
bitfld.long 0x4 22. "EM22,Event Mask on line 22" "0,1"
bitfld.long 0x4 21. "EM21,Event Mask on line 21" "0,1"
bitfld.long 0x4 20. "EM20,Event Mask on line 20" "0,1"
bitfld.long 0x4 19. "EM19,Event Mask on line 19" "0,1"
bitfld.long 0x4 18. "EM18,Event Mask on line 18" "0,1"
bitfld.long 0x4 17. "EM17,Event Mask on line 17" "0,1"
bitfld.long 0x4 16. "EM16,Event Mask on line 16" "0,1"
bitfld.long 0x4 15. "EM15,Event Mask on line 15" "0,1"
bitfld.long 0x4 14. "EM14,Event Mask on line 14" "0,1"
newline
bitfld.long 0x4 13. "EM13,Event Mask on line 13" "0,1"
bitfld.long 0x4 12. "EM12,Event Mask on line 12" "0,1"
bitfld.long 0x4 11. "EM11,Event Mask on line 11" "0,1"
bitfld.long 0x4 10. "EM10,Event Mask on line 10" "0,1"
bitfld.long 0x4 9. "EM9,Event Mask on line 9" "0,1"
bitfld.long 0x4 8. "EM8,Event Mask on line 8" "0,1"
bitfld.long 0x4 7. "EM7,Event Mask on line 7" "0,1"
bitfld.long 0x4 6. "EM6,Event Mask on line 6" "0,1"
bitfld.long 0x4 5. "EM5,Event Mask on line 5" "0,1"
bitfld.long 0x4 4. "EM4,Event Mask on line 4" "0,1"
bitfld.long 0x4 3. "EM3,Event Mask on line 3" "0,1"
bitfld.long 0x4 2. "EM2,Event Mask on line 2" "0,1"
bitfld.long 0x4 1. "EM1,Event Mask on line 1" "0,1"
bitfld.long 0x4 0. "EM0,Event Mask on line 0" "0,1"
line.long 0x8 "RTSR,Rising Trigger selection register (EXTI_RTSR)"
bitfld.long 0x8 22. "RT22,Rising trigger event configuration of line 22" "0,1"
bitfld.long 0x8 21. "RT21,Rising trigger event configuration of line 21" "0,1"
bitfld.long 0x8 20. "RT20,Rising trigger event configuration of line 20" "0,1"
bitfld.long 0x8 19. "RT19,Rising trigger event configuration of line 19" "0,1"
bitfld.long 0x8 17. "RT17,Rising trigger event configuration of line 17" "0,1"
bitfld.long 0x8 16. "RT16,Rising trigger event configuration of line 16" "0,1"
bitfld.long 0x8 15. "RT15,Rising trigger event configuration of line 15" "0,1"
bitfld.long 0x8 14. "RT14,Rising trigger event configuration of line 14" "0,1"
bitfld.long 0x8 13. "RT13,Rising trigger event configuration of line 13" "0,1"
bitfld.long 0x8 12. "RT12,Rising trigger event configuration of line 12" "0,1"
bitfld.long 0x8 11. "RT11,Rising trigger event configuration of line 11" "0,1"
bitfld.long 0x8 10. "RT10,Rising trigger event configuration of line 10" "0,1"
bitfld.long 0x8 9. "RT9,Rising trigger event configuration of line 9" "0,1"
bitfld.long 0x8 8. "RT8,Rising trigger event configuration of line 8" "0,1"
bitfld.long 0x8 7. "RT7,Rising trigger event configuration of line 7" "0,1"
newline
bitfld.long 0x8 6. "RT6,Rising trigger event configuration of line 6" "0,1"
bitfld.long 0x8 5. "RT5,Rising trigger event configuration of line 5" "0,1"
bitfld.long 0x8 4. "RT4,Rising trigger event configuration of line 4" "0,1"
bitfld.long 0x8 3. "RT3,Rising trigger event configuration of line 3" "0,1"
bitfld.long 0x8 2. "RT2,Rising trigger event configuration of line 2" "0,1"
bitfld.long 0x8 1. "RT1,Rising trigger event configuration of line 1" "0,1"
bitfld.long 0x8 0. "RT0,Rising trigger event configuration of line 0" "0,1"
line.long 0xC "FTSR,Falling Trigger selection register (EXTI_FTSR)"
bitfld.long 0xC 22. "FT22,Falling trigger event configuration of line 22" "0,1"
bitfld.long 0xC 21. "FT21,Falling trigger event configuration of line 21" "0,1"
bitfld.long 0xC 20. "FT20,Falling trigger event configuration of line 20" "0,1"
bitfld.long 0xC 19. "FT19,Falling trigger event configuration of line 19" "0,1"
bitfld.long 0xC 17. "FT17,Falling trigger event configuration of line 17" "0,1"
bitfld.long 0xC 16. "FT16,Falling trigger event configuration of line 16" "0,1"
bitfld.long 0xC 15. "FT15,Falling trigger event configuration of line 15" "0,1"
bitfld.long 0xC 14. "FT14,Falling trigger event configuration of line 14" "0,1"
bitfld.long 0xC 13. "FT13,Falling trigger event configuration of line 13" "0,1"
bitfld.long 0xC 12. "FT12,Falling trigger event configuration of line 12" "0,1"
bitfld.long 0xC 11. "FT11,Falling trigger event configuration of line 11" "0,1"
bitfld.long 0xC 10. "FT10,Falling trigger event configuration of line 10" "0,1"
bitfld.long 0xC 9. "FT9,Falling trigger event configuration of line 9" "0,1"
bitfld.long 0xC 8. "FT8,Falling trigger event configuration of line 8" "0,1"
bitfld.long 0xC 7. "FT7,Falling trigger event configuration of line 7" "0,1"
newline
bitfld.long 0xC 6. "FT6,Falling trigger event configuration of line 6" "0,1"
bitfld.long 0xC 5. "FT5,Falling trigger event configuration of line 5" "0,1"
bitfld.long 0xC 4. "FT4,Falling trigger event configuration of line 4" "0,1"
bitfld.long 0xC 3. "FT3,Falling trigger event configuration of line 3" "0,1"
bitfld.long 0xC 2. "FT2,Falling trigger event configuration of line 2" "0,1"
bitfld.long 0xC 1. "FT1,Falling trigger event configuration of line 1" "0,1"
bitfld.long 0xC 0. "FT0,Falling trigger event configuration of line 0" "0,1"
line.long 0x10 "SWIER,Software interrupt event register (EXTI_SWIER)"
bitfld.long 0x10 22. "SWI22,Software Interrupt on line 22" "0,1"
bitfld.long 0x10 21. "SWI21,Software Interrupt on line 21" "0,1"
bitfld.long 0x10 20. "SWI20,Software Interrupt on line 20" "0,1"
bitfld.long 0x10 19. "SWI19,Software Interrupt on line 19" "0,1"
bitfld.long 0x10 17. "SWI17,Software Interrupt on line 17" "0,1"
bitfld.long 0x10 16. "SWI16,Software Interrupt on line 16" "0,1"
bitfld.long 0x10 15. "SWI15,Software Interrupt on line 15" "0,1"
bitfld.long 0x10 14. "SWI14,Software Interrupt on line 14" "0,1"
bitfld.long 0x10 13. "SWI13,Software Interrupt on line 13" "0,1"
bitfld.long 0x10 12. "SWI12,Software Interrupt on line 12" "0,1"
bitfld.long 0x10 11. "SWI11,Software Interrupt on line 11" "0,1"
bitfld.long 0x10 10. "SWI10,Software Interrupt on line 10" "0,1"
bitfld.long 0x10 9. "SWI9,Software Interrupt on line 9" "0,1"
bitfld.long 0x10 8. "SWI8,Software Interrupt on line 8" "0,1"
bitfld.long 0x10 7. "SWI7,Software Interrupt on line 7" "0,1"
newline
bitfld.long 0x10 6. "SWI6,Software Interrupt on line 6" "0,1"
bitfld.long 0x10 5. "SWI5,Software Interrupt on line 5" "0,1"
bitfld.long 0x10 4. "SWI4,Software Interrupt on line 4" "0,1"
bitfld.long 0x10 3. "SWI3,Software Interrupt on line 3" "0,1"
bitfld.long 0x10 2. "SWI2,Software Interrupt on line 2" "0,1"
bitfld.long 0x10 1. "SWI1,Software Interrupt on line 1" "0,1"
bitfld.long 0x10 0. "SWI0,Software Interrupt on line 0" "0,1"
line.long 0x14 "PR,Pending register (EXTI_PR)"
bitfld.long 0x14 22. "PIF22,Pending bit 22" "0,1"
bitfld.long 0x14 21. "PIF21,Pending bit 21" "0,1"
bitfld.long 0x14 20. "PIF20,Pending bit 20" "0,1"
bitfld.long 0x14 19. "PIF19,Pending bit 19" "0,1"
bitfld.long 0x14 17. "PIF17,Pending bit 17" "0,1"
bitfld.long 0x14 16. "PIF16,Pending bit 16" "0,1"
bitfld.long 0x14 15. "PIF15,Pending bit 15" "0,1"
bitfld.long 0x14 14. "PIF14,Pending bit 14" "0,1"
bitfld.long 0x14 13. "PIF13,Pending bit 13" "0,1"
bitfld.long 0x14 12. "PIF12,Pending bit 12" "0,1"
bitfld.long 0x14 11. "PIF11,Pending bit 11" "0,1"
bitfld.long 0x14 10. "PIF10,Pending bit 10" "0,1"
bitfld.long 0x14 9. "PIF9,Pending bit 9" "0,1"
bitfld.long 0x14 8. "PIF8,Pending bit 8" "0,1"
bitfld.long 0x14 7. "PIF7,Pending bit 7" "0,1"
newline
bitfld.long 0x14 6. "PIF6,Pending bit 6" "0,1"
bitfld.long 0x14 5. "PIF5,Pending bit 5" "0,1"
bitfld.long 0x14 4. "PIF4,Pending bit 4" "0,1"
bitfld.long 0x14 3. "PIF3,Pending bit 3" "0,1"
bitfld.long 0x14 2. "PIF2,Pending bit 2" "0,1"
bitfld.long 0x14 1. "PIF1,Pending bit 1" "0,1"
bitfld.long 0x14 0. "PIF0,Pending bit 0" "0,1"
tree.end
tree "FLASH (Flash Program Memory and Data EEPROM)"
base ad:0x40022000
group.long 0x0++0x7
line.long 0x0 "ACR,Access control register"
bitfld.long 0x0 6. "PRE_READ,Pre-read data address" "0,1"
bitfld.long 0x0 5. "DISAB_BUF,Disable Buffer" "0,1"
bitfld.long 0x0 4. "RUN_PD,Flash mode during Run" "0,1"
bitfld.long 0x0 3. "SLEEP_PD,Flash mode during Sleep" "0,1"
bitfld.long 0x0 1. "PRFTEN,Prefetch enable" "0,1"
bitfld.long 0x0 0. "LATENCY,Latency" "0,1"
line.long 0x4 "PECR,Program/erase control register"
bitfld.long 0x4 23. "NZDISABLE,Non-Zero check notification disable" "0,1"
bitfld.long 0x4 18. "OBL_LAUNCH,Launch the option byte" "0,1"
bitfld.long 0x4 17. "ERRIE,Error interrupt enable" "0,1"
bitfld.long 0x4 16. "EOPIE,End of programming interrupt" "0,1"
bitfld.long 0x4 15. "PARALLELBANK,Parallel bank mode" "0,1"
bitfld.long 0x4 10. "FPRG,Half Page/Double Word programming" "0,1"
bitfld.long 0x4 9. "ERASE,Page or Double Word erase" "0,1"
newline
bitfld.long 0x4 8. "FIX,Fixed time data write for Byte Half" "0,1"
bitfld.long 0x4 4. "DATA,Data EEPROM selection" "0,1"
bitfld.long 0x4 3. "PROG,Program memory selection" "0,1"
bitfld.long 0x4 2. "OPTLOCK,Option bytes block lock" "0,1"
bitfld.long 0x4 1. "PRGLOCK,Program memory lock" "0,1"
bitfld.long 0x4 0. "PELOCK,FLASH_PECR and data EEPROM" "0,1"
wgroup.long 0x8++0xF
line.long 0x0 "PDKEYR,Power down key register"
hexmask.long 0x0 0.--31. 1. "PDKEYR,RUN_PD in FLASH_ACR key"
line.long 0x4 "PEKEYR,Program/erase key register"
hexmask.long 0x4 0.--31. 1. "PEKEYR,FLASH_PEC and data EEPROM"
line.long 0x8 "PRGKEYR,Program memory key register"
hexmask.long 0x8 0.--31. 1. "PRGKEYR,Program memory key"
line.long 0xC "OPTKEYR,Option byte key register"
hexmask.long 0xC 0.--31. 1. "OPTKEYR,Option byte key"
group.long 0x18++0x3
line.long 0x0 "SR,Status register"
bitfld.long 0x0 17. "FWWERR,FWWERR" "0,1"
bitfld.long 0x0 16. "NOTZEROERR,NOTZEROERR" "0,1"
bitfld.long 0x0 13. "RDERR,RDERR" "0,1"
bitfld.long 0x0 11. "OPTVERR,Option validity error" "0,1"
bitfld.long 0x0 10. "SIZERR,Size error" "0,1"
bitfld.long 0x0 9. "PGAERR,Programming alignment" "0,1"
bitfld.long 0x0 8. "WRPERR,Write protected error" "0,1"
newline
rbitfld.long 0x0 3. "READY,Flash memory module ready after low" "0,1"
rbitfld.long 0x0 2. "ENDHV,End of high voltage" "0,1"
rbitfld.long 0x0 1. "EOP,End of operation" "0,1"
rbitfld.long 0x0 0. "BSY,Write/erase operations in" "0,1"
rgroup.long 0x1C++0x7
line.long 0x0 "OPTR,Option byte register"
bitfld.long 0x0 31. "nBOOT1,nBOOT1" "0,1"
bitfld.long 0x0 23. "BFB2,BFB2" "0,1"
bitfld.long 0x0 22. "nRST_STDBY,nRST_STDBY" "0,1"
bitfld.long 0x0 21. "nRST_STOP,nRST_STOP" "0,1"
bitfld.long 0x0 20. "WDG_SW,WDG_SW" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "BOR_LEV,BOR_LEV"
bitfld.long 0x0 8. "WPRMOD,WPRMOD" "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "RDPROT,Read protection"
line.long 0x4 "WRPROT1,Write protection register"
hexmask.long 0x4 0.--31. 1. "WRPROT1,Write protection"
rgroup.long 0x80++0x3
line.long 0x0 "WRPROT2,Write protection register"
hexmask.long.word 0x0 0.--15. 1. "WRPROT2,Write protection"
tree.end
tree "FW (Firewall)"
base ad:0x40011C00
group.long 0x0++0x17
line.long 0x0 "FIREWALL_CSSA,Code segment start address"
hexmask.long.word 0x0 8.--23. 1. "ADD,code segment start address"
line.long 0x4 "FIREWALL_CSL,Code segment length"
hexmask.long.word 0x4 8.--21. 1. "LENG,code segment length"
line.long 0x8 "FIREWALL_NVDSSA,Non-volatile data segment start address"
hexmask.long.word 0x8 8.--23. 1. "ADD,Non-volatile data segment start address"
line.long 0xC "FIREWALL_NVDSL,Non-volatile data segment length"
hexmask.long.word 0xC 8.--21. 1. "LENG,Non-volatile data segment length"
line.long 0x10 "FIREWALL_VDSSA,Volatile data segment start address"
hexmask.long.word 0x10 6.--15. 1. "ADD,Volatile data segment start address"
line.long 0x14 "FIREWALL_VDSL,Volatile data segment length"
hexmask.long.word 0x14 6.--15. 1. "LENG,Non-volatile data segment length"
group.long 0x20++0x3
line.long 0x0 "FIREWALL_CR,Configuration register"
bitfld.long 0x0 2. "VDE,Volatile data execution" "0,1"
bitfld.long 0x0 1. "VDS,Volatile data shared" "0,1"
bitfld.long 0x0 0. "FPA,Firewall pre alarm" "0,1"
tree.end
tree "GPIO (General-purpose I/Os)"
base ad:0x0
tree "GPIOA"
base ad:0x50000000
group.long 0x0++0xF
line.long 0x0 "MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0x4 "OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 14. "OT14,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 13. "OT13,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 12. "OT12,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 11. "OT11,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 10. "OT10,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 9. "OT9,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 8. "OT8,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 7. "OT7,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 6. "OT6,Port x configuration bits (y = 0..15)" "0,1"
newline
bitfld.long 0x4 5. "OT5,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 4. "OT4,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 3. "OT3,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 2. "OT2,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 1. "OT1,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 0. "OT0,Port x configuration bits (y = 0..15)" "0,1"
line.long 0x8 "OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0xC "PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "ID14,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "ID13,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "ID12,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "ID11,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "ID10,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "ID9,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "ID8,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "ID7,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "ID6,Port input data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "ID4,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "ID3,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "ID2,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "ID1,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "ID0,Port input data bit (y = 0..15)" "0,1"
group.long 0x14++0x3
line.long 0x0 "ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "OD14,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "OD13,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "OD12,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "OD11,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "OD10,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "OD9,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "OD8,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "OD7,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "OD6,Port output data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "OD4,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "OD3,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "OD2,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "OD1,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "OD0,Port output data bit (y = 0..15)" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 30. "BR14,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 29. "BR13,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 28. "BR12,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 27. "BR11,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 26. "BR10,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 25. "BR9,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 24. "BR8,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 23. "BR7,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 22. "BR6,Port x reset bit y (y = 0..15)" "0,1"
newline
bitfld.long 0x0 21. "BR5,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 20. "BR4,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 19. "BR3,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 18. "BR2,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 17. "BR1,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 16. "BR0,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 15. "BS15,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "BS14,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "BS13,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "BS12,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 11. "BS11,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "BS10,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "BS9,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "BS8,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "BS7,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 6. "BS6,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "BS5,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "BS4,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "BS3,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "BS2,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 1. "BS1,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "BS0,Port x set bit y (y= 0..15)" "0,1"
group.long 0x1C++0xB
line.long 0x0 "LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y= 0..15)" "0,1"
line.long 0x4 "AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x pin y (y = 0..7)"
line.long 0x8 "AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x pin y (y = 8..15)"
wgroup.long 0x28++0x3
line.long 0x0 "BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 14. "BR14,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 13. "BR13,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 12. "BR12,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 11. "BR11,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 10. "BR10,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 9. "BR9,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 8. "BR8,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 7. "BR7,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 6. "BR6,Port x Reset bit y (y= 0 .. 15)" "0,1"
newline
bitfld.long 0x0 5. "BR5,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 4. "BR4,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 3. "BR3,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 2. "BR2,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 1. "BR1,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 0. "BR0,Port x Reset bit y (y= 0 .. 15)" "0,1"
tree.end
tree "GPIOB"
base ad:0x50000400
group.long 0x0++0xF
line.long 0x0 "MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0x4 "OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 14. "OT14,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 13. "OT13,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 12. "OT12,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 11. "OT11,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 10. "OT10,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 9. "OT9,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 8. "OT8,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 7. "OT7,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 6. "OT6,Port x configuration bits (y = 0..15)" "0,1"
newline
bitfld.long 0x4 5. "OT5,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 4. "OT4,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 3. "OT3,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 2. "OT2,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 1. "OT1,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 0. "OT0,Port x configuration bits (y = 0..15)" "0,1"
line.long 0x8 "OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0xC "PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "ID14,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "ID13,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "ID12,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "ID11,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "ID10,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "ID9,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "ID8,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "ID7,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "ID6,Port input data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "ID4,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "ID3,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "ID2,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "ID1,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "ID0,Port input data bit (y = 0..15)" "0,1"
group.long 0x14++0x3
line.long 0x0 "ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "OD14,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "OD13,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "OD12,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "OD11,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "OD10,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "OD9,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "OD8,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "OD7,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "OD6,Port output data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "OD4,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "OD3,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "OD2,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "OD1,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "OD0,Port output data bit (y = 0..15)" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 30. "BR14,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 29. "BR13,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 28. "BR12,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 27. "BR11,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 26. "BR10,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 25. "BR9,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 24. "BR8,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 23. "BR7,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 22. "BR6,Port x reset bit y (y = 0..15)" "0,1"
newline
bitfld.long 0x0 21. "BR5,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 20. "BR4,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 19. "BR3,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 18. "BR2,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 17. "BR1,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 16. "BR0,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 15. "BS15,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "BS14,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "BS13,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "BS12,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 11. "BS11,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "BS10,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "BS9,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "BS8,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "BS7,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 6. "BS6,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "BS5,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "BS4,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "BS3,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "BS2,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 1. "BS1,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "BS0,Port x set bit y (y= 0..15)" "0,1"
group.long 0x1C++0xB
line.long 0x0 "LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y= 0..15)" "0,1"
line.long 0x4 "AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x pin y (y = 0..7)"
line.long 0x8 "AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x pin y (y = 8..15)"
wgroup.long 0x28++0x3
line.long 0x0 "BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 14. "BR14,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 13. "BR13,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 12. "BR12,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 11. "BR11,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 10. "BR10,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 9. "BR9,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 8. "BR8,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 7. "BR7,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 6. "BR6,Port x Reset bit y (y= 0 .. 15)" "0,1"
newline
bitfld.long 0x0 5. "BR5,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 4. "BR4,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 3. "BR3,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 2. "BR2,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 1. "BR1,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 0. "BR0,Port x Reset bit y (y= 0 .. 15)" "0,1"
tree.end
tree "GPIOC"
base ad:0x50000800
group.long 0x0++0xF
line.long 0x0 "MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0x4 "OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 14. "OT14,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 13. "OT13,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 12. "OT12,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 11. "OT11,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 10. "OT10,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 9. "OT9,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 8. "OT8,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 7. "OT7,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 6. "OT6,Port x configuration bits (y = 0..15)" "0,1"
newline
bitfld.long 0x4 5. "OT5,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 4. "OT4,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 3. "OT3,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 2. "OT2,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 1. "OT1,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 0. "OT0,Port x configuration bits (y = 0..15)" "0,1"
line.long 0x8 "OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0xC "PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "ID14,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "ID13,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "ID12,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "ID11,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "ID10,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "ID9,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "ID8,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "ID7,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "ID6,Port input data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "ID4,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "ID3,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "ID2,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "ID1,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "ID0,Port input data bit (y = 0..15)" "0,1"
group.long 0x14++0x3
line.long 0x0 "ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "OD14,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "OD13,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "OD12,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "OD11,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "OD10,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "OD9,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "OD8,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "OD7,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "OD6,Port output data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "OD4,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "OD3,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "OD2,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "OD1,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "OD0,Port output data bit (y = 0..15)" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 30. "BR14,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 29. "BR13,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 28. "BR12,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 27. "BR11,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 26. "BR10,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 25. "BR9,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 24. "BR8,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 23. "BR7,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 22. "BR6,Port x reset bit y (y = 0..15)" "0,1"
newline
bitfld.long 0x0 21. "BR5,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 20. "BR4,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 19. "BR3,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 18. "BR2,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 17. "BR1,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 16. "BR0,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 15. "BS15,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "BS14,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "BS13,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "BS12,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 11. "BS11,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "BS10,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "BS9,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "BS8,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "BS7,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 6. "BS6,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "BS5,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "BS4,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "BS3,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "BS2,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 1. "BS1,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "BS0,Port x set bit y (y= 0..15)" "0,1"
group.long 0x1C++0xB
line.long 0x0 "LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y= 0..15)" "0,1"
line.long 0x4 "AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x pin y (y = 0..7)"
line.long 0x8 "AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x pin y (y = 8..15)"
wgroup.long 0x28++0x3
line.long 0x0 "BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 14. "BR14,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 13. "BR13,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 12. "BR12,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 11. "BR11,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 10. "BR10,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 9. "BR9,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 8. "BR8,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 7. "BR7,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 6. "BR6,Port x Reset bit y (y= 0 .. 15)" "0,1"
newline
bitfld.long 0x0 5. "BR5,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 4. "BR4,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 3. "BR3,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 2. "BR2,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 1. "BR1,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 0. "BR0,Port x Reset bit y (y= 0 .. 15)" "0,1"
tree.end
tree "GPIOD"
base ad:0x50000C00
group.long 0x0++0xF
line.long 0x0 "MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0x4 "OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 14. "OT14,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 13. "OT13,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 12. "OT12,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 11. "OT11,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 10. "OT10,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 9. "OT9,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 8. "OT8,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 7. "OT7,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 6. "OT6,Port x configuration bits (y = 0..15)" "0,1"
newline
bitfld.long 0x4 5. "OT5,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 4. "OT4,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 3. "OT3,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 2. "OT2,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 1. "OT1,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 0. "OT0,Port x configuration bits (y = 0..15)" "0,1"
line.long 0x8 "OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0xC "PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "ID14,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "ID13,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "ID12,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "ID11,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "ID10,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "ID9,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "ID8,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "ID7,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "ID6,Port input data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "ID4,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "ID3,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "ID2,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "ID1,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "ID0,Port input data bit (y = 0..15)" "0,1"
group.long 0x14++0x3
line.long 0x0 "ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "OD14,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "OD13,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "OD12,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "OD11,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "OD10,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "OD9,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "OD8,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "OD7,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "OD6,Port output data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "OD4,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "OD3,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "OD2,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "OD1,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "OD0,Port output data bit (y = 0..15)" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 30. "BR14,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 29. "BR13,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 28. "BR12,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 27. "BR11,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 26. "BR10,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 25. "BR9,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 24. "BR8,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 23. "BR7,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 22. "BR6,Port x reset bit y (y = 0..15)" "0,1"
newline
bitfld.long 0x0 21. "BR5,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 20. "BR4,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 19. "BR3,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 18. "BR2,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 17. "BR1,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 16. "BR0,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 15. "BS15,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "BS14,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "BS13,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "BS12,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 11. "BS11,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "BS10,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "BS9,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "BS8,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "BS7,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 6. "BS6,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "BS5,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "BS4,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "BS3,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "BS2,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 1. "BS1,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "BS0,Port x set bit y (y= 0..15)" "0,1"
group.long 0x1C++0xB
line.long 0x0 "LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y= 0..15)" "0,1"
line.long 0x4 "AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x pin y (y = 0..7)"
line.long 0x8 "AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x pin y (y = 8..15)"
wgroup.long 0x28++0x3
line.long 0x0 "BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 14. "BR14,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 13. "BR13,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 12. "BR12,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 11. "BR11,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 10. "BR10,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 9. "BR9,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 8. "BR8,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 7. "BR7,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 6. "BR6,Port x Reset bit y (y= 0 .. 15)" "0,1"
newline
bitfld.long 0x0 5. "BR5,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 4. "BR4,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 3. "BR3,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 2. "BR2,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 1. "BR1,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 0. "BR0,Port x Reset bit y (y= 0 .. 15)" "0,1"
tree.end
tree "GPIOE"
base ad:0x50001000
group.long 0x0++0xF
line.long 0x0 "MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0x4 "OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 14. "OT14,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 13. "OT13,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 12. "OT12,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 11. "OT11,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 10. "OT10,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 9. "OT9,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 8. "OT8,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 7. "OT7,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 6. "OT6,Port x configuration bits (y = 0..15)" "0,1"
newline
bitfld.long 0x4 5. "OT5,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 4. "OT4,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 3. "OT3,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 2. "OT2,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 1. "OT1,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 0. "OT0,Port x configuration bits (y = 0..15)" "0,1"
line.long 0x8 "OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0xC "PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "ID14,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "ID13,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "ID12,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "ID11,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "ID10,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "ID9,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "ID8,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "ID7,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "ID6,Port input data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "ID4,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "ID3,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "ID2,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "ID1,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "ID0,Port input data bit (y = 0..15)" "0,1"
group.long 0x14++0x3
line.long 0x0 "ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "OD14,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "OD13,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "OD12,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "OD11,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "OD10,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "OD9,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "OD8,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "OD7,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "OD6,Port output data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "OD4,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "OD3,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "OD2,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "OD1,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "OD0,Port output data bit (y = 0..15)" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 30. "BR14,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 29. "BR13,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 28. "BR12,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 27. "BR11,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 26. "BR10,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 25. "BR9,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 24. "BR8,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 23. "BR7,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 22. "BR6,Port x reset bit y (y = 0..15)" "0,1"
newline
bitfld.long 0x0 21. "BR5,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 20. "BR4,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 19. "BR3,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 18. "BR2,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 17. "BR1,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 16. "BR0,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 15. "BS15,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "BS14,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "BS13,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "BS12,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 11. "BS11,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "BS10,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "BS9,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "BS8,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "BS7,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 6. "BS6,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "BS5,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "BS4,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "BS3,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "BS2,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 1. "BS1,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "BS0,Port x set bit y (y= 0..15)" "0,1"
group.long 0x1C++0xB
line.long 0x0 "LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y= 0..15)" "0,1"
line.long 0x4 "AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x pin y (y = 0..7)"
line.long 0x8 "AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x pin y (y = 8..15)"
wgroup.long 0x28++0x3
line.long 0x0 "BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 14. "BR14,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 13. "BR13,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 12. "BR12,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 11. "BR11,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 10. "BR10,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 9. "BR9,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 8. "BR8,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 7. "BR7,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 6. "BR6,Port x Reset bit y (y= 0 .. 15)" "0,1"
newline
bitfld.long 0x0 5. "BR5,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 4. "BR4,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 3. "BR3,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 2. "BR2,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 1. "BR1,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 0. "BR0,Port x Reset bit y (y= 0 .. 15)" "0,1"
tree.end
tree "GPIOH"
base ad:0x50001C00
group.long 0x0++0xF
line.long 0x0 "MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0x4 "OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 14. "OT14,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 13. "OT13,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 12. "OT12,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 11. "OT11,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 10. "OT10,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 9. "OT9,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 8. "OT8,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 7. "OT7,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 6. "OT6,Port x configuration bits (y = 0..15)" "0,1"
newline
bitfld.long 0x4 5. "OT5,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 4. "OT4,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 3. "OT3,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 2. "OT2,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 1. "OT1,Port x configuration bits (y = 0..15)" "0,1"
bitfld.long 0x4 0. "OT0,Port x configuration bits (y = 0..15)" "0,1"
line.long 0x8 "OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration bits (y = 0..15)" "0,1,2,3"
line.long 0xC "PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "ID14,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "ID13,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "ID12,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "ID11,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "ID10,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "ID9,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "ID8,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "ID7,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "ID6,Port input data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "ID4,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "ID3,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "ID2,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "ID1,Port input data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "ID0,Port input data bit (y = 0..15)" "0,1"
group.long 0x14++0x3
line.long 0x0 "ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 14. "OD14,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 13. "OD13,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 12. "OD12,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 11. "OD11,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 10. "OD10,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 9. "OD9,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 8. "OD8,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 7. "OD7,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 6. "OD6,Port output data bit (y = 0..15)" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 4. "OD4,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 3. "OD3,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 2. "OD2,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 1. "OD1,Port output data bit (y = 0..15)" "0,1"
bitfld.long 0x0 0. "OD0,Port output data bit (y = 0..15)" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 30. "BR14,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 29. "BR13,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 28. "BR12,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 27. "BR11,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 26. "BR10,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 25. "BR9,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 24. "BR8,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 23. "BR7,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 22. "BR6,Port x reset bit y (y = 0..15)" "0,1"
newline
bitfld.long 0x0 21. "BR5,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 20. "BR4,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 19. "BR3,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 18. "BR2,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 17. "BR1,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 16. "BR0,Port x reset bit y (y = 0..15)" "0,1"
bitfld.long 0x0 15. "BS15,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "BS14,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "BS13,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "BS12,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 11. "BS11,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "BS10,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "BS9,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "BS8,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "BS7,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 6. "BS6,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "BS5,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "BS4,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "BS3,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "BS2,Port x set bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 1. "BS1,Port x set bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "BS0,Port x set bit y (y= 0..15)" "0,1"
group.long 0x1C++0xB
line.long 0x0 "LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y= 0..15)" "0,1"
newline
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y= 0..15)" "0,1"
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y= 0..15)" "0,1"
line.long 0x4 "AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x pin y (y = 0..7)"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x pin y (y = 0..7)"
line.long 0x8 "AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x pin y (y = 8..15)"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x pin y (y = 8..15)"
wgroup.long 0x28++0x3
line.long 0x0 "BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 14. "BR14,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 13. "BR13,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 12. "BR12,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 11. "BR11,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 10. "BR10,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 9. "BR9,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 8. "BR8,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 7. "BR7,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 6. "BR6,Port x Reset bit y (y= 0 .. 15)" "0,1"
newline
bitfld.long 0x0 5. "BR5,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 4. "BR4,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 3. "BR3,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 2. "BR2,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 1. "BR1,Port x Reset bit y (y= 0 .. 15)" "0,1"
bitfld.long 0x0 0. "BR0,Port x Reset bit y (y= 0 .. 15)" "0,1"
tree.end
tree.end
tree "I2C (Inter-Integrated Circuit)"
base ad:0x40005400
group.long 0x0++0x1B
line.long 0x0 "CR1,Control register 1"
bitfld.long 0x0 23. "PECEN,PEC enable" "0,1"
bitfld.long 0x0 22. "ALERTEN,SMBUS alert enable" "0,1"
bitfld.long 0x0 21. "SMBDEN,SMBus Device Default address enable" "0,1"
bitfld.long 0x0 20. "SMBHEN,SMBus Host address enable" "0,1"
bitfld.long 0x0 19. "GCEN,General call enable" "0,1"
bitfld.long 0x0 18. "WUPEN,Wakeup from STOP enable" "0,1"
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0,1"
bitfld.long 0x0 16. "SBC,Slave byte control" "0,1"
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0,1"
newline
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0,1"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0,1"
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0,1"
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt enable" "0,1"
bitfld.long 0x0 5. "STOPIE,STOP detection Interrupt enable" "0,1"
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0,1"
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0,1"
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0,1"
newline
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0,1"
bitfld.long 0x0 0. "PE,Peripheral enable" "0,1"
line.long 0x4 "CR2,Control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0,1"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0,1"
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0,1"
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0,1"
bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0,1"
bitfld.long 0x4 13. "START,Start generation" "0,1"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0,1"
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0,1"
newline
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0,1"
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address bit (master mode)"
line.long 0x8 "OAR1,Own address register 1"
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0,1"
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0,1"
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface address"
line.long 0xC "OAR2,Own address register 2"
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0,1"
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "TIMINGR,Timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "TIMEOUTR,Status register 1"
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "0,1"
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0,1"
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0,1"
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "ISR,Interrupt and Status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0,1"
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t_low detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
newline
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1"
bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "ICR,Interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag clear" "0,1"
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
bitfld.long 0x0 5. "STOPCF,Stop detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
bitfld.long 0x0 3. "ADDRCF,Address Matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "PECR,PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "RXDR,Receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
group.long 0x28++0x3
line.long 0x0 "TXDR,Transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
tree.end
tree "IWDG (Independent Watchdog)"
base ad:0x40003000
wgroup.long 0x0++0x3
line.long 0x0 "KR,Key register"
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)"
group.long 0x4++0x7
line.long 0x0 "PR,Prescaler register"
bitfld.long 0x0 0.--2. "PR,Prescaler divider" "0,1,2,3,4,5,6,7"
line.long 0x4 "RLR,Reload register"
hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value"
rgroup.long 0xC++0x3
line.long 0x0 "SR,Status register"
bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1"
bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1"
bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1"
group.long 0x10++0x3
line.long 0x0 "WINR,Window register"
hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value"
tree.end
tree "LPTIM (Low-Power Timer)"
base ad:0x40007C00
rgroup.long 0x0++0x3
line.long 0x0 "ISR,Interrupt and Status Register"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 3. "CMPOK,Compare register update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CMPM,Compare match" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "ICR,Interrupt Clear Register"
bitfld.long 0x0 6. "DOWNCF,Direction change to down Clear Flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP Clear Flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK Clear Flag" "0,1"
bitfld.long 0x0 3. "CMPOKCF,Compare register update OK Clear Flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge Clear Flag" "0,1"
bitfld.long 0x0 1. "ARRMCF,Autoreload match Clear Flag" "0,1"
bitfld.long 0x0 0. "CMPMCF,compare match Clear Flag" "0,1"
group.long 0x8++0x13
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0,1"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0,1"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0,1"
bitfld.long 0x0 3. "CMPOKIE,Compare register update OK Interrupt Enable" "0,1"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0,1"
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0,1"
bitfld.long 0x0 0. "CMPMIE,Compare match Interrupt Enable" "0,1"
line.long 0x4 "CFGR,Configuration Register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0,1"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0,1"
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0,1"
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0,1"
bitfld.long 0x4 20. "WAVE,Waveform shape" "0,1"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0,1"
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0,1,2,3"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0,1,2,3"
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0,1,2,3"
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0,1,2,3"
bitfld.long 0x4 0. "CKSEL,Clock selector" "0,1"
line.long 0x8 "CR,Control Register"
bitfld.long 0x8 2. "CNTSTRT,Timer start in continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in single mode" "0,1"
bitfld.long 0x8 0. "ENABLE,LPTIM Enable" "0,1"
line.long 0xC "CMP,Compare Register"
hexmask.long.word 0xC 0.--15. 1. "CMP,Compare value."
line.long 0x10 "ARR,Autoreload Register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value."
rgroup.long 0x1C++0x3
line.long 0x0 "CNT,Counter Register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value."
tree.end
tree "MPU (Memory Protection Unit)"
base ad:0xE000ED90
rgroup.long 0x0++0x3
line.long 0x0 "MPU_TYPER,MPU type register"
hexmask.long.byte 0x0 16.--23. 1. "IREGION,Number of MPU instruction regions"
hexmask.long.byte 0x0 8.--15. 1. "DREGION,Number of MPU data regions"
bitfld.long 0x0 0. "SEPARATE,Separate flag" "0,1"
group.long 0x4++0xF
line.long 0x0 "MPU_CTRL,MPU control register"
bitfld.long 0x0 2. "PRIVDEFENA,Enable priviliged software access to default memory map" "0,1"
bitfld.long 0x0 1. "HFNMIENA,Enables the operation of MPU during hard fault" "0,1"
bitfld.long 0x0 0. "ENABLE,Enables the MPU" "0,1"
line.long 0x4 "MPU_RNR,MPU region number register"
hexmask.long.byte 0x4 0.--7. 1. "REGION,MPU region"
line.long 0x8 "MPU_RBAR,MPU region base address register"
hexmask.long 0x8 5.--31. 1. "ADDR,Region base address field"
bitfld.long 0x8 4. "VALID,MPU region number valid" "0,1"
hexmask.long.byte 0x8 0.--3. 1. "REGION,MPU region field"
line.long 0xC "MPU_RASR,MPU region attribute and size register"
bitfld.long 0xC 28. "XN,Instruction access disable bit" "0,1"
bitfld.long 0xC 24.--26. "AP,Access permission" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 19.--21. "TEX,memory attribute" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 18. "S,Shareable memory attribute" "0,1"
bitfld.long 0xC 17. "C,memory attribute" "0,1"
bitfld.long 0xC 16. "B,memory attribute" "0,1"
hexmask.long.byte 0xC 8.--15. 1. "SRD,Subregion disable bits"
hexmask.long.byte 0xC 1.--5. 1. "SIZE,Size of the MPU protection region"
newline
bitfld.long 0xC 0. "ENABLE,Region enable bit." "0,1"
tree.end
tree "NVIC (Nested Vectored Interrupt Controller)"
base ad:0xE000E100
group.long 0x0++0x3
line.long 0x0 "ISER,Interrupt Set Enable Register"
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
group.long 0x80++0x3
line.long 0x0 "ICER,Interrupt Clear Enable Register"
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
group.long 0x100++0x3
line.long 0x0 "ISPR,Interrupt Set-Pending Register"
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
group.long 0x180++0x3
line.long 0x0 "ICPR,Interrupt Clear-Pending Register"
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
group.long 0x300++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register 0"
hexmask.long.byte 0x0 24.--31. 1. "PRI_3,priority for interrupt 3"
hexmask.long.byte 0x0 16.--23. 1. "PRI_2,priority for interrupt 2"
hexmask.long.byte 0x0 8.--15. 1. "PRI_1,priority for interrupt 1"
hexmask.long.byte 0x0 0.--7. 1. "PRI_0,priority for interrupt 0"
line.long 0x4 "IPR1,Interrupt Priority Register 1"
hexmask.long.byte 0x4 24.--31. 1. "PRI_7,priority for interrupt n"
hexmask.long.byte 0x4 16.--23. 1. "PRI_6,priority for interrupt n"
hexmask.long.byte 0x4 8.--15. 1. "PRI_5,priority for interrupt n"
hexmask.long.byte 0x4 0.--7. 1. "PRI_4,priority for interrupt n"
line.long 0x8 "IPR2,Interrupt Priority Register 2"
hexmask.long.byte 0x8 24.--31. 1. "PRI_11,priority for interrupt n"
hexmask.long.byte 0x8 16.--23. 1. "PRI_10,priority for interrupt n"
hexmask.long.byte 0x8 8.--15. 1. "PRI_9,priority for interrupt n"
hexmask.long.byte 0x8 0.--7. 1. "PRI_8,priority for interrupt n"
line.long 0xC "IPR3,Interrupt Priority Register 3"
hexmask.long.byte 0xC 24.--31. 1. "PRI_15,priority for interrupt n"
hexmask.long.byte 0xC 16.--23. 1. "PRI_14,priority for interrupt n"
hexmask.long.byte 0xC 8.--15. 1. "PRI_13,priority for interrupt n"
hexmask.long.byte 0xC 0.--7. 1. "PRI_12,priority for interrupt n"
line.long 0x10 "IPR4,Interrupt Priority Register 4"
hexmask.long.byte 0x10 24.--31. 1. "PRI_19,priority for interrupt n"
hexmask.long.byte 0x10 16.--23. 1. "PRI_18,priority for interrupt n"
hexmask.long.byte 0x10 8.--15. 1. "PRI_17,priority for interrupt n"
hexmask.long.byte 0x10 0.--7. 1. "PRI_16,priority for interrupt n"
line.long 0x14 "IPR5,Interrupt Priority Register 5"
hexmask.long.byte 0x14 24.--31. 1. "PRI_23,priority for interrupt n"
hexmask.long.byte 0x14 16.--23. 1. "PRI_22,priority for interrupt n"
hexmask.long.byte 0x14 8.--15. 1. "PRI_21,priority for interrupt n"
hexmask.long.byte 0x14 0.--7. 1. "PRI_20,priority for interrupt n"
line.long 0x18 "IPR6,Interrupt Priority Register 6"
hexmask.long.byte 0x18 24.--31. 1. "PRI_27,priority for interrupt n"
hexmask.long.byte 0x18 16.--23. 1. "PRI_26,priority for interrupt n"
hexmask.long.byte 0x18 8.--15. 1. "PRI_25,priority for interrupt n"
hexmask.long.byte 0x18 0.--7. 1. "PRI_24,priority for interrupt n"
line.long 0x1C "IPR7,Interrupt Priority Register 7"
hexmask.long.byte 0x1C 24.--31. 1. "PRI_31,priority for interrupt n"
hexmask.long.byte 0x1C 16.--23. 1. "PRI_30,priority for interrupt n"
hexmask.long.byte 0x1C 8.--15. 1. "PRI_29,priority for interrupt n"
hexmask.long.byte 0x1C 0.--7. 1. "PRI_28,priority for interrupt n"
tree.end
tree "PWR (Power Control)"
base ad:0x40007000
group.long 0x0++0x7
line.long 0x0 "CR,power control register"
bitfld.long 0x0 16. "LPDS,Regulator in Low-power deepsleep mode" "0,1"
bitfld.long 0x0 14. "LPRUN,Low power run mode" "0,1"
bitfld.long 0x0 13. "DS_EE_KOFF,Deep sleep mode with Flash memory kept off" "0,1"
bitfld.long 0x0 11.--12. "VOS,Voltage scaling range selection" "0,1,2,3"
bitfld.long 0x0 10. "FWU,Fast wakeup" "0,1"
bitfld.long 0x0 9. "ULP,Ultra-low-power mode" "0,1"
bitfld.long 0x0 8. "DBP,Disable backup domain write protection" "0,1"
bitfld.long 0x0 3. "CSBF,Clear standby flag" "0,1"
bitfld.long 0x0 2. "CWUF,Clear wakeup flag" "0,1"
bitfld.long 0x0 1. "PDDS,Power down deepsleep" "0,1"
newline
bitfld.long 0x0 0. "LPSDSR,Low-power deepsleep/Sleep/Low-power run" "0,1"
line.long 0x4 "CSR,power control/status register"
bitfld.long 0x4 10. "EWUP3,Enable WKUP pin 3" "0,1"
bitfld.long 0x4 9. "EWUP2,Enable WKUP pin 2" "0,1"
bitfld.long 0x4 8. "EWUP1,Enable WKUP pin 1" "0,1"
rbitfld.long 0x4 5. "REGLPF,Regulator LP flag" "0,1"
rbitfld.long 0x4 4. "VOSF,Voltage Scaling select flag" "0,1"
rbitfld.long 0x4 3. "VREFINTRDYF,Internal voltage reference (VREFINT) ready flag" "0,1"
rbitfld.long 0x4 1. "SBF,Standby flag" "0,1"
rbitfld.long 0x4 0. "WUF,Wakeup flag" "0,1"
tree.end
tree "RCC (Reset and Clock Control)"
base ad:0x40021000
group.long 0x0++0x7
line.long 0x0 "CR,Clock control register"
rbitfld.long 0x0 25. "PLLRDY,PLL clock ready flag" "0,1"
bitfld.long 0x0 24. "PLLON,PLL enable bit" "0,1"
bitfld.long 0x0 20.--21. "RTCPRE,TC/LCD prescaler" "0,1,2,3"
bitfld.long 0x0 19. "CSSLSEON,Clock security system on HSE enable bit" "0,1"
bitfld.long 0x0 18. "HSEBYP,HSE clock bypass bit" "0,1"
rbitfld.long 0x0 17. "HSERDY,HSE clock ready flag" "0,1"
bitfld.long 0x0 16. "HSEON,HSE clock enable bit" "0,1"
rbitfld.long 0x0 9. "MSIRDY,MSI clock ready flag" "0,1"
newline
bitfld.long 0x0 8. "MSION,MSI clock enable bit" "0,1"
bitfld.long 0x0 5. "HSI16OUTEN,16 MHz high-speed internal clock output enable" "0,1"
rbitfld.long 0x0 4. "HSI16DIVF,HSI16DIVF" "0,1"
bitfld.long 0x0 3. "HSI16DIVEN,HSI16DIVEN" "0,1"
bitfld.long 0x0 2. "HSI16RDYF,Internal high-speed clock ready flag" "0,1"
rbitfld.long 0x0 1. "HSI16KERON,High-speed internal clock enable bit for some IP kernels" "0,1"
bitfld.long 0x0 0. "HSI16ON,16 MHz high-speed internal clock enable" "0,1"
line.long 0x4 "ICSCR,Internal clock sources calibration register"
hexmask.long.byte 0x4 24.--31. 1. "MSITRIM,MSI clock trimming"
hexmask.long.byte 0x4 16.--23. 1. "MSICAL,MSI clock calibration"
bitfld.long 0x4 13.--15. "MSIRANGE,MSI clock ranges" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 8.--12. 1. "HSI16TRIM,High speed internal clock trimming"
hexmask.long.byte 0x4 0.--7. 1. "HSI16CAL,nternal high speed clock calibration"
group.long 0xC++0x3
line.long 0x0 "CFGR,Clock configuration register"
bitfld.long 0x0 28.--30. "MCOPRE,Microcontroller clock output prescaler" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "MCOSEL,Microcontroller clock output selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 22.--23. "PLLDIV,PLL output division" "0,1,2,3"
hexmask.long.byte 0x0 18.--21. 1. "PLLMUL,PLL multiplication factor"
bitfld.long 0x0 16. "PLLSRC,PLL entry clock source" "0,1"
bitfld.long 0x0 15. "STOPWUCK,Wake-up from stop clock selection" "0,1"
bitfld.long 0x0 11.--13. "PPRE2,APB high-speed prescaler (APB2)" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8.--10. "PPRE1,APB low-speed prescaler (APB1)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 4.--7. 1. "HPRE,AHB prescaler"
rbitfld.long 0x0 2.--3. "SWS,System clock switch status" "0,1,2,3"
bitfld.long 0x0 0.--1. "SW,System clock switch" "0,1,2,3"
rgroup.long 0x10++0xB
line.long 0x0 "CIER,Clock interrupt enable register"
bitfld.long 0x0 7. "CSSLSE,LSE CSS interrupt flag" "0,1"
bitfld.long 0x0 5. "MSIRDYIE,MSI ready interrupt flag" "0,1"
bitfld.long 0x0 4. "PLLRDYIE,PLL ready interrupt flag" "0,1"
bitfld.long 0x0 3. "HSERDYIE,HSE ready interrupt flag" "0,1"
bitfld.long 0x0 2. "HSI16RDYIE,HSI16 ready interrupt flag" "0,1"
bitfld.long 0x0 1. "LSERDYIE,LSE ready interrupt flag" "0,1"
bitfld.long 0x0 0. "LSIRDYIE,LSI ready interrupt flag" "0,1"
line.long 0x4 "CIFR,Clock interrupt flag register"
bitfld.long 0x4 8. "CSSHSEF,Clock Security System Interrupt flag" "0,1"
bitfld.long 0x4 7. "CSSLSEF,LSE Clock Security System Interrupt flag" "0,1"
bitfld.long 0x4 5. "MSIRDYF,MSI ready interrupt flag" "0,1"
bitfld.long 0x4 4. "PLLRDYF,PLL ready interrupt flag" "0,1"
bitfld.long 0x4 3. "HSERDYF,HSE ready interrupt flag" "0,1"
bitfld.long 0x4 2. "HSI16RDYF,HSI16 ready interrupt flag" "0,1"
bitfld.long 0x4 1. "LSERDYF,LSE ready interrupt flag" "0,1"
bitfld.long 0x4 0. "LSIRDYF,LSI ready interrupt flag" "0,1"
line.long 0x8 "CICR,Clock interrupt clear register"
bitfld.long 0x8 8. "CSSHSEC,Clock Security System Interrupt clear" "0,1"
bitfld.long 0x8 7. "CSSLSEC,LSE Clock Security System Interrupt clear" "0,1"
bitfld.long 0x8 5. "MSIRDYC,MSI ready Interrupt clear" "0,1"
bitfld.long 0x8 4. "PLLRDYC,PLL ready Interrupt clear" "0,1"
bitfld.long 0x8 3. "HSERDYC,HSE ready Interrupt clear" "0,1"
bitfld.long 0x8 2. "HSI16RDYC,HSI16 ready Interrupt clear" "0,1"
bitfld.long 0x8 1. "LSERDYC,LSE ready Interrupt clear" "0,1"
bitfld.long 0x8 0. "LSIRDYC,LSI ready Interrupt clear" "0,1"
group.long 0x1C++0x37
line.long 0x0 "IOPRSTR,GPIO reset register"
bitfld.long 0x0 7. "IOPHRST,I/O port H reset" "0,1"
bitfld.long 0x0 4. "IOPERST,I/O port E reset" "0,1"
bitfld.long 0x0 3. "IOPDRST,I/O port D reset" "0,1"
bitfld.long 0x0 2. "IOPCRST,I/O port A reset" "0,1"
bitfld.long 0x0 1. "IOPBRST,I/O port B reset" "0,1"
bitfld.long 0x0 0. "IOPARST,I/O port A reset" "0,1"
line.long 0x4 "AHBRSTR,AHB peripheral reset register"
bitfld.long 0x4 24. "CRYPRST,Crypto module reset" "0,1"
bitfld.long 0x4 12. "CRCRST,Test integration module reset" "0,1"
bitfld.long 0x4 8. "MIFRST,Memory interface reset" "0,1"
bitfld.long 0x4 0. "DMARST,DMA reset" "0,1"
line.long 0x8 "APB2RSTR,APB2 peripheral reset register"
bitfld.long 0x8 22. "DBGRST,DBG reset" "0,1"
bitfld.long 0x8 14. "USART1RST,USART1 reset" "0,1"
bitfld.long 0x8 12. "SPI1RST,SPI 1 reset" "0,1"
bitfld.long 0x8 9. "ADCRST,ADC interface reset" "0,1"
bitfld.long 0x8 5. "TIM22RST,TIM22 timer reset" "0,1"
bitfld.long 0x8 2. "TIM21RST,TIM21 timer reset" "0,1"
bitfld.long 0x8 0. "SYSCFGRST,System configuration controller reset" "0,1"
line.long 0xC "APB1RSTR,APB1 peripheral reset register"
bitfld.long 0xC 31. "LPTIM1RST,Low power timer reset" "0,1"
bitfld.long 0xC 30. "I2C3,I2C3 reset" "0,1"
bitfld.long 0xC 28. "PWRRST,Power interface reset" "0,1"
bitfld.long 0xC 27. "CRCRST,CRC reset" "0,1"
bitfld.long 0xC 22. "I2C2RST,I2C2 reset" "0,1"
bitfld.long 0xC 21. "I2C1RST,I2C1 reset" "0,1"
bitfld.long 0xC 20. "USART5RST,USART5 reset" "0,1"
bitfld.long 0xC 19. "USART4RST,USART4 reset" "0,1"
newline
bitfld.long 0xC 18. "LPUART1RST,LPUART1 reset" "0,1"
bitfld.long 0xC 17. "USART2RST,USART2 reset" "0,1"
bitfld.long 0xC 14. "SPI2RST,SPI2 reset" "0,1"
bitfld.long 0xC 11. "WWDGRST,Window watchdog reset" "0,1"
bitfld.long 0xC 5. "TIM7RST,Timer 7 reset" "0,1"
bitfld.long 0xC 4. "TIM6RST,Timer 6 reset" "0,1"
bitfld.long 0xC 1. "TIM3RST,Timer 3 reset" "0,1"
bitfld.long 0xC 0. "TIM2RST,Timer 2 reset" "0,1"
line.long 0x10 "IOPENR,GPIO clock enable register"
bitfld.long 0x10 7. "IOPHEN,I/O port H clock enable bit" "0,1"
bitfld.long 0x10 4. "IOPEEN,IO port E clock enable bit" "0,1"
bitfld.long 0x10 3. "IOPDEN,I/O port D clock enable bit" "0,1"
bitfld.long 0x10 2. "IOPCEN,IO port A clock enable bit" "0,1"
bitfld.long 0x10 1. "IOPBEN,IO port B clock enable bit" "0,1"
bitfld.long 0x10 0. "IOPAEN,IO port A clock enable bit" "0,1"
line.long 0x14 "AHBENR,AHB peripheral clock enable register"
bitfld.long 0x14 24. "CRYPEN,Crypto clock enable bit" "0,1"
bitfld.long 0x14 12. "CRCEN,CRC clock enable bit" "0,1"
bitfld.long 0x14 8. "MIFEN,NVM interface clock enable bit" "0,1"
bitfld.long 0x14 0. "DMAEN,DMA clock enable bit" "0,1"
line.long 0x18 "APB2ENR,APB2 peripheral clock enable register"
bitfld.long 0x18 22. "DBGEN,DBG clock enable bit" "0,1"
bitfld.long 0x18 14. "USART1EN,USART1 clock enable bit" "0,1"
bitfld.long 0x18 12. "SPI1EN,SPI1 clock enable bit" "0,1"
bitfld.long 0x18 9. "ADCEN,ADC clock enable bit" "0,1"
bitfld.long 0x18 7. "FWEN,Firewall clock enable bit" "0,1"
bitfld.long 0x18 5. "TIM22EN,TIM22 timer clock enable bit" "0,1"
bitfld.long 0x18 2. "TIM21EN,TIM21 timer clock enable bit" "0,1"
bitfld.long 0x18 0. "SYSCFGEN,System configuration controller clock enable bit" "0,1"
line.long 0x1C "APB1ENR,APB1 peripheral clock enable register"
bitfld.long 0x1C 31. "LPTIM1EN,Low power timer clock enable bit" "0,1"
bitfld.long 0x1C 30. "I2C3EN,I2C3 clock enable bit" "0,1"
bitfld.long 0x1C 28. "PWREN,Power interface clock enable bit" "0,1"
bitfld.long 0x1C 22. "I2C2EN,I2C2 clock enable bit" "0,1"
bitfld.long 0x1C 21. "I2C1EN,I2C1 clock enable bit" "0,1"
bitfld.long 0x1C 20. "USART5EN,USART5 clock enable bit" "0,1"
bitfld.long 0x1C 19. "USART4EN,USART4 clock enable bit" "0,1"
bitfld.long 0x1C 18. "LPUART1EN,LPUART1 clock enable bit" "0,1"
newline
bitfld.long 0x1C 17. "USART2EN,UART2 clock enable bit" "0,1"
bitfld.long 0x1C 14. "SPI2EN,SPI2 clock enable bit" "0,1"
bitfld.long 0x1C 11. "WWDGEN,Window watchdog clock enable bit" "0,1"
bitfld.long 0x1C 5. "TIM7EN,Timer 7 clock enable bit" "0,1"
bitfld.long 0x1C 4. "TIM6EN,Timer 6 clock enable bit" "0,1"
bitfld.long 0x1C 2. "TIM3EN,Timer 3 clock enbale bit" "0,1"
bitfld.long 0x1C 0. "TIM2EN,Timer2 clock enable bit" "0,1"
line.long 0x20 "IOPSMEN,GPIO clock enable in sleep mode register"
bitfld.long 0x20 7. "IOPHSMEN,Port H clock enable during Sleep mode bit" "0,1"
bitfld.long 0x20 4. "IOPESMEN,Port E clock enable during Sleep mode bit" "0,1"
bitfld.long 0x20 3. "IOPDSMEN,Port D clock enable during Sleep mode bit" "0,1"
bitfld.long 0x20 2. "IOPCSMEN,Port C clock enable during Sleep mode bit" "0,1"
bitfld.long 0x20 1. "IOPBSMEN,Port B clock enable during Sleep mode bit" "0,1"
bitfld.long 0x20 0. "IOPASMEN,Port A clock enable during Sleep mode bit" "0,1"
line.long 0x24 "AHBSMENR,AHB peripheral clock enable in sleep mode register"
bitfld.long 0x24 24. "CRYPTSMEN,Crypto clock enable during sleep mode bit" "0,1"
bitfld.long 0x24 12. "CRCSMEN,CRC clock enable during sleep mode bit" "0,1"
bitfld.long 0x24 9. "SRAMSMEN,SRAM interface clock enable during sleep mode bit" "0,1"
bitfld.long 0x24 8. "MIFSMEN,NVM interface clock enable during sleep mode bit" "0,1"
bitfld.long 0x24 0. "DMASMEN,DMA clock enable during sleep mode bit" "0,1"
line.long 0x28 "APB2SMENR,APB2 peripheral clock enable in sleep mode register"
bitfld.long 0x28 22. "DBGSMEN,DBG clock enable during sleep mode bit" "0,1"
bitfld.long 0x28 14. "USART1SMEN,USART1 clock enable during sleep mode bit" "0,1"
bitfld.long 0x28 12. "SPI1SMEN,SPI1 clock enable during sleep mode bit" "0,1"
bitfld.long 0x28 9. "ADCSMEN,ADC clock enable during sleep mode bit" "0,1"
bitfld.long 0x28 5. "TIM22SMEN,TIM22 timer clock enable during sleep mode bit" "0,1"
bitfld.long 0x28 2. "TIM21SMEN,TIM21 timer clock enable during sleep mode bit" "0,1"
bitfld.long 0x28 0. "SYSCFGSMEN,System configuration controller clock enable during sleep mode bit" "0,1"
line.long 0x2C "APB1SMENR,APB1 peripheral clock enable in sleep mode register"
bitfld.long 0x2C 31. "LPTIM1SMEN,Low power timer clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 30. "I2C3SMEN,I2C3 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 28. "PWRSMEN,Power interface clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 27. "CRSSMEN,Clock recovery system clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 22. "I2C2SMEN,I2C2 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 21. "I2C1SMEN,I2C1 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 20. "USART5SMEN,USART5 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 19. "USART4SMEN,USART4 clock enabe during sleep mode bit" "0,1"
newline
bitfld.long 0x2C 18. "LPUART1SMEN,LPUART1 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 17. "USART2SMEN,UART2 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 14. "SPI2SMEN,SPI2 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 11. "WWDGSMEN,Window watchdog clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 5. "TIM7SMEN,Timer 7 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 4. "TIM6SMEN,Timer 6 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 1. "TIM3SMEN,Timer 3 clock enable during sleep mode bit" "0,1"
bitfld.long 0x2C 0. "TIM2SMEN,Timer2 clock enable during sleep mode bit" "0,1"
line.long 0x30 "CCIPR,Clock configuration register"
bitfld.long 0x30 19. "LPTIM1SEL1,Low Power Timer clock source selection bits" "0,1"
bitfld.long 0x30 18. "LPTIM1SEL0,LPTIM1SEL0" "0,1"
bitfld.long 0x30 17. "I2C3SEL1,I2C3 clock source selection bits" "0,1"
bitfld.long 0x30 16. "I2C3SEL0,I2C3 clock source selection bits" "0,1"
bitfld.long 0x30 13. "I2C1SEL1,I2C1 clock source selection bits" "0,1"
bitfld.long 0x30 12. "I2C1SEL0,I2C1SEL0" "0,1"
bitfld.long 0x30 11. "LPUART1SEL1,LPUART1 clock source selection bits" "0,1"
bitfld.long 0x30 10. "LPUART1SEL0,LPUART1SEL0" "0,1"
newline
bitfld.long 0x30 3. "USART2SEL1,USART2 clock source selection bits" "0,1"
bitfld.long 0x30 2. "USART2SEL0,USART2SEL0" "0,1"
bitfld.long 0x30 1. "USART1SEL1,USART1 clock source selection bits" "0,1"
bitfld.long 0x30 0. "USART1SEL0,USART1SEL0" "0,1"
line.long 0x34 "CSR,Control and status register"
bitfld.long 0x34 31. "LPWRSTF,Low-power reset flag" "0,1"
bitfld.long 0x34 30. "WWDGRSTF,Window watchdog reset flag" "0,1"
bitfld.long 0x34 29. "IWDGRSTF,Independent watchdog reset flag" "0,1"
bitfld.long 0x34 28. "SFTRSTF,Software reset flag" "0,1"
bitfld.long 0x34 27. "PORRSTF,POR/PDR reset flag" "0,1"
bitfld.long 0x34 26. "PINRSTF,PIN reset flag" "0,1"
bitfld.long 0x34 25. "OBLRSTF,OBLRSTF" "0,1"
bitfld.long 0x34 24. "FWRSTF,Firewall reset flag" "0,1"
newline
bitfld.long 0x34 23. "RMVF,Remove reset flag" "0,1"
bitfld.long 0x34 19. "RTCRST,RTC software reset bit" "0,1"
bitfld.long 0x34 18. "RTCEN,RTC clock enable bit" "0,1"
bitfld.long 0x34 16.--17. "RTCSEL,RTC and LCD clock source selection bits" "0,1,2,3"
bitfld.long 0x34 14. "CSSLSED,CSS on LSE failure detection flag" "0,1"
bitfld.long 0x34 13. "CSSLSEON,CSSLSEON" "0,1"
bitfld.long 0x34 11.--12. "LSEDRV,LSEDRV" "0,1,2,3"
bitfld.long 0x34 10. "LSEBYP,External low-speed oscillator bypass bit" "0,1"
newline
rbitfld.long 0x34 9. "LSERDY,External low-speed oscillator ready bit" "0,1"
bitfld.long 0x34 8. "LSEON,External low-speed oscillator enable bit" "0,1"
bitfld.long 0x34 2. "LSIIWDGLP,LSI clock input to IWDG in Ultra-low-power mode (Stop and Standby) enable bit" "0,1"
rbitfld.long 0x34 1. "LSIRDY,Internal low-speed oscillator ready bit" "0,1"
bitfld.long 0x34 0. "LSION,Internal low-speed oscillator enable" "0,1"
tree.end
tree "RTC (Real-Time Counter)"
base ad:0x40002800
group.long 0x0++0x17
line.long 0x0 "TR,RTC time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
line.long 0x4 "DR,RTC date register"
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format"
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format"
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
line.long 0x8 "CR,RTC control register"
bitfld.long 0x8 23. "COE,Calibration output enable" "0,1"
bitfld.long 0x8 21.--22. "OSEL,Output selection" "0,1,2,3"
bitfld.long 0x8 20. "POL,Output polarity" "0,1"
bitfld.long 0x8 19. "COSEL,Calibration output selection" "0,1"
bitfld.long 0x8 18. "BKP,Backup" "0,1"
bitfld.long 0x8 17. "SUB1H,Subtract 1 hour (winter time change)" "0,1"
newline
bitfld.long 0x8 16. "ADD1H,Add 1 hour (summer time change)" "0,1"
bitfld.long 0x8 15. "TSIE,Time-stamp interrupt enable" "0,1"
bitfld.long 0x8 14. "WUTIE,Wakeup timer interrupt enable" "0,1"
bitfld.long 0x8 13. "ALRBIE,Alarm B interrupt enable" "0,1"
bitfld.long 0x8 12. "ALRAIE,Alarm A interrupt enable" "0,1"
bitfld.long 0x8 11. "TSE,timestamp enable" "0,1"
newline
bitfld.long 0x8 10. "WUTE,Wakeup timer enable" "0,1"
bitfld.long 0x8 9. "ALRBE,Alarm B enable" "0,1"
bitfld.long 0x8 8. "ALRAE,Alarm A enable" "0,1"
bitfld.long 0x8 6. "FMT,Hour format" "0,1"
bitfld.long 0x8 5. "BYPSHAD,Bypass the shadow registers" "0,1"
bitfld.long 0x8 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60 Hz)" "0,1"
newline
bitfld.long 0x8 3. "TSEDGE,Time-stamp event active edge" "0,1"
bitfld.long 0x8 0.--2. "WUCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
line.long 0xC "ISR,RTC initialization and status register"
bitfld.long 0xC 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
bitfld.long 0xC 13. "TAMP1F,RTC_TAMP1 detection flag" "0,1"
bitfld.long 0xC 12. "TSOVF,Time-stamp overflow flag" "0,1"
bitfld.long 0xC 11. "TSF,Time-stamp flag" "0,1"
bitfld.long 0xC 10. "WUTF,Wakeup timer flag" "0,1"
bitfld.long 0xC 9. "ALRBF,Alarm B flag" "0,1"
newline
bitfld.long 0xC 8. "ALRAF,Alarm A flag" "0,1"
bitfld.long 0xC 7. "INIT,Initialization mode" "0,1"
rbitfld.long 0xC 6. "INITF,Initialization flag" "0,1"
bitfld.long 0xC 5. "RSF,Registers synchronization flag" "0,1"
rbitfld.long 0xC 4. "INITS,Initialization status flag" "0,1"
rbitfld.long 0xC 3. "SHPF,Shift operation pending" "0,1"
newline
rbitfld.long 0xC 2. "WUTWF,Wakeup timer write flag" "0,1"
rbitfld.long 0xC 1. "ALRBWF,Alarm B write flag" "0,1"
rbitfld.long 0xC 0. "ALRAWF,Alarm A write flag" "0,1"
line.long 0x10 "PRER,RTC prescaler register"
hexmask.long.byte 0x10 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor"
hexmask.long.word 0x10 0.--15. 1. "PREDIV_S,Synchronous prescaler factor"
line.long 0x14 "WUTR,RTC wakeup timer register"
hexmask.long.word 0x14 0.--15. 1. "WUT,Wakeup auto-reload value bits"
group.long 0x1C++0x7
line.long 0x0 "ALRMAR,RTC alarm A register"
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format." "0,1,2,3"
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format."
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
newline
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format."
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format."
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
newline
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "ALRMBR,RTC alarm B register"
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD format"
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
newline
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
newline
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
wgroup.long 0x24++0x3
line.long 0x0 "WPR,write protection register"
hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key"
rgroup.long 0x28++0x3
line.long 0x0 "SSR,RTC sub second register"
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
wgroup.long 0x2C++0x3
line.long 0x0 "SHIFTR,RTC shift control register"
bitfld.long 0x0 31. "ADD1S,Add one second" "0,1"
hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second"
rgroup.long 0x30++0xB
line.long 0x0 "TSTR,RTC timestamp time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format."
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format."
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "TSDR,RTC timestamp date register"
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
line.long 0x8 "TSSSR,RTC time-stamp sub second register"
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
group.long 0x3C++0x27
line.long 0x0 "CALR,RTC calibration register"
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5 ppm" "0,1"
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1"
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1"
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
line.long 0x4 "TAMPCR,RTC tamper configuration register"
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
newline
bitfld.long 0x4 15. "TAMPPUDIS,RTC_TAMPx pull-up disable" "0,1"
bitfld.long 0x4 13.--14. "TAMPPRCH,RTC_TAMPx precharge duration" "0,1,2,3"
bitfld.long 0x4 11.--12. "TAMPFLT,RTC_TAMPx filter count" "0,1,2,3"
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection event" "0,1"
bitfld.long 0x4 4. "TAMP2_TRG,Active level for RTC_TAMP2 input" "0,1"
newline
bitfld.long 0x4 3. "TAMP2E,RTC_TAMP2 input detection enable" "0,1"
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
bitfld.long 0x4 1. "TAMP1TRG,Active level for RTC_TAMP1 input" "0,1"
bitfld.long 0x4 0. "TAMP1E,RTC_TAMP1 input detection enable" "0,1"
line.long 0x8 "ALRMASSR,RTC alarm A sub second register"
hexmask.long.byte 0x8 24.--27. 1. "MASKSS,Mask the most-significant bits starting at this bit"
hexmask.long.word 0x8 0.--14. 1. "SS,Sub seconds value"
line.long 0xC "ALRMBSSR,RTC alarm B sub second register"
hexmask.long.byte 0xC 24.--27. 1. "MASKSS,Mask the most-significant bits starting at this bit"
hexmask.long.word 0xC 0.--14. 1. "SS,Sub seconds value"
line.long 0x10 "OR,option register"
bitfld.long 0x10 1. "RTC_OUT_RMP,RTC_ALARM on PC13 output type" "0,1"
bitfld.long 0x10 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output type" "0,1"
line.long 0x14 "BKP0R,RTC backup registers"
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
line.long 0x18 "BKP1R,RTC backup registers"
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
line.long 0x1C "BKP2R,RTC backup registers"
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
line.long 0x20 "BKP3R,RTC backup registers"
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
line.long 0x24 "BKP4R,RTC backup registers"
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
tree.end
tree "SCB (System Control Block)"
base ad:0xE000ED00
rgroup.long 0x0++0x3
line.long 0x0 "CPUID,CPUID base register"
hexmask.long.byte 0x0 24.--31. 1. "Implementer,Implementer code"
hexmask.long.byte 0x0 20.--23. 1. "Variant,Variant number"
hexmask.long.byte 0x0 16.--19. 1. "Architecture,Reads as 0xF"
hexmask.long.word 0x0 4.--15. 1. "PartNo,Part number of the processor"
hexmask.long.byte 0x0 0.--3. 1. "Revision,Revision number"
group.long 0x4++0x13
line.long 0x0 "ICSR,Interrupt control and state register"
bitfld.long 0x0 31. "NMIPENDSET,NMI set-pending bit." "0,1"
bitfld.long 0x0 28. "PENDSVSET,PendSV set-pending bit" "0,1"
bitfld.long 0x0 27. "PENDSVCLR,PendSV clear-pending bit" "0,1"
bitfld.long 0x0 26. "PENDSTSET,SysTick exception set-pending bit" "0,1"
bitfld.long 0x0 25. "PENDSTCLR,SysTick exception clear-pending bit" "0,1"
bitfld.long 0x0 22. "ISRPENDING,Interrupt pending flag" "0,1"
hexmask.long.byte 0x0 12.--18. 1. "VECTPENDING,Pending vector"
newline
bitfld.long 0x0 11. "RETTOBASE,Return to base level" "0,1"
hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active vector"
line.long 0x4 "VTOR,Vector table offset register"
hexmask.long 0x4 7.--31. 1. "TBLOFF,Vector table base offset field"
line.long 0x8 "AIRCR,Application interrupt and reset control register"
hexmask.long.word 0x8 16.--31. 1. "VECTKEYSTAT,Register key"
bitfld.long 0x8 15. "ENDIANESS,ENDIANESS" "0,1"
bitfld.long 0x8 2. "SYSRESETREQ,SYSRESETREQ" "0,1"
bitfld.long 0x8 1. "VECTCLRACTIVE,VECTCLRACTIVE" "0,1"
line.long 0xC "SCR,System control register"
bitfld.long 0xC 4. "SEVEONPEND,Send Event on Pending bit" "0,1"
bitfld.long 0xC 2. "SLEEPDEEP,SLEEPDEEP" "0,1"
bitfld.long 0xC 1. "SLEEPONEXIT,SLEEPONEXIT" "0,1"
line.long 0x10 "CCR,Configuration and control register"
bitfld.long 0x10 9. "STKALIGN,STKALIGN" "0,1"
bitfld.long 0x10 8. "BFHFNMIGN,BFHFNMIGN" "0,1"
bitfld.long 0x10 4. "DIV_0_TRP,DIV_0_TRP" "0,1"
bitfld.long 0x10 3. "UNALIGN__TRP,UNALIGN_ TRP" "0,1"
bitfld.long 0x10 1. "USERSETMPEND,USERSETMPEND" "0,1"
bitfld.long 0x10 0. "NONBASETHRDENA,Configures how the processor enters Thread mode" "0,1"
group.long 0x1C++0x7
line.long 0x0 "SHPR2,System handler priority registers"
hexmask.long.byte 0x0 24.--31. 1. "PRI_11,Priority of system handler 11"
line.long 0x4 "SHPR3,System handler priority registers"
hexmask.long.byte 0x4 24.--31. 1. "PRI_15,Priority of system handler 15"
hexmask.long.byte 0x4 16.--23. 1. "PRI_14,Priority of system handler 14"
tree.end
tree "SPI (Serial Peripheral Interface)"
base ad:0x40013000
group.long 0x0++0x13
line.long 0x0 "CR1,control register 1"
bitfld.long 0x0 15. "BIDIMODE,Bidirectional data mode enable" "0,1"
bitfld.long 0x0 14. "BIDIOE,Output enable in bidirectional mode" "0,1"
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation enable" "0,1"
bitfld.long 0x0 12. "CRCNEXT,CRC transfer next" "0,1"
bitfld.long 0x0 11. "DFF,Data frame format" "0,1"
bitfld.long 0x0 10. "RXONLY,Receive only" "0,1"
bitfld.long 0x0 9. "SSM,Software slave management" "0,1"
bitfld.long 0x0 8. "SSI,Internal slave select" "0,1"
bitfld.long 0x0 7. "LSBFIRST,Frame format" "0,1"
bitfld.long 0x0 6. "SPE,SPI enable" "0,1"
newline
bitfld.long 0x0 3.--5. "BR,Baud rate control" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "MSTR,Master selection" "0,1"
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
line.long 0x4 "CR2,control register 2"
bitfld.long 0x4 7. "TXEIE,Tx buffer empty interrupt enable" "0,1"
bitfld.long 0x4 6. "RXNEIE,RX buffer not empty interrupt enable" "0,1"
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
bitfld.long 0x4 4. "FRF,Frame format" "0,1"
bitfld.long 0x4 2. "SSOE,SS output enable" "0,1"
bitfld.long 0x4 1. "TXDMAEN,Tx buffer DMA enable" "0,1"
bitfld.long 0x4 0. "RXDMAEN,Rx buffer DMA enable" "0,1"
line.long 0x8 "SR,status register"
rbitfld.long 0x8 8. "TIFRFE,TI frame format error" "0,1"
rbitfld.long 0x8 7. "BSY,Busy flag" "0,1"
rbitfld.long 0x8 6. "OVR,Overrun flag" "0,1"
rbitfld.long 0x8 5. "MODF,Mode fault" "0,1"
bitfld.long 0x8 4. "CRCERR,CRC error flag" "0,1"
rbitfld.long 0x8 3. "UDR,Underrun flag" "0,1"
rbitfld.long 0x8 2. "CHSIDE,Channel side" "0,1"
rbitfld.long 0x8 1. "TXE,Transmit buffer empty" "0,1"
rbitfld.long 0x8 0. "RXNE,Receive buffer not empty" "0,1"
line.long 0xC "DR,data register"
hexmask.long.word 0xC 0.--15. 1. "DR,Data register"
line.long 0x10 "CRCPR,CRC polynomial register"
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x14++0x7
line.long 0x0 "RXCRCR,RX CRC register"
hexmask.long.word 0x0 0.--15. 1. "RxCRC,Rx CRC register"
line.long 0x4 "TXCRCR,TX CRC register"
hexmask.long.word 0x4 0.--15. 1. "TxCRC,Tx CRC register"
group.long 0x1C++0x7
line.long 0x0 "I2SCFGR,I2S configuration register"
bitfld.long 0x0 11. "I2SMOD,I2S mode selection" "0,1"
bitfld.long 0x0 10. "I2SE,I2S Enable" "0,1"
bitfld.long 0x0 8.--9. "I2SCFG,I2S configuration mode" "0,1,2,3"
bitfld.long 0x0 7. "PCMSYNC,PCM frame synchronization" "0,1"
bitfld.long 0x0 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
bitfld.long 0x0 3. "CKPOL,Steady state clock polarity" "0,1"
bitfld.long 0x0 1.--2. "DATLEN,Data length to be transferred" "0,1,2,3"
bitfld.long 0x0 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
line.long 0x4 "I2SPR,I2S prescaler register"
bitfld.long 0x4 9. "MCKOE,Master clock output enable" "0,1"
bitfld.long 0x4 8. "ODD,Odd factor for the prescaler" "0,1"
hexmask.long.byte 0x4 0.--7. 1. "I2SDIV,I2S Linear prescaler"
tree.end
tree "STK (SysTick Timer)"
base ad:0xE000E010
group.long 0x0++0xF
line.long 0x0 "CSR,SysTick control and status register"
bitfld.long 0x0 16. "COUNTFLAG,COUNTFLAG" "0,1"
bitfld.long 0x0 2. "CLKSOURCE,Clock source selection" "0,1"
bitfld.long 0x0 1. "TICKINT,SysTick exception request enable" "0,1"
bitfld.long 0x0 0. "ENABLE,Counter enable" "0,1"
line.long 0x4 "RVR,SysTick reload value register"
hexmask.long.tbyte 0x4 0.--23. 1. "RELOAD,RELOAD value"
line.long 0x8 "CVR,SysTick current value register"
hexmask.long.tbyte 0x8 0.--23. 1. "CURRENT,Current counter value"
line.long 0xC "CALIB,SysTick calibration value register"
bitfld.long 0xC 31. "NOREF,NOREF flag. Reads as zero" "0,1"
bitfld.long 0xC 30. "SKEW,SKEW flag: Indicates whether the TENMS value is exact" "0,1"
hexmask.long.tbyte 0xC 0.--23. 1. "TENMS,Calibration value"
tree.end
tree "SYSCFG (System Configuration Controller Register)"
base ad:0x40010000
group.long 0x0++0x17
line.long 0x0 "CFGR1,SYSCFG configuration register 1"
rbitfld.long 0x0 8.--9. "BOOT_MODE,Boot mode selected by the boot pins status bits" "0,1,2,3"
bitfld.long 0x0 0.--1. "MEM_MODE,Memory mapping selection bits" "0,1,2,3"
line.long 0x4 "CFGR2,SYSCFG configuration register 2"
bitfld.long 0x4 13. "I2C2_FMP,I2C2 Fm+ drive capability enable bit" "0,1"
bitfld.long 0x4 12. "I2C1_FMP,I2C1 Fm+ drive capability enable bit" "0,1"
bitfld.long 0x4 11. "I2C_PB9_FMP,Fm+ drive capability on PB9 enable bit" "0,1"
bitfld.long 0x4 10. "I2C_PB8_FMP,Fm+ drive capability on PB8 enable bit" "0,1"
bitfld.long 0x4 9. "I2C_PB7_FMP,Fm+ drive capability on PB7 enable bit" "0,1"
bitfld.long 0x4 8. "I2C_PB6_FMP,Fm+ drive capability on PB6 enable bit" "0,1"
newline
bitfld.long 0x4 1.--3. "CAPA,Configuration of internal VLCD rail connection to optional external capacitor" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "FWDISEN,Firewall disable bit" "0,1"
line.long 0x8 "EXTICR1,external interrupt configuration register 1"
hexmask.long.byte 0x8 12.--15. 1. "EXTI3,EXTI x configuration (x = 0 to 3)"
hexmask.long.byte 0x8 8.--11. 1. "EXTI2,EXTI x configuration (x = 0 to 3)"
hexmask.long.byte 0x8 4.--7. 1. "EXTI1,EXTI x configuration (x = 0 to 3)"
hexmask.long.byte 0x8 0.--3. 1. "EXTI0,EXTI x configuration (x = 0 to 3)"
line.long 0xC "EXTICR2,external interrupt configuration register 2"
hexmask.long.byte 0xC 12.--15. 1. "EXTI7,EXTI x configuration (x = 4 to 7)"
hexmask.long.byte 0xC 8.--11. 1. "EXTI6,EXTI x configuration (x = 4 to 7)"
hexmask.long.byte 0xC 4.--7. 1. "EXTI5,EXTI x configuration (x = 4 to 7)"
hexmask.long.byte 0xC 0.--3. 1. "EXTI4,EXTI x configuration (x = 4 to 7)"
line.long 0x10 "EXTICR3,external interrupt configuration register 3"
hexmask.long.byte 0x10 12.--15. 1. "EXTI11,EXTI x configuration (x = 8 to 11)"
hexmask.long.byte 0x10 8.--11. 1. "EXTI10,EXTI10"
hexmask.long.byte 0x10 4.--7. 1. "EXTI9,EXTI x configuration (x = 8 to 11)"
hexmask.long.byte 0x10 0.--3. 1. "EXTI8,EXTI x configuration (x = 8 to 11)"
line.long 0x14 "EXTICR4,external interrupt configuration register 4"
hexmask.long.byte 0x14 12.--15. 1. "EXTI15,EXTI x configuration (x = 12 to 15)"
hexmask.long.byte 0x14 8.--11. 1. "EXTI14,EXTI14"
hexmask.long.byte 0x14 4.--7. 1. "EXTI13,EXTI13"
hexmask.long.byte 0x14 0.--3. 1. "EXTI12,EXTI12"
group.long 0x20++0x3
line.long 0x0 "CFGR3,SYSCFG configuration register 3"
bitfld.long 0x0 31. "REF_LOCK,REF_CTRL lock bit" "0,1"
rbitfld.long 0x0 30. "VREFINT_RDYF,VREFINT ready flag" "0,1"
rbitfld.long 0x0 29. "VREFINT_COMP_RDYF,VREFINT for comparator ready flag" "0,1"
rbitfld.long 0x0 28. "VREFINT_ADC_RDYF,VREFINT for ADC ready flag" "0,1"
rbitfld.long 0x0 27. "SENSOR_ADC_RDYF,Sensor for ADC ready flag" "0,1"
rbitfld.long 0x0 26. "REF_RC48MHz_RDYF,VREFINT for 48 MHz RC oscillator ready flag" "0,1"
newline
bitfld.long 0x0 13. "ENREF_RC48MHz,VREFINT reference for 48 MHz RC oscillator enable bit" "0,1"
bitfld.long 0x0 12. "ENBUF_VREFINT_COMP,VREFINT reference for comparator 2 enable bit" "0,1"
bitfld.long 0x0 9. "ENBUF_SENSOR_ADC,Sensor reference for ADC enable bit" "0,1"
bitfld.long 0x0 8. "ENBUF_BGAP_ADC,VREFINT reference for ADC enable bit" "0,1"
bitfld.long 0x0 4.--5. "SEL_VREF_OUT,BGAP_ADC connection bit" "0,1,2,3"
bitfld.long 0x0 0. "EN_BGAP,Vref Enable bit" "0,1"
tree.end
tree "TIM (General-Purpose Timers)"
base ad:0x0
tree "TIM2"
base ad:0x40000000
group.long 0x0++0x13
line.long 0x0 "CR1,control register 1"
bitfld.long 0x0 8.--9. "CKD,Clock division" "0,1,2,3"
bitfld.long 0x0 7. "ARPE,Auto-reload preload enable" "0,1"
bitfld.long 0x0 5.--6. "CMS,Center-aligned mode selection" "0,1,2,3"
bitfld.long 0x0 4. "DIR,Direction" "0,1"
bitfld.long 0x0 3. "OPM,One-pulse mode" "0,1"
bitfld.long 0x0 2. "URS,Update request source" "0,1"
bitfld.long 0x0 1. "UDIS,Update disable" "0,1"
bitfld.long 0x0 0. "CEN,Counter enable" "0,1"
line.long 0x4 "CR2,control register 2"
bitfld.long 0x4 7. "TI1S,TI1 selection" "0,1"
bitfld.long 0x4 4.--6. "MMS,Master mode selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 3. "CCDS,Capture/compare DMA selection" "0,1"
line.long 0x8 "SMCR,slave mode control register"
bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1"
bitfld.long 0x8 14. "ECE,External clock enable" "0,1"
bitfld.long 0x8 12.--13. "ETPS,External trigger prescaler" "0,1,2,3"
hexmask.long.byte 0x8 8.--11. 1. "ETF,External trigger filter"
bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1"
bitfld.long 0x8 4.--6. "TS,Trigger selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "SMS,Slave mode selection" "0,1,2,3,4,5,6,7"
line.long 0xC "DIER,DMA/Interrupt enable register"
bitfld.long 0xC 14. "TDE,Trigger DMA request enable" "0,1"
bitfld.long 0xC 12. "CC4DE,Capture/Compare 4 DMA request enable" "0,1"
bitfld.long 0xC 11. "CC3DE,Capture/Compare 3 DMA request enable" "0,1"
bitfld.long 0xC 10. "CC2DE,Capture/Compare 2 DMA request enable" "0,1"
bitfld.long 0xC 9. "CC1DE,Capture/Compare 1 DMA request enable" "0,1"
bitfld.long 0xC 8. "UDE,Update DMA request enable" "0,1"
bitfld.long 0xC 6. "TIE,Trigger interrupt enable" "0,1"
bitfld.long 0xC 4. "CC4IE,Capture/Compare 4 interrupt enable" "0,1"
bitfld.long 0xC 3. "CC3IE,Capture/Compare 3 interrupt enable" "0,1"
bitfld.long 0xC 2. "CC2IE,Capture/Compare 2 interrupt enable" "0,1"
newline
bitfld.long 0xC 1. "CC1IE,Capture/Compare 1 interrupt enable" "0,1"
bitfld.long 0xC 0. "UIE,Update interrupt enable" "0,1"
line.long 0x10 "SR,status register"
bitfld.long 0x10 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0x10 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
bitfld.long 0x10 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0x10 9. "CC1OF,Capture/Compare 1 overcapture flag" "0,1"
bitfld.long 0x10 6. "TIF,Trigger interrupt flag" "0,1"
bitfld.long 0x10 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
bitfld.long 0x10 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0x10 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
bitfld.long 0x10 1. "CC1IF,Capture/compare 1 interrupt flag" "0,1"
bitfld.long 0x10 0. "UIF,Update interrupt flag" "0,1"
wgroup.long 0x14++0x3
line.long 0x0 "EGR,event generation register"
bitfld.long 0x0 6. "TG,Trigger generation" "0,1"
bitfld.long 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
bitfld.long 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.long 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.long 0x0 1. "CC1G,Capture/compare 1 generation" "0,1"
bitfld.long 0x0 0. "UG,Update generation" "0,1"
group.long 0x18++0x3
line.long 0x0 "CCMR1_Output,capture/compare mode register 1 (output mode)"
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,Output compare 2 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0,1,2,3"
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0,1"
bitfld.long 0x0 4.--6. "OC1M,Output compare 1 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0,1"
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0,1,2,3"
group.long 0x18++0x7
line.long 0x0 "CCMR1_Input,capture/compare mode register 1 (input mode)"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0,1,2,3"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0,1,2,3"
line.long 0x4 "CCMR2_Output,capture/compare mode register 2 (output mode)"
bitfld.long 0x4 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x4 12.--14. "OC4M,Output compare 4 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x4 10. "OC4FE,Output compare 4 fast enable" "0,1"
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0,1,2,3"
bitfld.long 0x4 7. "OC3CE,Output compare 3 clear enable" "0,1"
bitfld.long 0x4 4.--6. "OC3M,Output compare 3 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 3. "OC3PE,Output compare 3 preload enable" "0,1"
bitfld.long 0x4 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0,1,2,3"
group.long 0x1C++0x13
line.long 0x0 "CCMR2_Input,capture/compare mode register 2 (input mode)"
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0,1,2,3"
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0,1,2,3"
line.long 0x4 "CCER,capture/compare enable register"
bitfld.long 0x4 15. "CC4NP,Capture/Compare 4 output Polarity" "0,1"
bitfld.long 0x4 13. "CC4P,Capture/Compare 3 output Polarity" "0,1"
bitfld.long 0x4 12. "CC4E,Capture/Compare 4 output enable" "0,1"
bitfld.long 0x4 11. "CC3NP,Capture/Compare 3 output Polarity" "0,1"
bitfld.long 0x4 9. "CC3P,Capture/Compare 3 output Polarity" "0,1"
bitfld.long 0x4 8. "CC3E,Capture/Compare 3 output enable" "0,1"
bitfld.long 0x4 7. "CC2NP,Capture/Compare 2 output Polarity" "0,1"
bitfld.long 0x4 5. "CC2P,Capture/Compare 2 output Polarity" "0,1"
bitfld.long 0x4 4. "CC2E,Capture/Compare 2 output enable" "0,1"
bitfld.long 0x4 3. "CC1NP,Capture/Compare 1 output Polarity" "0,1"
newline
bitfld.long 0x4 1. "CC1P,Capture/Compare 1 output Polarity" "0,1"
bitfld.long 0x4 0. "CC1E,Capture/Compare 1 output enable" "0,1"
line.long 0x8 "CNT,counter"
hexmask.long.word 0x8 16.--31. 1. "CNT_H,High counter value (TIM2 only)"
hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value"
line.long 0xC "PSC,prescaler"
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
line.long 0x10 "ARR,auto-reload register"
hexmask.long.word 0x10 16.--31. 1. "ARR_H,High Auto-reload value (TIM2 only)"
hexmask.long.word 0x10 0.--15. 1. "ARR_L,Low Auto-reload value"
group.long 0x34++0xF
line.long 0x0 "CCR1,capture/compare register 1"
hexmask.long.word 0x0 16.--31. 1. "CCR1_H,High Capture/Compare 1 value (TIM2 only)"
hexmask.long.word 0x0 0.--15. 1. "CCR1_L,Low Capture/Compare 1 value"
line.long 0x4 "CCR2,capture/compare register 2"
hexmask.long.word 0x4 16.--31. 1. "CCR2_H,High Capture/Compare 2 value (TIM2 only)"
hexmask.long.word 0x4 0.--15. 1. "CCR2_L,Low Capture/Compare 2 value"
line.long 0x8 "CCR3,capture/compare register 3"
hexmask.long.word 0x8 16.--31. 1. "CCR3_H,High Capture/Compare value (TIM2 only)"
hexmask.long.word 0x8 0.--15. 1. "CCR3_L,Low Capture/Compare value"
line.long 0xC "CCR4,capture/compare register 4"
hexmask.long.word 0xC 16.--31. 1. "CCR4_H,High Capture/Compare value (TIM2 only)"
hexmask.long.word 0xC 0.--15. 1. "CCR4_L,Low Capture/Compare value"
group.long 0x48++0xB
line.long 0x0 "DCR,DMA control register"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "DMAR,DMA address for full transfer"
hexmask.long.word 0x4 0.--15. 1. "DMAB,DMA register for burst accesses"
line.long 0x8 "OR,TIM2 option register"
bitfld.long 0x8 3.--4. "TI4_RMP,Internal trigger" "0,1,2,3"
bitfld.long 0x8 0.--2. "ETR_RMP,Timer2 ETR remap" "0,1,2,3,4,5,6,7"
tree.end
tree "TIM21"
base ad:0x40010800
group.long 0x0++0x13
line.long 0x0 "CR1,control register 1"
bitfld.long 0x0 8.--9. "CKD,Clock division" "0,1,2,3"
bitfld.long 0x0 7. "ARPE,Auto-reload preload enable" "0,1"
bitfld.long 0x0 5.--6. "CMS,Center-aligned mode selection" "0,1,2,3"
bitfld.long 0x0 4. "DIR,Direction" "0,1"
bitfld.long 0x0 3. "OPM,One-pulse mode" "0,1"
bitfld.long 0x0 2. "URS,Update request source" "0,1"
bitfld.long 0x0 1. "UDIS,Update disable" "0,1"
bitfld.long 0x0 0. "CEN,Counter enable" "0,1"
line.long 0x4 "CR2,control register 2"
bitfld.long 0x4 4.--6. "MMS,Master mode selection" "0,1,2,3,4,5,6,7"
line.long 0x8 "SMCR,slave mode control register"
bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1"
bitfld.long 0x8 14. "ECE,External clock enable" "0,1"
bitfld.long 0x8 12.--13. "ETPS,External trigger prescaler" "0,1,2,3"
hexmask.long.byte 0x8 8.--11. 1. "ETF,External trigger filter"
bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1"
bitfld.long 0x8 4.--6. "TS,Trigger selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "SMS,Slave mode selection" "0,1,2,3,4,5,6,7"
line.long 0xC "DIER,DMA/Interrupt enable register"
bitfld.long 0xC 6. "TIE,Trigger interrupt enable" "0,1"
bitfld.long 0xC 2. "CC2IE,Capture/Compare 2 interrupt enable" "0,1"
bitfld.long 0xC 1. "CC1IE,Capture/Compare 1 interrupt enable" "0,1"
bitfld.long 0xC 0. "UIE,Update interrupt enable" "0,1"
line.long 0x10 "SR,status register"
bitfld.long 0x10 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0x10 9. "CC1OF,Capture/Compare 1 overcapture flag" "0,1"
bitfld.long 0x10 6. "TIF,Trigger interrupt flag" "0,1"
bitfld.long 0x10 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
bitfld.long 0x10 1. "CC1IF,Capture/compare 1 interrupt flag" "0,1"
bitfld.long 0x10 0. "UIF,Update interrupt flag" "0,1"
wgroup.long 0x14++0x3
line.long 0x0 "EGR,event generation register"
bitfld.long 0x0 6. "TG,Trigger generation" "0,1"
bitfld.long 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.long 0x0 1. "CC1G,Capture/compare 1 generation" "0,1"
bitfld.long 0x0 0. "UG,Update generation" "0,1"
group.long 0x18++0x3
line.long 0x0 "CCMR1_Output,capture/compare mode register (output mode)"
bitfld.long 0x0 12.--14. "OC2M,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 11. "OC2PE,Output Compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output Compare 2 fast enable" "0,1"
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0,1,2,3"
bitfld.long 0x0 4.--6. "OC1M,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0,1"
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0,1,2,3"
group.long 0x18++0x3
line.long 0x0 "CCMR1_Input,capture/compare mode register 1 (input mode)"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0,1,2,3"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0,1,2,3"
group.long 0x20++0xF
line.long 0x0 "CCER,capture/compare enable register"
bitfld.long 0x0 7. "CC2NP,Capture/Compare 2 output Polarity" "0,1"
bitfld.long 0x0 5. "CC2P,Capture/Compare 2 output Polarity" "0,1"
bitfld.long 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1"
bitfld.long 0x0 3. "CC1NP,Capture/Compare 1 output Polarity" "0,1"
bitfld.long 0x0 1. "CC1P,Capture/Compare 1 output Polarity" "0,1"
bitfld.long 0x0 0. "CC1E,Capture/Compare 1 output enable" "0,1"
line.long 0x4 "CNT,counter"
hexmask.long.word 0x4 0.--15. 1. "CNT,counter value"
line.long 0x8 "PSC,prescaler"
hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value"
line.long 0xC "ARR,auto-reload register"
hexmask.long.word 0xC 0.--15. 1. "ARR,Auto-reload value"
group.long 0x34++0x7
line.long 0x0 "CCR1,capture/compare register 1"
hexmask.long.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
line.long 0x4 "CCR2,capture/compare register 2"
hexmask.long.word 0x4 0.--15. 1. "CCR2,Capture/Compare 2 value"
group.long 0x50++0x3
line.long 0x0 "OR,TIM21 option register"
bitfld.long 0x0 5. "TI2_RMP,Timer21 TI2" "0,1"
bitfld.long 0x0 2.--4. "TI1_RMP,Timer21 TI1" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--1. "ETR_RMP,Timer21 ETR remap" "0,1,2,3"
tree.end
tree "TIM22"
base ad:0x40011400
group.long 0x0++0x13
line.long 0x0 "CR1,control register 1"
bitfld.long 0x0 8.--9. "CKD,Clock division" "0,1,2,3"
bitfld.long 0x0 7. "ARPE,Auto-reload preload enable" "0,1"
bitfld.long 0x0 5.--6. "CMS,Center-aligned mode selection" "0,1,2,3"
bitfld.long 0x0 4. "DIR,Direction" "0,1"
bitfld.long 0x0 3. "OPM,One-pulse mode" "0,1"
bitfld.long 0x0 2. "URS,Update request source" "0,1"
bitfld.long 0x0 1. "UDIS,Update disable" "0,1"
bitfld.long 0x0 0. "CEN,Counter enable" "0,1"
line.long 0x4 "CR2,control register 2"
bitfld.long 0x4 4.--6. "MMS,Master mode selection" "0,1,2,3,4,5,6,7"
line.long 0x8 "SMCR,slave mode control register"
bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1"
bitfld.long 0x8 14. "ECE,External clock enable" "0,1"
bitfld.long 0x8 12.--13. "ETPS,External trigger prescaler" "0,1,2,3"
hexmask.long.byte 0x8 8.--11. 1. "ETF,External trigger filter"
bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1"
bitfld.long 0x8 4.--6. "TS,Trigger selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "SMS,Slave mode selection" "0,1,2,3,4,5,6,7"
line.long 0xC "DIER,DMA/Interrupt enable register"
bitfld.long 0xC 6. "TIE,Trigger interrupt enable" "0,1"
bitfld.long 0xC 2. "CC2IE,Capture/Compare 2 interrupt enable" "0,1"
bitfld.long 0xC 1. "CC1IE,Capture/Compare 1 interrupt enable" "0,1"
bitfld.long 0xC 0. "UIE,Update interrupt enable" "0,1"
line.long 0x10 "SR,status register"
bitfld.long 0x10 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0x10 9. "CC1OF,Capture/Compare 1 overcapture flag" "0,1"
bitfld.long 0x10 6. "TIF,Trigger interrupt flag" "0,1"
bitfld.long 0x10 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
bitfld.long 0x10 1. "CC1IF,Capture/compare 1 interrupt flag" "0,1"
bitfld.long 0x10 0. "UIF,Update interrupt flag" "0,1"
wgroup.long 0x14++0x3
line.long 0x0 "EGR,event generation register"
bitfld.long 0x0 6. "TG,Trigger generation" "0,1"
bitfld.long 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.long 0x0 1. "CC1G,Capture/compare 1 generation" "0,1"
bitfld.long 0x0 0. "UG,Update generation" "0,1"
group.long 0x18++0x3
line.long 0x0 "CCMR1_Output,capture/compare mode register (output mode)"
bitfld.long 0x0 12.--14. "OC2M,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 11. "OC2PE,Output Compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output Compare 2 fast enable" "0,1"
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0,1,2,3"
bitfld.long 0x0 4.--6. "OC1M,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0,1"
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0,1,2,3"
group.long 0x18++0x3
line.long 0x0 "CCMR1_Input,capture/compare mode register 1 (input mode)"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0,1,2,3"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0,1,2,3"
group.long 0x20++0xF
line.long 0x0 "CCER,capture/compare enable register"
bitfld.long 0x0 7. "CC2NP,Capture/Compare 2 output Polarity" "0,1"
bitfld.long 0x0 5. "CC2P,Capture/Compare 2 output Polarity" "0,1"
bitfld.long 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1"
bitfld.long 0x0 3. "CC1NP,Capture/Compare 1 output Polarity" "0,1"
bitfld.long 0x0 1. "CC1P,Capture/Compare 1 output Polarity" "0,1"
bitfld.long 0x0 0. "CC1E,Capture/Compare 1 output enable" "0,1"
line.long 0x4 "CNT,counter"
hexmask.long.word 0x4 0.--15. 1. "CNT,counter value"
line.long 0x8 "PSC,prescaler"
hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value"
line.long 0xC "ARR,auto-reload register"
hexmask.long.word 0xC 0.--15. 1. "ARR,Auto-reload value"
group.long 0x34++0x7
line.long 0x0 "CCR1,capture/compare register 1"
hexmask.long.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
line.long 0x4 "CCR2,capture/compare register 2"
hexmask.long.word 0x4 0.--15. 1. "CCR2,Capture/Compare 2 value"
group.long 0x50++0x3
line.long 0x0 "OR,TIM22 option register"
bitfld.long 0x0 2.--3. "TI1_RMP,Timer22 TI1" "0,1,2,3"
bitfld.long 0x0 0.--1. "ETR_RMP,Timer22 ETR remap" "0,1,2,3"
tree.end
tree.end
tree "USART (Universal Asynchronous Receiver/Transmitter)"
base ad:0x0
tree "LPUART1"
base ad:0x40004800
group.long 0x0++0xF
line.long 0x0 "CR1,Control register 1"
bitfld.long 0x0 28. "M1,Word length" "0,1"
bitfld.long 0x0 25. "DEAT4,Driver Enable assertion time" "0,1"
bitfld.long 0x0 24. "DEAT3,DEAT3" "0,1"
bitfld.long 0x0 23. "DEAT2,DEAT2" "0,1"
bitfld.long 0x0 22. "DEAT1,DEAT1" "0,1"
bitfld.long 0x0 21. "DEAT0,DEAT0" "0,1"
bitfld.long 0x0 20. "DEDT4,Driver Enable de-assertion time" "0,1"
bitfld.long 0x0 19. "DEDT3,DEDT3" "0,1"
bitfld.long 0x0 18. "DEDT2,DEDT2" "0,1"
bitfld.long 0x0 17. "DEDT1,DEDT1" "0,1"
bitfld.long 0x0 16. "DEDT0,DEDT0" "0,1"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0,1"
bitfld.long 0x0 13. "MME,Mute mode enable" "0,1"
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0,1"
bitfld.long 0x0 10. "PCE,Parity control enable" "0,1"
bitfld.long 0x0 9. "PS,Parity selection" "0,1"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0,1"
bitfld.long 0x0 7. "TXEIE,interrupt enable" "0,1"
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0,1"
bitfld.long 0x0 5. "RXNEIE,RXNE interrupt enable" "0,1"
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0,1"
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0,1"
bitfld.long 0x0 2. "RE,Receiver enable" "0,1"
bitfld.long 0x0 1. "UESM,USART enable in Stop mode" "0,1"
bitfld.long 0x0 0. "UE,USART enable" "0,1"
line.long 0x4 "CR2,Control register 2"
hexmask.long.byte 0x4 28.--31. 1. "ADD4_7,Address of the USART node"
hexmask.long.byte 0x4 24.--27. 1. "ADD0_3,Address of the USART node"
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0,1"
bitfld.long 0x4 18. "TAINV,Binary data inversion" "0,1"
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0,1"
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0,1"
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0,1"
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0,1,2,3"
bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0,1"
line.long 0x8 "CR3,Control register 3"
bitfld.long 0x8 22. "WUFIE,Wakeup from Stop mode interrupt enable" "0,1"
bitfld.long 0x8 20.--21. "WUS,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0,1"
bitfld.long 0x8 14. "DEM,Driver enable mode" "0,1"
bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0,1"
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0,1"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0,1"
bitfld.long 0x8 9. "CTSE,CTS enable" "0,1"
bitfld.long 0x8 8. "RTSE,RTS enable" "0,1"
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0,1"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0,1"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0,1"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0,1"
line.long 0xC "BRR,Baud rate register"
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,BRR"
wgroup.long 0x18++0x3
line.long 0x0 "RQR,Request register"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "ISR,Interrupt & status register"
bitfld.long 0x0 22. "REACK,REACK" "0,1"
bitfld.long 0x0 21. "TEACK,TEACK" "0,1"
bitfld.long 0x0 20. "WUF,WUF" "0,1"
bitfld.long 0x0 19. "RWU,RWU" "0,1"
bitfld.long 0x0 18. "SBKF,SBKF" "0,1"
bitfld.long 0x0 17. "CMF,CMF" "0,1"
bitfld.long 0x0 16. "BUSY,BUSY" "0,1"
bitfld.long 0x0 10. "CTS,CTS" "0,1"
bitfld.long 0x0 9. "CTSIF,CTSIF" "0,1"
bitfld.long 0x0 7. "TXE,TXE" "0,1"
bitfld.long 0x0 6. "TC,TC" "0,1"
newline
bitfld.long 0x0 5. "RXNE,RXNE" "0,1"
bitfld.long 0x0 4. "IDLE,IDLE" "0,1"
bitfld.long 0x0 3. "ORE,ORE" "0,1"
bitfld.long 0x0 2. "NF,NF" "0,1"
bitfld.long 0x0 1. "FE,FE" "0,1"
bitfld.long 0x0 0. "PE,PE" "0,1"
wgroup.long 0x20++0x3
line.long 0x0 "ICR,Interrupt flag clear register"
bitfld.long 0x0 20. "WUCF,Wakeup from Stop mode clear flag" "0,1"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NCF,Noise detected clear flag" "0,1"
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "RDR,Receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0x3
line.long 0x0 "TDR,Transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
tree.end
tree "USART2"
base ad:0x40004400
group.long 0x0++0x17
line.long 0x0 "CR1,Control register 1"
bitfld.long 0x0 28. "M1,Word length" "0,1"
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0,1"
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0,1"
bitfld.long 0x0 25. "DEAT4,Driver Enable assertion time" "0,1"
bitfld.long 0x0 24. "DEAT3,DEAT3" "0,1"
bitfld.long 0x0 23. "DEAT2,DEAT2" "0,1"
bitfld.long 0x0 22. "DEAT1,DEAT1" "0,1"
bitfld.long 0x0 21. "DEAT0,DEAT0" "0,1"
newline
bitfld.long 0x0 20. "DEDT4,Driver Enable de-assertion time" "0,1"
bitfld.long 0x0 19. "DEDT3,DEDT3" "0,1"
bitfld.long 0x0 18. "DEDT2,DEDT2" "0,1"
bitfld.long 0x0 17. "DEDT1,DEDT1" "0,1"
bitfld.long 0x0 16. "DEDT0,DEDT0" "0,1"
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0,1"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0,1"
bitfld.long 0x0 13. "MME,Mute mode enable" "0,1"
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bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0,1"
bitfld.long 0x0 10. "PCE,Parity control enable" "0,1"
bitfld.long 0x0 9. "PS,Parity selection" "0,1"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0,1"
bitfld.long 0x0 7. "TXEIE,interrupt enable" "0,1"
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0,1"
bitfld.long 0x0 5. "RXNEIE,RXNE interrupt enable" "0,1"
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bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0,1"
bitfld.long 0x0 3. "TE,Transmitter enable" "0,1"
bitfld.long 0x0 2. "RE,Receiver enable" "0,1"
bitfld.long 0x0 1. "UESM,USART enable in Stop mode" "0,1"
bitfld.long 0x0 0. "UE,USART enable" "0,1"
line.long 0x4 "CR2,Control register 2"
hexmask.long.byte 0x4 28.--31. 1. "ADD4_7,Address of the USART node"
hexmask.long.byte 0x4 24.--27. 1. "ADD0_3,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0,1"
bitfld.long 0x4 22. "ABRMOD1,Auto baud rate mode" "0,1"
bitfld.long 0x4 21. "ABRMOD0,ABRMOD0" "0,1"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0,1"
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0,1"
bitfld.long 0x4 18. "TAINV,Binary data inversion" "0,1"
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bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0,1"
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0,1"
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0,1"
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0,1"
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0,1,2,3"
bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1"
bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1"
bitfld.long 0x4 9. "CPHA,Clock phase" "0,1"
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0,1"
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0,1"
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0,1"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0,1"
line.long 0x8 "CR3,Control register 3"
bitfld.long 0x8 22. "WUFIE,Wakeup from Stop mode interrupt enable" "0,1"
bitfld.long 0x8 20.--21. "WUS,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0,1"
bitfld.long 0x8 14. "DEM,Driver enable mode" "0,1"
bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0,1"
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0,1"
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0,1"
newline
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0,1"
bitfld.long 0x8 9. "CTSE,CTS enable" "0,1"
bitfld.long 0x8 8. "RTSE,RTS enable" "0,1"
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0,1"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0,1"
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0,1"
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0,1"
newline
bitfld.long 0x8 2. "IRLP,Ir low-power" "0,1"
bitfld.long 0x8 1. "IREN,Ir mode enable" "0,1"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0,1"
line.long 0xC "BRR,Baud rate register"
hexmask.long.word 0xC 4.--15. 1. "DIV_Mantissa,DIV_Mantissa"
hexmask.long.byte 0xC 0.--3. 1. "DIV_Fraction,DIV_Fraction"
line.long 0x10 "GTPR,Guard time and prescaler register"
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
line.long 0x14 "RTOR,Receiver timeout register"
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "RQR,Request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "ISR,Interrupt & status register"
bitfld.long 0x0 22. "REACK,REACK" "0,1"
bitfld.long 0x0 21. "TEACK,TEACK" "0,1"
bitfld.long 0x0 20. "WUF,WUF" "0,1"
bitfld.long 0x0 19. "RWU,RWU" "0,1"
bitfld.long 0x0 18. "SBKF,SBKF" "0,1"
bitfld.long 0x0 17. "CMF,CMF" "0,1"
bitfld.long 0x0 16. "BUSY,BUSY" "0,1"
bitfld.long 0x0 15. "ABRF,ABRF" "0,1"
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bitfld.long 0x0 14. "ABRE,ABRE" "0,1"
bitfld.long 0x0 12. "EOBF,EOBF" "0,1"
bitfld.long 0x0 11. "RTOF,RTOF" "0,1"
bitfld.long 0x0 10. "CTS,CTS" "0,1"
bitfld.long 0x0 9. "CTSIF,CTSIF" "0,1"
bitfld.long 0x0 8. "LBDF,LBDF" "0,1"
bitfld.long 0x0 7. "TXE,TXE" "0,1"
bitfld.long 0x0 6. "TC,TC" "0,1"
newline
bitfld.long 0x0 5. "RXNE,RXNE" "0,1"
bitfld.long 0x0 4. "IDLE,IDLE" "0,1"
bitfld.long 0x0 3. "ORE,ORE" "0,1"
bitfld.long 0x0 2. "NF,NF" "0,1"
bitfld.long 0x0 1. "FE,FE" "0,1"
bitfld.long 0x0 0. "PE,PE" "0,1"
wgroup.long 0x20++0x3
line.long 0x0 "ICR,Interrupt flag clear register"
bitfld.long 0x0 20. "WUCF,Wakeup from Stop mode clear flag" "0,1"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NCF,Noise detected clear flag" "0,1"
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "RDR,Receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0x3
line.long 0x0 "TDR,Transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
tree.end
tree.end
tree "WWDG (System Window Watchdog)"
base ad:0x40002C00
group.long 0x0++0xB
line.long 0x0 "CR,Control register"
bitfld.long 0x0 7. "WDGA,Activation bit" "0,1"
hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)"
line.long 0x4 "CFR,Configuration register"
bitfld.long 0x4 9. "EWI,Early wakeup interrupt" "0,1"
bitfld.long 0x4 8. "WDGTB1,Timer base" "0,1"
bitfld.long 0x4 7. "WDGTB0,WDGTB0" "0,1"
hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value"
line.long 0x8 "SR,Status register"
bitfld.long 0x8 0. "EWIF,Early wakeup interrupt flag" "0,1"
tree.end
AUTOINDENT.OFF
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