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Gen4_R-Car_Trace32/2_Trunk/persam9x70.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: SAM9X70 On-Chip Peripherals
; @Props: Released
; @Author: NEJ
; @Changelog: 2023-06-22 NEJ
; 2023-11-23 NEJ
; @Manufacturer: MICROCHIP - Microchip Technology Inc.
; @Doc: Generated (TRACE32, build: 164847.), based on:
; SAM9X70.svd (Ver. 0)
; @Core: ARM926EJ
; @Chip: SAM9X75
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: persam9x70.per 17110 2023-11-28 12:50:35Z kwisniewski $
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree "ARM Core Registers"
AUTOINDENT.PUSH
AUTOINDENT.OFF
width 8.
tree "ID Registers"
group c15:0x0000--0x0000
line.long 0x0 "MIDR,Identity Code"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
group c15:0x0100--0x0100
line.long 0x0 "CTR,Cache Type"
bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
textline " "
bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
textline " "
bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
group c15:0x0200--0x0200
line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
tree.end
tree "MMU Control and Configuration"
width 8.
group c15:0x0001--0x0001
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
textline " "
bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
textline " "
bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
textline " "
group c15:0x0002--0x0002
line.long 0x0 "TTBR,Translation Table Base Register"
hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
textline " "
group c15:0x3--0x3
line.long 0x0 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
textline " "
group c15:0x0005--0x0005
line.long 0x0 "DFSR,Data Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0105--0x0105
line.long 0x0 "IFSR,Instruction Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0006--0x0006
line.long 0x0 "DFAR,Data Fault Address Register"
textline " "
group c15:0x000a--0x000a
line.long 0x0 "TLBR,TLB Lockdown Register"
bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. " P ,P bit" "0,1"
textline " "
group c15:0x000d--0x000d
line.long 0x0 "FCSEPID,FCSE Process ID"
group c15:0x010d--0x010d
line.long 0x0 "CONTEXT,Context ID"
tree.end
tree "Cache Control and Configuration"
group c15:0x0009--0x0009
line.long 0x0 "DCACHE,Data Cache Lockdown"
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
group c15:0x0109--0x0109
line.long 0x0 "ICACHE,Instruction Cache Lockdown"
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
tree.end
tree "TCM Control and Configuration"
group c15:0x0019--0x0019
line.long 0x0 "DTCM,Data TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
group c15:0x0119--0x0119
line.long 0x0 "ITCM,Instruction TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
tree.end
tree "Test and Debug"
group c15:0x000f--0x000f
line.long 0x0 "DOVRR,Debug Override Register"
bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
textline " "
bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
group c15:0x001f--0x001f
line.long 0x0 "ADDRESS,Debug/Test Address"
;wgroup c15:0x402f--0x402f
; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
;wgroup c15:0x403f--0x403f
; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
;wgroup c15:0x404f--0x404f
; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
;wgroup c15:0x405f--0x405f
; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
;wgroup c15:0x407f--0x407f
; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
;wgroup c15:0x412f--0x412f
; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
;wgroup c15:0x413f--0x413f
; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
;wgroup c15:0x414f--0x414f
; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
;wgroup c15:0x415f--0x415f
; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
;wgroup c15:0x417f--0x417f
; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
group c15:0x101f--0x101f
line.long 0x0 "TRACE,Trace Control"
bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
group c15:0x700f--0x700f
line.long 0x0 "CACHE,Cache Debug Control"
bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
group c15:0x701f--0x701f
line.long 0x0 "MMU,MMU Debug Control"
bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
textline " "
bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
group c15:0x002f--0x002f
line.long 0x0 "REMAP,Memory Region Remap"
bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
textline " "
bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
tree.end
tree "ICEbreaker"
width 8.
group ice:0x0--0x5 "Debug Control"
line.long 0x0 "DBGCTRL,Debug Control Register"
bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
textline " "
bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x4 "DBGSTAT,Debug Status Register"
bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x8 "VECTOR,Vector Catch Register"
bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
line.long 0x10 "COMCTRL,Debug Communication Control Register"
bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
line.long 0x14 "COMDATA,Debug Communication Data Register"
group ice:0x8--0x0d "Watchpoint 0"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x15 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
AUTOINDENT.POP
tree.end
tree "ADC (Analog-to-Digital Converter)"
base ad:0xF804C000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 4. "CMPRST,Comparison Restart" "0: No effect.,1: Stops the conversion result storage until the.."
bitfld.long 0x0 2. "TSCALIB,Touchscreen Calibration" "0: No effect.,1: Programs screen calibration (VDD/GND measurement)"
newline
bitfld.long 0x0 1. "START,Start Conversion" "0: No effect.,1: Triggers a single sequence of analog-to-digital.."
bitfld.long 0x0 0. "SWRST,Software Reset" "0: No effect.,1: Resets the ADC."
group.long 0x4++0xB
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 31. "USEQ,User Sequence Enable" "0: Normal mode: The controller converts channels in..,1: User Sequence mode: The sequence respects what.."
bitfld.long 0x0 30. "MAXSPEED,Maximum Sampling Rate Enable in Freerun Mode" "0,1"
newline
bitfld.long 0x0 28.--29. "TRANSFER,Transfer Time" "0,1,2,3"
hexmask.long.byte 0x0 24.--27. 1. "TRACKTIM,Tracking Time"
newline
bitfld.long 0x0 23. "ANACH,Analog Change" "0: No analog change on channel switching: DIFF0 is..,1: Allows different analog settings for each.."
hexmask.long.byte 0x0 16.--19. 1. "STARTUP,Startup Time"
newline
hexmask.long.byte 0x0 8.--15. 1. "PRESCAL,Prescaler Rate Selection"
bitfld.long 0x0 6. "FWUP,Fast Wakeup" "0: If SLEEP is 1 then both ADC core and reference..,1: If SLEEP is 1 then Fast Wakeup Sleep mode: The.."
newline
bitfld.long 0x0 5. "SLEEP,Sleep Mode" "0: Normal Mode: The ADC core and reference voltage..,1: Sleep Mode: The wakeup time can be modified by.."
bitfld.long 0x0 1.--3. "TRGSEL,Trigger Selection" "0: ADTRG,1: TIOA0,2: TIOA1,3: TIOA2,4: PWM event line 0,5: PWM event line 1,6: TIOA3,7: RTCOUT1"
line.long 0x4 "SEQR1,Channel Sequence Register 1"
hexmask.long.byte 0x4 28.--31. 1. "USCH8,User Sequence Number 8"
hexmask.long.byte 0x4 24.--27. 1. "USCH7,User Sequence Number 7"
newline
hexmask.long.byte 0x4 20.--23. 1. "USCH6,User Sequence Number 6"
hexmask.long.byte 0x4 16.--19. 1. "USCH5,User Sequence Number 5"
newline
hexmask.long.byte 0x4 12.--15. 1. "USCH4,User Sequence Number 4"
hexmask.long.byte 0x4 8.--11. 1. "USCH3,User Sequence Number 3"
newline
hexmask.long.byte 0x4 4.--7. 1. "USCH2,User Sequence Number 2"
hexmask.long.byte 0x4 0.--3. 1. "USCH1,User Sequence Number 1"
line.long 0x8 "SEQR2,Channel Sequence Register 2"
hexmask.long.byte 0x8 8.--11. 1. "USCH11,User Sequence Number 11"
hexmask.long.byte 0x8 4.--7. 1. "USCH10,User Sequence Number 10"
newline
hexmask.long.byte 0x8 0.--3. 1. "USCH9,User Sequence Number 9"
wgroup.long 0x10++0x7
line.long 0x0 "CHER,Channel Enable Register"
bitfld.long 0x0 11. "CH11,Channel 11 Enable" "0: No effect.,1: Enables the corresponding channel."
bitfld.long 0x0 10. "CH10,Channel 10 Enable" "0: No effect.,1: Enables the corresponding channel."
newline
bitfld.long 0x0 9. "CH9,Channel 9 Enable" "0: No effect.,1: Enables the corresponding channel."
bitfld.long 0x0 8. "CH8,Channel 8 Enable" "0: No effect.,1: Enables the corresponding channel."
newline
bitfld.long 0x0 7. "CH7,Channel 7 Enable" "0: No effect.,1: Enables the corresponding channel."
bitfld.long 0x0 6. "CH6,Channel 6 Enable" "0: No effect.,1: Enables the corresponding channel."
newline
bitfld.long 0x0 5. "CH5,Channel 5 Enable" "0: No effect.,1: Enables the corresponding channel."
bitfld.long 0x0 4. "CH4,Channel 4 Enable" "0: No effect.,1: Enables the corresponding channel."
newline
bitfld.long 0x0 3. "CH3,Channel 3 Enable" "0: No effect.,1: Enables the corresponding channel."
bitfld.long 0x0 2. "CH2,Channel 2 Enable" "0: No effect.,1: Enables the corresponding channel."
newline
bitfld.long 0x0 1. "CH1,Channel 1 Enable" "0: No effect.,1: Enables the corresponding channel."
bitfld.long 0x0 0. "CH0,Channel 0 Enable" "0: No effect.,1: Enables the corresponding channel."
line.long 0x4 "CHDR,Channel Disable Register"
bitfld.long 0x4 11. "CH11,Channel 11 Disable" "0: No effect.,1: Disables the corresponding channel."
bitfld.long 0x4 10. "CH10,Channel 10 Disable" "0: No effect.,1: Disables the corresponding channel."
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bitfld.long 0x4 9. "CH9,Channel 9 Disable" "0: No effect.,1: Disables the corresponding channel."
bitfld.long 0x4 8. "CH8,Channel 8 Disable" "0: No effect.,1: Disables the corresponding channel."
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bitfld.long 0x4 7. "CH7,Channel 7 Disable" "0: No effect.,1: Disables the corresponding channel."
bitfld.long 0x4 6. "CH6,Channel 6 Disable" "0: No effect.,1: Disables the corresponding channel."
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bitfld.long 0x4 5. "CH5,Channel 5 Disable" "0: No effect.,1: Disables the corresponding channel."
bitfld.long 0x4 4. "CH4,Channel 4 Disable" "0: No effect.,1: Disables the corresponding channel."
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bitfld.long 0x4 3. "CH3,Channel 3 Disable" "0: No effect.,1: Disables the corresponding channel."
bitfld.long 0x4 2. "CH2,Channel 2 Disable" "0: No effect.,1: Disables the corresponding channel."
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bitfld.long 0x4 1. "CH1,Channel 1 Disable" "0: No effect.,1: Disables the corresponding channel."
bitfld.long 0x4 0. "CH0,Channel 0 Disable" "0: No effect.,1: Disables the corresponding channel."
rgroup.long 0x18++0x3
line.long 0x0 "CHSR,Channel Status Register"
bitfld.long 0x0 11. "CH11,Channel 11 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
bitfld.long 0x0 10. "CH10,Channel 10 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
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bitfld.long 0x0 9. "CH9,Channel 9 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
bitfld.long 0x0 8. "CH8,Channel 8 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
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bitfld.long 0x0 7. "CH7,Channel 7 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
bitfld.long 0x0 6. "CH6,Channel 6 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
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bitfld.long 0x0 5. "CH5,Channel 5 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
bitfld.long 0x0 4. "CH4,Channel 4 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
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bitfld.long 0x0 3. "CH3,Channel 3 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
bitfld.long 0x0 2. "CH2,Channel 2 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
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bitfld.long 0x0 1. "CH1,Channel 1 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
bitfld.long 0x0 0. "CH0,Channel 0 Status" "0: The corresponding channel (or part of sequence..,1: The corresponding channel (or part of sequence.."
rgroup.long 0x20++0x3
line.long 0x0 "LCDR,Last Converted Data Register"
hexmask.long.byte 0x0 24.--28. 1. "CHNBOSR,Channel Number in Oversampling Mode"
hexmask.long.word 0x0 0.--15. 1. "LDATA,Last Data Converted"
wgroup.long 0x24++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 30. "NOPEN,No Pen Contact Interrupt Enable" "0,1"
bitfld.long 0x0 29. "PEN,Pen Contact Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "COMPE,Comparison Event Interrupt Enable" "0,1"
bitfld.long 0x0 25. "GOVRE,General Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "DRDY,Data Ready Interrupt Enable" "0,1"
bitfld.long 0x0 22. "PRDY,Touchscreen Measure Pressure Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 21. "YRDY,Touchscreen Measure YPOS Ready Interrupt Enable" "0,1"
bitfld.long 0x0 20. "XRDY,Touchscreen Measure XPOS Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "LCCHG,Last Channel Change Interrupt Enable" "0,1"
bitfld.long 0x0 11. "EOC11,End of Conversion Interrupt Enable 11" "0,1"
newline
bitfld.long 0x0 10. "EOC10,End of Conversion Interrupt Enable 10" "0,1"
bitfld.long 0x0 9. "EOC9,End of Conversion Interrupt Enable 9" "0,1"
newline
bitfld.long 0x0 8. "EOC8,End of Conversion Interrupt Enable 8" "0,1"
bitfld.long 0x0 7. "EOC7,End of Conversion Interrupt Enable 7" "0,1"
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bitfld.long 0x0 6. "EOC6,End of Conversion Interrupt Enable 6" "0,1"
bitfld.long 0x0 5. "EOC5,End of Conversion Interrupt Enable 5" "0,1"
newline
bitfld.long 0x0 4. "EOC4,End of Conversion Interrupt Enable 4" "0,1"
bitfld.long 0x0 3. "EOC3,End of Conversion Interrupt Enable 3" "0,1"
newline
bitfld.long 0x0 2. "EOC2,End of Conversion Interrupt Enable 2" "0,1"
bitfld.long 0x0 1. "EOC1,End of Conversion Interrupt Enable 1" "0,1"
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bitfld.long 0x0 0. "EOC0,End of Conversion Interrupt Enable 0" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 30. "NOPEN,No Pen Contact Interrupt Disable" "0,1"
bitfld.long 0x4 29. "PEN,Pen Contact Interrupt Disable" "0,1"
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bitfld.long 0x4 26. "COMPE,Comparison Event Interrupt Disable" "0,1"
bitfld.long 0x4 25. "GOVRE,General Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 24. "DRDY,Data Ready Interrupt Disable" "0,1"
bitfld.long 0x4 22. "PRDY,Touchscreen Measure Pressure Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 21. "YRDY,Touchscreen Measure YPOS Ready Interrupt Disable" "0,1"
bitfld.long 0x4 20. "XRDY,Touchscreen Measure XPOS Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "LCCHG,Last Channel Change Interrupt Disable" "0,1"
bitfld.long 0x4 11. "EOC11,End of Conversion Interrupt Disable 11" "0,1"
newline
bitfld.long 0x4 10. "EOC10,End of Conversion Interrupt Disable 10" "0,1"
bitfld.long 0x4 9. "EOC9,End of Conversion Interrupt Disable 9" "0,1"
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bitfld.long 0x4 8. "EOC8,End of Conversion Interrupt Disable 8" "0,1"
bitfld.long 0x4 7. "EOC7,End of Conversion Interrupt Disable 7" "0,1"
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bitfld.long 0x4 6. "EOC6,End of Conversion Interrupt Disable 6" "0,1"
bitfld.long 0x4 5. "EOC5,End of Conversion Interrupt Disable 5" "0,1"
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bitfld.long 0x4 4. "EOC4,End of Conversion Interrupt Disable 4" "0,1"
bitfld.long 0x4 3. "EOC3,End of Conversion Interrupt Disable 3" "0,1"
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bitfld.long 0x4 2. "EOC2,End of Conversion Interrupt Disable 2" "0,1"
bitfld.long 0x4 1. "EOC1,End of Conversion Interrupt Disable 1" "0,1"
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bitfld.long 0x4 0. "EOC0,End of Conversion Interrupt Disable 0" "0,1"
rgroup.long 0x2C++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 30. "NOPEN,No Pen Contact Interrupt Mask" "0,1"
bitfld.long 0x0 29. "PEN,Pen Contact Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "COMPE,Comparison Event Interrupt Mask" "0,1"
bitfld.long 0x0 25. "GOVRE,General Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "DRDY,Data Ready Interrupt Mask" "0,1"
bitfld.long 0x0 22. "PRDY,Touchscreen Measure Pressure Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 21. "YRDY,Touchscreen Measure YPOS Ready Interrupt Mask" "0,1"
bitfld.long 0x0 20. "XRDY,Touchscreen Measure XPOS Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "LCCHG,Last Channel Change Interrupt Disable" "0,1"
bitfld.long 0x0 11. "EOC11,End of Conversion Interrupt Mask 11" "0,1"
newline
bitfld.long 0x0 10. "EOC10,End of Conversion Interrupt Mask 10" "0,1"
bitfld.long 0x0 9. "EOC9,End of Conversion Interrupt Mask 9" "0,1"
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bitfld.long 0x0 8. "EOC8,End of Conversion Interrupt Mask 8" "0,1"
bitfld.long 0x0 7. "EOC7,End of Conversion Interrupt Mask 7" "0,1"
newline
bitfld.long 0x0 6. "EOC6,End of Conversion Interrupt Mask 6" "0,1"
bitfld.long 0x0 5. "EOC5,End of Conversion Interrupt Mask 5" "0,1"
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bitfld.long 0x0 4. "EOC4,End of Conversion Interrupt Mask 4" "0,1"
bitfld.long 0x0 3. "EOC3,End of Conversion Interrupt Mask 3" "0,1"
newline
bitfld.long 0x0 2. "EOC2,End of Conversion Interrupt Mask 2" "0,1"
bitfld.long 0x0 1. "EOC1,End of Conversion Interrupt Mask 1" "0,1"
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bitfld.long 0x0 0. "EOC0,End of Conversion Interrupt Mask 0" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 31. "PENS,Pen Detect Status" "0: The pen does not press the screen.,1: The pen presses the screen."
bitfld.long 0x4 30. "NOPEN,No Pen Contact (cleared on read)" "0: No loss of pen contact since the last read of..,1: At least one loss of pen contact since the last.."
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bitfld.long 0x4 29. "PEN,Pen contact (cleared on read)" "0: No pen contact since the last read of ADC_ISR.,1: At least one pen contact since the last read of.."
bitfld.long 0x4 26. "COMPE,Comparison Event (cleared on read)" "0: No comparison event since the last read of..,1: At least one comparison event (defined in.."
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bitfld.long 0x4 25. "GOVRE,General Overrun Error (cleared on read)" "0: No general overrun error occurred since the last..,1: At least one general overrun error has occurred.."
bitfld.long 0x4 24. "DRDY,Data Ready (automatically set / cleared)" "0: No data has been converted since the last read..,1: At least one data has been converted and is.."
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bitfld.long 0x4 22. "PRDY,Touchscreen Pressure Measure Ready (cleared on read)" "0: No measure has been performed since the last..,1: At least one measure has been performed since.."
bitfld.long 0x4 21. "YRDY,Touchscreen YPOS Measure Ready (cleared on read)" "0: No measure has been performed since the last..,1: At least one measure has been performed since.."
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bitfld.long 0x4 20. "XRDY,Touchscreen XPOS Measure Ready (cleared on read)" "0: No measure has been performed since the last..,1: At least one measure has been performed since.."
bitfld.long 0x4 19. "LCCHG,Last Channel Change (cleared on read)" "0: There is no comparison match (defined in the..,1: The converted value reported on.."
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bitfld.long 0x4 11. "EOC11,End of Conversion 11 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
bitfld.long 0x4 10. "EOC10,End of Conversion 10 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
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bitfld.long 0x4 9. "EOC9,End of Conversion 9 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
bitfld.long 0x4 8. "EOC8,End of Conversion 8 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
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bitfld.long 0x4 7. "EOC7,End of Conversion 7 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
bitfld.long 0x4 6. "EOC6,End of Conversion 6 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
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bitfld.long 0x4 5. "EOC5,End of Conversion 5 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
bitfld.long 0x4 4. "EOC4,End of Conversion 4 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
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bitfld.long 0x4 3. "EOC3,End of Conversion 3 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
bitfld.long 0x4 2. "EOC2,End of Conversion 2 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
newline
bitfld.long 0x4 1. "EOC1,End of Conversion 1 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
bitfld.long 0x4 0. "EOC0,End of Conversion 0 (automatically set / cleared)" "0: The corresponding analog channel is disabled or..,1: The corresponding analog channel is enabled and.."
group.long 0x34++0x7
line.long 0x0 "LCTMR,Last Channel Trigger Mode Register"
bitfld.long 0x0 4.--5. "CMPMOD,Last Channel Comparison Mode" "0: Generates the ADC_ISR.LCCHG flag when the..,1: Generates the ADC_ISR.LCCHG flag when the..,2: Generates the ADC_ISR.LCCHG flag when the..,3: Generates the ADC_ISR.LCCHG flag when the.."
bitfld.long 0x0 0. "DUALTRIG,Dual Trigger ON" "0: All channels are triggered by event defined by..,1: Last channel (higher index) trigger period is.."
line.long 0x4 "LCCWR,Last Channel Compare Window Register"
hexmask.long.word 0x4 16.--27. 1. "HIGHTHRES,High Threshold"
hexmask.long.word 0x4 0.--11. 1. "LOWTHRES,Low Threshold"
rgroup.long 0x3C++0x3
line.long 0x0 "OVER,Overrun Status Register"
bitfld.long 0x0 11. "OVRE11,Overrun Error 11" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
bitfld.long 0x0 10. "OVRE10,Overrun Error 10" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
newline
bitfld.long 0x0 9. "OVRE9,Overrun Error 9" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
bitfld.long 0x0 8. "OVRE8,Overrun Error 8" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
newline
bitfld.long 0x0 7. "OVRE7,Overrun Error 7" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
bitfld.long 0x0 6. "OVRE6,Overrun Error 6" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
newline
bitfld.long 0x0 5. "OVRE5,Overrun Error 5" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
bitfld.long 0x0 4. "OVRE4,Overrun Error 4" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
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bitfld.long 0x0 3. "OVRE3,Overrun Error 3" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
bitfld.long 0x0 2. "OVRE2,Overrun Error 2" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
newline
bitfld.long 0x0 1. "OVRE1,Overrun Error 1" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
bitfld.long 0x0 0. "OVRE0,Overrun Error 0" "0: No overrun error on the corresponding channel..,1: An overrun error has occurred on the.."
group.long 0x40++0x7
line.long 0x0 "EMR,Extended Mode Register"
bitfld.long 0x0 28.--29. "ADCMODE,ADC Running Mode" "0: Normal mode of operation.,1: Offset Error mode to measure the offset error.,2: Gain Error mode to measure the gain error. See..,3: Gain Error mode to measure the gain error. See.."
bitfld.long 0x0 25.--26. "SIGNMODE,Sign Mode" "0: Single-Ended channels: Unsigned conversions.,1: Single-Ended channels: Signed conversions.,2: All channels: Unsigned conversions.,3: All channels: Signed conversions."
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bitfld.long 0x0 24. "TAG,Tag of ADC_LCDR" "0: Sets ADC_LCDR.CHNB field to zero.,1: Appends the channel number to the conversion.."
bitfld.long 0x0 22. "TRACKX4,Tracking Time x4" "0: The ADC_MR.TRACKTIM field effect is multiplied..,1: The ADC_MR.TRACKTIM field effect is multiplied.."
newline
bitfld.long 0x0 21. "SRCCLK,External Clock Selection" "0: The peripheral clock is the source for the ADC..,1: GCLK is the source clock for the ADC prescaler.."
bitfld.long 0x0 20. "ASTE,Averaging on Single Trigger Event" "0: The average requests several trigger events.,1: The average requests only one trigger event."
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bitfld.long 0x0 16.--18. "OSR,Over Sampling Rate" "0: No averaging. ADC sample rate is maximum.,1: 1-bit enhanced resolution by averaging. ADC..,2: 2-bit enhanced resolution by averaging. ADC..,3: 3-bit enhanced resolution by averaging. ADC..,4: 4-bit enhanced resolution by averaging. ADC..,?,?,?"
bitfld.long 0x0 12.--13. "CMPFILTER,Compare Event Filtering" "0,1,2,3"
newline
bitfld.long 0x0 9. "CMPALL,Compare All Channels" "0: Only channel indicated in CMPSEL field is..,1: All channels are compared."
hexmask.long.byte 0x0 4.--7. 1. "CMPSEL,Comparison Selected Channel"
newline
bitfld.long 0x0 2. "CMPTYPE,Comparison Type" "0: Any conversion is performed and comparison..,1: Comparison conditions must be met to start the.."
bitfld.long 0x0 0.--1. "CMPMODE,Comparison Mode" "0: When the converted data is lower than the low..,1: When the converted data is higher than the high..,2: When the converted data is in the comparison..,3: When the converted data is out of the comparison.."
line.long 0x4 "CWR,Compare Window Register"
hexmask.long.word 0x4 16.--31. 1. "HIGHTHRES,High Threshold"
hexmask.long.word 0x4 0.--15. 1. "LOWTHRES,Low Threshold"
group.long 0x4C++0x3
line.long 0x0 "CCR,Channel Configuration Register"
bitfld.long 0x0 27. "DIFF11,Differential Inputs for Channel 11" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
bitfld.long 0x0 26. "DIFF10,Differential Inputs for Channel 10" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
newline
bitfld.long 0x0 25. "DIFF9,Differential Inputs for Channel 9" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
bitfld.long 0x0 24. "DIFF8,Differential Inputs for Channel 8" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
newline
bitfld.long 0x0 23. "DIFF7,Differential Inputs for Channel 7" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
bitfld.long 0x0 22. "DIFF6,Differential Inputs for Channel 6" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
newline
bitfld.long 0x0 21. "DIFF5,Differential Inputs for Channel 5" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
bitfld.long 0x0 20. "DIFF4,Differential Inputs for Channel 4" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
newline
bitfld.long 0x0 19. "DIFF3,Differential Inputs for Channel 3" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
bitfld.long 0x0 18. "DIFF2,Differential Inputs for Channel 2" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
newline
bitfld.long 0x0 17. "DIFF1,Differential Inputs for Channel 1" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
bitfld.long 0x0 16. "DIFF0,Differential Inputs for Channel 0" "0: Corresponding channel is set in Single-ended mode.,1: Corresponding channel is set in Differential mode."
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x50)++0x3
line.long 0x0 "CDR[$1],Channel Data Register x"
hexmask.long.word 0x0 0.--15. 1. "DATA,Converted Data"
repeat.end
group.long 0x94++0x3
line.long 0x0 "ACR,Analog Control Register"
bitfld.long 0x0 8.--9. "IBCTL,ADC Bias Current Control" "0,1,2,3"
bitfld.long 0x0 0.--1. "PENDETSENS,Pen Detection Sensitivity" "0,1,2,3"
group.long 0xA0++0x3
line.long 0x0 "PDR,Pseudo-Differential Register"
bitfld.long 0x0 15. "PDIFF15,Pseudo-Differential Inputs for Channel 15" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 14. "PDIFF14,Pseudo-Differential Inputs for Channel 14" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 13. "PDIFF13,Pseudo-Differential Inputs for Channel 13" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 12. "PDIFF12,Pseudo-Differential Inputs for Channel 12" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 11. "PDIFF11,Pseudo-Differential Inputs for Channel 11" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 10. "PDIFF10,Pseudo-Differential Inputs for Channel 10" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 9. "PDIFF9,Pseudo-Differential Inputs for Channel 9" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 8. "PDIFF8,Pseudo-Differential Inputs for Channel 8" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 7. "PDIFF7,Pseudo-Differential Inputs for Channel 7" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 6. "PDIFF6,Pseudo-Differential Inputs for Channel 6" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 5. "PDIFF5,Pseudo-Differential Inputs for Channel 5" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 4. "PDIFF4,Pseudo-Differential Inputs for Channel 4" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 3. "PDIFF3,Pseudo-Differential Inputs for Channel 3" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 2. "PDIFF2,Pseudo-Differential Inputs for Channel 2" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
newline
bitfld.long 0x0 1. "PDIFF1,Pseudo-Differential Inputs for Channel 1" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
bitfld.long 0x0 0. "PDIFF0,Pseudo-Differential Inputs for Channel 0" "0: The channel is configured as defined by..,1: The channel is configured in pseudo-differential.."
group.long 0xB0++0x3
line.long 0x0 "TSMR,Touchscreen Mode Register"
hexmask.long.byte 0x0 28.--31. 1. "PENDBC,Pen Detect Debouncing Period"
bitfld.long 0x0 24. "PENDET,Pen Contact Detection Enable" "0: Pen contact detection disabled.,1: Pen contact detection enabled."
newline
bitfld.long 0x0 22. "NOTSDMA,No TouchScreen DMA" "0: XPOS YPOS Z1 Z2 are transmitted in ADC_LCDR.,1: XPOS YPOS Z1 Z2 are never transmitted in.."
hexmask.long.byte 0x0 16.--19. 1. "TSSCTIM,Touchscreen Switches Closure Time"
newline
hexmask.long.byte 0x0 8.--11. 1. "TSFREQ,Touchscreen Frequency"
bitfld.long 0x0 4.--5. "TSAV,Touchscreen Average" "0: No Filtering. Only one ADC conversion per measure,1: Averages 2 ADC conversions,2: Averages 4 ADC conversions,3: Averages 8 ADC conversions"
newline
bitfld.long 0x0 0.--1. "TSMODE,Touchscreen Mode" "0: No Touchscreen,1: 4-wire Touchscreen without pressure measurement,2: 4-wire Touchscreen with pressure measurement,3: 5-wire Touchscreen"
rgroup.long 0xB4++0xB
line.long 0x0 "XPOSR,Touchscreen X Position Register"
hexmask.long.word 0x0 16.--27. 1. "XSCALE,Scale of XPOS"
hexmask.long.word 0x0 0.--11. 1. "XPOS,X Position"
line.long 0x4 "YPOSR,Touchscreen Y Position Register"
hexmask.long.word 0x4 16.--27. 1. "YSCALE,Scale of YPOS"
hexmask.long.word 0x4 0.--11. 1. "YPOS,Y Position"
line.long 0x8 "PRESSR,Touchscreen Pressure Register"
hexmask.long.word 0x8 16.--27. 1. "Z2,Data of Z2 Measurement"
hexmask.long.word 0x8 0.--11. 1. "Z1,Data of Z1 Measurement"
group.long 0xC0++0x3
line.long 0x0 "TRGR,Trigger Register"
hexmask.long.word 0x0 16.--31. 1. "TRGPER,Trigger Period"
bitfld.long 0x0 0.--2. "TRGMOD,Trigger Mode" "0: No hardware trigger enabled only software..,1: Rising edge of the selected hardware trigger..,2: Falling edge of the selected hardware trigger..,3: Any edge of the selected hardware trigger event,4: Pen Detect Trigger (shall be selected only if..,5: ADC internal hardware periodic trigger (see..,6: Continuous mode,?"
group.long 0xD4++0xB
line.long 0x0 "CVR,Correction Values Register"
hexmask.long.word 0x0 16.--31. 1. "GAINCORR,Gain Correction"
hexmask.long.word 0x0 0.--15. 1. "OFFSETCORR,Offset Correction"
line.long 0x4 "CECR,Channel Error Correction Register"
bitfld.long 0x4 11. "ECORR11,Error Correction Enable for channel 11" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
bitfld.long 0x4 10. "ECORR10,Error Correction Enable for channel 10" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
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bitfld.long 0x4 9. "ECORR9,Error Correction Enable for channel 9" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
bitfld.long 0x4 8. "ECORR8,Error Correction Enable for channel 8" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
newline
bitfld.long 0x4 7. "ECORR7,Error Correction Enable for channel 7" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
bitfld.long 0x4 6. "ECORR6,Error Correction Enable for channel 6" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
newline
bitfld.long 0x4 5. "ECORR5,Error Correction Enable for channel 5" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
bitfld.long 0x4 4. "ECORR4,Error Correction Enable for channel 4" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
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bitfld.long 0x4 3. "ECORR3,Error Correction Enable for channel 3" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
bitfld.long 0x4 2. "ECORR2,Error Correction Enable for channel 2" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
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bitfld.long 0x4 1. "ECORR1,Error Correction Enable for channel 1" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
bitfld.long 0x4 0. "ECORR0,Error Correction Enable for channel 0" "0: Automatic error correction is disabled for..,1: Automatic error correction is enabled for.."
line.long 0x8 "TSCVR,Touchscreen Correction Values Register"
hexmask.long.word 0x8 16.--31. 1. "TSGAINCORR,Touchscreen Gain Correction"
hexmask.long.word 0x8 0.--15. 1. "TSOFFSETCORR,Touchscreen Offset Correction"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 2. "WPCTEN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY value..,1: Enables the write protection if WPKEY value.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "AES (Advanced Encryption Standard)"
base ad:0xF0034000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 24. "UNLOCK,Unlock Processing" "0: No effect.,1: Unlocks the processing in case of abnormal event.."
bitfld.long 0x0 8. "SWRST,Software Reset" "0: No effect.,1: Resets the AES. A software-triggered reset of.."
newline
bitfld.long 0x0 0. "START,Start Processing" "0: No effect.,1: Starts manual encryption/decryption process."
group.long 0x4++0x3
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 31. "TAMPCLR,Tamper Clear Enable" "0: A tamper detection event has no effect on the..,1: A tamper detection event immediately clears the.."
hexmask.long.byte 0x0 20.--23. 1. "CKEY,Key"
newline
bitfld.long 0x0 16.--18. "CFBS,Cipher Feedback Data Size" "0: 128-bit,1: 64-bit,2: 32-bit,3: 16-bit,4: 8-bit,?,?,?"
bitfld.long 0x0 15. "LOD,Last Output Data Mode" "0: No effect.,1: The DATRDY flag is cleared when at least one of.."
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bitfld.long 0x0 12.--14. "OPMOD,Operating Mode" "0: ECB: Electronic Codebook mode,1: CBC: Cipher Block Chaining mode,2: OFB: Output Feedback mode,3: CFB: Cipher Feedback mode,4: CTR: Counter mode (16-bit internal counter),5: GCM: Galois/Counter mode,6: XTS: XEX-based tweaked-codebook mode,?"
bitfld.long 0x0 10.--11. "KEYSIZE,Key Size" "0: AES Key Size is 128 bits,1: AES Key Size is 192 bits,2: AES Key Size is 256 bits,?"
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bitfld.long 0x0 8.--9. "SMOD,Start Mode" "0: Manual Mode,1: Auto Mode,2: AES_IDATAR0 access only Auto Mode (DMA),?"
hexmask.long.byte 0x0 4.--7. 1. "PROCDLY,Processing Delay"
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bitfld.long 0x0 3. "DUALBUFF,Dual Input Buffer" "0: AES_IDATARx cannot be written during processing..,1: AES_IDATARx can be written during processing of.."
bitfld.long 0x0 1. "GTAGEN,GCM Automatic Tag Generation Enable" "0: Automatic GCM Tag generation disabled.,1: Automatic GCM Tag generation enabled."
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bitfld.long 0x0 0. "CIPHER,Processing Mode" "0: Decrypts data.,1: Encrypts data."
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 19. "SECE,Security and/or Safety Event Interrupt Enable" "0,1"
bitfld.long 0x0 18. "PLENERR,Padding Length Error Interrupt Enable" "0,1"
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bitfld.long 0x0 17. "EOPAD,End of Padding Interrupt Enable" "0,1"
bitfld.long 0x0 16. "TAGRDY,GCM Tag Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Enable" "0,1"
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 19. "SECE,Security and/or Safety Event Interrupt Disable" "0,1"
bitfld.long 0x4 18. "PLENERR,Padding Length Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 17. "EOPAD,End of Padding Interrupt Disable" "0,1"
bitfld.long 0x4 16. "TAGRDY,GCM Tag Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Interrupt Disable" "0,1"
bitfld.long 0x4 0. "DATRDY,Data Ready Interrupt Disable" "0,1"
rgroup.long 0x18++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 19. "SECE,Security and/or Safety Event Interrupt Mask" "0,1"
bitfld.long 0x0 18. "PLENERR,Padding Length Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 17. "EOPAD,End of Padding Interrupt Mask" "0,1"
bitfld.long 0x0 16. "TAGRDY,GCM Tag Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Mask" "0,1"
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 19. "SECE,Security and/or Safety Event (cleared on read)" "0: There is no security report in AES_WPSR.,1: One security flag is set in AES_WPSR."
bitfld.long 0x4 18. "PLENERR,Padding Length Error" "0: No Padding Length Error occurred.,1: Padding Length Error detected."
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bitfld.long 0x4 17. "EOPAD,End of Padding" "0: Padding is not over.,1: Padding phase is over."
bitfld.long 0x4 16. "TAGRDY,GCM Tag Ready" "0: GCM Tag is not valid.,1: GCM Tag generation is complete (cleared by.."
newline
hexmask.long.byte 0x4 12.--15. 1. "URAT,Unspecified Register Access (cleared by writing SWRST in AES_CR)"
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Status (cleared by writing SWRST in AES_CR)" "0: No unspecified register access has been detected..,1: At least one unspecified register access has.."
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bitfld.long 0x4 0. "DATRDY,Data Ready (cleared by setting bit START or bit SWRST in AES_CR or by reading AES_ODATARx)" "0: Output data not valid.,1: Encryption or decryption process is completed."
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x20)++0x3
line.long 0x0 "KEYWR[$1],Key Word Register x"
hexmask.long 0x0 0.--31. 1. "KEYW,Key Word"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x40)++0x3
line.long 0x0 "IDATAR[$1],Input Data Register x"
hexmask.long 0x0 0.--31. 1. "IDATA,Input Data Word"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x50)++0x3
line.long 0x0 "ODATAR[$1],Output Data Register x"
hexmask.long 0x0 0.--31. 1. "ODATA,Output Data"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x60)++0x3
line.long 0x0 "IVR[$1],Initialization Vector Register x"
hexmask.long 0x0 0.--31. 1. "IV,Initialization Vector"
repeat.end
group.long 0x70++0x7
line.long 0x0 "AADLENR,Additional Authenticated Data Length Register"
hexmask.long 0x0 0.--31. 1. "AADLEN,Additional Authenticated Data Length"
line.long 0x4 "CLENR,Plaintext/Ciphertext Length Register"
hexmask.long 0x4 0.--31. 1. "CLEN,Plaintext/Ciphertext Length"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "GHASHR[$1],GCM Intermediate Hash Word Register x"
hexmask.long 0x0 0.--31. 1. "GHASH,Intermediate GCM Hash Word"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x88)++0x3
line.long 0x0 "TAGR[$1],GCM Authentication Tag Word Register x"
hexmask.long 0x0 0.--31. 1. "TAG,GCM Authentication Tag"
repeat.end
rgroup.long 0x98++0x3
line.long 0x0 "CTRR,GCM Encryption Counter Value Register"
hexmask.long 0x0 0.--31. 1. "CTR,GCM Encryption Counter"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x9C)++0x3
line.long 0x0 "GCMHR[$1],GCM H Word Register x"
hexmask.long 0x0 0.--31. 1. "H,GCM H Word"
repeat.end
group.long 0xB0++0x7
line.long 0x0 "EMR,Extended Mode Register"
bitfld.long 0x0 31. "BPE,Block Processing End" "0: AES_ISR.DATRDY flag reports only the end message..,1: AES_ISR.DATRDY flag reports each end of block.."
hexmask.long.byte 0x0 16.--23. 1. "NHEAD,IPSec Next Header"
newline
hexmask.long.byte 0x0 8.--15. 1. "PADLEN,Auto Padding Length"
bitfld.long 0x0 7. "PKRS,Private Key Internal Register Select" "0: The key used by the AES is in the AES_KEYWRx..,1: The key used by the AES is in the Private Key.."
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bitfld.long 0x0 5. "PLIPD,Protocol Layer Improved Performance Decipher" "0: Protocol layer improved performance is in..,1: Protocol layer improved performance is in.."
bitfld.long 0x0 4. "PLIPEN,Protocol Layer Improved Performance Enable" "0: Protocol layer improved performance is disabled.,1: Protocol layer improved performance is enabled."
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bitfld.long 0x0 1. "APM,Auto Padding Mode" "0: Auto Padding performed according to IPSec..,1: Auto Padding performed according to SSL standard."
bitfld.long 0x0 0. "APEN,Auto Padding Enable" "0: Auto Padding feature is disabled.,1: Auto Padding feature is enabled."
line.long 0x4 "BCNT,Byte Counter Register"
hexmask.long 0x4 0.--31. 1. "BCNT,Auto Padding Byte Counter"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xC0)++0x3
line.long 0x0 "TWR[$1],Tweak Word Register x"
hexmask.long 0x0 0.--31. 1. "TWEAK,Tweak Word"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0xD0)++0x3
line.long 0x0 "ALPHAR[$1],Alpha Word Register x"
hexmask.long 0x0 0.--31. 1. "ALPHA,Alpha Word"
repeat.end
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 5.--7. "ACTION,Action on Abnormal Event Detection" "0: No action (stop or clear key) is performed when..,1: If a processing is in progress when the..,2: If a processing is in progress when the..,3: If a processing is in progress when the..,4: If a processing is in progress when the..,5: If a processing is in progress when the..,6: If a processing is in progress when the..,?"
newline
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interruption Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
bitfld.long 0x0 0. "WPEN,Write Protection Configuration Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: An access is performed into key input data.."
hexmask.long.byte 0x0 24.--27. 1. "SWETYP,Software Error Type (cleared on read)"
newline
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 4. "PKRPVS,Private Key Internal Register Protection Violation Status (cleared on read)" "0: No Private Key internal register access..,1: A Private Key internal register access violation.."
newline
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
newline
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
tree.end
tree "AIC (Advanced Interrupt Controller)"
base ad:0xFFFFF100
group.long 0x0++0xB
line.long 0x0 "SSR,Source Select Register"
hexmask.long.byte 0x0 0.--6. 1. "INTSEL,Interrupt Line Selection"
line.long 0x4 "SMR,Source Mode Register"
bitfld.long 0x4 5.--6. "SRCTYPE,Interrupt Source Type" "0: High-level sensitive for internal source..,1: Negative-edge triggered for external source,2: High-level sensitive for internal source..,3: Positive-edge triggered for external source"
bitfld.long 0x4 0.--2. "PRIOR,Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x8 "SVR,Source Vector Register"
hexmask.long 0x8 0.--31. 1. "VECTOR,Source Vector"
rgroup.long 0x10++0xB
line.long 0x0 "IVR,Interrupt Vector Register"
hexmask.long 0x0 0.--31. 1. "IRQV,Interrupt Vector Register"
line.long 0x4 "FVR,FIQ Vector Register"
hexmask.long 0x4 0.--31. 1. "FIQV,FIQ Vector Register"
line.long 0x8 "ISR,Interrupt Status Register"
hexmask.long.byte 0x8 0.--6. 1. "IRQID,Current Interrupt Identifier"
rgroup.long 0x20++0x17
line.long 0x0 "IPR0,Interrupt Pending Register 0"
bitfld.long 0x0 31. "PID31,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 30. "PID30,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 29. "PID29,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 28. "PID28,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 27. "PID27,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 26. "PID26,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 25. "PID25,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 24. "PID24,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 23. "PID23,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 22. "PID22,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 21. "PID21,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 20. "PID20,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 19. "PID19,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 18. "PID18,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 17. "PID17,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 16. "PID16,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x0 15. "PID15,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 14. "PID14,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x0 13. "PID13,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 12. "PID12,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x0 11. "PID11,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 10. "PID10,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x0 9. "PID9,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 8. "PID8,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 7. "PID7,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 6. "PID6,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 5. "PID5,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 4. "PID4,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x0 3. "PID3,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 2. "PID2,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x0 1. "SYS,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x0 0. "FIQ,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
line.long 0x4 "IPR1,Interrupt Pending Register 1"
bitfld.long 0x4 31. "PID63,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 30. "PID62,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 29. "PID61,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 28. "PID60,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x4 27. "PID59,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 26. "PID58,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x4 25. "PID57,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 24. "PID56,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x4 23. "PID55,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 22. "PID54,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 21. "PID53,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 20. "PID52,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
newline
bitfld.long 0x4 19. "PID51,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 18. "PID50,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 17. "PID49,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 16. "PID48,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 15. "PID47,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 14. "PID46,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 13. "PID45,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 12. "PID44,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 11. "PID43,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 10. "PID42,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 9. "PID41,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 8. "PID40,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 7. "PID39,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 6. "PID38,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 5. "PID37,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 4. "PID36,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 3. "PID35,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 2. "PID34,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x4 1. "PID33,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x4 0. "PID32,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
line.long 0x8 "IPR2,Interrupt Pending Register 2"
bitfld.long 0x8 31. "PID95,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 30. "PID94,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 29. "PID93,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 28. "PID92,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 27. "PID91,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 26. "PID90,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 25. "PID89,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 24. "PID88,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 23. "PID87,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 22. "PID86,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 21. "PID85,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 20. "PID84,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 19. "PID83,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 18. "PID82,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 17. "PID81,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 16. "PID80,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 15. "PID79,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 14. "PID78,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 13. "PID77,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 12. "PID76,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 11. "PID75,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 10. "PID74,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 9. "PID73,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 8. "PID72,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 7. "PID71,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 6. "PID70,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 5. "PID69,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 4. "PID68,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 3. "PID67,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 2. "PID66,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0x8 1. "PID65,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0x8 0. "PID64,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
line.long 0xC "IPR3,Interrupt Pending Register 3"
bitfld.long 0xC 31. "PID127,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 30. "PID126,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 29. "PID125,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 28. "PID124,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 27. "PID123,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 26. "PID122,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 25. "PID121,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 24. "PID120,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 23. "PID119,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 22. "PID118,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 21. "PID117,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 20. "PID116,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 19. "PID115,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 18. "PID114,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 17. "PID113,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 16. "PID112,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 15. "PID111,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 14. "PID110,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 13. "PID109,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 12. "PID108,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 11. "PID107,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 10. "PID106,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 9. "PID105,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 8. "PID104,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 7. "PID103,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 6. "PID102,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 5. "PID101,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 4. "PID100,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 3. "PID99,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 2. "PID98,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
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bitfld.long 0xC 1. "PID97,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
bitfld.long 0xC 0. "PID96,Interrupt Pending" "0: The corresponding interrupt is not pending.,1: The corresponding interrupt is pending."
line.long 0x10 "IMR,Interrupt Mask Register"
bitfld.long 0x10 0. "INTM,Interrupt Mask" "0: The interrupt source selected by INTSEL is..,1: The interrupt source selected by INTSEL is.."
line.long 0x14 "CISR,Core Interrupt Status Register"
bitfld.long 0x14 1. "NIRQ,NIRQ Status" "0: NIRQ line is deactivated.,1: NIRQ line is active."
bitfld.long 0x14 0. "NFIQ,NFIQ Status" "0: NFIQ line is deactivated.,1: NFIQ line is active."
wgroup.long 0x38++0x3
line.long 0x0 "EOICR,End of Interrupt Command Register"
bitfld.long 0x0 0. "ENDIT,Interrupt Processing Complete Command" "0,1"
group.long 0x3C++0x3
line.long 0x0 "SPU,Spurious Interrupt Vector Register"
hexmask.long 0x0 0.--31. 1. "SIVR,Spurious Interrupt Vector Register"
wgroup.long 0x40++0x17
line.long 0x0 "IECR,Interrupt Enable Command Register"
bitfld.long 0x0 0. "INTEN,Interrupt Enable" "0: No effect.,1: Enables the interrupt source selected by INTSEL."
line.long 0x4 "IDCR,Interrupt Disable Command Register"
bitfld.long 0x4 0. "INTD,Interrupt Disable" "0: No effect.,1: Disables the interrupt source selected by INTSEL."
line.long 0x8 "ICCR,Interrupt Clear Command Register"
bitfld.long 0x8 0. "INTCLR,Interrupt Clear" "0: No effect.,1: Clears the interrupt source selected by INTSEL."
line.long 0xC "ISCR,Interrupt Set Command Register"
bitfld.long 0xC 0. "INTSET,Interrupt Set" "0: No effect.,1: Sets the interrupt source selected by INTSEL."
line.long 0x10 "FFER,Fast Forcing Enable Register"
bitfld.long 0x10 0. "FFEN,Fast Forcing Enable" "0: No effect.,1: Enables the fast forcing feature on the.."
line.long 0x14 "FFDR,Fast Forcing Disable Register"
bitfld.long 0x14 0. "FFDIS,Fast Forcing Disable" "0: No effect.,1: Disables the Fast Forcing feature on the.."
rgroup.long 0x58++0x3
line.long 0x0 "FFSR,Fast Forcing Status Register"
bitfld.long 0x0 0. "FFS,Fast Forcing Status" "0: The Fast Forcing feature is disabled on the..,1: The Fast Forcing feature is enabled on the.."
wgroup.long 0x60++0x7
line.long 0x0 "SVRRER,SVR Return Enable Register"
bitfld.long 0x0 0. "SVRREN,SVR Return Enable" "0: No effect.,1: IVR register returns the interrupt index for the.."
line.long 0x4 "SVRRDR,SVR Return Disable Register"
bitfld.long 0x4 0. "SVRRDIS,SVR Return Disable" "0: No effect.,1: IVR register returns the corresponding vector.."
rgroup.long 0x68++0x3
line.long 0x0 "SVRRSR,SVR Return Status Register"
bitfld.long 0x0 0. "SVRRS,SVR Return Status" "0: IVR register returns the corresponding vector..,1: IVR register returns the interrupt index for the.."
group.long 0x6C++0x3
line.long 0x0 "DCR,Debug Control Register"
bitfld.long 0x0 1. "GMSK,General Interrupt Mask" "0: The nIRQ and nFIQ lines are normally controlled..,1: The nIRQ and nFIQ lines are tied to their.."
bitfld.long 0x0 0. "PROT,Protection Mode" "0: The Protection mode is disabled.,1: The Protection mode is enabled."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "BSC (Boot Sequence Controller)"
base ad:0xFFFFFE54
group.long 0x0++0x3
line.long 0x0 "CR,Boot Sequence Controller Configuration Register"
hexmask.long.word 0x0 16.--31. 1. "WPKEY,Write Protection Key (Write-only)"
bitfld.long 0x0 0.--2. "BOOT,Boot Media Sequence" "0,1,2,3,4,5,6,7"
tree.end
tree "CLASSD (Audio Class D Amplifier)"
base ad:0xF003C000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 0. "SWRST,Software Reset" "0: No effect.,1: Resets the CLASSD simulating a hardware reset."
group.long 0x4++0x7
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 20.--21. "NOVRVAL,Non-Overlapping Value" "0: Non-overlapping time is 5 ns,1: Non-overlapping time is 10 ns,2: Non-overlapping time is 15 ns,3: Non-overlapping time is 20 ns"
bitfld.long 0x0 16. "NON_OVERLAP,Non-Overlapping Enable" "0: Non-overlapping circuit is disabled.,1: Non-overlapping circuit is enabled."
newline
bitfld.long 0x0 8. "PWMTYP,PWM Modulation Type" "0: The signal is single-ended.,1: The signal is differential."
bitfld.long 0x0 5. "RMUTE,Right Channel Mute" "0: Right channel is unmuted.,1: Right channel is muted."
newline
bitfld.long 0x0 4. "REN,Right Channel Enable" "0: Right channel is disabled.,1: Right channel is enabled."
bitfld.long 0x0 1. "LMUTE,Left Channel Mute" "0: Left channel is unmuted.,1: Left channel is muted."
newline
bitfld.long 0x0 0. "LEN,Left Channel Enable" "0: Left channel is disabled.,1: Left channel is enabled."
line.long 0x4 "INTPMR,Interpolator Mode Register"
bitfld.long 0x4 29.--30. "MONOMODE,Mono Mode Selection" "0: (left + right) / 2 is sent on both channels,1: (left + right) is sent to both channels. If the..,2: THR[15:0] is sent on both left and right channels,3: THR[31:16] is sent on both left and right channels"
bitfld.long 0x4 28. "MONO,Mono Signal" "0: The signal is sent stereo to the left and right..,1: The same signal is sent on both left and right.."
newline
hexmask.long.byte 0x4 24.--27. 1. "EQCFG,Equalization Selection"
bitfld.long 0x4 20.--22. "FRAME,CLASSD Incoming Data Sampling Frequency" "0: 8 kHz,1: 16 kHz,2: 32 kHz,3: 48 kHz,4: 96 kHz,5: 22.05 kHz,6: 44.1 kHz,7: 88.2 kHz"
newline
bitfld.long 0x4 19. "SWAP,Swap Left and Right Channels" "0: Left channel is on CLASSD_THR[15:0] right..,1: Right channel is on CLASSD_THR[15:0] left.."
bitfld.long 0x4 18. "DEEMP,Enable De-emphasis Filter" "0: De-emphasis filter is disabled.,1: De-emphasis filter is enabled."
newline
bitfld.long 0x4 16. "DSPCLKFREQ,DSP Clock Frequency" "0: DSP Clock (DSPCLK) is 12.288 MHz.,1: DSP Clock (DSPCLK) is 11.2896 MHz."
hexmask.long.byte 0x4 8.--14. 1. "ATTR,Right Channel Attenuation"
newline
hexmask.long.byte 0x4 0.--6. 1. "ATTL,Left Channel Attenuation"
rgroup.long 0xC++0x3
line.long 0x0 "INTSR,Interpolator Status Register"
bitfld.long 0x0 0. "CFGERR,Configuration Error" "0: The frame and clock configuration are correct.,1: The frame and clock configuration are incorrect.."
group.long 0x10++0x3
line.long 0x0 "THR,Transmit Holding Register"
hexmask.long.word 0x0 16.--31. 1. "RDATA,Right Channel Data"
hexmask.long.word 0x0 0.--15. 1. "LDATA,Left Channel Data"
wgroup.long 0x14++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 0. "DATRDY,Data Ready" "0: No effect.,1: Enables the interrupt when the CLASSD is ready.."
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 0. "DATRDY,Data Ready" "0: No effect.,1: Disables the interrupt when the CLASSD is ready.."
group.long 0x1C++0x3
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 0. "DATRDY,Data Ready" "0: The interrupt is disabled.,1: The interrupt is enabled."
rgroup.long 0x20++0x3
line.long 0x0 "ISR,Interrupt Status Register"
bitfld.long 0x0 0. "DATRDY,Data Ready" "0: CLASSD has not been ready to convert a value..,1: CLASSD is ready to convert a value since the.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
tree.end
tree "DBGU (Debug Unit)"
base ad:0xFFFFF200
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 11. "STTTO,Start Timeout" "0: No effect.,1: Starts waiting for a character before clocking.."
bitfld.long 0x0 10. "RETTO,Rearm Timeout" "0: No effect.,1: Restarts timeout."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0: No effect.,1: Resets the status bits PARE FRAME and OVRE in.."
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: The transmitter is disabled. If a character is.."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: The transmitter is enabled if TXDIS is 0."
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: The receiver is disabled. If a character is.."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: The receiver is enabled if RXDIS is 0."
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: The transmitter logic is reset and disabled. If.."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: The receiver logic is reset and disabled. If a.."
group.long 0x4++0x3
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: DBGU does not filter the receive line.,1: DBGU filters the receive line using a.."
wgroup.long 0x8++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 31. "COMMRX,Enable COMMRX (from ARM) Interrupt" "0,1"
bitfld.long 0x0 30. "COMMTX,Enable COMMTX (from ARM) Interrupt" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
bitfld.long 0x0 8. "TIMEOUT,Enable Timeout Interrupt" "0,1"
newline
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 31. "COMMRX,Disable COMMRX (from ARM) Interrupt" "0,1"
bitfld.long 0x4 30. "COMMTX,Disable COMMTX (from ARM) Interrupt" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
bitfld.long 0x4 8. "TIMEOUT,Disable Timeout Interrupt" "0,1"
newline
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
rgroup.long 0x10++0xB
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 31. "COMMRX,Mask COMMRX (from ARM) Interrupt" "0,1"
bitfld.long 0x0 30. "COMMTX,Mask COMMTX (from ARM) Interrupt" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
bitfld.long 0x0 8. "TIMEOUT,Mask Timeout Interrupt" "0,1"
newline
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
line.long 0x4 "SR,Status Register"
bitfld.long 0x4 31. "COMMRX,Debug Communication Channel Read Status" "0: COMMRX from the ARM processor is inactive.,1: COMMRX from the ARM processor is active."
bitfld.long 0x4 30. "COMMTX,Debug Communication Channel Write Status" "0: COMMTX from the ARM processor is inactive.,1: COMMTX from the ARM processor is active."
newline
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0: There are characters in DBGU_THR or characters..,1: There are no characters in DBGU_THR and there.."
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been any timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has occurred since the last..,1: At least one parity error has occurred since the.."
bitfld.long 0x4 6. "FRAME,Framing Error" "0: No framing error has occurred since the last..,1: At least one framing error has occurred since.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0: A character has been written to DBGU_THR and not..,1: There is no character written to DBGU_THR that.."
newline
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0: No character has been received since the last..,1: At least one complete character has been.."
line.long 0x8 "RHR,Receive Holding Register"
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
wgroup.long 0x1C++0x3
line.long 0x0 "THR,Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
group.long 0x20++0x3
line.long 0x0 "BRGR,Baud Rate Generator Register"
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
group.long 0x28++0x3
line.long 0x0 "RTOR,Receiver Timeout Register"
hexmask.long.byte 0x0 0.--7. 1. "TO,Timeout Value"
rgroup.long 0x40++0x7
line.long 0x0 "CIDR,Chip ID Register"
bitfld.long 0x0 31. "EXT,Extension Flag" "0: Chip ID has a single register definition without..,1: An extended Chip ID exists."
hexmask.long 0x0 0.--30. 1. "CHID,Chip ID Value"
line.long 0x4 "EXID,Chip ID Extension Register"
hexmask.long 0x4 0.--31. 1. "EXID,Chip ID Extension"
group.long 0x48++0x3
line.long 0x0 "FNR,Force NTRST Register"
bitfld.long 0x0 0. "FNTRST,Force NTRST" "0: NTRST of the ARM processor's TAP controller is..,1: NTRST of the ARM processor's TAP controller is.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
tree.end
tree "FLEXCOM (Flexible Serial Communication Controller)"
base ad:0x0
tree "FLEXCOM0"
base ad:0xF801C000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
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bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
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bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
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bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
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bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
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bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
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bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
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bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
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bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
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bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
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bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
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bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
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bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
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bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
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bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
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bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
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bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
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bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
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bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
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bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
newline
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
newline
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
newline
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
newline
bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
newline
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
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bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
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bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
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bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
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bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
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bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
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bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
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bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
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bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
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bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
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bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
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bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
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bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
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bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
newline
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
newline
bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
newline
bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
newline
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
newline
bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
newline
bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
newline
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
newline
bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
newline
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
newline
bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
newline
bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
newline
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
newline
bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
newline
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
newline
bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
newline
bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
newline
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
newline
hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
newline
bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
newline
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
newline
bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
newline
bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
newline
bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
newline
bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
newline
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
newline
bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
newline
bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
newline
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
newline
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
newline
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
newline
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
newline
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
newline
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
newline
bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
newline
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
newline
bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
newline
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
newline
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
newline
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
newline
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
newline
bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
newline
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
newline
bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
newline
hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM1"
base ad:0xF8020000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
newline
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
newline
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
newline
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
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bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
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bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
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bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
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bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
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bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
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bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
newline
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
newline
bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
newline
bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
newline
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
newline
bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
newline
bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
newline
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
newline
bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
newline
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
newline
bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
newline
bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
newline
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
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bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
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hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
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bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
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bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
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bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
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bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
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bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM2"
base ad:0xF8024000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
newline
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
newline
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
newline
bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
newline
bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
newline
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
newline
bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
newline
bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
newline
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
newline
bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
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bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
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hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
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bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
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bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
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bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
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bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
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bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM3"
base ad:0xF8028000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
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bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
newline
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
newline
bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
newline
bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
newline
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
newline
bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
newline
bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
newline
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
newline
bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
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bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
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hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
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bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM4"
base ad:0xF0000000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
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bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
newline
bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
newline
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
newline
bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
newline
bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
newline
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
newline
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
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bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
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hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
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bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
newline
bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
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bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
newline
hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM5"
base ad:0xF0004000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
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bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
newline
bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
newline
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
newline
bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
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hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM6"
base ad:0xF8010000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
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bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
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bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
newline
bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
newline
hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
newline
bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
newline
bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
newline
bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
newline
bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
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bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
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bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
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bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM7"
base ad:0xF8014000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
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bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
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bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
newline
bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
newline
bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
newline
bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
newline
bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
newline
hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
newline
bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
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hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
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bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
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bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
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bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
newline
bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
newline
hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM8"
base ad:0xF8018000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
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bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
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bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
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bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
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bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
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bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
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bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
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bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
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hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
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hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
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hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
newline
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
newline
bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
newline
bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
newline
hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
newline
hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
newline
bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
newline
bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
newline
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
newline
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
newline
bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
newline
bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
newline
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
newline
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
newline
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
newline
bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
newline
bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
newline
hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
newline
hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
newline
hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
newline
bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
newline
bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
newline
bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
newline
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
newline
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
newline
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
newline
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
newline
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
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hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
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bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
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bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
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bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
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hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
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bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
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hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
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bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
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bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
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bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
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bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
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bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
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bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
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hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
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bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
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bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM9"
base ad:0xF8040000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
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bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
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bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
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bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
newline
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
newline
bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
newline
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
newline
bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
newline
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
newline
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
newline
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
newline
bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
newline
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
newline
hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
newline
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
newline
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
newline
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
newline
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
newline
hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
newline
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
newline
hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
newline
bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
newline
bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
newline
bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
newline
bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
newline
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
newline
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
newline
bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
newline
bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
newline
bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
newline
hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
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bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
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bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
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bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
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bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
newline
bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
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bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
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bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
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bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
newline
bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
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bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
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bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
newline
bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
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bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
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bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
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hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
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hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
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hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
newline
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
newline
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
newline
hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
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bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
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bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
newline
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
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bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
newline
bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
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bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
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bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
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bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
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bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
newline
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
newline
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
newline
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
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bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
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bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
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bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
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hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
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bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
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bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
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bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
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hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
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bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
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hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
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bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
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bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
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bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
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bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
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bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
newline
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
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bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
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bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
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bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
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hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
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hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM10"
base ad:0xF8044000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
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bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
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bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
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bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
newline
bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
newline
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
newline
bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
newline
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
newline
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
newline
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
newline
bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
newline
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
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hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
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hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
newline
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
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hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
newline
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
newline
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
newline
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
newline
bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
newline
bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
newline
bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
newline
bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
newline
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
newline
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
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bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
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bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
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bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
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bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
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bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
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bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
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bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
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bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
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bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
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bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
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bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
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bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
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bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
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bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
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bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
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bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
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hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
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hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
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hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
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hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
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hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
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bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
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bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
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bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
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bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
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bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
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bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
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bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
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bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
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bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
newline
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
newline
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
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hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
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hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
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hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
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bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
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bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
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bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
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bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
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hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
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bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
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bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
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bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
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hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
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bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
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hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
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bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
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bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
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bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
newline
bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
newline
bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
newline
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
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bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
newline
bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
newline
bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
newline
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
newline
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
newline
bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
newline
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
newline
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
newline
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
newline
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
newline
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
newline
bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
newline
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
newline
bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
newline
hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM11"
base ad:0xF0020000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
newline
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
newline
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
newline
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
newline
bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
newline
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
newline
bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
newline
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
newline
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
newline
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
newline
bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
newline
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
newline
hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
newline
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
newline
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
newline
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
newline
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
newline
bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
newline
hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
newline
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
newline
bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
newline
hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
newline
bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
newline
bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
newline
bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
newline
bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
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bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
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bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
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bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
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bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
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bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
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bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
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bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
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bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
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bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
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bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
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bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
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bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
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bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
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bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
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bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
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bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
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hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
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hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
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hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
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hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
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hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
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bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
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bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
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bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
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bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
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bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
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bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
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bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
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bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
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bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
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bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
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bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
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bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
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hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
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hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
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hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
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bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
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bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
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bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
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bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
newline
hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
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bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
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bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
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bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
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hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
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bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
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hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
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bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
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bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
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bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
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bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
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hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
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bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
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bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
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hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
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bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
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bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
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bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
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bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
newline
bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
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hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
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bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
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bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
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bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
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bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
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bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
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bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
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bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
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bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
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bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
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bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
newline
bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
newline
bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
newline
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
newline
bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
newline
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
newline
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
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bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
newline
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
newline
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
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bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
newline
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
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hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
newline
bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
newline
hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree "FLEXCOM12"
base ad:0xF0024000
group.long 0x0++0x3
line.long 0x0 "FLEX_MR,FLEXCOM Mode Register"
bitfld.long 0x0 0.--1. "OPMODE,FLEXCOM Operating Mode" "0: No communication,1: All UART related protocols are selected (RS232..,2: SPI operating mode is selected. USART/TWI..,3: All TWI related protocols are selected (TWI.."
rgroup.long 0x10++0x3
line.long 0x0 "FLEX_RHR,FLEXCOM Receive Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RXDATA,Receive Data"
group.long 0x20++0x3
line.long 0x0 "FLEX_THR,FLEXCOM Transmit Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
wgroup.long 0x200++0x3
line.long 0x0 "FLEX_US_CR,USART Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock"
newline
bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
newline
bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
newline
bitfld.long 0x0 21. "LINWKUP,Send LIN Wake-up Signal" "0: No effect:,1: Sends a wake-up signal on the LIN bus."
newline
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0: No effect.,1: Aborts the current LIN transmission."
newline
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0: No effect.,1: Drives the RTS pin to 0 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0: No effect.,1: Drives the RTS pin to 1 if FLEX_US_MR.USART_MODE.."
newline
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0: No effect,1: Immediately restarts timeout period."
newline
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0: No effect,1: Resets FLEX_US_CSR.NACK."
newline
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0: No effect.,1: Resets FLEX_US_CSR.ITER. No effect if the.."
newline
bitfld.long 0x0 12. "SENDA,Send Address" "0: No effect.,1: In Multidrop mode only the next character.."
newline
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0: No effect.,1: Starts waiting for a character before clocking.."
newline
bitfld.long 0x0 10. "STPBRK,Stop Break" "0: No effect.,1: Stops transmission of the break after a minimum.."
newline
bitfld.long 0x0 9. "STTBRK,Start Break" "0: No effect.,1: Starts transmission of a break after the.."
newline
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0: No effect.,1: Resets the status bits PARE FRAME OVRE MANE.."
newline
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the transmitter."
newline
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the transmitter if TXDIS is 0."
newline
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the receiver."
newline
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0: No effect.,1: Enables the receiver if RXDIS is 0."
newline
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0: No effect.,1: Resets the transmitter."
newline
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0: No effect.,1: Resets the receiver."
group.long 0x204++0x3
line.long 0x0 "FLEX_US_MR,USART Mode Register"
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0: Start frame delimiter is COMMAND or DATA SYNC.,1: Start frame delimiter is one bit."
newline
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0: The Manchester start bit is a 0 to 1 transition,1: The Manchester start bit is a 1 to 0 transition."
newline
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0: Manchester encoder/decoder are disabled.,1: Manchester encoder/decoder are enabled."
newline
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0: The USART does not filter the receive line.,1: The USART filters the receive line using a.."
newline
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0: The data field transmitted on TXD line is the..,1: The data field transmitted on TXD line is.."
newline
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0: User defined configuration of command or data..,1: The sync field is updated when a character is.."
newline
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0: NACK is sent on the ISO line as soon as a parity..,1: Successive parity errors are counted up to the.."
newline
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0: The NACK is generated.,1: The NACK is not generated."
newline
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0: 16x Oversampling.,1: 8x Oversampling."
newline
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0: The USART does not drive the SCK pin..,1: The USART drives the SCK pin if USCLKS does not.."
newline
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0: CHRL defines character length.,1: 9-bit character length."
newline
bitfld.long 0x0 16. "MSBF,Bit Order" "0: Least significant bit is sent/received first.,1: Most significant bit is sent/received first."
newline
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
newline
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
newline
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
newline
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0: USART operates in Asynchronous mode (UART).,1: USART operates in Synchronous mode."
newline
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
newline
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC generic clock is selected. If the SCK pin is..,3: External pin SCK is selected"
newline
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER,USART Interrupt Enable Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x3
line.long 0x0 "FLEX_US_IER_LIN_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
wgroup.long 0x208++0x7
line.long 0x0 "FLEX_US_IER_LON_MODE,USART Interrupt Enable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_IDR,USART Interrupt Disable Register"
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 22. "CMP,Comparison Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LIN_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
wgroup.long 0x20C++0x3
line.long 0x0 "FLEX_US_IDR_LON_MODE,USART Interrupt Disable Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR,USART Interrupt Mask Register"
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 22. "CMP,Comparison Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x3
line.long 0x0 "FLEX_US_IMR_LIN_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "FLEX_US_IMR_LON_MODE,USART Interrupt Mask Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
newline
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
newline
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_CSR,USART Channel Status Register"
bitfld.long 0x4 24. "MANE,Manchester Error" "0: No Manchester error has been detected since the..,1: At least one Manchester error has been detected.."
newline
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0: CTS input is driven low.,1: CTS input is driven high."
newline
bitfld.long 0x4 22. "CMP,Comparison Status" "0: No received character matched the comparison..,1: A received character matched the comparison.."
newline
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag" "0: No input change has been detected on the CTS pin..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt" "0: Non acknowledge has not been detected since the..,1: At least one non acknowledge has been detected.."
newline
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached" "0: Maximum number of repetitions has not been..,1: Maximum number of repetitions has been reached.."
newline
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last Start.."
newline
bitfld.long 0x4 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x4 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x4 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break" "0: No break received or end of break detected since..,1: Break received or end of break detected since.."
newline
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
rgroup.long 0x214++0x3
line.long 0x0 "FLEX_US_CSR_LIN_MODE,USART Channel Status Register"
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0: No LIN header timeout error has been detected..,1: A LIN header timeout error has been detected.."
newline
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0: No LIN synch tolerance error has been detected..,1: A LIN synch tolerance error has been detected.."
newline
bitfld.long 0x0 29. "LINSNRE,LIN Client Not Responding Error" "0: No LIN client not responding error has been..,1: A LIN client not responding error has been.."
newline
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0: No LIN checksum error has been detected since..,1: A LIN checksum error has been detected since the.."
newline
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0: No LIN identifier parity error has been detected..,1: A LIN identifier parity error has been detected.."
newline
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0: No LIN inconsistent synch field error has been..,1: The USART is configured as a client node and a.."
newline
bitfld.long 0x0 25. "LINBE,LIN Bit Error" "0: No bit error has been detected since the last..,1: A bit error has been detected since the last.."
newline
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0: LIN bus line is set to 0.,1: LIN bus line is set to 1."
newline
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0: The USART is idle or a LIN transfer is ongoing.,1: A LIN transfer has been completed since the last.."
newline
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0: No LIN identifier has been received since the..,1: At least one LIN identifier has been received.."
newline
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0: No LIN break has received sent since the last..,1: At least one LIN break has been received since.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout" "0: There has not been a timeout since the last..,1: There has been a timeout since the last start.."
newline
bitfld.long 0x0 7. "PARE,Parity Error" "0: No parity error has been detected since the last..,1: At least one parity error has been detected.."
newline
bitfld.long 0x0 6. "FRAME,Framing Error" "0: No stop bit has been detected low since the last..,1: At least one stop bit has been detected low.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
rgroup.long 0x214++0x7
line.long 0x0 "FLEX_US_CSR_LON_MODE,USART Channel Status Register"
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0: No backlog overflow error occurred since the..,1: At least one backlog error overflow occurred.."
newline
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0: Reception on going or no reception occurred..,1: At least one reception has been performed since.."
newline
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0: No frame has been terminated early due to..,1: At least one transmission has been terminated.."
newline
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0: No collision occurred while transmitting since..,1: At least one collision occurred while.."
newline
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0: Transmission on going or no transmission..,1: At least one transmission has been performed.."
newline
bitfld.long 0x0 10. "UNRE,Underrun Error" "0: No LON underrun error has occurred since the..,1: At least one LON underrun error has occurred.."
newline
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing FLEX_US_THR)" "0: There are characters in either FLEX_US_THR or..,1: There are no characters in FLEX_US_THR nor in.."
newline
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0: No CRC error has been detected since the last..,1: At least one CRC error has been detected since.."
newline
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0: No short frame received since the last RSTSTA..,1: At least one short frame received since the last.."
newline
bitfld.long 0x0 5. "OVRE,Overrun Error" "0: No overrun error has occurred since the last..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing FLEX_US_THR)" "0: A character in FLEX_US_THR is waiting to be..,1: There is no character in FLEX_US_THR."
newline
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading FLEX_US_RHR)" "0: No complete character has been received since..,1: At least one complete character has been.."
line.long 0x4 "FLEX_US_RHR,USART Receive Holding Register"
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0: Last character received is a data.,1: Last character received is a command."
newline
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
rgroup.long 0x218++0x3
line.long 0x0 "FLEX_US_RHR_FIFO_MULTI_DATA_MODE,USART Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXCHR3,Received Characters"
newline
hexmask.long.byte 0x0 16.--23. 1. "RXCHR2,Received Characters"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXCHR1,Received Characters"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXCHR0,Received Characters"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR,USART Transmit Holding Register"
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0: The next character sent is encoded as a data.,1: The next character sent is encoded as a command."
newline
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
wgroup.long 0x21C++0x3
line.long 0x0 "FLEX_US_THR_FIFO_MULTI_DATA_MODE,USART Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXCHR3,Character to be Transmitted"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXCHR2,Character to be Transmitted"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXCHR1,Character to be Transmitted"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXCHR0,Character to be Transmitted"
group.long 0x220++0xB
line.long 0x0 "FLEX_US_BRGR,USART Baud Rate Generator Register"
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0: Fractional divider is disabled.,?,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
line.long 0x4 "FLEX_US_RTOR,USART Receiver Timeout Register"
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
line.long 0x8 "FLEX_US_TTGR,USART Transmitter Timeguard Register"
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
group.long 0x228++0x3
line.long 0x0 "FLEX_US_TTGR_LON_MODE,USART Transmitter Timeguard Register"
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI,USART FI DI Ratio Register"
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
group.long 0x240++0x3
line.long 0x0 "FLEX_US_FIDI_LON_MODE,USART FI DI Ratio Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
rgroup.long 0x244++0x3
line.long 0x0 "FLEX_US_NER,USART Number of Errors Register"
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
group.long 0x24C++0xF
line.long 0x0 "FLEX_US_IF,USART IrDA Filter Register"
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
line.long 0x4 "FLEX_US_MAN,USART Manchester Configuration Register"
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0: Receiver line idle value is 0.,1: Receiver line idle value is 1."
newline
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0: The USART cannot recover from an important clock..,1: The USART can recover from clock drift. The 16X.."
newline
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
newline
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
newline
bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
newline
hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
newline
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0: Logic zero is coded as a zero-to-one transition..,1: Logic zero is coded as a one-to-zero transition.."
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
line.long 0x8 "FLEX_US_LINMR,USART LIN Mode Register"
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0: The synchronization procedure is performed in..,1: The synchronization procedure is not performed.."
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bitfld.long 0x8 16. "PDCM,DMA Mode" "0: The LIN mode register FLEX_US_LINMR is not..,1: The LIN mode register FLEX_US_LINMR (excepting.."
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
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bitfld.long 0x8 7. "WKUPTYP,Wake-up Signal Type" "0: Setting the LINWKUP bit in the control register..,1: Setting the LINWKUP bit in the control register.."
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0: The Frame Slot mode is enabled.,1: The Frame Slot mode is disabled."
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0: The response data length is defined by the DLC..,1: The response data length is defined by the bits.."
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0: LIN 2.0 'enhanced' checksum,1: LIN 1.3 'classic' checksum"
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bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0: In host node configuration the checksum is..,1: Whatever the node configuration is the checksum.."
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bitfld.long 0x8 2. "PARDIS,Parity Disable" "0: In host node configuration the identifier parity..,1: Whatever the node configuration is the.."
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
line.long 0xC "FLEX_US_LINIR,USART LIN Identifier Register"
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
rgroup.long 0x25C++0x3
line.long 0x0 "FLEX_US_LINBRR,USART LIN Baud Rate Register"
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
group.long 0x260++0xF
line.long 0x0 "FLEX_US_LONMR,USART LON Mode Register"
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
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bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0: LON collision detection source is external.,1: LON collision detection source is internal."
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bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0: The LON data length register FLEX_US_LONDL is..,1: The LON data length register FLEX_US_LONDL is.."
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bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0: Detect collisions after CRC has been sent but..,1: Ignore collisions after CRC has been sent but.."
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bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0: Do not terminate the frame in LON comm_type = 1..,1: Terminate the frame in LON comm_type = 1 mode.."
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bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0: LON collision detection feature disabled.,1: LON collision detection feature enabled."
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bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0: LON comm_type = 1 mode.,1: LON comm_type = 2 mode."
line.long 0x4 "FLEX_US_LONPR,USART LON Preamble Register"
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
line.long 0x8 "FLEX_US_LONDL,USART LON Data Length Register"
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
line.long 0xC "FLEX_US_LONL2HDR,USART LON L2HDR Register"
bitfld.long 0xC 7. "PB,LON Priority Bit" "0: LON priority bit reset.,1: LON priority bit set."
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bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0: LON alternate path bit reset.,1: LON alternate path bit set."
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hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
rgroup.long 0x270++0x3
line.long 0x0 "FLEX_US_LONBL,USART LON Backlog Register"
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
group.long 0x274++0x17
line.long 0x0 "FLEX_US_LONB1TX,USART LON Beta1 Tx Register"
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
line.long 0x4 "FLEX_US_LONB1RX,USART LON Beta1 Rx Register"
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
line.long 0x8 "FLEX_US_LONPRIO,USART LON Priority Register"
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
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hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
line.long 0xC "FLEX_US_IDTTX,USART LON IDT Tx Register"
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
line.long 0x10 "FLEX_US_IDTRX,USART LON IDT Rx Register"
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
line.long 0x14 "FLEX_US_ICDIFF,USART IC DIFF Register"
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
group.long 0x290++0x3
line.long 0x0 "FLEX_US_CMPR,USART Comparison Register"
hexmask.long.word 0x0 16.--24. 1. "VAL2,Second Comparison Value for Received Character"
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bitfld.long 0x0 14. "CMPPAR,Compare Parity" "0: The parity is not checked and a bad parity..,1: The parity is checked and a matching condition.."
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bitfld.long 0x0 12.--13. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start..,2: Comparison must be met to receive the current..,?"
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hexmask.long.word 0x0 0.--8. 1. "VAL1,First Comparison Value for Received Character"
group.long 0x2A0++0x3
line.long 0x0 "FLEX_US_FMR,USART FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES2,Receive FIFO Threshold 2"
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hexmask.long.byte 0x0 16.--21. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 8.--13. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 7. "FRTSC,FIFO RTS Pin Control enable (Hardware Handshaking mode only)" "0: RTS pin is not controlled by Receive FIFO..,1: RTS pin is controlled by Receive FIFO thresholds."
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bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x2A4++0x3
line.long 0x0 "FLEX_US_FLR,USART FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
wgroup.long 0x2A8++0x7
line.long 0x0 "FLEX_US_FIER,USART FIFO Interrupt Enable Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_US_FIDR,USART FIFO Interrupt Disable Register"
bitfld.long 0x4 9. "RXFTHF2,RXFTHF2 Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x2B0++0x7
line.long 0x0 "FLEX_US_FIMR,USART FIFO Interrupt Mask Register"
bitfld.long 0x0 9. "RXFTHF2,RXFTHF2 Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
line.long 0x4 "FLEX_US_FESR,USART FIFO Event Status Register"
bitfld.long 0x4 9. "RXFTHF2,Receive FIFO Threshold Flag 2 (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is above..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 8. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
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bitfld.long 0x4 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x4 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x4 5. "RXFTHF,Receive FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x4 4. "RXFFF,Receive FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last.."
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bitfld.long 0x4 3. "RXFEF,Receive FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
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bitfld.long 0x4 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x4 1. "TXFFF,Transmit FIFO Full Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x4 0. "TXFEF,Transmit FIFO Empty Flag (cleared by writing the FLEX_US_CR.RSTSTA bit)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
group.long 0x2E4++0x3
line.long 0x0 "FLEX_US_WPMR,USART Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0x2E8++0x3
line.long 0x0 "FLEX_US_WPSR,USART Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
wgroup.long 0x400++0x3
line.long 0x0 "FLEX_SPI_CR,SPI Control Register"
bitfld.long 0x0 31. "FIFODIS,FIFO Disable" "0: No effect.,1: Disables the Transmit and Receive FIFOs"
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bitfld.long 0x0 30. "FIFOEN,FIFO Enable" "0: No effect.,1: Enables the Transmit and Receive FIFOs"
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bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS will be de-asserted after the.."
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bitfld.long 0x0 17. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 16. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0: No effect.,1: Restarts the comparison trigger to enable.."
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bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0: No effect.,1: Reset the SPI. A software-triggered hardware.."
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bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0: No effect.,1: Disables the SPI."
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bitfld.long 0x0 0. "SPIEN,SPI Enable" "0: No effect.,1: Enables the SPI to transfer and receive data."
group.long 0x404++0x3
line.long 0x0 "FLEX_SPI_MR,SPI Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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bitfld.long 0x0 15. "MOSIIE,MOSI Inversion Enable" "0: MOSI input is not inverted.,1: MOSI input is internally inverted before being.."
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bitfld.long 0x0 14. "CSIE,Chip Select Inversion Enable" "0: Chip select NPCS active polarity is low.,1: Chip select NPCS active polarity is high."
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bitfld.long 0x0 13. "TPMEN,Two-Pin Mode Enable" "0: Two-Pin mode is disabled.,1: Two-Pin mode is enabled."
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bitfld.long 0x0 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
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bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
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bitfld.long 0x0 6. "CRCEN,CRC Enable" "0: CRC calculation is disabled.,1: CRC calculation is enabled. BITS in.."
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bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0: No Effect. In Host mode a transfer can be..,1: In Host mode a transfer can start only if.."
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bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0: Mode fault detection is enabled.,1: Mode fault detection is disabled."
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bitfld.long 0x0 3. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
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bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0: The chip selects are directly connected to a..,1: The four NPCS chip select lines are connected to.."
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bitfld.long 0x0 1. "PS,Peripheral Select" "0: Fixed Peripheral Select,1: Variable Peripheral Select"
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bitfld.long 0x0 0. "MSTR,Host/Client Mode" "0: SPI is in Client mode.,1: SPI is in Host mode."
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR,SPI Receive Data Register"
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_16_MODE,SPI Receive Data Register"
hexmask.long.word 0x0 16.--31. 1. "RD1,Receive Data"
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hexmask.long.word 0x0 0.--15. 1. "RD0,Receive Data"
rgroup.long 0x408++0x3
line.long 0x0 "FLEX_SPI_RDR_FIFO_MULTI_DATA_8_MODE,SPI Receive Data Register"
hexmask.long.byte 0x0 24.--31. 1. "RD3,Receive Data"
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hexmask.long.byte 0x0 16.--23. 1. "RD2,Receive Data"
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hexmask.long.byte 0x0 8.--15. 1. "RD1,Receive Data"
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hexmask.long.byte 0x0 0.--7. 1. "RD0,Receive Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR,SPI Transmit Data Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The current NPCS is de-asserted after the.."
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hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
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hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
wgroup.long 0x40C++0x3
line.long 0x0 "FLEX_SPI_TDR_FIFO_MULTI_DATA_MODE,SPI Transmit Data Register"
hexmask.long.word 0x0 16.--31. 1. "TD1,Transmit Data"
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hexmask.long.word 0x0 0.--15. 1. "TD0,Transmit Data"
rgroup.long 0x410++0x3
line.long 0x0 "FLEX_SPI_SR,SPI Status Register"
bitfld.long 0x0 31. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
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bitfld.long 0x0 30. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
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bitfld.long 0x0 29. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
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bitfld.long 0x0 28. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been filled (changing states.."
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bitfld.long 0x0 27. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty or RXFE flag has been..,1: Receive FIFO has been emptied (changing states.."
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bitfld.long 0x0 26. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
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bitfld.long 0x0 25. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full or TXFF flag has been..,1: Transmit FIFO has been filled since the last.."
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bitfld.long 0x0 24. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
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bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0: SPI is disabled.,1: SPI is enabled."
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bitfld.long 0x0 13. "CRCERR,CRC Error (cleared on read)" "0: CRC calculation is disabled or no received frame..,1: Since the last read of FLEX_SPI_SR a received.."
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error (cleared on read)" "0: No frame error has been detected for a client..,1: In Client mode the chip select raised while the.."
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bitfld.long 0x0 11. "CMP,Comparison Status (cleared on read)" "0: No received character matched the comparison..,1: A received character matched the comparison.."
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bitfld.long 0x0 10. "UNDES,Underrun Error Status (Client mode only) (cleared on read)" "0: No underrun has been detected since the last..,1: A transfer starts whereas no data has been.."
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing FLEX_SPI_TDR)" "0: As soon as data is written in FLEX_SPI_TDR.,1: FLEX_SPI_TDR and internal shift register are.."
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bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0: No rising edge detected on NSS pin since the..,1: A rising edge occurred on NSS pin since the last.."
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bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: An overrun has occurred since the last read of.."
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bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0: No mode fault has been detected since the last..,1: A mode fault occurred since the last read of.."
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bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing FLEX_SPI_TDR)" "0: Transmit FIFO cannot accept more data.,1: Transmit FIFO can accept data; one or more data.."
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading FLEX_SPI_RDR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
wgroup.long 0x414++0x7
line.long 0x0 "FLEX_SPI_IER,SPI Interrupt Enable Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
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bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Enable" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Enable" "0,1"
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "CMP,Comparison Interrupt Enable" "0,1"
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bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
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bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
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bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "FLEX_SPI_IDR,SPI Interrupt Disable Register"
bitfld.long 0x4 31. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 30. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
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bitfld.long 0x4 29. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 28. "RXFFF,RXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 27. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 26. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
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bitfld.long 0x4 25. "TXFFF,TXFFF Interrupt Disable" "0,1"
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bitfld.long 0x4 24. "TXFEF,TXFEF Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "CRCERR,CRC Error Interrupt Disable" "0,1"
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bitfld.long 0x4 12. "SFERR,Client Mode Frame Error Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "CMP,Comparison Interrupt Disable" "0,1"
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bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
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bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
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bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
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bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x41C++0x3
line.long 0x0 "FLEX_SPI_IMR,SPI Interrupt Mask Register"
bitfld.long 0x0 31. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 30. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 28. "RXFFF,RXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "RXFEF,RXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 26. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "TXFFF,TXFFF Interrupt Mask" "0,1"
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bitfld.long 0x0 24. "TXFEF,TXFEF Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "CRCERR,CRC Error Interrupt Mask" "0,1"
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bitfld.long 0x0 12. "SFERR,Client Mode Frame Error Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "CMP,Comparison Interrupt Mask" "0,1"
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bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
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bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x430)++0x3
line.long 0x0 "FLEX_SPI_CSR[$1],SPI Chip Select Register x"
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
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hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
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hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
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hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
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bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0: The Peripheral Chip Select Line rises as soon as..,1: The Peripheral Chip Select does not rise after.."
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bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0: The Peripheral Chip Select does not rise between..,1: The Peripheral Chip Select rises systematically.."
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bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data are changed on the leading edge of SPCK and..,1: Data are captured on the leading edge of SPCK.."
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bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of SPCK is logic level..,1: The inactive state value of SPCK is logic level.."
repeat.end
group.long 0x440++0x3
line.long 0x0 "FLEX_SPI_FMR,SPI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
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hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
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bitfld.long 0x0 4.--5. "RXRDYM,Receive Data Register Full Mode" "0: RDRF will be at level '1' when at least one..,1: RDRF will be at level '1' when at least two..,2: RDRF will be at level '1' when at least four..,?"
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bitfld.long 0x0 0.--1. "TXRDYM,Transmit Data Register Empty Mode" "0: TDRE will be at level '1' when at least one data..,1: TDRE will be at level '1' when at least two data..,?,?"
rgroup.long 0x444++0x3
line.long 0x0 "FLEX_SPI_FLR,SPI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
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hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
group.long 0x448++0xB
line.long 0x0 "FLEX_SPI_CMPR,SPI Comparison Register"
hexmask.long.word 0x0 16.--31. 1. "VAL2,Second Comparison Value for Received Character"
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hexmask.long.word 0x0 0.--15. 1. "VAL1,First Comparison Value for Received Character"
line.long 0x4 "FLEX_SPI_CRCR,SPI CRC Register"
bitfld.long 0x4 27. "DHRX,Disable Header Receiving" "0: Header is received and supplied to FLEX_SPI_RDR..,1: Header is received and checked but not supplied.."
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bitfld.long 0x4 26. "DCRX,Disable CRC Receiving" "0: CRC is received and supplied to FLEX_SPI_RDR as..,1: CRC is received and checked but not supplied to.."
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bitfld.long 0x4 25. "FHE,Frame Header Excluded" "0: The frame header is included in the CRC..,1: The frame header is excluded from the CRC.."
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bitfld.long 0x4 24. "CRM,Continuous Read Mode" "0: A header is sent every frame in case of..,1: A header is sent only on the first frame in case.."
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hexmask.long.byte 0x4 20.--23. 1. "FRHL,Frame Header Length"
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bitfld.long 0x4 16. "CRCS,CRC Size" "0: CRC size is 16 bits.,1: CRC size is 32 bits."
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hexmask.long.byte 0x4 0.--7. 1. "FRL,Frame Length"
line.long 0x8 "FLEX_SPI_TPMR,SPI Two-Pin Mode Register"
bitfld.long 0x8 2.--3. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x8 1. "ALWAYS0,Always Written to 0" "0,1"
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bitfld.long 0x8 0. "CSM,Chip Select Mode" "0: Chip select is not driven.,1: Chip select is driven and can be used to control.."
rgroup.long 0x454++0x3
line.long 0x0 "FLEX_SPI_TPHR,SPI Two-Pin Header Register"
bitfld.long 0x0 5.--6. "OSR,OverSampling Rate" "0,1,2,3"
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bitfld.long 0x0 3.--4. "GAIN,Gain" "0,1,2,3"
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bitfld.long 0x0 2. "BOOST,Current Boost" "0,1"
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bitfld.long 0x0 0.--1. "CNT,Frame Counter" "0,1,2,3"
group.long 0x4E4++0x3
line.long 0x0 "FLEX_SPI_WPMR,SPI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
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bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x4E8++0x3
line.long 0x0 "FLEX_SPI_WPSR,SPI Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs"
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bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs"
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bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0: No effect.,1: Clear the TWI FSM lock."
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bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0: No effect.,1: Clear the Transmit Holding Register and set.."
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bitfld.long 0x0 19. "SCLRBE,SCL Rise Boost Enable" "0: No effect.,1: SCL rise time is boosted in High-Speed mode."
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bitfld.long 0x0 18. "SCLRBD,SCL Rise Boost Disable" "0: No effect.,1: SCL rise time boost is disabled. See Section.."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
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bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
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bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
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bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
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bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
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bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
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bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
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bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
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bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
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bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
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bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
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bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
wgroup.long 0x600++0x3
line.long 0x0 "FLEX_TWI_CR_FIFO_ENABLED_MODE,TWI Control Register"
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0: No effect.,1: Disable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0: No effect.,1: Enable the Transmit and Receive FIFOs."
newline
bitfld.long 0x0 26. "TXFLCLR,Transmit FIFO Lock CLEAR" "0: No effect.,1: Clears the Transmit FIFO Lock."
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bitfld.long 0x0 25. "RXFCLR,Receive FIFO Clear" "0: No effect.,1: Empties the Receive FIFO."
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bitfld.long 0x0 24. "TXFCLR,Transmit FIFO Clear" "0: No effect.,1: Empties the Transmit FIFO."
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bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0: No effect.,1: Alternative Command mode disabled."
newline
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0: No effect.,1: Alternative Command mode enabled."
newline
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0: No effect.,1: If Host mode is enabled send a bus clear command."
newline
bitfld.long 0x0 14. "PECRQ,PEC Request" "0: No effect.,1: A PEC check or transmission is requested."
newline
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0: No effect.,1: SMBus PEC (CRC) generation and check disabled."
newline
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0: No effect.,1: SMBus PEC (CRC) generation and check enabled."
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bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0: No effect.,1: SMBus mode disabled."
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bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0: No effect.,1: If SMBDIS = 0 SMBus mode enabled."
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bitfld.long 0x0 9. "HSDIS,TWI High-Speed Mode Disabled" "0: No effect.,1: High-speed mode disabled."
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bitfld.long 0x0 8. "HSEN,TWI High-Speed Mode Enabled" "0: No effect.,1: High-speed mode enabled."
newline
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Equivalent to a system reset."
newline
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0: No effect.,1: If Host mode is enabled a SMBus Quick Command is.."
newline
bitfld.long 0x0 5. "SVDIS,TWI Client Mode Disabled" "0: No effect.,1: Client mode is disabled. The shifter and holding.."
newline
bitfld.long 0x0 4. "SVEN,TWI Client Mode Enabled" "0: No effect.,1: Enables Client mode (SVDIS must be written to 0)."
newline
bitfld.long 0x0 3. "MSDIS,TWI Host Mode Disabled" "0: No effect.,1: Host mode is disabled all pending data is.."
newline
bitfld.long 0x0 2. "MSEN,TWI Host Mode Enabled" "0: No effect.,1: Enables Host mode (MSDIS must be written to 0)."
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bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0: No effect.,1: STOP condition is sent just after completing the.."
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bitfld.long 0x0 0. "START,Send a START Condition" "0: No effect.,1: A frame beginning with a START bit is.."
group.long 0x604++0xF
line.long 0x0 "FLEX_TWI_MMR,TWI Host Mode Register"
bitfld.long 0x0 24. "NOAP,No Auto-Stop On NACK Error" "0: A stop condition is sent automatically upon..,1: No automatic action is performed upon.."
newline
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
newline
bitfld.long 0x0 13.--14. "SCLRBL,SCL Rise Boost Level" "0,1,2,3"
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bitfld.long 0x0 12. "MREAD,Host Read Direction" "0: Host write direction.,1: Host read direction."
newline
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
line.long 0x4 "FLEX_TWI_SMR,TWI Client Mode Register"
hexmask.long.byte 0x4 16.--22. 1. "SADR,Client Address"
newline
hexmask.long.byte 0x4 8.--14. 1. "MASK,Client Address Mask"
newline
bitfld.long 0x4 7. "SNIFF,Client Sniffer Mode" "0: Client Sniffer mode is disabled.,1: Client Sniffer mode is enabled."
newline
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0: No effect.,1: Clock stretching disabled in Client mode OVRE.."
newline
bitfld.long 0x4 5. "BSEL,TWI Bus Selection" "0: TWI analyzes the TWCK and TWD pins from its TWI..,?"
newline
bitfld.long 0x4 4. "SADAT,Client Address Treated as Data" "0: Client address is handled normally (will not..,1: Client address is handled as data field RXRDY.."
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bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0: Acknowledge of the SMBus Host Header disabled.,1: Acknowledge of the SMBus Host Header enabled."
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bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0: Acknowledge of the SMBus Default Address disabled.,1: Acknowledge of the SMBus Default Address enabled."
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bitfld.long 0x4 0. "NACKEN,Client Receiver Data Phase NACK Enable" "0: Normal value to be returned in the ACK cycle of..,1: NACK value to be returned in the ACK cycle of.."
line.long 0x8 "FLEX_TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
line.long 0xC "FLEX_TWI_CWGR,TWI Clock Waveform Generator Register"
hexmask.long.byte 0xC 24.--30. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
newline
bitfld.long 0xC 20. "BRSRCCLK,Bit Rate Source Clock" "0: The peripheral clock is the source clock for the..,1: GCLK is the source clock for the bit rate.."
newline
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
newline
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
newline
bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
newline
bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
newline
bitfld.long 0x0 23. "LOCK,TWI Lock Due to Frame Errors" "0: The TWI is not locked.,1: The TWI is locked due to frame errors (see.."
newline
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
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bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
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bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
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bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
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bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
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bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
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bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
newline
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
newline
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
newline
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
newline
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
newline
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read,1: At least one unread data is in the Receive FIFO"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
rgroup.long 0x620++0x3
line.long 0x0 "FLEX_TWI_SR_FIFO_ENABLED_MODE,TWI Status Register"
bitfld.long 0x0 26. "SR,Start Repeated" "0: No repeated start has been detected since last..,1: At least one repeated start has been detected.."
newline
bitfld.long 0x0 25. "SDA,SDA Line Value" "0: SDA line sampled value is '0'.,1: SDA line sampled value is '1'."
newline
bitfld.long 0x0 24. "SCL,SCL Line Value" "0: SCL line sampled value is '0'.,1: SCL line sampled value is '1.'"
newline
bitfld.long 0x0 23. "TXFLOCK,Transmit FIFO Lock" "0: The Transmit FIFO is not locked.,1: The Transmit FIFO is locked."
newline
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0: No SMBus Host Header Address received.,1: A SMBus Host Header Address was received."
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0: No SMBus Default Address received.,1: A SMBus Default Address was received."
newline
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0: No SMBus PEC error occurred.,1: A SMBus PEC error occurred."
newline
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0: No SMBus timeout occurred.,1: SMBus timeout occurred."
newline
bitfld.long 0x0 17. "SMBAF,SMBus Alert Flag" "0: No SMBus client drives the SMBALERT line.,1: At least one SMBus client drives the SMBALERT.."
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge (cleared on read)" "0: No host code has been received.,1: A host code has been received."
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access (cleared on read)" "0: A client access is being performed.,1: Client Access is finished. End Of Client Access.."
newline
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0: The clock is not stretched.,1: The clock is stretched. FLEX_TWI_THR /.."
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0: Arbitration won.,1: Arbitration lost. Another host of the TWI bus.."
newline
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0: Each data byte has been correctly received by..,1: In Read mode a data byte has not been.."
newline
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0: FLEX_TWI_THR has been filled on time.,1: FLEX_TWI_THR has not been filled on time."
newline
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0: FLEX_TWI_RHR has not been loaded while RXRDY was..,1: FLEX_TWI_RHR has been loaded while RXRDY was.."
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bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0: No general call has been detected.,1: A general call has been detected. After the.."
newline
bitfld.long 0x0 4. "SVACC,Client Access" "0: TWI is not addressed. SVACC is automatically..,1: Indicates that the address decoding sequence has.."
newline
bitfld.long 0x0 3. "SVREAD,Client Read" "0: Indicates that a write access is performed by a..,1: Indicates that a read access is performed by a.."
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing FLEX_TWI_THR)" "0: Transmit FIFO is full and cannot accept more data.,1: Transmit FIFO is not full; one or more data can.."
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared when reading FLEX_TWI_RHR)" "0: Receive FIFO is empty; no data to read.,1: At least one unread data is in the Receive FIFO."
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing FLEX_TWI_THR)" "0: As soon as a Start is detected.,1: After a Stop or a Repeated Start + an address.."
wgroup.long 0x624++0x7
line.long 0x0 "FLEX_TWI_IER,TWI Interrupt Enable Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_IDR,TWI Interrupt Disable Register"
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
newline
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 16. "MCACK,Host Code Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 15. "TXBUFE,Transmit Buffer Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 14. "RXBUFF,Receive Buffer Full Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "ENDTX,End of Transmit Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "ENDRX,End of Receive Buffer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "EOSACC,End Of Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
newline
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
newline
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "SVACC,Client Access Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
rgroup.long 0x62C++0x7
line.long 0x0 "FLEX_TWI_IMR,TWI Interrupt Mask Register"
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
newline
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "MCACK,Host Code Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "TXBUFE,Transmit Buffer Empty Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "RXBUFF,Receive Buffer Full Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "ENDTX,End of Transmit Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "ENDRX,End of Receive Buffer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "EOSACC,End Of Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
newline
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "SVACC,Client Access Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
line.long 0x4 "FLEX_TWI_RHR,TWI Receive Holding Register"
bitfld.long 0x4 11.--12. "ASTATE,Acknowledge State (Client Sniffer Mode only)" "0: No Acknowledge or Nacknowledge detected after..,1: Acknowledge (A) detected after previously logged..,2: Nacknowledge (NA) detected after previously..,3: Not defined"
newline
bitfld.long 0x4 10. "PSTATE,Stop State (Client Sniffer Mode only)" "0: No STOP (P) detected after previous logged data.,1: Stop detected (P) after previous logged data."
newline
bitfld.long 0x4 8.--9. "SSTATE,Start State (Client Sniffer Mode only)" "0: No START detected with the logged data,1: START (S) detected with the logged data,2: Repeated START (Sr) detected with the logged data,3: Not defined"
newline
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Host or Client Receive Holding Data"
rgroup.long 0x630++0x3
line.long 0x0 "FLEX_TWI_RHR_FIFO_ENABLED_MODE,TWI Receive Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "RXDATA3,Host or Client Receive Holding Data 3"
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hexmask.long.byte 0x0 16.--23. 1. "RXDATA2,Host or Client Receive Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "RXDATA1,Host or Client Receive Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXDATA0,Host or Client Receive Holding Data 0"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Host or Client Transmit Holding Data"
wgroup.long 0x634++0x3
line.long 0x0 "FLEX_TWI_THR_FIFO_ENABLED_MODE,TWI Transmit Holding Register"
hexmask.long.byte 0x0 24.--31. 1. "TXDATA3,Host or Client Transmit Holding Data 3"
newline
hexmask.long.byte 0x0 16.--23. 1. "TXDATA2,Host or Client Transmit Holding Data 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "TXDATA1,Host or Client Transmit Holding Data 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "TXDATA0,Host or Client Transmit Holding Data 0"
group.long 0x638++0x13
line.long 0x0 "FLEX_TWI_SMBTR,TWI SMBus Timing Register"
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
newline
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Host Clock Stretch Maximum Cycles"
newline
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Client Clock Stretch Maximum Cycles"
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hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
line.long 0x4 "FLEX_TWI_HSR,TWI High Speed Register"
hexmask.long.byte 0x4 0.--7. 1. "MCODE,TWI High Speed Host Code"
line.long 0x8 "FLEX_TWI_ACR,TWI Alternative Command Register"
bitfld.long 0x8 25. "NPEC,Next PEC Request (SMBus Mode only)" "0: The next transfer does not use a PEC byte.,1: The next transfer uses a PEC byte."
newline
bitfld.long 0x8 24. "NDIR,Next Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 16.--23. 1. "NDATAL,Next Data Length"
newline
bitfld.long 0x8 9. "PEC,PEC Request (SMBus Mode only)" "0: The transfer does not use a PEC byte.,1: The transfer uses a PEC byte."
newline
bitfld.long 0x8 8. "DIR,Transfer Direction" "0: Write direction.,1: Read direction."
newline
hexmask.long.byte 0x8 0.--7. 1. "DATAL,Data Length"
line.long 0xC "FLEX_TWI_FILTR,TWI Filter Register"
bitfld.long 0xC 8.--10. "THRES,Digital Filter Threshold" "0: No filtering applied on TWI inputs.,?,?,?,?,?,?,?"
newline
bitfld.long 0xC 1. "PADFEN,PAD Filter Enable" "0: PAD analog filter is disabled.,1: PAD analog filter is enabled. (The analog filter.."
newline
bitfld.long 0xC 0. "FILT,RX Digital Filter" "0: No filtering applied on TWI inputs.,1: TWI input filtering is active. (Only in Standard.."
line.long 0x10 "FLEX_TWI_HSCWGR,TWI High Speed Clock Waveform Generator Register"
bitfld.long 0x10 16.--18. "HSCKDIV,High Speed Clock Divider" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--15. 1. "HSCHDIV,High Speed Clock High Divider"
newline
hexmask.long.byte 0x10 0.--7. 1. "HSCLDIV,High Speed Clock Low Divider"
group.long 0x650++0x3
line.long 0x0 "FLEX_TWI_FMR,TWI FIFO Mode Register"
hexmask.long.byte 0x0 24.--29. 1. "RXFTHRES,Receive FIFO Threshold"
newline
hexmask.long.byte 0x0 16.--21. 1. "TXFTHRES,Transmit FIFO Threshold"
newline
bitfld.long 0x0 4.--5. "RXRDYM,Receiver Ready Mode" "0: RXRDY will be at level '1' when at least one..,1: RXRDY will be at level '1' when at least two..,2: RXRDY will be at level '1' when at least four..,?"
newline
bitfld.long 0x0 0.--1. "TXRDYM,Transmitter Ready Mode" "0: TXRDY will be at level '1' when at least one..,1: TXRDY will be at level '1' when at least two..,2: TXRDY will be at level '1' when at least four..,?"
rgroup.long 0x654++0x3
line.long 0x0 "FLEX_TWI_FLR,TWI FIFO Level Register"
hexmask.long.byte 0x0 16.--21. 1. "RXFL,Receive FIFO Level"
newline
hexmask.long.byte 0x0 0.--5. 1. "TXFL,Transmit FIFO Level"
rgroup.long 0x660++0x3
line.long 0x0 "FLEX_TWI_FSR,TWI FIFO Status Register"
bitfld.long 0x0 7. "RXFPTEF,Receive FIFO Pointer Error Flag" "0: No Receive FIFO pointer occurred,1: Receive FIFO pointer error occurred. Receiver.."
newline
bitfld.long 0x0 6. "TXFPTEF,Transmit FIFO Pointer Error Flag" "0: No Transmit FIFO pointer occurred,1: Transmit FIFO pointer error occurred."
newline
bitfld.long 0x0 5. "RXFTHF,Receive FIFO Threshold Flag" "0: Number of unread data in Receive FIFO is below..,1: Number of unread data in Receive FIFO has.."
newline
bitfld.long 0x0 4. "RXFFF,Receive FIFO Full Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been filled since the last read.."
newline
bitfld.long 0x0 3. "RXFEF,Receive FIFO Empty Flag" "0: Receive FIFO is not empty.,1: Receive FIFO has been emptied since the last.."
newline
bitfld.long 0x0 2. "TXFTHF,Transmit FIFO Threshold Flag (cleared on read)" "0: Number of data in Transmit FIFO is above..,1: Number of data in Transmit FIFO has reached.."
newline
bitfld.long 0x0 1. "TXFFF,Transmit FIFO Full Flag (cleared on read)" "0: Transmit FIFO is not full.,1: Transmit FIFO has been filled since the last.."
newline
bitfld.long 0x0 0. "TXFEF,Transmit FIFO Empty Flag (cleared on read)" "0: Transmit FIFO is not empty.,1: Transmit FIFO has been emptied since the last.."
wgroup.long 0x664++0x7
line.long 0x0 "FLEX_TWI_FIER,TWI FIFO Interrupt Enable Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Enable" "0,1"
line.long 0x4 "FLEX_TWI_FIDR,TWI FIFO Interrupt Disable Register"
bitfld.long 0x4 7. "RXFPTEF,RXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "TXFPTEF,TXFPTEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 5. "RXFTHF,RXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "RXFFF,RXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "RXFEF,RXFEF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXFTHF,TXFTHF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "TXFFF,TXFFF Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "TXFEF,TXFEF Interrupt Disable" "0,1"
rgroup.long 0x66C++0x3
line.long 0x0 "FLEX_TWI_FIMR,TWI FIFO Interrupt Mask Register"
bitfld.long 0x0 7. "RXFPTEF,RXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "TXFPTEF,TXFPTEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "RXFTHF,RXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "RXFFF,RXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "RXFEF,RXFEF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "TXFTHF,TXFTHF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXFFF,TXFFF Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "TXFEF,TXFEF Interrupt Mask" "0,1"
group.long 0x6E4++0x3
line.long 0x0 "FLEX_TWI_WPMR,TWI Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x6E8++0x3
line.long 0x0 "FLEX_TWI_WPSR,TWI Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status (cleared on read)" "0: No Write Protection Violation has occurred since..,1: A Write Protection Violation has occurred since.."
tree.end
tree.end
tree "GMAC (Ethernet MAC)"
base ad:0xF802C000
group.long 0x0++0x7
line.long 0x0 "NCR,Network Control Register"
bitfld.long 0x0 30. "IFGQAVCRED,Credit-Based Shaping Algorithm Modification" "0: No modification of the CBS algorithm.,1: Modifies the CBS algorithm so the IFG/IPG.."
newline
bitfld.long 0x0 27. "OSSCORR,OSS Correction Field" "0,1"
newline
bitfld.long 0x0 26. "EXTSELRQEN,External Selection of Receive Queue Enable" "0: Disables external selection of receive queue.,1: Enables external selection of receive queue."
newline
bitfld.long 0x0 25. "PFCCTL,Multiple PFC Pause quantum Enable" "0: Disables multiple PFC pause quantums.,1: Enables multiple PFC pause quantums one per.."
newline
bitfld.long 0x0 24. "OSSMODE,One Step Sync Mode" "0: 1588 One Step Sync Mode is disabled.,1: 1588 One Step Sync Mode is enabled. Replaces.."
newline
bitfld.long 0x0 22. "STUDPOFFSET,Store UDP Offset" "0: Normal operations.,1: The upper 16 bits of the CRC of every received.."
newline
bitfld.long 0x0 20. "PTPUNIENA,Detection of Unicast PTP Frames Enable" "0: Disables detection of unicast PTP frames.,1: Enables detection of unicast PTP frames."
newline
bitfld.long 0x0 19. "TXLPIEN,Enable LPI Transmission" "0,1"
newline
bitfld.long 0x0 18. "FNP,Flush Next Packet" "0: No effect.,1: Flushes the next packet from the receive memory."
newline
bitfld.long 0x0 17. "TXPBPF,Transmit PFC Priority-based Pause Frame" "0: No effect.,1: Takes the values stored in the Transmit PFC.."
newline
bitfld.long 0x0 16. "ENPBPR,Enable PFC Priority-based Pause Reception" "0,1"
newline
bitfld.long 0x0 15. "SRTSM,Store Receive Timestamp to Memory" "0: No effect.,1: Causes the CRC of every received frame to be.."
newline
bitfld.long 0x0 12. "TXZQPF,Transmit Zero Quantum Pause Frame (Write-only)" "0: No effect.,1: Generates a pause frame with zero quantum to be.."
newline
bitfld.long 0x0 11. "TXPF,Transmit Pause Frame (Write-only)" "0: No effect.,1: Generates a pause frame to be transmitted."
newline
bitfld.long 0x0 10. "THALT,Transmit Halt (Write-only)" "0: No effect.,1: Halts transmission as soon as any ongoing frame.."
newline
bitfld.long 0x0 9. "TSTART,Start Transmission (Write-only)" "0: No effect.,1: Starts transmission."
newline
bitfld.long 0x0 8. "BP,Back Pressure" "0: No effect,1: When the MAC is set in 10M or 100M Half Duplex.."
newline
bitfld.long 0x0 7. "WESTAT,Write Enable for Statistics Registers" "0: Forces the statistics registers to be in..,1: Makes the statistics registers writable for.."
newline
bitfld.long 0x0 6. "INCSTAT,Increment Statistics Registers (Write-only)" "0,1"
newline
bitfld.long 0x0 5. "CLRSTAT,Clear Statistics Registers (Write-only)" "0: No effect.,1: Clears the statistics registers."
newline
bitfld.long 0x0 4. "MPE,Management Port Enable" "0: Forces GMDIO to high impedance state and MDC low.,1: Enables the management port."
newline
bitfld.long 0x0 3. "TXEN,Transmit Enable" "0: Stops transmission immediately the transmit..,1: Enables the GMAC transmitter to send data."
newline
bitfld.long 0x0 2. "RXEN,Receive Enable" "0: Stops frame reception immediately and the..,1: Enables the GMAC to receive data."
newline
bitfld.long 0x0 1. "LBL,Loop Back Local" "0: Normal operating mode (no loop back).,1: Connects GTX to GRX GTXEN to GRXDV and forces.."
line.long 0x4 "NCFGR,Network Configuration Register"
bitfld.long 0x4 30. "IRXER,Ignore Receive Error from PHY" "0,1"
newline
bitfld.long 0x4 29. "RXBP,Receive Bad Preamble" "0,1"
newline
bitfld.long 0x4 28. "IPGSEN,IP Stretch Enable" "0,1"
newline
bitfld.long 0x4 26. "IRXFCS,Ignore RX FCS" "0,1"
newline
bitfld.long 0x4 25. "EFRHD,Enable Frames Received in Half Duplex" "0,1"
newline
bitfld.long 0x4 24. "RXCOEN,Receive Checksum Offload Enable" "0,1"
newline
bitfld.long 0x4 23. "DCPF,Disable Copy of Pause Frames" "0,1"
newline
bitfld.long 0x4 21.--22. "DBW,Data Bus Width" "0,1,2,3"
newline
bitfld.long 0x4 18.--20. "CLK,MDC CLock Division" "0: MCK divided by 8 (MCK up to 20 MHz),1: MCK divided by 16 (MCK up to 40 MHz),2: MCK divided by 32 (MCK up to 80 MHz),3: MCK divided by 48 (MCK up to 120 MHz),4: MCK divided by 64 (MCK up to 160 MHz),5: MCK divided by 96 (MCK up to 240 MHz),?,?"
newline
bitfld.long 0x4 17. "RFCS,Remove FCS" "0,1"
newline
bitfld.long 0x4 16. "LFERD,Length Field Error Frame Discard" "0,1"
newline
bitfld.long 0x4 14.--15. "RXBUFO,Receive Buffer Offset" "0,1,2,3"
newline
bitfld.long 0x4 13. "PEN,Pause Enable" "0,1"
newline
bitfld.long 0x4 12. "RTY,Retry Test0" "0,1"
newline
bitfld.long 0x4 10. "GBE,Gigabit Mode Enable" "0: 10/100 operation.,1: Gigabit operation."
newline
bitfld.long 0x4 8. "MAXFS,1536 Maximum Frame Size" "0,1"
newline
bitfld.long 0x4 7. "UNIHEN,Unicast Hash Enable" "0,1"
newline
bitfld.long 0x4 6. "MTIHEN,Multicast Hash Enable" "0,1"
newline
bitfld.long 0x4 5. "NBC,No Broadcast" "0,1"
newline
bitfld.long 0x4 4. "CAF,Copy All Frames" "0,1"
newline
bitfld.long 0x4 3. "JFRAME,Jumbo Frame Size" "0,1"
newline
bitfld.long 0x4 2. "DNVLAN,Discard Non-VLAN FRAMES" "0,1"
newline
bitfld.long 0x4 1. "FD,Full Duplex" "0,1"
newline
bitfld.long 0x4 0. "SPD,Speed" "0,1"
rgroup.long 0x8++0x3
line.long 0x0 "NSR,Network Status Register"
bitfld.long 0x0 7. "RXLPIS,LPI Indication" "0,1"
newline
bitfld.long 0x0 6. "PFCPAUSN,PFC Pause Negotiated" "0,1"
newline
bitfld.long 0x0 2. "IDLE,PHY Management Logic Idle" "0,1"
newline
bitfld.long 0x0 1. "MDIO,MDIO Input Status" "0,1"
group.long 0xC++0x17
line.long 0x0 "UR,User Register"
bitfld.long 0x0 6. "HDFLCTLEN,Half Duplex Flow Control Enable" "0: Half duplex flow control is disabled.,1: Half duplex flow control is enabled."
newline
bitfld.long 0x0 2. "REFCLK,Source for the GMAC Reference Clock" "0: Selects the GCLK from PMC,1: Selects the clock from an IO"
newline
bitfld.long 0x0 0.--1. "MIM,Media Interface Mode" "?,1: Selects the RMII mode.,2: Selects the RGMII mode.,?"
line.long 0x4 "DCFGR,DMA Configuration Register"
bitfld.long 0x4 29. "TXBD_EXTENDED,Transmit Buffer Descriptor Extended Mode" "0: Disables Transmit Buffer Data Extended mode.,1: Enables Transmit Buffer Data Extended mode."
newline
bitfld.long 0x4 28. "RXBD_EXTENDED,Receive Buffer Descriptor Extended Mode" "0: Disables Receive Buffer Data Extended mode.,1: Enables Receive Buffer Data Extended mode."
newline
bitfld.long 0x4 26. "TXFOMAXB,Force Transmit Max Burst Length" "0,1"
newline
bitfld.long 0x4 25. "RXFOMAXB,Force Receive Max Burst Length" "0,1"
newline
bitfld.long 0x4 24. "DDRP,DMA Discard Receive Packets" "0,1"
newline
hexmask.long.byte 0x4 16.--23. 1. "DRBS,DMA Receive Buffer Size"
newline
bitfld.long 0x4 13. "CRCERRREP,CRC Errors Report" "0: Bit 16 of the receive buffer descriptor..,1: Bit 16 of the receive buffer descriptor.."
newline
bitfld.long 0x4 12. "INFLASTEN,Infinite Size for Last Buffer Enable" "0,1"
newline
bitfld.long 0x4 11. "TXCOEN,Transmitter Checksum Generation Offload Enable" "0,1"
newline
bitfld.long 0x4 10. "TXPBMS,Transmitter Packet Buffer Memory Size Select" "0: Do not use top address bit (2 Kbytes).,1: Use full configured addressable space (4 Kbytes)."
newline
bitfld.long 0x4 8.--9. "RXBMS,Receiver Packet Buffer Memory Size Select" "0: 4/8 Kbyte Memory Size,1: 4/4 Kbytes Memory Size,2: 4/2 Kbytes Memory Size,3: 4 Kbytes Memory Size"
newline
bitfld.long 0x4 7. "ESPA,Endian Swap Mode Enable for Packet Data Accesses" "0: Selects Little-endian endianism for system bus..,1: Selects swapped endianism for system bus.."
newline
bitfld.long 0x4 6. "ESMA,Endian Swap Mode Enable for Management Descriptor Accesses" "0: Selects Little-endian endianism for system bus..,1: Selects swapped endianism for system bus.."
newline
hexmask.long.byte 0x4 0.--4. 1. "FBLDO,Fixed Burst Length for DMA Data Operations:"
line.long 0x8 "TSR,Transmit Status Register"
bitfld.long 0x8 10. "TXDMALCK,Transmit DMA Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x8 9. "TXMACLCK,Transmit MAC Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x8 8. "HRESP,System Bus Response" "0,1"
newline
bitfld.long 0x8 7. "LCO,Late Collision Occurred" "0,1"
newline
bitfld.long 0x8 5. "TXCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x8 4. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x8 3. "TXGO,Transmit Go (Read only)" "0,1"
newline
bitfld.long 0x8 2. "RLE,Retry Limit Exceeded" "0,1"
newline
bitfld.long 0x8 1. "COL,Collision Occurred" "0,1"
newline
bitfld.long 0x8 0. "UBR,Used Bit Read" "0,1"
line.long 0xC "RBQB,Receive Buffer Queue Base Address Register"
hexmask.long 0xC 2.--31. 1. "ADDR,Receive Buffer Queue Base Address"
newline
bitfld.long 0xC 0. "RXQDIS,Receive Queue Disable" "0: Queue is enabled.,1: Queue is disabled. Used to reduce the number of.."
line.long 0x10 "TBQB,Transmit Buffer Queue Base Address Register"
hexmask.long 0x10 2.--31. 1. "ADDR,Transmit Buffer Queue Base Address"
newline
bitfld.long 0x10 0. "TXQDIS,Transmit Queue Disable" "0: Queue is enabled.,1: Queue is disabled. Used to reduce the number of.."
line.long 0x14 "RSR,Receive Status Register"
bitfld.long 0x14 5. "RXDMALCK,Receive DMA Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x14 4. "RXMACLCK,Receive MAC Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x14 3. "HNO,System Bus Error" "0,1"
newline
bitfld.long 0x14 2. "RXOVR,Receive Overrun" "0,1"
newline
bitfld.long 0x14 1. "REC,Frame Received" "0,1"
newline
bitfld.long 0x14 0. "BNA,Buffer Not Available" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "ISR,Interrupt Status Register"
bitfld.long 0x0 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison (Cleared on read)" "0,1"
newline
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x0 27. "RXLPISBC,Receive LPI indication Status Bit Change (Cleared on read)" "0,1"
newline
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment (Cleared on read)" "0,1"
newline
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 13. "PTZ,Pause Time Zero (Cleared on read)" "0,1"
newline
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 11. "HRESP,System Bus Error (Cleared on read)" "0,1"
newline
bitfld.long 0x0 10. "ROVR,Receive Overrun (Cleared on read)" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete (Cleared on read)" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error (Cleared on read)" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision (Cleared on read)" "0,1"
newline
bitfld.long 0x0 4. "TUR,Transmit Underrun (Cleared on read)" "0,1"
newline
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read (Cleared on read)" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read (Cleared on read)" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete (Cleared on read)" "0,1"
newline
bitfld.long 0x0 0. "MFS,Management Frame Sent (Cleared on read)" "0,1"
wgroup.long 0x28++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
newline
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x0 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
newline
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
newline
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
newline
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
newline
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
newline
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
newline
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
newline
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
newline
bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1"
newline
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
newline
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
newline
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
newline
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
newline
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
newline
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x4 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x4 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
newline
bitfld.long 0x4 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x4 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
newline
bitfld.long 0x4 26. "SRI,TSU Seconds Register Increment" "0,1"
newline
bitfld.long 0x4 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
newline
bitfld.long 0x4 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x4 23. "PDRSFR,PDelay Response Frame Received" "0,1"
newline
bitfld.long 0x4 22. "PDRQFR,PDelay Request Frame Received" "0,1"
newline
bitfld.long 0x4 21. "SFT,PTP Sync Frame Transmitted" "0,1"
newline
bitfld.long 0x4 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x4 19. "SFR,PTP Sync Frame Received" "0,1"
newline
bitfld.long 0x4 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
newline
bitfld.long 0x4 15. "EXINT,External Interrupt" "0,1"
newline
bitfld.long 0x4 14. "PFTR,Pause Frame Transmitted" "0,1"
newline
bitfld.long 0x4 13. "PTZ,Pause Time Zero" "0,1"
newline
bitfld.long 0x4 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
newline
bitfld.long 0x4 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x4 10. "ROVR,Receive Overrun" "0,1"
newline
bitfld.long 0x4 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x4 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x4 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x4 4. "TUR,Transmit Underrun" "0,1"
newline
bitfld.long 0x4 3. "TXUBR,TX Used Bit Read" "0,1"
newline
bitfld.long 0x4 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x4 1. "RCOMP,Receive Complete" "0,1"
newline
bitfld.long 0x4 0. "MFS,Management Frame Sent" "0,1"
group.long 0x30++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
newline
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x0 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
newline
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
newline
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
newline
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
newline
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
newline
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
newline
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
newline
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
newline
bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1"
newline
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
newline
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
newline
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
newline
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
newline
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
newline
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
line.long 0x4 "MAN,PHY Maintenance Register"
bitfld.long 0x4 31. "WZO,Write ZERO" "0,1"
newline
bitfld.long 0x4 30. "CLTTO,Clause 22 Operation" "0: Clause 45 operation,1: Clause 22 operation"
newline
bitfld.long 0x4 28.--29. "OP,Operation" "?,1: Write,2: Read,?"
newline
hexmask.long.byte 0x4 23.--27. 1. "PHYA,PHY Address"
newline
hexmask.long.byte 0x4 18.--22. 1. "REGA,Register Address"
newline
bitfld.long 0x4 16.--17. "WTN,Write Ten" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--15. 1. "DATA,PHY Data"
rgroup.long 0x38++0x3
line.long 0x0 "RPQ,Receive Pause Quantum Register"
hexmask.long.word 0x0 0.--15. 1. "RPQ,Received Pause Quantum"
group.long 0x3C++0xF
line.long 0x0 "TPQ,Transmit Pause Quantum Register"
hexmask.long.word 0x0 16.--31. 1. "P1TPQ,Priority 1 Transmit Pause Quantum"
newline
hexmask.long.word 0x0 0.--15. 1. "TPQ,Transmit Pause Quantum"
line.long 0x4 "TPSF,TX Partial Store and Forward Register"
bitfld.long 0x4 31. "ENTXP,Enable TX Partial Store and Forward Operation" "0,1"
newline
hexmask.long.word 0x4 0.--11. 1. "TPB1ADR,Transmit Partial Store and Forward Address"
line.long 0x8 "RPSF,RX Partial Store and Forward Register"
bitfld.long 0x8 31. "ENRXP,Enable RX Partial Store and Forward Operation" "0,1"
newline
hexmask.long.word 0x8 0.--9. 1. "RPB1ADR,Receive Partial Store and Forward Address"
line.long 0xC "RJFML,RX Jumbo Frame Max Length Register"
hexmask.long.word 0xC 0.--13. 1. "FML,Frame Max Length"
group.long 0x5C++0x7
line.long 0x0 "INTM,Interrupt Moderation Register"
hexmask.long.byte 0x0 16.--23. 1. "TXINTMOD,Transmit Interrupt Moderation"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXINTMOD,Receive Interrupt Moderation"
line.long 0x4 "SYSWT,System Wake-Up Time Register"
hexmask.long.word 0x4 0.--15. 1. "SYSWKUPTIME,System Wake-up Time"
group.long 0x68++0xB
line.long 0x0 "LCKUP_CFGR,Lockup Configuration Register"
bitfld.long 0x0 31. "TXDMA_LCKUP_EN,Transmit DMA Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 30. "TXMAC_LCKUP_EN,Transmit MAC Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 29. "RXDMA_LCKUP_EN,Receive DMA Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 28. "RXMAC_LCKUP_EN,Receive MAC Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 27. "LCKUP_REC_EN,Lockup RecoveryEnable" "0: No effect.,1: Forces the MAC in Reset mode when a lockup.is.."
newline
hexmask.long.word 0x0 16.--26. 1. "DMA_LOCKUP_TIME,Timeout Value for Receive and Transmit DMA"
newline
hexmask.long.word 0x0 0.--15. 1. "PRESCALER,Prescaler Value for Timeout"
line.long 0x4 "LCKUP_TIME,MAC Lockup Detection Time register"
hexmask.long.word 0x4 16.--26. 1. "TX_MAC_LOCKUP_TIME,Transmit MAC Lockup Detector Time"
newline
hexmask.long.word 0x4 0.--15. 1. "RX_MAC_LOCKUP_TIME,Receive MAC Lockup Detector Time"
line.long 0x8 "TXDMA_LCKUP_CR,Transmit DMA Lockup Control Register"
bitfld.long 0x8 5. "LCKUP_EN_Q5,Transmit DMA Lockup Detector Enable for Queue 5" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 4. "LCKUP_EN_Q4,Transmit DMA Lockup Detector Enable for Queue 4" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 3. "LCKUP_EN_Q3,Transmit DMA Lockup Detector Enable for Queue 3" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 2. "LCKUP_EN_Q2,Transmit DMA Lockup Detector Enable for Queue 2" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 1. "LCKUP_EN_Q1,Transmit DMA Lockup Detector Enable for Queue 1" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 0. "LCKUP_EN_Q0,Transmit DMA Lockup Detector Enable for Queue 0" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
group.long 0x7C++0x6B
line.long 0x0 "RX_WATERMARK,Receive Watermark Register"
bitfld.long 0x0 31. "RX_LOW_WATERMARK15,Transmit DMA Lockup Detector Enable for Queue 15" "0,1"
newline
bitfld.long 0x0 30. "RX_LOW_WATERMARK14,Transmit DMA Lockup Detector Enable for Queue 14" "0,1"
newline
bitfld.long 0x0 29. "RX_LOW_WATERMARK13,Transmit DMA Lockup Detector Enable for Queue 13" "0,1"
newline
bitfld.long 0x0 28. "RX_LOW_WATERMARK12,Transmit DMA Lockup Detector Enable for Queue 12" "0,1"
newline
bitfld.long 0x0 27. "RX_LOW_WATERMARK11,Transmit DMA Lockup Detector Enable for Queue 11" "0,1"
newline
bitfld.long 0x0 26. "RX_LOW_WATERMARK10,Transmit DMA Lockup Detector Enable for Queue 10" "0,1"
newline
bitfld.long 0x0 25. "RX_LOW_WATERMARK9,Transmit DMA Lockup Detector Enable for Queue 9" "0,1"
newline
bitfld.long 0x0 24. "RX_LOW_WATERMARK8,Transmit DMA Lockup Detector Enable for Queue 8" "0,1"
newline
bitfld.long 0x0 23. "RX_LOW_WATERMARK7,Transmit DMA Lockup Detector Enable for Queue 7" "0,1"
newline
bitfld.long 0x0 22. "RX_LOW_WATERMARK6,Transmit DMA Lockup Detector Enable for Queue 6" "0,1"
newline
bitfld.long 0x0 21. "RX_LOW_WATERMARK5,Transmit DMA Lockup Detector Enable for Queue 5" "0,1"
newline
bitfld.long 0x0 20. "RX_LOW_WATERMARK4,Transmit DMA Lockup Detector Enable for Queue 4" "0,1"
newline
bitfld.long 0x0 19. "RX_LOW_WATERMARK3,Transmit DMA Lockup Detector Enable for Queue 3" "0,1"
newline
bitfld.long 0x0 18. "RX_LOW_WATERMARK2,Transmit DMA Lockup Detector Enable for Queue 2" "0,1"
newline
bitfld.long 0x0 17. "RX_LOW_WATERMARK1,Transmit DMA Lockup Detector Enable for Queue 1" "0,1"
newline
bitfld.long 0x0 16. "RX_LOW_WATERMARK0,Transmit DMA Lockup Detector Enable for Queue 0" "0,1"
newline
bitfld.long 0x0 15. "RX_HIGH_WATERMARK15,Transmit DMA Lockup Detector Enable for Queue 15" "0,1"
newline
bitfld.long 0x0 14. "RX_HIGH_WATERMARK14,Transmit DMA Lockup Detector Enable for Queue 14" "0,1"
newline
bitfld.long 0x0 13. "RX_HIGH_WATERMARK13,Transmit DMA Lockup Detector Enable for Queue 13" "0,1"
newline
bitfld.long 0x0 12. "RX_HIGH_WATERMARK12,Transmit DMA Lockup Detector Enable for Queue 12" "0,1"
newline
bitfld.long 0x0 11. "RX_HIGH_WATERMARK11,Transmit DMA Lockup Detector Enable for Queue 11" "0,1"
newline
bitfld.long 0x0 10. "RX_HIGH_WATERMARK10,Transmit DMA Lockup Detector Enable for Queue 10" "0,1"
newline
bitfld.long 0x0 9. "RX_HIGH_WATERMARK9,Transmit DMA Lockup Detector Enable for Queue 9" "0,1"
newline
bitfld.long 0x0 8. "RX_HIGH_WATERMARK8,Transmit DMA Lockup Detector Enable for Queue 8" "0,1"
newline
bitfld.long 0x0 7. "RX_HIGH_WATERMARK7,Transmit DMA Lockup Detector Enable for Queue 7" "0,1"
newline
bitfld.long 0x0 6. "RX_HIGH_WATERMARK6,Transmit DMA Lockup Detector Enable for Queue 6" "0,1"
newline
bitfld.long 0x0 5. "RX_HIGH_WATERMARK5,Transmit DMA Lockup Detector Enable for Queue 5" "0,1"
newline
bitfld.long 0x0 4. "RX_HIGH_WATERMARK4,Transmit DMA Lockup Detector Enable for Queue 4" "0,1"
newline
bitfld.long 0x0 3. "RX_HIGH_WATERMARK3,Transmit DMA Lockup Detector Enable for Queue 3" "0,1"
newline
bitfld.long 0x0 2. "RX_HIGH_WATERMARK2,Transmit DMA Lockup Detector Enable for Queue 2" "0,1"
newline
bitfld.long 0x0 1. "RX_HIGH_WATERMARK1,Transmit DMA Lockup Detector Enable for Queue 1" "0,1"
newline
bitfld.long 0x0 0. "RX_HIGH_WATERMARK0,Transmit DMA Lockup Detector Enable for Queue 0" "0,1"
line.long 0x4 "HRB,Hash Register Bottom"
hexmask.long 0x4 0.--31. 1. "ADDR,Hash Address"
line.long 0x8 "HRT,Hash Register Top"
hexmask.long 0x8 0.--31. 1. "ADDR,Hash Address"
line.long 0xC "SAB1,Specific Address 1 Bottom Register"
hexmask.long 0xC 0.--31. 1. "ADDR,Specific Address 1"
line.long 0x10 "SAT1,Specific Address 1 Top Register"
bitfld.long 0x10 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
newline
hexmask.long.word 0x10 0.--15. 1. "ADDR,Specific Address 1"
line.long 0x14 "SAB2,Specific Address 2 Bottom Register"
hexmask.long 0x14 0.--31. 1. "ADDR,Specific Address 2"
line.long 0x18 "SAT2,Specific Address 2 Top Register"
hexmask.long.byte 0x18 24.--29. 1. "FILTBMASK,Filter Bytes Mask"
newline
bitfld.long 0x18 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
newline
hexmask.long.word 0x18 0.--15. 1. "ADDR,Specific Address 2"
line.long 0x1C "SAB3,Specific Address 3 Bottom Register"
hexmask.long 0x1C 0.--31. 1. "ADDR,Specific Address 3"
line.long 0x20 "SAT3,Specific Address 3 Top Register"
hexmask.long.byte 0x20 24.--29. 1. "FILTBMASK,Filter Bytes Mask"
newline
bitfld.long 0x20 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
newline
hexmask.long.word 0x20 0.--15. 1. "ADDR,Specific Address 3"
line.long 0x24 "SAB4,Specific Address 4 Bottom Register"
hexmask.long 0x24 0.--31. 1. "ADDR,Specific Address 4"
line.long 0x28 "SAT4,Specific Address 4 Top Register"
hexmask.long.byte 0x28 24.--29. 1. "FILTBMASK,Filter Bytes Mask"
newline
bitfld.long 0x28 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
newline
hexmask.long.word 0x28 0.--15. 1. "ADDR,Specific Address 4"
line.long 0x2C "TIDM1,Type ID Match 1 Register"
bitfld.long 0x2C 31. "ENID1,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x2C 0.--15. 1. "TID,Type ID Match 1"
line.long 0x30 "TIDM2,Type ID Match 2 Register"
bitfld.long 0x30 31. "ENID2,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x30 0.--15. 1. "TID,Type ID Match 2"
line.long 0x34 "TIDM3,Type ID Match 3 Register"
bitfld.long 0x34 31. "ENID3,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x34 0.--15. 1. "TID,Type ID Match 3"
line.long 0x38 "TIDM4,Type ID Match 4 Register"
bitfld.long 0x38 31. "ENID4,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x38 0.--15. 1. "TID,Type ID Match 4"
line.long 0x3C "WOL,Wake on LAN Register"
bitfld.long 0x3C 19. "MTI,Multicast Hash Event Enable" "0,1"
newline
bitfld.long 0x3C 18. "SA1,Specific Address Register 1 Event Enable" "0,1"
newline
bitfld.long 0x3C 17. "ARP,ARP Request Event Enable" "0,1"
newline
bitfld.long 0x3C 16. "MAG,Magic Packet Event Enable" "0,1"
newline
hexmask.long.word 0x3C 0.--15. 1. "IP,ARP Request IP Address"
line.long 0x40 "IPGS,IPG Stretch Register"
hexmask.long.word 0x40 0.--15. 1. "FL,Frame Length"
line.long 0x44 "SVLAN,Stacked VLAN Register"
bitfld.long 0x44 31. "ESVLAN,Enable Stacked VLAN Processing Mode" "0: Disable the stacked VLAN Processing mode,1: Enable the stacked VLAN Processing mode"
newline
hexmask.long.word 0x44 0.--15. 1. "VLAN_TYPE,User Defined VLAN_TYPE Field"
line.long 0x48 "TPFCP,Transmit PFC Pause Register"
hexmask.long.byte 0x48 8.--15. 1. "PQ,Pause Quantum"
newline
hexmask.long.byte 0x48 0.--7. 1. "PEV,Priority Enable Vector"
line.long 0x4C "SAMB1,Specific Address 1 Mask Bottom Register"
hexmask.long 0x4C 0.--31. 1. "ADDR,Specific Address 1 Mask"
line.long 0x50 "SAMT1,Specific Address 1 Mask Top Register"
hexmask.long.word 0x50 0.--15. 1. "ADDR,Specific Address 1 Mask"
line.long 0x54 "AMRX,System Memory Address Mask for RX Data Buffer Accesses Register"
hexmask.long.byte 0x54 28.--31. 1. "MSBADDR,MSB of the Receive Data Buffer Address"
newline
hexmask.long.byte 0x54 0.--3. 1. "MSBADDRMSK,Mask of the Receive Data Buffer Address"
line.long 0x58 "RXUDAR,PTP RX Unicast IP Destination Address Register"
hexmask.long 0x58 0.--31. 1. "RXUDA,Receive Unicast Destination Address"
line.long 0x5C "TXUDAR,PTP TX Unicast IP Destination Address Register"
hexmask.long 0x5C 0.--31. 1. "TXUDA,Transmit Unicast Destination Address"
line.long 0x60 "NSC,1588 Timer Nanosecond Comparison Register"
hexmask.long.tbyte 0x60 0.--21. 1. "NANOSEC,1588 Timer Nanosecond Comparison Value"
line.long 0x64 "SCL,1588 Timer Second Comparison Low Register"
hexmask.long 0x64 0.--31. 1. "SEC,1588 Timer Second Comparison Value"
line.long 0x68 "SCH,1588 Timer Second Comparison High Register"
hexmask.long.word 0x68 0.--15. 1. "SEC,1588 Timer Second Comparison Value"
rgroup.long 0xE8++0xF
line.long 0x0 "EFTSH,PTP Event Frame Transmitted Seconds High Register"
hexmask.long.word 0x0 0.--15. 1. "RUD,Register Update"
line.long 0x4 "EFRSH,PTP Event Frame Received Seconds High Register"
hexmask.long.word 0x4 0.--15. 1. "RUD,Register Update"
line.long 0x8 "PEFTSH,PTP Peer Event Frame Transmitted Seconds High Register"
hexmask.long.word 0x8 0.--15. 1. "RUD,Register Update"
line.long 0xC "PEFRSH,PTP Peer Event Frame Received Seconds High Register"
hexmask.long.word 0xC 0.--15. 1. "RUD,Register Update"
rgroup.long 0x100++0xB7
line.long 0x0 "OTLO,Octets Transmitted Low Register"
hexmask.long 0x0 0.--31. 1. "TXO,Transmitted Octets"
line.long 0x4 "OTHI,Octets Transmitted High Register"
hexmask.long.word 0x4 0.--15. 1. "TXO,Transmitted Octets"
line.long 0x8 "FT,Frames Transmitted Register"
hexmask.long 0x8 0.--31. 1. "FTX,Frames Transmitted without Error"
line.long 0xC "BCFT,Broadcast Frames Transmitted Register"
hexmask.long 0xC 0.--31. 1. "BFTX,Broadcast Frames Transmitted without Error"
line.long 0x10 "MFT,Multicast Frames Transmitted Register"
hexmask.long 0x10 0.--31. 1. "MFTX,Multicast Frames Transmitted without Error"
line.long 0x14 "PFT,Pause Frames Transmitted Register"
hexmask.long.word 0x14 0.--15. 1. "PFTX,Pause Frames Transmitted Register"
line.long 0x18 "BFT64,64 Byte Frames Transmitted Register"
hexmask.long 0x18 0.--31. 1. "NFTX,64 Byte Frames Transmitted without Error"
line.long 0x1C "TBFT127,65 to 127 Byte Frames Transmitted Register"
hexmask.long 0x1C 0.--31. 1. "NFTX,65 to 127 Byte Frames Transmitted without Error"
line.long 0x20 "TBFT255,128 to 255 Byte Frames Transmitted Register"
hexmask.long 0x20 0.--31. 1. "NFTX,128 to 255 Byte Frames Transmitted without Error"
line.long 0x24 "TBFT511,256 to 511 Byte Frames Transmitted Register"
hexmask.long 0x24 0.--31. 1. "NFTX,256 to 511 Byte Frames Transmitted without Error"
line.long 0x28 "TBFT1023,512 to 1023 Byte Frames Transmitted Register"
hexmask.long 0x28 0.--31. 1. "NFTX,512 to 1023 Byte Frames Transmitted without Error"
line.long 0x2C "TBFT1518,1024 to 1518 Byte Frames Transmitted Register"
hexmask.long 0x2C 0.--31. 1. "NFTX,1024 to 1518 Byte Frames Transmitted without Error"
line.long 0x30 "GTBFT1518,Greater Than 1518 Byte Frames Transmitted Register"
hexmask.long 0x30 0.--31. 1. "NFTX,Greater than 1518 Byte Frames Transmitted without Error"
line.long 0x34 "TUR,Transmit Underruns Register"
hexmask.long.word 0x34 0.--9. 1. "TXUNR,Transmit Underruns"
line.long 0x38 "SCF,Single Collision Frames Register"
hexmask.long.tbyte 0x38 0.--17. 1. "SCOL,Single Collision"
line.long 0x3C "MCF,Multiple Collision Frames Register"
hexmask.long.tbyte 0x3C 0.--17. 1. "MCOL,Multiple Collision"
line.long 0x40 "EC,Excessive Collisions Register"
hexmask.long.word 0x40 0.--9. 1. "XCOL,Excessive Collisions"
line.long 0x44 "LC,Late Collisions Register"
hexmask.long.word 0x44 0.--9. 1. "LCOL,Late Collisions"
line.long 0x48 "DTF,Deferred Transmission Frames Register"
hexmask.long.tbyte 0x48 0.--17. 1. "DEFT,Deferred Transmission"
line.long 0x4C "CSE,Carrier Sense Errors Register"
hexmask.long.word 0x4C 0.--9. 1. "CSR,Carrier Sense Error"
line.long 0x50 "ORLO,Octets Received Low Received Register"
hexmask.long 0x50 0.--31. 1. "RXO,Received Octets"
line.long 0x54 "ORHI,Octets Received High Received Register"
hexmask.long.word 0x54 0.--15. 1. "RXO,Received Octets"
line.long 0x58 "FR,Frames Received Register"
hexmask.long 0x58 0.--31. 1. "FRX,Frames Received without Error"
line.long 0x5C "BCFR,Broadcast Frames Received Register"
hexmask.long 0x5C 0.--31. 1. "BFRX,Broadcast Frames Received without Error"
line.long 0x60 "MFR,Multicast Frames Received Register"
hexmask.long 0x60 0.--31. 1. "MFRX,Multicast Frames Received without Error"
line.long 0x64 "PFR,Pause Frames Received Register"
hexmask.long.word 0x64 0.--15. 1. "PFRX,Pause Frames Received Register"
line.long 0x68 "BFR64,64 Byte Frames Received Register"
hexmask.long 0x68 0.--31. 1. "NFRX,64 Byte Frames Received without Error"
line.long 0x6C "TBFR127,65 to 127 Byte Frames Received Register"
hexmask.long 0x6C 0.--31. 1. "NFRX,65 to 127 Byte Frames Received without Error"
line.long 0x70 "TBFR255,128 to 255 Byte Frames Received Register"
hexmask.long 0x70 0.--31. 1. "NFRX,128 to 255 Byte Frames Received without Error"
line.long 0x74 "TBFR511,256 to 511 Byte Frames Received Register"
hexmask.long 0x74 0.--31. 1. "NFRX,256 to 511 Byte Frames Received without Error"
line.long 0x78 "TBFR1023,512 to 1023 Byte Frames Received Register"
hexmask.long 0x78 0.--31. 1. "NFRX,512 to 1023 Byte Frames Received without Error"
line.long 0x7C "TBFR1518,1024 to 1518 Byte Frames Received Register"
hexmask.long 0x7C 0.--31. 1. "NFRX,1024 to 1518 Byte Frames Received without Error"
line.long 0x80 "TMXBFR,1519 to Maximum Byte Frames Received Register"
hexmask.long 0x80 0.--31. 1. "NFRX,1519 to Maximum Byte Frames Received without Error"
line.long 0x84 "UFR,Undersize Frames Received Register"
hexmask.long.word 0x84 0.--9. 1. "UFRX,Undersize Frames Received"
line.long 0x88 "OFR,Oversize Frames Received Register"
hexmask.long.word 0x88 0.--9. 1. "OFRX,Oversized Frames Received"
line.long 0x8C "JR,Jabbers Received Register"
hexmask.long.word 0x8C 0.--9. 1. "JRX,Jabbers Received"
line.long 0x90 "FCSE,Frame Check Sequence Errors Register"
hexmask.long.word 0x90 0.--9. 1. "FCKR,Frame Check Sequence Errors"
line.long 0x94 "LFFE,Length Field Frame Errors Register"
hexmask.long.word 0x94 0.--9. 1. "LFER,Length Field Frame Errors"
line.long 0x98 "RSE,Receive Symbol Errors Register"
hexmask.long.word 0x98 0.--9. 1. "RXSE,Receive Symbol Errors"
line.long 0x9C "AE,Alignment Errors Register"
hexmask.long.word 0x9C 0.--9. 1. "AER,Alignment Errors"
line.long 0xA0 "RRE,Receive Resource Errors Register"
hexmask.long.tbyte 0xA0 0.--17. 1. "RXRER,Receive Resource Errors"
line.long 0xA4 "ROE,Receive Overrun Register"
hexmask.long.word 0xA4 0.--9. 1. "RXOVR,Receive Overruns"
line.long 0xA8 "IHCE,IP Header Checksum Errors Register"
hexmask.long.byte 0xA8 0.--7. 1. "HCKER,IP Header Checksum Errors"
line.long 0xAC "TCE,TCP Checksum Errors Register"
hexmask.long.byte 0xAC 0.--7. 1. "TCKER,TCP Checksum Errors"
line.long 0xB0 "UCE,UDP Checksum Errors Register"
hexmask.long.byte 0xB0 0.--7. 1. "UCKER,UDP Checksum Errors"
line.long 0xB4 "FLRXPCR,Flushed Received Packets Counter Register"
hexmask.long.word 0xB4 0.--15. 1. "COUNT,Flushed Received Packets Count (cleared on read)"
group.long 0x1BC++0x7
line.long 0x0 "TISUBN,1588 Timer Increment Sub-nanoseconds Register"
hexmask.long.byte 0x0 24.--31. 1. "LSBTIR,Lower Significant Bits of Timer Increment Register"
newline
hexmask.long.word 0x0 0.--15. 1. "MSBTIR,Most Significant Bits of Timer Increment Register"
line.long 0x4 "TSH,1588 Timer Seconds High Register"
hexmask.long.word 0x4 0.--15. 1. "TCS,Timer Count in Seconds"
group.long 0x1D0++0x7
line.long 0x0 "TSL,1588 Timer Seconds Low Register"
hexmask.long 0x0 0.--31. 1. "TCS,Timer Count in Seconds"
line.long 0x4 "TN,1588 Timer Nanoseconds Register"
hexmask.long 0x4 0.--29. 1. "TNS,Timer Count in Nanoseconds"
wgroup.long 0x1D8++0x3
line.long 0x0 "TA,1588 Timer Adjust Register"
bitfld.long 0x0 31. "ADJ,Adjust 1588 Timer" "0,1"
newline
hexmask.long 0x0 0.--29. 1. "ITDT,Increment/Decrement"
group.long 0x1DC++0x3
line.long 0x0 "TI,1588 Timer Increment Register"
hexmask.long.byte 0x0 16.--23. 1. "NIT,Number of Increments"
newline
hexmask.long.byte 0x0 8.--15. 1. "ACNS,Alternative Count Nanoseconds"
newline
hexmask.long.byte 0x0 0.--7. 1. "CNS,Count Nanoseconds"
rgroup.long 0x1E0++0x1F
line.long 0x0 "EFTSL,PTP Event Frame Transmitted Seconds Low Register"
hexmask.long 0x0 0.--31. 1. "RUD,Register Update"
line.long 0x4 "EFTN,PTP Event Frame Transmitted Nanoseconds Register"
hexmask.long 0x4 0.--29. 1. "RUD,Register Update"
line.long 0x8 "EFRSL,PTP Event Frame Received Seconds Low Register"
hexmask.long 0x8 0.--31. 1. "RUD,Register Update"
line.long 0xC "EFRN,PTP Event Frame Received Nanoseconds Register"
hexmask.long 0xC 0.--29. 1. "RUD,Register Update"
line.long 0x10 "PEFTSL,PTP Peer Event Frame Transmitted Seconds Low Register"
hexmask.long 0x10 0.--31. 1. "RUD,Register Update"
line.long 0x14 "PEFTN,PTP Peer Event Frame Transmitted Nanoseconds Register"
hexmask.long 0x14 0.--29. 1. "RUD,Register Update"
line.long 0x18 "PEFRSL,PTP Peer Event Frame Received Seconds Low Register"
hexmask.long 0x18 0.--31. 1. "RUD,Register Update"
line.long 0x1C "PEFRN,PTP Peer Event Frame Received Nanoseconds Register"
hexmask.long 0x1C 0.--29. 1. "RUD,Register Update"
rgroup.long 0x270++0xF
line.long 0x0 "RXLPI,Received LPI Transitions"
hexmask.long.word 0x0 0.--15. 1. "COUNT,Count of Received LPI transitions (cleared on read)"
line.long 0x4 "RXLPITIME,Received LPI Time"
hexmask.long.tbyte 0x4 0.--23. 1. "LPITIME,Time in LPI (cleared on read)"
line.long 0x8 "TXLPI,Transmit LPI Transitions"
hexmask.long.word 0x8 0.--15. 1. "COUNT,Count of LPI transitions (cleared on read)"
line.long 0xC "TXLPITIME,Transmit LPI Time"
hexmask.long.tbyte 0xC 0.--23. 1. "LPITIME,Time in LPI (cleared on read)"
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x400)++0x3
line.long 0x0 "ISRPQ[$1],Interrupt Status Register Priority Queue (index = 1)"
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "TBQBAPQ[$1],Transmit Buffer Queue Base Address Register Priority Queue (index = 1)"
hexmask.long 0x0 2.--31. 1. "TXBQBA,Transmit Buffer Queue Base Address"
newline
bitfld.long 0x0 0. "TXBQDIS,Transmit Buffer Queue Disable" "0: No effect.,1: Disables the transmit queue. This can be used to.."
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x480)++0x3
line.long 0x0 "RBQBAPQ[$1],Receive Buffer Queue Base Address Register Priority Queue (index = 1)"
hexmask.long 0x0 2.--31. 1. "RXBQBA,Receive Buffer Queue Base Address"
newline
bitfld.long 0x0 0. "RXBQDIS,Receive Buffer Queue Disable" "0: No effect.,1: Disables the receive queue. This can be used to.."
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4A0)++0x3
line.long 0x0 "RBSRPQ[$1],Receive Buffer Size Register Priority Queue (index = 1)"
hexmask.long.byte 0x0 0.--7. 1. "RBS,Receive Buffer Size"
repeat.end
group.long 0x4BC++0x1B
line.long 0x0 "CBSCR,Credit-Based Shaping Control Register"
bitfld.long 0x0 1. "QBE,Queue B CBS Enable" "0: Credit-based shaping on the highest priority..,1: Credit-based shaping on the highest priority.."
newline
bitfld.long 0x0 0. "QAE,Queue A CBS Enable" "0: Credit-based shaping on the second highest..,1: Credit-based shaping on the second highest.."
line.long 0x4 "CBSISQA,Credit-Based Shaping IdleSlope Register for Queue A"
hexmask.long 0x4 0.--31. 1. "IS,IdleSlope"
line.long 0x8 "CBSISQB,Credit-Based Shaping IdleSlope Register for Queue B"
hexmask.long 0x8 0.--31. 1. "IS,IdleSlope"
line.long 0xC "TQUBA,32 MSB Transmit Buffer Descriptor Queue Base Address Register"
hexmask.long 0xC 0.--31. 1. "TQUBA,Transmit Queue Upper Buffer Address"
line.long 0x10 "TXBDCTRL,Transmit Buffer Data Control Register"
bitfld.long 0x10 4.--5. "TSMODE,Transmit Descriptor Timestamp Insertion Mode" "0: Timestamp insertion disable.,1: Timestamp inserted for PTP Event Frames only.,2: Timestamp inserted for All PTP Frames only.,3: Timestamp inserted for All Frames."
line.long 0x14 "RXBDCTRL,Receive Buffer Data Control Register"
bitfld.long 0x14 4.--5. "TSMODE,Receive Descriptor Timestamp Insertion Mode" "0: Timestamp insertion disable.,1: Timestamp inserted for PTP Event Frames only.,2: Timestamp inserted for All PTP Frames only.,3: Timestamp inserted for All Frames."
line.long 0x18 "RQUBA,32 MSB Receive Buffer Descriptor Queue Base Address Register"
hexmask.long 0x18 0.--31. 1. "RQUBA,Receive Queue Upper Buffer Address"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x500)++0x3
line.long 0x0 "ST1RPQ[$1],Screening Type 1 Register Priority Queue (index = 0)"
bitfld.long 0x0 29. "UDPE,UDP Port Match Enable" "0,1"
newline
bitfld.long 0x0 28. "DSTCE,Differentiated Services or Traffic Class Match Enable" "0,1"
newline
hexmask.long.word 0x0 12.--27. 1. "UDPM,UDP Port Match"
newline
hexmask.long.byte 0x0 4.--11. 1. "DSTCM,Differentiated Services or Traffic Class Match"
newline
bitfld.long 0x0 0.--2. "QNB,Queue Number (0-5)" "0,1,2,3,4,5,6,7"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x540)++0x3
line.long 0x0 "ST2RPQ[$1],Screening Type 2 Register Priority Queue (index = 0)"
bitfld.long 0x0 30. "COMPCE,Compare C Enable" "0: Comparison via the register designated by index..,1: Comparison via the register designated by index.."
newline
hexmask.long.byte 0x0 25.--29. 1. "COMPC,Index of Screening Type 2 Compare Word 0/Word 1 register"
newline
bitfld.long 0x0 24. "COMPBE,Compare B Enable" "0: Comparison via the register designated by index..,1: Comparison via the register designated by index.."
newline
hexmask.long.byte 0x0 19.--23. 1. "COMPB,Index of Screening Type 2 Compare Word 0/Word 1 register"
newline
bitfld.long 0x0 18. "COMPAE,Compare A Enable" "0: Comparison via the register designated by index..,1: Comparison via the register designated by index.."
newline
hexmask.long.byte 0x0 13.--17. 1. "COMPA,Index of Screening Type 2 Compare Word 0/Word 1 register"
newline
bitfld.long 0x0 12. "ETHE,EtherType Enable" "0: EtherType match with bits 15:0 in the register..,1: EtherType match with bits 15:0 in the register.."
newline
bitfld.long 0x0 9.--11. "I2ETH,Index of Screening Type 2 EtherType register" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "VLANE,VLAN Enable" "0: VLAN match is disabled.,1: VLAN match is enabled."
newline
bitfld.long 0x0 4.--6. "VLANP,VLAN Priority" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "QNB,Queue Number (0-5)" "0,1,2,3,4,5,6,7"
repeat.end
group.long 0x580++0x3
line.long 0x0 "TSCTL,Transmit Schedule Control Register"
bitfld.long 0x0 10.--11. "TXSQ5,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 8.--9. "TXSQ4,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 6.--7. "TXSQ3,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 4.--5. "TXSQ2,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 2.--3. "TXSQ1,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 0.--1. "TXSQ0,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
group.long 0x590++0x3
line.long 0x0 "TQBWRL0,Transmit Queue Bandwidth Rate Limit 0 Register"
hexmask.long.byte 0x0 24.--31. 1. "ALLOCQ3,DWRR Weighting or ETS Bandwidth Allocation for Qx"
newline
hexmask.long.byte 0x0 16.--23. 1. "ALLOCQ2,DWRR Weighting or ETS Bandwidth Allocation for Qx"
newline
hexmask.long.byte 0x0 8.--15. 1. "ALLOCQ1,DWRR Weighting or ETS Bandwidth Allocation for Qx"
newline
hexmask.long.byte 0x0 0.--7. 1. "ALLOCQ0,DWRR Weighting or ETS Bandwidth Allocation for Qx"
group.long 0x5A0++0x3
line.long 0x0 "TQSA,Transmit Queue Segment Allocation Register"
bitfld.long 0x0 20.--22. "SEGALLOCQ5,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 16.--18. "SEGALLOCQ4,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12.--14. "SEGALLOCQ3,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8.--10. "SEGALLOCQ2,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--6. "SEGALLOCQ1,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "SEGALLOCQ0,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x600)++0x3
line.long 0x0 "IERPQ[$1],Interrupt Enable Register Priority Queue (index = 1)"
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x620)++0x3
line.long 0x0 "IDRPQ[$1],Interrupt Disable Register Priority Queue (index = 1)"
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x640)++0x3
line.long 0x0 "IMRPQ[$1],Interrupt Mask Register Priority Queue (index = 1)"
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "AHB,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "ST2ER[$1],Screening Type 2 Ethertype Register (index = 0)"
hexmask.long.word 0x0 0.--15. 1. "COMPVAL,Ethertype Compare Value"
repeat.end
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0xF802C700 ad:0xF802C708 ad:0xF802C710 ad:0xF802C718 ad:0xF802C720 ad:0xF802C728 ad:0xF802C730 ad:0xF802C738 ad:0xF802C740 ad:0xF802C748 ad:0xF802C750 ad:0xF802C758 ad:0xF802C760 ad:0xF802C768 ad:0xF802C770 ad:0xF802C778)
tree "GMAC_ST2CW[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "ST2CW0R,Screening Type 2 Compare Word 0 Register"
hexmask.long.word 0x0 16.--31. 1. "COMPVAL,Compare Value"
hexmask.long.word 0x0 0.--15. 1. "MASKVAL,Mask Value"
line.long 0x4 "ST2CW1R,Screening Type 2 Compare Word 1 Register"
bitfld.long 0x4 9. "DISMASK,Disable Mask" "0: GMAC_ST2CW0R contains a 2-byte compare value..,1: GMAC_ST2CW0R contains a 4-byte compare value."
bitfld.long 0x4 7.--8. "OFFSSTRT,Ethernet Frame Offset Start" "0: Offset from the start of the frame,1: Offset from the byte after the EtherType field,2: Offset from the byte after the IP header field,3: Offset from the byte after the TCP/UDP header.."
hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value in Bytes"
tree.end
repeat.end
repeat 8. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17)(list ad:0xF802C780 ad:0xF802C788 ad:0xF802C790 ad:0xF802C798 ad:0xF802C7A0 ad:0xF802C7A8 ad:0xF802C7B0 ad:0xF802C7B8)
tree "GMAC_ST2CW[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "ST2CW0R,Screening Type 2 Compare Word 0 Register"
hexmask.long.word 0x0 16.--31. 1. "COMPVAL,Compare Value"
hexmask.long.word 0x0 0.--15. 1. "MASKVAL,Mask Value"
line.long 0x4 "ST2CW1R,Screening Type 2 Compare Word 1 Register"
bitfld.long 0x4 9. "DISMASK,Disable Mask" "0: GMAC_ST2CW0R contains a 2-byte compare value..,1: GMAC_ST2CW0R contains a 4-byte compare value."
bitfld.long 0x4 7.--8. "OFFSSTRT,Ethernet Frame Offset Start" "0: Offset from the start of the frame,1: Offset from the byte after the EtherType field,2: Offset from the byte after the IP header field,3: Offset from the byte after the TCP/UDP header.."
hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value in Bytes"
tree.end
repeat.end
base ad:0xF802C000
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x800)++0x3
line.long 0x0 "ENST_START_Q[$1],ENST Start Time Queue Register (index = 0)"
bitfld.long 0x0 30.--31. "START_SEC,Seconds for Start Time" "0,1,2,3"
newline
hexmask.long 0x0 0.--29. 1. "START_NSEC,Nanoseconds for Start Time"
repeat.end
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x820)++0x3
line.long 0x0 "ENST_ON_Q[$1],ENST On Time Queue Register (index = 0)"
hexmask.long.tbyte 0x0 0.--16. 1. "ON_TIME,Time for which the Queue is to be Open"
repeat.end
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x840)++0x3
line.long 0x0 "ENST_OFF_Q[$1],ENST Off Time Queue Register (index = 0)"
hexmask.long.tbyte 0x0 0.--16. 1. "OFF_TIME,Time for which the Queue is to be Blocked"
repeat.end
group.long 0x880++0x3
line.long 0x0 "ENST_CR,ENST Control Register"
bitfld.long 0x0 5. "EN_Q5,Enhanced Scheduled Traffic Enable for Queue 5" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 4. "EN_Q4,Enhanced Scheduled Traffic Enable for Queue 4" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 3. "EN_Q3,Enhanced Scheduled Traffic Enable for Queue 3" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 2. "EN_Q2,Enhanced Scheduled Traffic Enable for Queue 2" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 1. "EN_Q1,Enhanced Scheduled Traffic Enable for Queue 1" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 0. "EN_Q0,Enhanced Scheduled Traffic Enable for Queue 0" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
group.long 0x8A0++0x7
line.long 0x0 "FRER_TIMEOUT,Frame Elimination Timeout Register"
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Sequence Recovery Timer Restart Period for Credit Based Streams"
line.long 0x4 "FRER_REDTAG,Frame Elimination Redundancy Tag Register"
bitfld.long 0x4 31. "STRIP_R_TAG,Stripping Redundancy Tag Enable" "0: Disables the stripping function. When the..,1: Enables the stripping function the receive octet.."
newline
bitfld.long 0x4 30. "SIX_BYTE_TAG,Six-byte Tag Enable" "0: Defines a four-byte tag as per 802.1CB standard..,1: Enables the six-byte tag as per 802.1CB standard.."
newline
hexmask.long.word 0x4 0.--15. 1. "RED_TAG,Redundancy Tag (R-TAG)"
repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0xF802C8C0 ad:0xF802C8D0 ad:0xF802C8E0 ad:0xF802C8F0 ad:0xF802C900 ad:0xF802C910)
tree "GMAC_FRER[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "FRER_CTRL_A,Frame Elimination Control A Register"
bitfld.long 0x0 31. "EN_ELIMINATION,802.1CB Elimination of Received Frames Enable" "0: Disables the elimination of received frames.,1: Enables the elimination of received frames."
bitfld.long 0x0 30. "EN_VECTOR_REC_ALG,802.1CB Vector Recovery Algorithm Enable" "0: Enables the match recovery algorithm.,1: Enables the vector recovery algorithm."
newline
bitfld.long 0x0 29. "EN_SEQRECRST_TIMER,802.1CB Sequence Recovery Reset Timer Enable" "0: Disables the sequence recovery reset timer.,1: Enables the sequence recovery reset timer."
bitfld.long 0x0 28. "USE_R_TAG,Redundancy Tag Enable" "0: Identifies bottom of sequence number with..,1: Identifies sequence number with redundancy tag."
newline
hexmask.long.word 0x0 8.--16. 1. "OFFSET_VALUE,Offset in Bytes from Start Packet Delimiter to MSB for 802.1CB Sequence Number"
hexmask.long.byte 0x0 4.--7. 1. "MEMBER_STREAM_2,Pointer to Screener Type 2 Register"
newline
hexmask.long.byte 0x0 0.--3. 1. "MEMBER_STREAM_1,Pointer to Screener Type 2 Register"
line.long 0x4 "FRER_CTRL_B,Frame Elimination Control B Register"
hexmask.long.byte 0x4 8.--12. 1. "SEQ_NUM_LENGTH,Number of Significants bits of the 802.1CB Sequence Number"
hexmask.long.byte 0x4 0.--5. 1. "SEQ_REC_WINDOW,Vector Recovery Window"
rgroup.long ($2+0x8)++0x7
line.long 0x0 "FRER_STAT_A,Frame Elimination Statistics A Register"
hexmask.long.word 0x0 16.--25. 1. "VEC_REC_ROGUE,Number of Dropped Frames (Clear on read)"
hexmask.long.word 0x0 0.--9. 1. "LATENT_ERRS,Number of Sequence Numbers Seen Without a Duplicate (Clear on read)"
line.long 0x4 "FRER_STAT_B,Frame Elimination Statistics B Register"
hexmask.long.word 0x4 16.--25. 1. "SEQRST_COUNT,Number of Times the Sequence Recovery Reset Timer Decrements to Zero (Clear on read)"
hexmask.long.word 0x4 0.--9. 1. "OUT_OF_ORDER,Out of Order Sequence Numbers Received (Clear on read)"
tree.end
repeat.end
base ad:0xF802C000
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xB00)++0x3
line.long 0x0 "RX_FLUSH_Q[$1],Receive Queue Flush Register (index = 0)"
hexmask.long.word 0x0 16.--31. 1. "MAX_VAL,Maximum Value for the Received Frame Size or Number of 128-Byte Chunk"
newline
bitfld.long 0x0 3. "LIMIT_FRAME_SIZE,Maximum Frame-length Received" "0: No effect.,1: When set MAX_VAL indicates the maximum.."
newline
bitfld.long 0x0 2. "LIMIT_NUM_BYTES,Limitation of the Number of 128-Byte Chunk of Data Stored in the Memory of this Queue" "0: No effect.,1: Limits the number of 128 byte chunks of data.."
newline
bitfld.long 0x0 1. "DROP_ON_RESRC_ERR,Drop on Resource Error" "0: No effect.,1: If a free DMA descriptor for this queue cannot.."
newline
bitfld.long 0x0 0. "DROP_ALL,Drop All Frames" "0: No effect.,1: Drops all frames of this queue."
repeat.end
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xB40)++0x3
line.long 0x0 "SCR2_RATE_LIMIT[$1],Screening 2 Rate Limit Register (index = 0)"
hexmask.long.word 0x0 16.--31. 1. "MAX_RATE_VAL,Maximum Rate Value for the Interval Time"
newline
hexmask.long.word 0x0 0.--15. 1. "INTERVAL_TIME,Interval Time for Maximum Rate Checking"
repeat.end
rgroup.long 0xB80++0x3
line.long 0x0 "SCR2_RATE_STATUS,Screening 2 Rate Status Register"
bitfld.long 0x0 7. "EXCESS_RATE_Q7,Excessive Screener Rate Queue 7" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 6. "EXCESS_RATE_Q6,Excessive Screener Rate Queue 6" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 5. "EXCESS_RATE_Q5,Excessive Screener Rate Queue 5" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 4. "EXCESS_RATE_Q4,Excessive Screener Rate Queue 4" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 3. "EXCESS_RATE_Q3,Excessive Screener Rate Queue 3" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 2. "EXCESS_RATE_Q2,Excessive Screener Rate Queue 2" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 1. "EXCESS_RATE_Q1,Excessive Screener Rate Queue 1" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 0. "EXCESS_RATE_Q0,Excessive Screener Rate Queue 0" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
group.long 0xF00++0x3
line.long 0x0 "MMSL_CR,MMSL Control Register"
bitfld.long 0x0 5. "ROUTE_RX_TO_PMAC,Route Received Frames to Preemptive MAC" "0: Routes all received to express MAC (eMAC).,1: Routes all received frames to preemptive MAC.."
newline
bitfld.long 0x0 4. "RESTART_VER,Restart the Verification Procedure (Write-only)" "0: No effect.,1: Restarts the verification procedure. Writing a.."
newline
bitfld.long 0x0 3. "PRE_ENABLE,Preemption Operation Enable" "0: Disables the preemption operation and verify..,1: Enables the preemption by starting the.."
newline
bitfld.long 0x0 2. "VERIFY_DISABLE,802.3br Support Check for the Link Partner" "0: Enables the 802.3br support check for the link..,1: Disables the 802.3br support check for the link.."
newline
bitfld.long 0x0 0.--1. "ADD_FRAG_SIZE,PMAC Minimum Number of Bytes before Preemption" "0: A minimum of 64 bytes can be sent by pMAC before..,1: A minimum of 128 bytes can be sent by pMAC..,2: A minimum of 192 bytes can be sent by pMAC..,3: A minimum of 256 bytes can be sent by pMAC.."
rgroup.long 0xF04++0x13
line.long 0x0 "MMSL_SR,MMSL Status Register"
bitfld.long 0x0 10. "SMD_ERR,Illegal Start Mpacket Delimiter Received (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An illegal SMD (different from Express Verify.."
newline
bitfld.long 0x0 9. "FRER_COUNT_ERR,Frame Counter Error (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: A frame counter error occurred since the last.."
newline
bitfld.long 0x0 8. "SMDC_ERR,SMD-C Received When Waiting an SMD-S (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An SMD-C has been received when an SMD-S was.."
newline
bitfld.long 0x0 7. "SMDS_ERR,SMD-S Received When Waiting an SMD-C (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An SMD-S has been received when an SMD-C was.."
newline
bitfld.long 0x0 6. "RCV_V_ERR,Incorrect Verification Mpacket Received (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An incorrect verification mPacket has been.."
newline
bitfld.long 0x0 5. "RCV_R_ERR,Incorrect Response Mpacket Received (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An incorrect response mPacket has been received.."
newline
bitfld.long 0x0 2.--4. "VERIFY_STATUS,Verification Status" "0: Initialization,1: Idle,2: Sending a verify command,3: Waiting for a response,4: Verified,5: Failure during the verify operation,?,?"
newline
bitfld.long 0x0 1. "RESPOND_STATUS,Response Status" "0: Idle,1: Sending"
newline
bitfld.long 0x0 0. "PRE_ACTIVE,Preemption Status" "0: Preemption is inactive.,1: Preemption is active when the verification.."
line.long 0x4 "MMSL_ESR,MMSL Error Statistics Register"
hexmask.long.byte 0x4 16.--23. 1. "SMD_ERROR_COUNT,Number of Rejected Frames or Fragments due to unknown SMD (Clear on read)"
newline
hexmask.long.byte 0x4 0.--7. 1. "ASS_ERROR_COUNT,Number of Frames with Reassembly Errors (Clear on read)"
line.long 0x8 "MMSL_ASS_OK,MMSL Frame Re-Assembled OK Register"
hexmask.long.tbyte 0x8 0.--16. 1. "ASS_OK_COUNT,Number of Correctly Re-Assembled Frames (Clear on read)"
line.long 0xC "MMSL_RXFRAG_CNT,MMSL Received Fragment Counter Register"
hexmask.long.tbyte 0xC 0.--16. 1. "FRAG_COUNT_RX,Number of Received Fragments (Clear on read)"
line.long 0x10 "MMSL_TXFRAG_CNT,MMSL Transmitted Fragment Counter Register"
hexmask.long.tbyte 0x10 0.--16. 1. "FRAG_COUNT_TX,Number of Transmitted Fragments (Clear on read)"
group.long 0xF18++0xB
line.long 0x0 "MMSL_ISR,MMSL Interrupt Status Register"
bitfld.long 0x0 5. "SMD_ERR,Illegal SMD Received (Clear on read)" "0: No illegal SMD received since the last read of..,1: Illegal SMD received (different from Express.."
newline
bitfld.long 0x0 4. "FR_COUNT_ERR,Illegal SMD Received (Clear on read)" "0: No frame count error detected since the last..,1: The SMD-C received since the last read of.."
newline
bitfld.long 0x0 3. "SMDC_ERR,SMD-C Received When Waiting an SMD-S (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An SMD-C has been received when an SMD-S was.."
newline
bitfld.long 0x0 2. "SMDS_ERR,SMD-S Received When Waiting an SMD-C (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An SMD-S has been received when an SMD-C was.."
newline
bitfld.long 0x0 1. "RCV_V_ERR,Incorrect Verification Mpacket Received (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An incorrect verification mPacket has been.."
newline
bitfld.long 0x0 0. "RCV_R_ERR,Incorrect Response Mpacket Received (Clear on read)" "0: No error since the last read of GMAC_MMSL_SR,1: An incorrect response mPacket has been received.."
line.long 0x4 "MMSL_IER,MMSL Interrupt Enable Register"
bitfld.long 0x4 5. "SMD_ERR,Illegal SMD Received" "0,1"
newline
bitfld.long 0x4 4. "FR_COUNT_ERR,Illegal SMD Received" "0,1"
newline
bitfld.long 0x4 3. "SMDC_ERR,SMD-C Received When Waiting an SMD-S" "0,1"
newline
bitfld.long 0x4 2. "SMDS_ERR,SMD-S Received When Waiting an SMD-C" "0,1"
newline
bitfld.long 0x4 1. "RCV_V_ERR,Incorrect Verification Mpacket Received" "0,1"
newline
bitfld.long 0x4 0. "RCV_R_ERR,Incorrect Response Mpacket Received" "0,1"
line.long 0x8 "MMSL_IDR,MMSL Interrupt Disable Register"
bitfld.long 0x8 5. "SMD_ERR,Illegal SMD Received" "0,1"
newline
bitfld.long 0x8 4. "FR_COUNT_ERR,Illegal SMD Received" "0,1"
newline
bitfld.long 0x8 3. "SMDC_ERR,SMD-C Received When Waiting an SMD-S" "0,1"
newline
bitfld.long 0x8 2. "SMDS_ERR,SMD-S Received When Waiting an SMD-C" "0,1"
newline
bitfld.long 0x8 1. "RCV_V_ERR,Incorrect Verification Mpacket Received" "0,1"
newline
bitfld.long 0x8 0. "RCV_R_ERR,Incorrect Response Mpacket Received" "0,1"
rgroup.long 0xF24++0x3
line.long 0x0 "MMSL_IMR,MMSL Interrupt Mask Register"
bitfld.long 0x0 5. "SMD_ERR,Illegal SMD Received" "0,1"
newline
bitfld.long 0x0 4. "FR_COUNT_ERR,Illegal SMD Received" "0,1"
newline
bitfld.long 0x0 3. "SMDC_ERR,SMD-C Received When Waiting an SMD-S" "0,1"
newline
bitfld.long 0x0 2. "SMDS_ERR,SMD-S Received When Waiting an SMD-C" "0,1"
newline
bitfld.long 0x0 1. "RCV_V_ERR,Incorrect Verification Mpacket Received" "0,1"
newline
bitfld.long 0x0 0. "RCV_R_ERR,Incorrect Response Mpacket Received" "0,1"
group.long 0x1000++0x7
line.long 0x0 "EMAC_NCR,Express MAC Network Control Register"
bitfld.long 0x0 30. "IFGQAVCRED,Credit-Based Shaping Algorithm Modification" "0: No modification of the CBS algorithm.,1: Modifies the CBS algorithm so the IFG/IPG.."
newline
bitfld.long 0x0 27. "OSSCORR,1588 One Step Sync Mode Correction Field" "0: Disables updating the correction field of PTP..,1: Enables updating the correction field of PTP.."
newline
bitfld.long 0x0 26. "EXTSELRQEN,External Selection of Receive Queue Enable" "0: Disables external selection of receive queue.,1: Enables external selection of receive queue."
newline
bitfld.long 0x0 25. "PFCCTL,Multiple PFC Pause quantum Enable" "0: Disables multiple PFC pause quantums.,1: Enables multiple PFC pause quantums one per.."
newline
bitfld.long 0x0 24. "OSSMODE,One Step Sync Mode" "0: 1588 One Step Sync Mode is disabled.,1: 1588 One Step Sync Mode is enabled. Replaces.."
newline
bitfld.long 0x0 22. "STUDPOFFSET,Store UDP Offset" "0: Normal operations.,1: The upper 16 bits of the CRC of every received.."
newline
bitfld.long 0x0 20. "PTPUNIENA,Detection of Unicast PTP Frames Enable" "0: Disables detection of unicast PTP frames.,1: Enables detection of unicast PTP frames."
newline
bitfld.long 0x0 19. "TXLPIEN,Enable LPI Transmission" "0,1"
newline
bitfld.long 0x0 18. "FNP,Flush Next Packet (Write-only)" "0: No effect.,1: Flushes the next packet from the receive memory."
newline
bitfld.long 0x0 17. "TXPBPF,Transmit PFC Priority-based Pause Frame (Write-only)" "0: No effect.,1: Takes the values stored in the Transmit PFC.."
newline
bitfld.long 0x0 16. "ENPBPR,Enable PFC Priority-based Pause Reception" "0: Disables PFC Priority Based Pause Reception..,1: Enables PFC Priority Based Pause Reception.."
newline
bitfld.long 0x0 15. "SRTSM,Store Receive Timestamp to Memory" "0: Normal operation.,1: Causes the CRC of every received frame to be.."
newline
bitfld.long 0x0 12. "TXZQPF,Transmit Zero Quantum Pause Frame (Write-only)" "0: No effect.,1: Generates a pause frame with zero quantum to be.."
newline
bitfld.long 0x0 11. "TXPF,Transmit Pause Frame (Write-only)" "0: No effect.,1: Generates a pause frame to be transmitted."
newline
bitfld.long 0x0 10. "THALT,Transmit Halt (Write-only)" "0: No effect.,1: Halts transmission as soon as any ongoing frame.."
newline
bitfld.long 0x0 9. "TSTART,Start Transmission (Write-only)" "0: No effect.,1: Starts transmission."
newline
bitfld.long 0x0 8. "BP,Back Pressure" "0: No effect,1: When the MAC is set in 10M or 100M Half Duplex.."
newline
bitfld.long 0x0 7. "WESTAT,Write Enable for Statistics Registers" "0: Forces the statistics registers to be in..,1: Makes the statistics registers writable for.."
newline
bitfld.long 0x0 6. "INCSTAT,Increment Statistics Registers (Write-only)" "0,1"
newline
bitfld.long 0x0 5. "CLRSTAT,Clear Statistics Registers (Write-only)" "0: No effect.,1: Clears the statistics registers."
newline
bitfld.long 0x0 4. "MPE,Management Port Enable" "0: Forces GMDIO to high impedance state and MDC low.,1: Enables the management port."
newline
bitfld.long 0x0 3. "TXEN,Transmit Enable" "0: Stops transmission immediately the transmit..,1: Enables the GMAC transmitter to send data."
newline
bitfld.long 0x0 2. "RXEN,Receive Enable" "0: Stops frame reception immediately and the..,1: Enables the GMAC to receive data."
newline
bitfld.long 0x0 1. "LBL,Loop Back Local" "0: Normal operating mode (no loop back).,1: Connects GTX to GRX GTXEN to GRXDV and forces.."
line.long 0x4 "EMAC_NCFGR,Express MAC Network Configuration Register"
bitfld.long 0x4 30. "IRXER,Ignore Receive Error from PHY" "?,1: GRXER has no effect on the GMAC's operation when.."
newline
bitfld.long 0x4 29. "RXBP,Receive Bad Preamble" "0: Rejects frames with non-standard preamble.,1: Accepts frames with non-standard preamble."
newline
bitfld.long 0x4 28. "IPGSEN,Inter Packet Gap Stretch Enable" "0: The transmit IPG cannot be increased.,1: The transmit IPG can be increased above 96 bit.."
newline
bitfld.long 0x4 26. "IRXFCS,Ignore RX FCS" "0: Normal operation frames with FCS/CRC errors are..,1: Frames with FCS/CRC errors are rejected. FCS.."
newline
bitfld.long 0x4 25. "EFRHD,Enable Frames Received in Half Duplex" "0: Disables frames to be received in Half Duplex..,1: Enables frames to be received in Half Duplex.."
newline
bitfld.long 0x4 24. "RXCOEN,Receive Checksum Offload Enable" "0: Disables the receive checksum engine. Frames..,1: Enables the receive checksum engine. Frames with.."
newline
bitfld.long 0x4 23. "DCPF,Disable Copy of Pause Frames" "0: Copies pause frames to the system memory.,1: Prevents valid pause frames being copied to.."
newline
bitfld.long 0x4 21.--22. "DBW,Always Written to 0" "0,1,2,3"
newline
bitfld.long 0x4 18.--20. "CLK,MDC Clock Division" "0: MCK divided by 8 (MCK up to 20 MHz),1: MCK divided by 16 (MCK up to 40 MHz),2: MCK divided by 32 (MCK up to 80 MHz),3: MCK divided by 48 (MCK up to 120 MHz),4: MCK divided by 64 (MCK up to 160 MHz),5: MCK divided by 96 (MCK up to 240 MHz),?,?"
newline
bitfld.long 0x4 17. "RFCS,Remove FCS" "0: Includes the received frame check sequence (last..,1: Excludes the received frame check sequence (last.."
newline
bitfld.long 0x4 16. "LFERD,Length Field Error Frame Discard" "0: Accepts frames with a measured length shorter..,1: Discards frames with a measured length shorter.."
newline
bitfld.long 0x4 14.--15. "RXBUFO,Receive Buffer Offset" "0,1,2,3"
newline
bitfld.long 0x4 13. "PEN,Pause Enable" "0: Does not pause the transmission when a non-zero..,1: Pauses transmission when a non-zero 802.3.."
newline
bitfld.long 0x4 12. "RTY,Retry Test0" "0: Normal operation.,1: The backoff between collisions will always be.."
newline
bitfld.long 0x4 10. "GBE,Gigabit Mode Enable" "0: Operates in 10/100Mbps mode.,1: Operates in Gigabit mode."
newline
bitfld.long 0x4 8. "MAXFS,1536 Maximum Frame Size" "0: Rejects frame sizes above 1518 bytes.,1: Accepts frames up to 1536 bytes in length."
newline
bitfld.long 0x4 7. "UNIHEN,Unicast Hash Enable" "0: Rejects unicast frames.,1: Accepts unicast frames when the 6-bit hash.."
newline
bitfld.long 0x4 6. "MTIHEN,Multicast Hash Enable" "0: Rejects multicast frames.,1: Accepts multicast frames when the 6-bit hash.."
newline
bitfld.long 0x4 5. "NBC,No Broadcast" "0: Accepts broadcast frames.,1: Rejects frames addressed to the broadcast.."
newline
bitfld.long 0x4 4. "CAF,Copy All Frames" "0: Discards invalid frames.,1: Accepts all valid frames."
newline
bitfld.long 0x4 3. "JFRAME,Jumbo Frame Size" "0: Disables jumbo frames.,1: Enables jumbo frames up to 10240 bytes to be.."
newline
bitfld.long 0x4 2. "DNVLAN,Discard Non-VLAN FRAMES" "0: Passes all frames to address matching logic,1: Passes only VLAN tagged frames to the address.."
newline
bitfld.long 0x4 1. "FD,Full Duplex" "0: Half-duplex mode.,1: The transmit block ignores the state of.."
newline
bitfld.long 0x4 0. "SPD,Speed" "0: MAC operates at 10 Mbps.,1: MAC Operates at 100 Mbps."
rgroup.long 0x1008++0x3
line.long 0x0 "EMAC_NSR,Express MAC Network Status Register"
bitfld.long 0x0 7. "RXLPIS,LPI Indication" "0,1"
newline
bitfld.long 0x0 6. "PFCPAUSN,PFC Pause Negotiated" "0,1"
newline
bitfld.long 0x0 2. "IDLE,PHY Management Logic Idle" "0,1"
newline
bitfld.long 0x0 1. "MDIO,MDIO Input Status" "0,1"
group.long 0x1010++0x13
line.long 0x0 "EMAC_DCFGR,Express MAC DMA Configuration Register"
bitfld.long 0x0 29. "TXBD_EXTENDED,Transmit Buffer Descriptor Extended Mode" "0: Disables Transmit Buffer Data Extended mode.,1: Enables Transmit Buffer Data Extended mode."
newline
bitfld.long 0x0 28. "RXBD_EXTENDED,Receive Buffer Descriptor Extended Mode" "0: Disables Receive Buffer Data Extended mode.,1: Enables Receive Buffer Data Extended mode."
newline
bitfld.long 0x0 26. "TXFOMAXB,Force Transmit Max Burst Length" "0,1"
newline
bitfld.long 0x0 25. "RXFOMAXB,Force Receive Max Burst Length" "0,1"
newline
bitfld.long 0x0 24. "DDRP,DMA Discard Receive Packets" "0,1"
newline
hexmask.long.byte 0x0 16.--23. 1. "DRBS,DMA Receive Buffer Size"
newline
bitfld.long 0x0 13. "CRCERRREP,CRC Errors Report" "0: Bit 16 of the receive buffer descriptor..,1: Bit 16 of the receive buffer descriptor.."
newline
bitfld.long 0x0 12. "INFLASTEN,Infinite Size for Last Buffer Enable" "0,1"
newline
bitfld.long 0x0 11. "TXCOEN,Transmitter Checksum Generation Offload Enable" "0,1"
newline
bitfld.long 0x0 10. "TXPBMS,Transmitter Packet Buffer Memory Size Select" "0: Do not use top address bit (2 Kbytes).,1: Use full configured addressable space (4 Kbytes)."
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bitfld.long 0x0 8.--9. "RXBMS,Receiver Packet Buffer Memory Size Select" "0: 4/8 Kbyte Memory Size,1: 4/4 Kbytes Memory Size,2: 4/2 Kbytes Memory Size,3: 4 Kbytes Memory Size"
newline
bitfld.long 0x0 7. "ESPA,Endian Swap Mode Enable for Packet Data Accesses" "0: Selects Little-endian endianism for system bus..,1: Selects swapped endianism for system bus.."
newline
bitfld.long 0x0 6. "ESMA,Endian Swap Mode Enable for Management Descriptor Accesses" "0: Selects Little-endian endianism for system bus..,1: Selects swapped endianism for system bus.."
newline
hexmask.long.byte 0x0 0.--4. 1. "FBLDO,Fixed Burst Length for DMA Data Operations:"
line.long 0x4 "EMAC_TSR,Express MAC Transmit Status Register"
bitfld.long 0x4 10. "TXDMALCK,Transmit DMA Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 9. "TXMACLCK,Transmit MAC Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 8. "HRESP,System Bus Response (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 7. "LCO,Late Collision Occurred (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 5. "TXCOMP,Transmit Complete (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 4. "TFC,Transmit Frame Corruption Due to System Bus Error (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 3. "TXGO,Transmit Go (Read only)" "0,1"
newline
bitfld.long 0x4 2. "RLE,Retry Limit Exceeded (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 1. "COL,Collision Occurred (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x4 0. "UBR,Used Bit Read (Clear by Writing a 1)" "0,1"
line.long 0x8 "EMAC_RBQB,Express MAC Receive Buffer Queue Base Address Register"
hexmask.long 0x8 2.--31. 1. "ADDR,Receive Buffer Queue Base Address"
newline
bitfld.long 0x8 0. "RXQDIS,Receive Queue Disable" "0: Queue is enabled.,1: Queue is disabled. Used to reduce the number of.."
line.long 0xC "EMAC_TBQB,Express MAC Transmit Buffer Queue Base Address Register"
hexmask.long 0xC 2.--31. 1. "ADDR,Transmit Buffer Queue Base Address"
newline
bitfld.long 0xC 0. "TXQDIS,Transmit Queue Disable" "0: Queue is enabled.,1: Queue is disabled. Used to reduce the number of.."
line.long 0x10 "EMAC_RSR,Express MAC Receive Status Register"
bitfld.long 0x10 5. "RXDMALCK,Receive DMA Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x10 4. "RXMACLCK,Receive MAC Lockup (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x10 3. "HNO,System Bus Error (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x10 2. "RXOVR,Receive Overrun (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x10 1. "REC,Frame Received (Clear by Writing a 1)" "0,1"
newline
bitfld.long 0x10 0. "BNA,Buffer Not Available (Clear by Writing a 1)" "0,1"
rgroup.long 0x1024++0x3
line.long 0x0 "EMAC_ISR,Express MAC Interrupt Status Register"
bitfld.long 0x0 31. "TXLCK,Transmit Path Locked (Cleared on read)" "0,1"
newline
bitfld.long 0x0 30. "RXLCK,Receive Path Locked (Cleared on read)" "0,1"
newline
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison (Cleared on read)" "0,1"
newline
bitfld.long 0x0 28. "WOL,Wake On LAN (Cleared on read)" "0,1"
newline
bitfld.long 0x0 27. "RXLPISBC,Receive LPI indication Status Bit Change (Cleared on read)" "0,1"
newline
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment (Cleared on read)" "0,1"
newline
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted (Cleared on read)" "0,1"
newline
bitfld.long 0x0 13. "PTZ,Pause Time Zero (Cleared on read)" "0,1"
newline
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received (Cleared on read)" "0,1"
newline
bitfld.long 0x0 11. "HRESP,System Bus Error (Cleared on read)" "0,1"
newline
bitfld.long 0x0 10. "ROVR,Receive Overrun (Cleared on read)" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete (Cleared on read)" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error (Cleared on read)" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision (Cleared on read)" "0,1"
newline
bitfld.long 0x0 4. "TUR,Transmit Underrun (Cleared on read)" "0,1"
newline
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read (Cleared on read)" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read (Cleared on read)" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete (Cleared on read)" "0,1"
newline
bitfld.long 0x0 0. "MFS,Management Frame Sent (Cleared on read)" "0,1"
wgroup.long 0x1028++0x7
line.long 0x0 "EMAC_IER,Express MAC Interrupt Enable Register"
bitfld.long 0x0 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
newline
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x0 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
newline
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
newline
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
newline
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
newline
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
newline
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
newline
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
newline
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
newline
bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1"
newline
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
newline
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
newline
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
newline
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
newline
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
newline
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
line.long 0x4 "EMAC_IDR,Express MAC Interrupt Disable Register"
bitfld.long 0x4 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x4 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x4 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
newline
bitfld.long 0x4 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x4 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
newline
bitfld.long 0x4 26. "SRI,TSU Seconds Register Increment" "0,1"
newline
bitfld.long 0x4 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
newline
bitfld.long 0x4 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x4 23. "PDRSFR,PDelay Response Frame Received" "0,1"
newline
bitfld.long 0x4 22. "PDRQFR,PDelay Request Frame Received" "0,1"
newline
bitfld.long 0x4 21. "SFT,PTP Sync Frame Transmitted" "0,1"
newline
bitfld.long 0x4 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x4 19. "SFR,PTP Sync Frame Received" "0,1"
newline
bitfld.long 0x4 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
newline
bitfld.long 0x4 15. "EXINT,External Interrupt" "0,1"
newline
bitfld.long 0x4 14. "PFTR,Pause Frame Transmitted" "0,1"
newline
bitfld.long 0x4 13. "PTZ,Pause Time Zero" "0,1"
newline
bitfld.long 0x4 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
newline
bitfld.long 0x4 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x4 10. "ROVR,Receive Overrun" "0,1"
newline
bitfld.long 0x4 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x4 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x4 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x4 4. "TUR,Transmit Underrun" "0,1"
newline
bitfld.long 0x4 3. "TXUBR,TX Used Bit Read" "0,1"
newline
bitfld.long 0x4 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x4 1. "RCOMP,Receive Complete" "0,1"
newline
bitfld.long 0x4 0. "MFS,Management Frame Sent" "0,1"
group.long 0x1030++0x3
line.long 0x0 "EMAC_IMR,Express MAC Interrupt Mask Register"
bitfld.long 0x0 31. "TXLCK,Transmit Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 30. "RXLCK,Receive Path Lockup Detected" "0,1"
newline
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
newline
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
newline
bitfld.long 0x0 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
newline
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
newline
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
newline
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
newline
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
newline
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
newline
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
newline
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
newline
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
newline
bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1"
newline
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
newline
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
newline
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
newline
bitfld.long 0x0 11. "HRESP,System Bus Error" "0,1"
newline
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
newline
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
newline
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to System Bus Error" "0,1"
newline
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
newline
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
newline
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
newline
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
newline
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
newline
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
rgroup.long 0x1038++0x3
line.long 0x0 "EMAC_RPQ,Express MAC Receive Pause Quantum Register"
hexmask.long.word 0x0 0.--15. 1. "RPQ,Received Pause Quantum"
group.long 0x103C++0xF
line.long 0x0 "EMAC_TPQ,Express MAC Transmit Pause Quantum Register"
hexmask.long.word 0x0 16.--31. 1. "P1TPQ,Priority 1 Transmit Pause Quantum"
newline
hexmask.long.word 0x0 0.--15. 1. "TPQ,Transmit Pause Quantum"
line.long 0x4 "EMAC_TPSF,Express MAC TX Partial Store and Forward Register"
bitfld.long 0x4 31. "ENTXP,Enable TX Partial Store and Forward Operation" "0,1"
newline
hexmask.long.word 0x4 0.--9. 1. "TPB1ADR,Transmit Partial Store and Forward Address"
line.long 0x8 "EMAC_RPSF,Express MAC RX Partial Store and Forward Register"
bitfld.long 0x8 31. "ENRXP,Enable RX Partial Store and Forward Operation" "0,1"
newline
hexmask.long.word 0x8 0.--9. 1. "RPB1ADR,Receive Partial Store and Forward Address"
line.long 0xC "EMAC_RJFML,Express MAC RX Jumbo Frame Max Length Register"
hexmask.long.word 0xC 0.--13. 1. "FML,Frame Max Length"
group.long 0x1054++0x3
line.long 0x0 "EMAC_AMP,Express MAC System Bus Maximum Pipeline"
bitfld.long 0x0 16. "USE_FROM,Address Write Bus to Write Data Bus Maximum Pipeline" "0: Operates the AW2W_MAX_PIPELINE field between AW..,1: Operates the AW2W_MAX_PIPELINE field between AW.."
newline
hexmask.long.byte 0x0 8.--15. 1. "AW2W_MAX_PIPELINE,Address Write Bus to Write Data Bus Maximum Pipeline"
newline
hexmask.long.byte 0x0 0.--7. 1. "AR2R_MAX_PIPELINE,Address Read Bus to Read Data Bus Maximum Pipeline"
group.long 0x105C++0x7
line.long 0x0 "EMAC_INTM,Express MAC Interrupt Moderation Register"
hexmask.long.byte 0x0 16.--23. 1. "TXINTMOD,Transmit Interrupt Moderation"
newline
hexmask.long.byte 0x0 0.--7. 1. "RXINTMOD,Receive Interrupt Moderation"
line.long 0x4 "EMAC_SYSWT,Express MAC System Wake-Up Time Register"
hexmask.long.word 0x4 0.--15. 1. "SYSWKUPTIME,System Wake-up Time"
group.long 0x1068++0xB
line.long 0x0 "EMAC_LCKUP_CFGR,Express MAC Lockup Detection and Recovery Configuration"
bitfld.long 0x0 31. "TXDMA_LCKUP_EN,Transmit DMA Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 30. "TXMAC_LCKUP_EN,Transmit MAC Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 29. "RXDMA_LCKUP_EN,Receive DMA Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 28. "RXMAC_LCKUP_EN,Receive MAC Lockup Detector Enable" "0: Disables the monitor that detects lockups in the..,1: Enables the monitor that detects lockups in the.."
newline
bitfld.long 0x0 27. "LCKUP_REC_EN,Lockup RecoveryEnable" "0: No effect.,1: Forces the EMAC in Reset mode when a lockup.is.."
newline
hexmask.long.word 0x0 16.--26. 1. "DMA_LOCKUP_TIME,Timeout Value for Receive and Transmit DMA"
newline
hexmask.long.word 0x0 0.--15. 1. "PRESCALER,Prescaler Value for Timeout"
line.long 0x4 "EMAC_LCKUP_TIME,Express MAC Lockup Detection Time"
hexmask.long.word 0x4 16.--26. 1. "TX_MAC_LOCKUP_TIME,Transmit MAC Lockup Detector Time"
newline
hexmask.long.word 0x4 0.--15. 1. "RX_MAC_LOCKUP_TIME,Receive MAC Lockup Detector Time"
line.long 0x8 "EMAC_TXDMA_LCKUP_CR,Express MAC Transmit DMA Lockup Control Register"
bitfld.long 0x8 5. "LCKUP_EN_Q5,Transmit DMA Lockup Detector Enable for Queue 5" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 4. "LCKUP_EN_Q4,Transmit DMA Lockup Detector Enable for Queue 4" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 3. "LCKUP_EN_Q3,Transmit DMA Lockup Detector Enable for Queue 3" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 2. "LCKUP_EN_Q2,Transmit DMA Lockup Detector Enable for Queue 2" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 1. "LCKUP_EN_Q1,Transmit DMA Lockup Detector Enable for Queue 1" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
newline
bitfld.long 0x8 0. "LCKUP_EN_Q0,Transmit DMA Lockup Detector Enable for Queue 0" "0: Disables the transmit DMA lockup timer for queue..,1: Enables the transmit DMA lockup timer for queue x."
group.long 0x107C++0xB
line.long 0x0 "EMAC_RX_WATERMARK,Express MAC Receive Watermark Register"
bitfld.long 0x0 31. "RX_LOW_WATERMARK15,Transmit DMA Lockup Detector Enable for Queue 15" "0,1"
newline
bitfld.long 0x0 30. "RX_LOW_WATERMARK14,Transmit DMA Lockup Detector Enable for Queue 14" "0,1"
newline
bitfld.long 0x0 29. "RX_LOW_WATERMARK13,Transmit DMA Lockup Detector Enable for Queue 13" "0,1"
newline
bitfld.long 0x0 28. "RX_LOW_WATERMARK12,Transmit DMA Lockup Detector Enable for Queue 12" "0,1"
newline
bitfld.long 0x0 27. "RX_LOW_WATERMARK11,Transmit DMA Lockup Detector Enable for Queue 11" "0,1"
newline
bitfld.long 0x0 26. "RX_LOW_WATERMARK10,Transmit DMA Lockup Detector Enable for Queue 10" "0,1"
newline
bitfld.long 0x0 25. "RX_LOW_WATERMARK9,Transmit DMA Lockup Detector Enable for Queue 9" "0,1"
newline
bitfld.long 0x0 24. "RX_LOW_WATERMARK8,Transmit DMA Lockup Detector Enable for Queue 8" "0,1"
newline
bitfld.long 0x0 23. "RX_LOW_WATERMARK7,Transmit DMA Lockup Detector Enable for Queue 7" "0,1"
newline
bitfld.long 0x0 22. "RX_LOW_WATERMARK6,Transmit DMA Lockup Detector Enable for Queue 6" "0,1"
newline
bitfld.long 0x0 21. "RX_LOW_WATERMARK5,Transmit DMA Lockup Detector Enable for Queue 5" "0,1"
newline
bitfld.long 0x0 20. "RX_LOW_WATERMARK4,Transmit DMA Lockup Detector Enable for Queue 4" "0,1"
newline
bitfld.long 0x0 19. "RX_LOW_WATERMARK3,Transmit DMA Lockup Detector Enable for Queue 3" "0,1"
newline
bitfld.long 0x0 18. "RX_LOW_WATERMARK2,Transmit DMA Lockup Detector Enable for Queue 2" "0,1"
newline
bitfld.long 0x0 17. "RX_LOW_WATERMARK1,Transmit DMA Lockup Detector Enable for Queue 1" "0,1"
newline
bitfld.long 0x0 16. "RX_LOW_WATERMARK0,Transmit DMA Lockup Detector Enable for Queue 0" "0,1"
newline
bitfld.long 0x0 15. "RX_HIGH_WATERMARK15,Transmit DMA Lockup Detector Enable for Queue 15" "0,1"
newline
bitfld.long 0x0 14. "RX_HIGH_WATERMARK14,Transmit DMA Lockup Detector Enable for Queue 14" "0,1"
newline
bitfld.long 0x0 13. "RX_HIGH_WATERMARK13,Transmit DMA Lockup Detector Enable for Queue 13" "0,1"
newline
bitfld.long 0x0 12. "RX_HIGH_WATERMARK12,Transmit DMA Lockup Detector Enable for Queue 12" "0,1"
newline
bitfld.long 0x0 11. "RX_HIGH_WATERMARK11,Transmit DMA Lockup Detector Enable for Queue 11" "0,1"
newline
bitfld.long 0x0 10. "RX_HIGH_WATERMARK10,Transmit DMA Lockup Detector Enable for Queue 10" "0,1"
newline
bitfld.long 0x0 9. "RX_HIGH_WATERMARK9,Transmit DMA Lockup Detector Enable for Queue 9" "0,1"
newline
bitfld.long 0x0 8. "RX_HIGH_WATERMARK8,Transmit DMA Lockup Detector Enable for Queue 8" "0,1"
newline
bitfld.long 0x0 7. "RX_HIGH_WATERMARK7,Transmit DMA Lockup Detector Enable for Queue 7" "0,1"
newline
bitfld.long 0x0 6. "RX_HIGH_WATERMARK6,Transmit DMA Lockup Detector Enable for Queue 6" "0,1"
newline
bitfld.long 0x0 5. "RX_HIGH_WATERMARK5,Transmit DMA Lockup Detector Enable for Queue 5" "0,1"
newline
bitfld.long 0x0 4. "RX_HIGH_WATERMARK4,Transmit DMA Lockup Detector Enable for Queue 4" "0,1"
newline
bitfld.long 0x0 3. "RX_HIGH_WATERMARK3,Transmit DMA Lockup Detector Enable for Queue 3" "0,1"
newline
bitfld.long 0x0 2. "RX_HIGH_WATERMARK2,Transmit DMA Lockup Detector Enable for Queue 2" "0,1"
newline
bitfld.long 0x0 1. "RX_HIGH_WATERMARK1,Transmit DMA Lockup Detector Enable for Queue 1" "0,1"
newline
bitfld.long 0x0 0. "RX_HIGH_WATERMARK0,Transmit DMA Lockup Detector Enable for Queue 0" "0,1"
line.long 0x4 "EMAC_HRB,Express MAC Hash Register Bottom"
hexmask.long 0x4 0.--31. 1. "ADDR,Hash Address"
line.long 0x8 "EMAC_HRT,Express MAC Hash Register Top"
hexmask.long 0x8 0.--31. 1. "ADDR,Hash Address"
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0xF802D088 ad:0xF802D090 ad:0xF802D098 ad:0xF802D0A0)
tree "GMAC_EMAC_SA[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "EMAC_SAB,Express MAC Specific Address Bottom Register"
hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address"
line.long 0x4 "EMAC_SAT,Express MAC Specific Address Top Register"
hexmask.long.byte 0x4 24.--29. 1. "FILTBMASK,Filter Bytes Mask"
bitfld.long 0x4 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address"
tree.end
repeat.end
base ad:0xF802C000
group.long 0x10A8++0x3F
line.long 0x0 "EMAC_TIDM1,Express MAC Type ID Match 1 Register"
bitfld.long 0x0 31. "ENID1,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x0 0.--15. 1. "TID,Type ID Match 1"
line.long 0x4 "EMAC_TIDM2,Express MAC Type ID Match 2 Register"
bitfld.long 0x4 31. "ENID2,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x4 0.--15. 1. "TID,Type ID Match 2"
line.long 0x8 "EMAC_TIDM3,Express MAC Type ID Match 3 Register"
bitfld.long 0x8 31. "ENID3,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0x8 0.--15. 1. "TID,Type ID Match 3"
line.long 0xC "EMAC_TIDM4,Express MAC Type ID Match 4 Register"
bitfld.long 0xC 31. "ENID4,Enable Copying of TID Matched Frames" "0: TID is not part of the comparison match.,1: TID is processed for the comparison match."
newline
hexmask.long.word 0xC 0.--15. 1. "TID,Type ID Match 4"
line.long 0x10 "EMAC_WOL,Express MAC Wake on LAN Register"
bitfld.long 0x10 19. "MTI,Multicast Hash Event Enable" "0,1"
newline
bitfld.long 0x10 18. "SA1,Specific Address Register 1 Event Enable" "0,1"
newline
bitfld.long 0x10 17. "ARP,ARP Request Event Enable" "0,1"
newline
bitfld.long 0x10 16. "MAG,Magic Packet Event Enable" "0,1"
newline
hexmask.long.word 0x10 0.--15. 1. "IP,ARP Request IP Address"
line.long 0x14 "EMAC_IPGS,Express MAC IPG Stretch Register"
hexmask.long.word 0x14 0.--15. 1. "FL,Frame Length"
line.long 0x18 "EMAC_SVLAN,Express MAC Stacked VLAN Register"
bitfld.long 0x18 31. "ESVLAN,Enable Stacked VLAN Processing Mode" "0: Disable the stacked VLAN Processing mode,1: Enable the stacked VLAN Processing mode"
newline
hexmask.long.word 0x18 0.--15. 1. "VLAN_TYPE,User Defined VLAN_TYPE Field"
line.long 0x1C "EMAC_TPFCP,Express MAC Transmit PFC Pause Register"
hexmask.long.byte 0x1C 8.--15. 1. "PQ,Pause Quantum"
newline
hexmask.long.byte 0x1C 0.--7. 1. "PEV,Priority Enable Vector"
line.long 0x20 "EMAC_SAMB1,Express MAC Specific Address 1 Mask Bottom Register"
hexmask.long 0x20 0.--31. 1. "ADDR,Specific Address 1 Mask"
line.long 0x24 "EMAC_SAMT1,Express MAC Specific Address 1 Mask Top Register"
hexmask.long.word 0x24 0.--15. 1. "ADDR,Specific Address 1 Mask"
line.long 0x28 "EMAC_AMRX,System Memory Address Mask for RX Data Buffer Accesses Register"
hexmask.long.byte 0x28 28.--31. 1. "MSBADDR,MSB of the Receive Data Buffer Address"
newline
hexmask.long.byte 0x28 0.--3. 1. "MSBADDRMSK,Mask of the Receive Data Buffer Address"
line.long 0x2C "EMAC_RXUDAR,Express MAC PTP RX Unicast IP Destination Address Register"
hexmask.long 0x2C 0.--31. 1. "RXUDA,Receive Unicast Destination Address"
line.long 0x30 "EMAC_TXUDAR,Express MAC PTP TX Unicast IP Destination Address Register"
hexmask.long 0x30 0.--31. 1. "TXUDA,Transmit Unicast Destination Address"
line.long 0x34 "EMAC_NSC,Express MAC 1588 Timer Nanosecond Comparison Register"
hexmask.long.tbyte 0x34 0.--21. 1. "NANOSEC,1588 Timer Nanosecond Comparison Value"
line.long 0x38 "EMAC_SCL,Express MAC 1588 Timer Second Comparison Low Register"
hexmask.long 0x38 0.--31. 1. "SEC,1588 Timer Second Comparison Value"
line.long 0x3C "EMAC_SCH,Express MAC 1588 Timer Second Comparison High Register"
hexmask.long.word 0x3C 0.--15. 1. "SEC,1588 Timer Second Comparison Value"
rgroup.long 0x10E8++0xF
line.long 0x0 "EMAC_EFTSH,Express MAC PTP Event Frame Transmitted Seconds High Register"
hexmask.long.word 0x0 0.--15. 1. "RUD,Register Update"
line.long 0x4 "EMAC_EFRSH,Express MAC PTP Event Frame Received Seconds High Register"
hexmask.long.word 0x4 0.--15. 1. "RUD,Register Update"
line.long 0x8 "EMAC_PEFTSH,Express MAC PTP Peer Event Frame Transmitted Seconds High Register"
hexmask.long.word 0x8 0.--15. 1. "RUD,Register Update"
line.long 0xC "EMAC_PEFRSH,Express MAC PTP Peer Event Frame Received Seconds High Register"
hexmask.long.word 0xC 0.--15. 1. "RUD,Register Update"
rgroup.long 0x1100++0xB7
line.long 0x0 "EMAC_OTLO,Express MAC Octets Transmitted Low Register"
hexmask.long 0x0 0.--31. 1. "TXO,Transmitted Octets"
line.long 0x4 "EMAC_OTHI,Express MAC Octets Transmitted High Register"
hexmask.long.word 0x4 0.--15. 1. "TXO,Transmitted Octets"
line.long 0x8 "EMAC_FT,Express MAC Frames Transmitted Register"
hexmask.long 0x8 0.--31. 1. "FTX,Frames Transmitted without Error"
line.long 0xC "EMAC_BCFT,Express MAC Broadcast Frames Transmitted Register"
hexmask.long 0xC 0.--31. 1. "BFTX,Broadcast Frames Transmitted without Error"
line.long 0x10 "EMAC_MFT,Express MAC Multicast Frames Transmitted Register"
hexmask.long 0x10 0.--31. 1. "MFTX,Multicast Frames Transmitted without Error"
line.long 0x14 "EMAC_PFT,Express MAC Pause Frames Transmitted Register"
hexmask.long.word 0x14 0.--15. 1. "PFTX,Pause Frames Transmitted Register"
line.long 0x18 "EMAC_BFT64,Express MAC 64 Byte Frames Transmitted Register"
hexmask.long 0x18 0.--31. 1. "NFTX,64 Byte Frames Transmitted without Error"
line.long 0x1C "EMAC_TBFT127,Express MAC 65 to 127 Byte Frames Transmitted Register"
hexmask.long 0x1C 0.--31. 1. "NFTX,65 to 127 Byte Frames Transmitted without Error"
line.long 0x20 "EMAC_TBFT255,Express MAC 128 to 255 Byte Frames Transmitted Register"
hexmask.long 0x20 0.--31. 1. "NFTX,128 to 255 Byte Frames Transmitted without Error"
line.long 0x24 "EMAC_TBFT511,Express MAC 256 to 511 Byte Frames Transmitted Register"
hexmask.long 0x24 0.--31. 1. "NFTX,256 to 511 Byte Frames Transmitted without Error"
line.long 0x28 "EMAC_TBFT1023,Express MAC 512 to 1023 Byte Frames Transmitted Register"
hexmask.long 0x28 0.--31. 1. "NFTX,512 to 1023 Byte Frames Transmitted without Error"
line.long 0x2C "EMAC_TBFT1518,Express MAC 1024 to 1518 Byte Frames Transmitted Register"
hexmask.long 0x2C 0.--31. 1. "NFTX,1024 to 1518 Byte Frames Transmitted without Error"
line.long 0x30 "EMAC_GTBFT1518,Express MAC Greater Than 1518 Byte Frames Transmitted Register"
hexmask.long 0x30 0.--31. 1. "NFTX,Greater than 1518 Byte Frames Transmitted without Error"
line.long 0x34 "EMAC_TUR,Express MAC Transmit Underruns Register"
hexmask.long.word 0x34 0.--9. 1. "TXUNR,Transmit Underruns"
line.long 0x38 "EMAC_SCF,Express MAC Single Collision Frames Register"
hexmask.long.tbyte 0x38 0.--17. 1. "SCOL,Single Collision"
line.long 0x3C "EMAC_MCF,Express MAC Multiple Collision Frames Register"
hexmask.long.tbyte 0x3C 0.--17. 1. "MCOL,Multiple Collision"
line.long 0x40 "EMAC_EC,Express MAC Excessive Collisions Register"
hexmask.long.word 0x40 0.--9. 1. "XCOL,Excessive Collisions"
line.long 0x44 "EMAC_LC,Express MAC Late Collisions Register"
hexmask.long.word 0x44 0.--9. 1. "LCOL,Late Collisions"
line.long 0x48 "EMAC_DTF,Express MAC Deferred Transmission Frames Register"
hexmask.long.tbyte 0x48 0.--17. 1. "DEFT,Deferred Transmission"
line.long 0x4C "EMAC_CSE,Express MAC Carrier Sense Errors Register"
hexmask.long.word 0x4C 0.--9. 1. "CSR,Carrier Sense Error"
line.long 0x50 "EMAC_ORLO,Express MAC Octets Received Low Received Register"
hexmask.long 0x50 0.--31. 1. "RXO,Received Octets"
line.long 0x54 "EMAC_ORHI,Express MAC Octets Received High Received Register"
hexmask.long.word 0x54 0.--15. 1. "RXO,Received Octets"
line.long 0x58 "EMAC_FR,Express MAC Frames Received Register"
hexmask.long 0x58 0.--31. 1. "FRX,Frames Received without Error"
line.long 0x5C "EMAC_BCFR,Express MAC Broadcast Frames Received Register"
hexmask.long 0x5C 0.--31. 1. "BFRX,Broadcast Frames Received without Error"
line.long 0x60 "EMAC_MFR,Express MAC Multicast Frames Received Register"
hexmask.long 0x60 0.--31. 1. "MFRX,Multicast Frames Received without Error"
line.long 0x64 "EMAC_PFR,Express MAC Pause Frames Received Register"
hexmask.long.word 0x64 0.--15. 1. "PFRX,Pause Frames Received Register"
line.long 0x68 "EMAC_BFR64,Express MAC 64 Byte Frames Received Register"
hexmask.long 0x68 0.--31. 1. "NFRX,64 Byte Frames Received without Error"
line.long 0x6C "EMAC_TBFR127,Express MAC 65 to 127 Byte Frames Received Register"
hexmask.long 0x6C 0.--31. 1. "NFRX,65 to 127 Byte Frames Received without Error"
line.long 0x70 "EMAC_TBFR255,Express MAC 128 to 255 Byte Frames Received Register"
hexmask.long 0x70 0.--31. 1. "NFRX,128 to 255 Byte Frames Received without Error"
line.long 0x74 "EMAC_TBFR511,Express MAC 256 to 511 Byte Frames Received Register"
hexmask.long 0x74 0.--31. 1. "NFRX,256 to 511 Byte Frames Received without Error"
line.long 0x78 "EMAC_TBFR1023,Express MAC 512 to 1023 Byte Frames Received Register"
hexmask.long 0x78 0.--31. 1. "NFRX,512 to 1023 Byte Frames Received without Error"
line.long 0x7C "EMAC_TBFR1518,Express MAC 1024 to 1518 Byte Frames Received Register"
hexmask.long 0x7C 0.--31. 1. "NFRX,1024 to 1518 Byte Frames Received without Error"
line.long 0x80 "EMAC_TMXBFR,Express MAC 1519 to Maximum Byte Frames Received Register"
hexmask.long 0x80 0.--31. 1. "NFRX,1519 to Maximum Byte Frames Received without Error"
line.long 0x84 "EMAC_UFR,Express MAC Undersize Frames Received Register"
hexmask.long.word 0x84 0.--9. 1. "UFRX,Undersize Frames Received"
line.long 0x88 "EMAC_OFR,Express MAC Oversize Frames Received Register"
hexmask.long.word 0x88 0.--9. 1. "OFRX,Oversized Frames Received"
line.long 0x8C "EMAC_JR,Express MAC Jabbers Received Register"
hexmask.long.word 0x8C 0.--9. 1. "JRX,Jabbers Received"
line.long 0x90 "EMAC_FCSE,Express MAC Frame Check Sequence Errors Register"
hexmask.long.word 0x90 0.--9. 1. "FCKR,Frame Check Sequence Errors"
line.long 0x94 "EMAC_LFFE,Express MAC Length Field Frame Errors Register"
hexmask.long.word 0x94 0.--9. 1. "LFER,Length Field Frame Errors"
line.long 0x98 "EMAC_RSE,Express MAC Receive Symbol Errors Register"
hexmask.long.word 0x98 0.--9. 1. "RXSE,Receive Symbol Errors"
line.long 0x9C "EMAC_AE,Express MAC Alignment Errors Register"
hexmask.long.word 0x9C 0.--9. 1. "AER,Alignment Errors"
line.long 0xA0 "EMAC_RRE,Express MAC Receive Resource Errors Register"
hexmask.long.tbyte 0xA0 0.--17. 1. "RXRER,Receive Resource Errors"
line.long 0xA4 "EMAC_ROE,Express MAC Receive Overrun Register"
hexmask.long.word 0xA4 0.--9. 1. "RXOVR,Receive Overruns"
line.long 0xA8 "EMAC_IHCE,Express MAC IP Header Checksum Errors Register"
hexmask.long.byte 0xA8 0.--7. 1. "HCKER,IP Header Checksum Errors"
line.long 0xAC "EMAC_TCE,Express MAC TCP Checksum Errors Register"
hexmask.long.byte 0xAC 0.--7. 1. "TCKER,TCP Checksum Errors"
line.long 0xB0 "EMAC_UCE,Express MAC UDP Checksum Errors Register"
hexmask.long.byte 0xB0 0.--7. 1. "UCKER,UDP Checksum Errors"
line.long 0xB4 "EMAC_FLRXPCR,Express MAC Flushed Received Packets Counter Register"
hexmask.long.word 0xB4 0.--15. 1. "COUNT,Flushed Received Packets Count (cleared on read)"
group.long 0x11BC++0x7
line.long 0x0 "EMAC_TISUBN,Express MAC 1588 Timer Increment Sub-nanoseconds Register"
hexmask.long.byte 0x0 24.--31. 1. "LSBTIR,Lower Significant Bits of Timer Increment Register"
newline
hexmask.long.word 0x0 0.--15. 1. "MSBTIR,Most Significant Bits of Timer Increment Register"
line.long 0x4 "EMAC_TSH,Express MAC1588 Timer Seconds High Register"
hexmask.long.word 0x4 0.--15. 1. "TCS,Timer Count in Seconds"
group.long 0x11D0++0x7
line.long 0x0 "EMAC_TSL,Express MAC1588 Timer Seconds Low Register"
hexmask.long 0x0 0.--31. 1. "TCS,Timer Count in Seconds"
line.long 0x4 "EMAC_TN,Express MAC1588 Timer Nanoseconds Register"
hexmask.long 0x4 0.--29. 1. "TNS,Timer Count in Nanoseconds"
wgroup.long 0x11D8++0x3
line.long 0x0 "EMAC_TA,Express MAC1588 Timer Adjust Register"
bitfld.long 0x0 31. "ADJ,Adjust 1588 Timer" "0,1"
newline
hexmask.long 0x0 0.--29. 1. "ITDT,Increment/Decrement"
group.long 0x11DC++0x3
line.long 0x0 "EMAC_TI,Express MAC1588 Timer Increment Register"
hexmask.long.byte 0x0 16.--23. 1. "NIT,Number of Increments"
newline
hexmask.long.byte 0x0 8.--15. 1. "ACNS,Alternative Count Nanoseconds"
newline
hexmask.long.byte 0x0 0.--7. 1. "CNS,Count Nanoseconds"
rgroup.long 0x11E0++0x1F
line.long 0x0 "EMAC_EFTSL,Express MAC PTP Event Frame Transmitted Seconds Low Register"
hexmask.long 0x0 0.--31. 1. "RUD,Register Update"
line.long 0x4 "EMAC_EFTN,Express MAC PTP Event Frame Transmitted Nanoseconds Register"
hexmask.long 0x4 0.--29. 1. "RUD,Register Update"
line.long 0x8 "EMAC_EFRSL,Express MAC PTP Event Frame Received Seconds Low Register"
hexmask.long 0x8 0.--31. 1. "RUD,Register Update"
line.long 0xC "EMAC_EFRN,Express MAC PTP Event Frame Received Nanoseconds Register"
hexmask.long 0xC 0.--29. 1. "RUD,Register Update"
line.long 0x10 "EMAC_PEFTSL,Express MAC PTP Peer Event Frame Transmitted Seconds Low Register"
hexmask.long 0x10 0.--31. 1. "RUD,Register Update"
line.long 0x14 "EMAC_PEFTN,Express MAC PTP Peer Event Frame Transmitted Nanoseconds Register"
hexmask.long 0x14 0.--29. 1. "RUD,Register Update"
line.long 0x18 "EMAC_PEFRSL,Express MAC PTP Peer Event Frame Received Seconds Low Register"
hexmask.long 0x18 0.--31. 1. "RUD,Register Update"
line.long 0x1C "EMAC_PEFRN,Express MAC PTP Peer Event Frame Received Nanoseconds Register"
hexmask.long 0x1C 0.--29. 1. "RUD,Register Update"
group.long 0x1260++0xB
line.long 0x0 "EMAC_TXPQUANT1,Express MAC Transmit Pause Quantum 1 Register"
hexmask.long.word 0x0 16.--31. 1. "QUANT_P3,Priority 3 Transmit Pause Quantum"
newline
hexmask.long.word 0x0 0.--15. 1. "QUANT_P2,Priority 2 Transmit Pause Quantum"
line.long 0x4 "EMAC_TXPQUANT2,Express MAC Transmit Pause Quantum 2 Register"
hexmask.long.word 0x4 16.--31. 1. "QUANT_P5,Priority 5 Transmit Pause Quantum"
newline
hexmask.long.word 0x4 0.--15. 1. "QUANT_P4,Priority 4 Transmit Pause Quantum"
line.long 0x8 "EMAC_TXPQUANT3,Express MAC Transmit Pause Quantum 3 Register"
hexmask.long.word 0x8 16.--31. 1. "QUANT_P7,Priority 7 Transmit Pause Quantum"
newline
hexmask.long.word 0x8 0.--15. 1. "QUANT_P6,Priority 6 Transmit Pause Quantum"
rgroup.long 0x1270++0xF
line.long 0x0 "EMAC_RXLPI,Express MAC Received LPI Transitions"
hexmask.long.word 0x0 0.--15. 1. "COUNT,Count of Received LPI transitions (cleared on read)"
line.long 0x4 "EMAC_RXLPITIME,Express MAC Received LPI Time"
hexmask.long.tbyte 0x4 0.--23. 1. "LPITIME,Time in LPI (cleared on read)"
line.long 0x8 "EMAC_TXLPI,Express MAC Transmit LPI Transitions"
hexmask.long.word 0x8 0.--15. 1. "COUNT,Count of LPI transitions (cleared on read)"
line.long 0xC "EMAC_TXLPITIME,Express MAC Transmit LPI Time"
hexmask.long.tbyte 0xC 0.--23. 1. "LPITIME,Time in LPI (cleared on read)"
group.long 0x12E0++0x3
line.long 0x0 "EMAC_QOS_CFG,Express MAC System Bus QoS Configuration Register"
hexmask.long.byte 0x0 28.--31. 1. "Q3_DESCR,System Bus QoS Attributes for Queue 3 Descriptor Access"
newline
hexmask.long.byte 0x0 24.--27. 1. "Q3_DATA,System Bus QoS Attributes for Queue 3 Data Access"
newline
hexmask.long.byte 0x0 20.--23. 1. "Q2_DESCR,System Bus QoS Attributes for Queue 2 Descriptor Access"
newline
hexmask.long.byte 0x0 16.--19. 1. "Q2_DATA,System Bus QoS Attributes for Queue 2 Data Access"
newline
hexmask.long.byte 0x0 12.--15. 1. "Q1_DESCR,System Bus QoS Attributes for Queue 1 Descriptor Access"
newline
hexmask.long.byte 0x0 8.--11. 1. "Q1_DATA,System Bus QoS Attributes for Queue 1 Data Access"
newline
hexmask.long.byte 0x0 4.--7. 1. "Q0_DESCR,System Bus QoS Attributes for Queue 0 Descriptor Access"
newline
hexmask.long.byte 0x0 0.--3. 1. "Q0_DATA,System Bus QoS Attributes for Queue 0 Data Access"
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0xF802D300 ad:0xF802D308 ad:0xF802D310 ad:0xF802D318 ad:0xF802D320 ad:0xF802D328 ad:0xF802D330 ad:0xF802D338 ad:0xF802D340 ad:0xF802D348 ad:0xF802D350 ad:0xF802D358 ad:0xF802D360 ad:0xF802D368 ad:0xF802D370 ad:0xF802D378)
tree "GMAC_EMAC_ASA[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "EMAC_ASAB,Express MAC Additional Specific Address Bottom Register"
hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address"
line.long 0x4 "EMAC_ASAT,Express MAC Additional Specific Address Top Register"
hexmask.long.byte 0x4 24.--29. 1. "FILTBMASK,Filter Bytes Mask"
bitfld.long 0x4 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address"
tree.end
repeat.end
repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0xF802D380 ad:0xF802D388 ad:0xF802D390 ad:0xF802D398 ad:0xF802D3A0 ad:0xF802D3A8 ad:0xF802D3B0 ad:0xF802D3B8 ad:0xF802D3C0 ad:0xF802D3C8 ad:0xF802D3D0 ad:0xF802D3D8 ad:0xF802D3E0 ad:0xF802D3E8 ad:0xF802D3F0 ad:0xF802D3F8)
tree "GMAC_EMAC_ASA[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "EMAC_ASAB,Express MAC Additional Specific Address Bottom Register"
hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address"
line.long 0x4 "EMAC_ASAT,Express MAC Additional Specific Address Top Register"
hexmask.long.byte 0x4 24.--29. 1. "FILTBMASK,Filter Bytes Mask"
bitfld.long 0x4 16. "FILTSORD,Filter Source or Destination MAC Address" "0: The filter is a destination address filter.,1: The filter is a source address filter."
hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address"
tree.end
repeat.end
base ad:0xF802C000
group.long 0x14BC++0x1B
line.long 0x0 "EMAC_CBSCR,Express MAC Credit-Based Shaping Control Register"
bitfld.long 0x0 1. "QBE,Queue B CBS Enable" "0: Credit-based shaping on the highest priority..,1: Credit-based shaping on the highest priority.."
newline
bitfld.long 0x0 0. "QAE,Queue A CBS Enable" "0: Credit-based shaping on the second highest..,1: Credit-based shaping on the second highest.."
line.long 0x4 "EMAC_CBSISQA,Express MAC Credit-Based Shaping IdleSlope Register for Queue A"
hexmask.long 0x4 0.--31. 1. "IS,IdleSlope"
line.long 0x8 "EMAC_CBSISQB,Express MAC Credit-Based Shaping IdleSlope Register for Queue B"
hexmask.long 0x8 0.--31. 1. "IS,IdleSlope"
line.long 0xC "EMAC_TQUBA,Express MAC 32 MSB Transmit Buffer Descriptor Queue Base Address Register"
hexmask.long 0xC 0.--31. 1. "TQUBA,Transmit Queue Upper Buffer Address"
line.long 0x10 "EMAC_TXBDCTRL,Express MAC Transmit Buffer Data Control Register"
bitfld.long 0x10 4.--5. "TSMODE,Transmit Descriptor Timestamp Insertion Mode" "0: Timestamp insertion disable.,1: Timestamp inserted for PTP Event Frames only.,2: Timestamp inserted for All PTP Frames only.,3: Timestamp inserted for All Frames."
line.long 0x14 "EMAC_RXBDCTRL,Express MAC Receive Buffer Data Control Register"
bitfld.long 0x14 4.--5. "TSMODE,Receive Descriptor Timestamp Insertion Mode" "0: Timestamp insertion disable.,1: Timestamp inserted for PTP Event Frames only.,2: Timestamp inserted for All PTP Frames only.,3: Timestamp inserted for All Frames."
line.long 0x18 "EMAC_RQUBA,Express MAC 32 MSB Receive Buffer Descriptor Queue Base Address Register"
hexmask.long 0x18 0.--31. 1. "RQUBA,Receive Queue Upper Buffer Address"
group.long 0x1500++0x3
line.long 0x0 "EMAC_ST1R,Express MAC Screening Type 1 Register"
bitfld.long 0x0 29. "UDPE,UDP Port Match Enable" "0,1"
newline
bitfld.long 0x0 28. "DSTCE,Differentiated Services or Traffic Class Match Enable" "0,1"
newline
hexmask.long.word 0x0 12.--27. 1. "UDPM,UDP Port Match"
newline
hexmask.long.byte 0x0 4.--11. 1. "DSTCM,Differentiated Services or Traffic Class Match"
newline
bitfld.long 0x0 0.--2. "QNB,Queue Number (0-5)" "0,1,2,3,4,5,6,7"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1540)++0x3
line.long 0x0 "EMAC_ST2R[$1],Express MAC Screening Type 2 Register (index = 0)"
bitfld.long 0x0 30. "COMPCE,Compare C Enable" "0: Comparison via the register designated by index..,1: Comparison via the register designated by index.."
newline
hexmask.long.byte 0x0 25.--29. 1. "COMPC,Index of Screening Type 2 Compare Word 0/Word 1 register"
newline
bitfld.long 0x0 24. "COMPBE,Compare B Enable" "0: Comparison via the register designated by index..,1: Comparison via the register designated by index.."
newline
hexmask.long.byte 0x0 19.--23. 1. "COMPB,Index of Screening Type 2 Compare Word 0/Word 1 register"
newline
bitfld.long 0x0 18. "COMPAE,Compare A Enable" "0: Comparison via the register designated by index..,1: Comparison via the register designated by index.."
newline
hexmask.long.byte 0x0 13.--17. 1. "COMPA,Index of Screening Type 2 Compare Word 0/Word 1 register"
newline
bitfld.long 0x0 12. "ETHE,EtherType Enable" "0: EtherType match with bits 15:0 in the register..,1: EtherType match with bits 15:0 in the register.."
newline
bitfld.long 0x0 9.--11. "I2ETH,Index of Screening Type 2 EtherType register" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "VLANE,VLAN Enable" "0: VLAN match is disabled.,1: VLAN match is enabled."
newline
bitfld.long 0x0 4.--6. "VLANP,VLAN Priority" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "QNB,Queue Number (0-5)" "0,1,2,3,4,5,6,7"
repeat.end
group.long 0x1580++0x3
line.long 0x0 "EMAC_TSCTL,Express MACTransmit Schedule Control Register"
bitfld.long 0x0 10.--11. "TXSQ5,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 8.--9. "TXSQ4,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 6.--7. "TXSQ3,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 4.--5. "TXSQ2,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 2.--3. "TXSQ1,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
newline
bitfld.long 0x0 0.--1. "TXSQ0,Transmit Schedule for Qx" "0: Fixed Priority,1: CBS Enabled only valid for top two enabled..,2: DWRR enabled,3: ETS enabled"
group.long 0x1590++0x3
line.long 0x0 "EMAC_TQBWRL0,Express MAC Transmit Queue Bandwidth Rate Limit 0 Register"
hexmask.long.byte 0x0 24.--31. 1. "ALLOCQ3,DWRR Weighting or ETS Bandwidth Allocation for Qx"
newline
hexmask.long.byte 0x0 16.--23. 1. "ALLOCQ2,DWRR Weighting or ETS Bandwidth Allocation for Qx"
newline
hexmask.long.byte 0x0 8.--15. 1. "ALLOCQ1,DWRR Weighting or ETS Bandwidth Allocation for Qx"
newline
hexmask.long.byte 0x0 0.--7. 1. "ALLOCQ0,DWRR Weighting or ETS Bandwidth Allocation for Qx"
group.long 0x15A0++0x3
line.long 0x0 "EMAC_TQSA,Express MAC Transmit Queue Segment Allocation Register"
bitfld.long 0x0 20.--22. "SEGALLOCQ5,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 16.--18. "SEGALLOCQ4,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12.--14. "SEGALLOCQ3,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8.--10. "SEGALLOCQ2,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--6. "SEGALLOCQ1,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "SEGALLOCQ0,Segment Allocation for Qx" "0,1,2,3,4,5,6,7"
repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0xF802D700 ad:0xF802D708 ad:0xF802D710 ad:0xF802D718 ad:0xF802D720 ad:0xF802D728)
tree "GMAC_EMAC_ST2CW[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "EMAC_ST2CW0R,Express MAC Screening Type 2 Compare Word 0 Register"
hexmask.long.word 0x0 16.--31. 1. "COMPVAL,Compare Value"
hexmask.long.word 0x0 0.--15. 1. "MASKVAL,Mask Value"
line.long 0x4 "EMAC_ST2CW1R,Express MAC Screening Type 2 Compare Word 1 Register"
bitfld.long 0x4 9. "DISMASK,Disable Mask" "0: GMAC_EMAC_ST2CW0R contains a 2-byte compare..,1: GMAC_EMAC_ST2CW0R contains a 4-byte compare value."
bitfld.long 0x4 7.--8. "OFFSSTRT,Ethernet Frame Offset Start" "0: Offset from the start of the frame,1: Offset from the byte after the EtherType field,2: Offset from the byte after the IP header field,3: Offset from the byte after the TCP/UDP header.."
hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value in Bytes"
tree.end
repeat.end
base ad:0xF802C000
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1800)++0x3
line.long 0x0 "EMAC_ENST_START_Q[$1],Express MAC ENST Start Time Queue Register (index = 0)"
bitfld.long 0x0 30.--31. "START_SEC,Seconds for Start Time" "0,1,2,3"
newline
hexmask.long 0x0 0.--29. 1. "START_NSEC,Nanoseconds for Start Time"
repeat.end
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1820)++0x3
line.long 0x0 "EMAC_ENST_ON_Q[$1],Express MAC ENST On Time Queue Register (index = 0)"
hexmask.long.tbyte 0x0 0.--16. 1. "ON_TIME,Time for which the Queue is to be Open"
repeat.end
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1840)++0x3
line.long 0x0 "EMAC_ENST_OFF_Q[$1],Express MAC ENST Off Time Queue Register (index = 0)"
hexmask.long.tbyte 0x0 0.--16. 1. "OFF_TIME,Time for which the Queue is to be Blocked"
repeat.end
group.long 0x1880++0x3
line.long 0x0 "EMAC_ENST_CR,Express MAC ENST Control Register"
bitfld.long 0x0 5. "EN_Q5,Enhanced Scheduled Traffic Enable for Queue 5" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 4. "EN_Q4,Enhanced Scheduled Traffic Enable for Queue 4" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 3. "EN_Q3,Enhanced Scheduled Traffic Enable for Queue 3" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 2. "EN_Q2,Enhanced Scheduled Traffic Enable for Queue 2" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 1. "EN_Q1,Enhanced Scheduled Traffic Enable for Queue 1" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
newline
bitfld.long 0x0 0. "EN_Q0,Enhanced Scheduled Traffic Enable for Queue 0" "0: Disables the enhanced scheduled traffic for..,1: Enables the enhanced scheduled traffic for queue.."
group.long 0x18A0++0x7
line.long 0x0 "EMAC_FRER_TIMEOUT,Express MAC Frame Elimination Timeout Register"
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Sequence Recovery Timer Restart Period for Credit Based Streams"
line.long 0x4 "EMAC_FRER_REDTAG,Express MAC Frame Elimination Redundancy Tag Register"
bitfld.long 0x4 31. "STRIP_R_TAG,Stripping Redundancy Tag Enable" "0: Disables the stripping function. When the..,1: Enables the stripping function the receive octet.."
newline
bitfld.long 0x4 30. "SIX_BYTE_TAG,Six-byte Tag Enable" "0: Defines a four-byte tag as per 802.1CB standard..,1: Enables the six-byte tag as per 802.1CB standard.."
newline
hexmask.long.word 0x4 0.--15. 1. "RED_TAG,Redundancy Tag (R-TAG)"
repeat 2. (list 0x0 0x1)(list ad:0xF802D8C0 ad:0xF802D8D0)
tree "GMAC_EMAC_FRER$1"
base $2
group.long ($2)++0xF
line.long 0x0 "EMAC_FRER_CTRLx_A,Express MAC Frame Elimination Control1 A Register"
bitfld.long 0x0 31. "EN_ELIMINATION,802.1CB Elimination of Received Frames Enable" "0: Disables the elimination of received frames.,1: Enables the elimination of received frames."
bitfld.long 0x0 30. "EN_VECTOR_REC_ALG,802.1CB Vector Recovery Algorithm Enable" "0: Enables the match recovery algorithm.,1: Enables the vector recovery algorithm."
newline
bitfld.long 0x0 29. "EN_SEQRECRST_TIMER,802.1CB Sequence Recovery Reset Timer Enable" "0: Disables the sequence recovery reset timer.,1: Enables the sequence recovery reset timer."
bitfld.long 0x0 28. "USE_R_TAG,Redundancy Tag Enable" "0: Identifies bottom of sequence number with..,1: Identifies sequence number with redundancy tag."
newline
hexmask.long.word 0x0 8.--16. 1. "OFFSET_VALUE,Offset in Bytes from Start Packet Delimiter to MSB for 802.1CB Sequence Number"
hexmask.long.byte 0x0 4.--7. 1. "MEMBER_STREAM_2,Pointer to Screener Type 2 Register"
newline
hexmask.long.byte 0x0 0.--3. 1. "MEMBER_STREAM_1,Pointer to Screener Type 2 Register"
line.long 0x4 "EMAC_FRER_CTRLx_B,Express MAC Frame Elimination Control1 B Register"
hexmask.long.byte 0x4 8.--12. 1. "SEQ_NUM_LENGTH,Number of Significants bits of the 802.1CB Sequence Number"
hexmask.long.byte 0x4 0.--5. 1. "SEQ_REC_WINDOW,Vector Recovery Window"
line.long 0x8 "EMAC_FRER_STATx_A,Express MAC Frame Elimination Statistics1 A Register"
hexmask.long.word 0x8 16.--25. 1. "VEC_REC_ROGUE,Number of Dropped Frames (Clear on read)"
hexmask.long.word 0x8 0.--9. 1. "LATENT_ERRS,Number of Sequence Numbers Seen Without a Duplicate (Clear on read)"
line.long 0xC "EMAC_FRER_STATx_B,Express MAC Frame Elimination Statistics1 B Register"
hexmask.long.word 0xC 16.--25. 1. "SEQRST_COUNT,Number of Times the Sequence Recovery Reset Timer Decrements to Zero (Clear on read)"
hexmask.long.word 0xC 0.--9. 1. "OUT_OF_ORDER,Out of Order Sequence Numbers Received (Clear on read)"
tree.end
repeat.end
base ad:0xF802C000
group.long 0x1B00++0x3
line.long 0x0 "EMAC_RX_FLUSH_Q,Express MAC Receive Queue Flush Register"
hexmask.long.word 0x0 16.--31. 1. "MAX_VAL,Maximum Value for the Received Frame Size or Number of 128-Byte Chunk"
newline
bitfld.long 0x0 3. "LIMIT_FRAME_SIZE,Maximum Frame-length Received" "0: No effect.,1: When set MAX_VAL indicates the maximum.."
newline
bitfld.long 0x0 2. "LIMIT_NUM_BYTES,Limitation of the Number of 128-Byte Chunk of Data Stored in the Memory of this Queue" "0: No effect.,1: Limits the number of 128 byte chunks of data.."
newline
bitfld.long 0x0 1. "DROP_ON_RESRC_ERR,Drop on Resource Error" "0: No effect.,1: If a free DMA descriptor for this queue cannot.."
newline
bitfld.long 0x0 0. "DROP_ALL,Drop All Frames" "0: No effect.,1: Drops all frames of this queue."
group.long 0x1B40++0x3
line.long 0x0 "EMAC_SCR2_RATE_LIMIT,Express MAC Screening 2 Rate Limit Register"
hexmask.long.word 0x0 16.--31. 1. "MAX_RATE_VAL,Maximum Rate Value for the Interval Time"
newline
hexmask.long.word 0x0 0.--15. 1. "INTERVAL_TIME,Interval Time for Maximum Rate Checking"
rgroup.long 0x1B80++0x3
line.long 0x0 "EMAC_SCR2_RATE_STATUS,Express MAC Screening 2 Rate Status Register"
bitfld.long 0x0 7. "EXCESS_RATE_Q7,Excessive Screener Rate Queue 7" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 6. "EXCESS_RATE_Q6,Excessive Screener Rate Queue 6" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 5. "EXCESS_RATE_Q5,Excessive Screener Rate Queue 5" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 4. "EXCESS_RATE_Q4,Excessive Screener Rate Queue 4" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 3. "EXCESS_RATE_Q3,Excessive Screener Rate Queue 3" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 2. "EXCESS_RATE_Q2,Excessive Screener Rate Queue 2" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 1. "EXCESS_RATE_Q1,Excessive Screener Rate Queue 1" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
newline
bitfld.long 0x0 0. "EXCESS_RATE_Q0,Excessive Screener Rate Queue 0" "0: No excessive rate in screener since the last..,1: A screener rate limiting mechanism has been.."
tree.end
tree "GPBR (General Purpose Backup Registers)"
base ad:0xFFFFFE60
group.long 0x0++0x7
line.long 0x0 "MR,GPBR Mode Register"
bitfld.long 0x0 23. "GPBRRP7,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 22. "GPBRRP6,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 21. "GPBRRP5,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 20. "GPBRRP4,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 19. "GPBRRP3,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 18. "GPBRRP2,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 17. "GPBRRP1,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 16. "GPBRRP0,GPBRx Read Protection" "0: The content of the corresponding GPBR register..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 7. "GPBRWP7,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 6. "GPBRWP6,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 5. "GPBRWP5,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 4. "GPBRWP4,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 3. "GPBRWP3,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 2. "GPBRWP2,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
newline
bitfld.long 0x0 1. "GPBRWP1,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
bitfld.long 0x0 0. "GPBRWP0,GPBRx Write Protection" "0: The corresponding GPBR register (32-bit..,1: The corresponding GPBR register (32-bit.."
line.long 0x4 "FCLR,GPBR Full Clear Register"
bitfld.long 0x4 0. "FCLR,Full Clear Enable" "0: SYS_GPBR0 to SYS_GPBR3 are immediately cleared..,1: All SYS_GPBRx are immediately cleared in case of.."
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x8)++0x3
line.long 0x0 "SYS_GPBR[$1],General Purpose Backup Register x"
hexmask.long 0x0 0.--31. 1. "GPBR_VALUE,Value of SYS_GPBRx"
repeat.end
tree.end
tree "I2SMCC (Inter-IC Sound Multi Channel Controller)"
base ad:0xF001C000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 7. "SWRST,Software Reset" "0: No effect.,1: Resets all the registers in the I2SMCC. The.."
bitfld.long 0x0 5. "TXDIS,Transmitter Disable" "0: No effect.,1: Disables the I2SMCC transmitter. Bit.."
newline
bitfld.long 0x0 4. "TXEN,Transmitter Enable" "0: No effect.,1: Enables the I2SMCC transmitter if TXDIS is not.."
bitfld.long 0x0 3. "CKDIS,Clocks Disable" "0: No effect.,1: Disables the I2SMCC clock generation."
newline
bitfld.long 0x0 2. "CKEN,Clocks Enable" "0: No effect.,1: Enables the I2SMCC clock generation if CKDIS is.."
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0: No effect.,1: Disables the I2SMCC receiver. Bit I2SMCC_SR.RXEN.."
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bitfld.long 0x0 0. "RXEN,Receiver Enable" "0: No effect.,1: Enables the I2SMCC receiver if RXDIS is not '1'."
group.long 0x4++0x7
line.long 0x0 "MRA,Mode Register A"
bitfld.long 0x0 31. "IWS,I2SMCC_WS Slot Length" "0: I2SMCC_WS slot is 32 bits long for DATALENGTH =..,1: I2SMCC_WS slot is 24 bits long for DATALENGTH =.."
bitfld.long 0x0 30. "IMCKMODE,Host Clock Mode" "0: No host clock generated.,1: Host clock generated."
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hexmask.long.byte 0x0 24.--29. 1. "ISCKDIV,Selected Clock to I2SMCC Serial Clock Ratio"
bitfld.long 0x0 22.--23. "TDMFS,TDM Frame Synchronization" "0: I2SMCC_WS pulse is high for one time slot at..,1: I2SMCC_WS pulse is high for half the time slots..,2: I2SMCC_WS pulse is high for one bit period at..,?"
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hexmask.long.byte 0x0 16.--21. 1. "IMCKDIV,Selected Clock to I2SMCC Host Clock Ratio"
bitfld.long 0x0 13.--15. "NBCHAN,Number of TDM Channels-1" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 12. "SRCCLK,Source Clock Selection" "0: The Peripheral clock is selected as source clock..,1: The PMC.GCLKx clock is selected as source clock.."
bitfld.long 0x0 11. "TXSAME,Transmit Data when Underrun" "0: '0' is transmitted when underrun.,1: Previous sample transmitted when underrun."
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bitfld.long 0x0 10. "TXMONO,Transmit Mono" "0: Stereo.,1: Mono with left audio samples duplicated to right.."
bitfld.long 0x0 9. "RXLOOP,Loop-back Test Mode" "0: Normal mode.,1: I2SMCC_DOUT output of I2SMCC are internally.."
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bitfld.long 0x0 8. "RXMONO,Receive Mono" "0: Stereo.,1: Mono with left audio samples duplicated to right.."
bitfld.long 0x0 6.--7. "FORMAT,Data Format" "0: I2S format stereo with I2SMCC_WS low for left..,1: Left-justified format stereo with I2SMCC_WS high..,2: TDM format with (NBCHAN + 1) channels I2SMCC_WS..,3: TDM format left-justified with (NBCHAN + 1).."
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bitfld.long 0x0 4.--5. "ZERO,Must always be written to 0." "0,1,2,3"
bitfld.long 0x0 1.--3. "DATALENGTH,Data Word Length" "0: Data length is set to 32 bits.,1: Data length is set to 24 bits.,2: Data length is set to 20 bits.,3: Data length is set to 18 bits.,4: Data length is set to 16 bits.,5: Data length is set to 16-bit compact stereo.,6: Data length is set to 8 bits.,7: Data length is set to 8-bit compact stereo. Left.."
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bitfld.long 0x0 0. "MODE,Inter-IC Sound Multi Channel Controller Mode" "0: Client mode. I2SMCC_CK and I2SMCC_WS pin inputs..,1: Host mode. Bit clock and word select/frame.."
line.long 0x4 "MRB,Mode Register B"
bitfld.long 0x4 8.--9. "DMACHUNK,DMA Chunk Size" "0: Each DMA transfer contains 1 word.,1: Each DMA transfer contains 2 words.,2: Each DMA transfer contains 4 words.,3: Each DMA transfer contains 8 words."
rgroup.long 0xC++0x3
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 4. "TXEN,Transmitter Enabled" "0: Cleared when the transmitter is disabled..,1: Set when the transmitter is enabled following a.."
bitfld.long 0x0 0. "RXEN,Receiver Enabled" "0: Cleared when the receiver is disabled following..,1: Set when the receiver is enabled following a.."
wgroup.long 0x10++0x7
line.long 0x0 "IERA,Interrupt Enable Register A"
bitfld.long 0x0 31. "RXROVF3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Enable" "0,1"
bitfld.long 0x0 30. "RXLOVF3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Overrun Interrupt Enable" "0,1"
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bitfld.long 0x0 29. "RXROVF2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Enable" "0,1"
bitfld.long 0x0 28. "RXLOVF2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Overrun Interrupt Enable" "0,1"
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bitfld.long 0x0 27. "RXROVF1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Enable" "0,1"
bitfld.long 0x0 26. "RXLOVF1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Overrun Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "RXROVF0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Enable" "0,1"
bitfld.long 0x0 24. "RXLOVF0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Overrun Interrupt Enable" "0,1"
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bitfld.long 0x0 23. "RXRRDY3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 22. "RXLRDY3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 21. "RXRRDY2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 20. "RXLRDY2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 19. "RXRRDY1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 18. "RXLRDY1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 17. "RXRRDY0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 16. "RXLRDY0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 15. "TXRUNF3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Enable" "0,1"
bitfld.long 0x0 14. "TXLUNF3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Underrun Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "TXRUNF2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Enable" "0,1"
bitfld.long 0x0 12. "TXLUNF2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Underrun Interrupt Enable" "0,1"
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bitfld.long 0x0 11. "TXRUNF1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Enable" "0,1"
bitfld.long 0x0 10. "TXLUNF1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Underrun Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "TXRUNF0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Enable" "0,1"
bitfld.long 0x0 8. "TXLUNF0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Underrun Interrupt Enable" "0,1"
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bitfld.long 0x0 7. "TXRRDY3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 6. "TXLRDY3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "TXRRDY2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 4. "TXLRDY2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "TXRRDY1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 2. "TXLRDY1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXRRDY0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Enable" "0,1"
bitfld.long 0x0 0. "TXLRDY0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Ready Interrupt Enable" "0,1"
line.long 0x4 "IDRA,Interrupt Disable Register A"
bitfld.long 0x4 31. "RXROVF3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Disable" "0,1"
bitfld.long 0x4 30. "RXLOVF3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Overrun Interrupt Disable" "0,1"
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bitfld.long 0x4 29. "RXROVF2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Disable" "0,1"
bitfld.long 0x4 28. "RXLOVF2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Overrun Interrupt Disable" "0,1"
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bitfld.long 0x4 27. "RXROVF1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Disable" "0,1"
bitfld.long 0x4 26. "RXLOVF1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Overrun Interrupt Disable" "0,1"
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bitfld.long 0x4 25. "RXROVF0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Disable" "0,1"
bitfld.long 0x4 24. "RXLOVF0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Overrun Interrupt Disable" "0,1"
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bitfld.long 0x4 23. "RXRRDY3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 22. "RXLRDY3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 21. "RXRRDY2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 20. "RXLRDY2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 19. "RXRRDY1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 18. "RXLRDY1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 17. "RXRRDY0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 16. "RXLRDY0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 15. "TXRUNF3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Disable" "0,1"
bitfld.long 0x4 14. "TXLUNF3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Underrun Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "TXRUNF2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Disable" "0,1"
bitfld.long 0x4 12. "TXLUNF2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Underrun Interrupt Disable" "0,1"
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bitfld.long 0x4 11. "TXRUNF1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Disable" "0,1"
bitfld.long 0x4 10. "TXLUNF1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Underrun Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "TXRUNF0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Disable" "0,1"
bitfld.long 0x4 8. "TXLUNF0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Underrun Interrupt Disable" "0,1"
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bitfld.long 0x4 7. "TXRRDY3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 6. "TXLRDY3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "TXRRDY2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 4. "TXLRDY2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "TXRRDY1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 2. "TXLRDY1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXRRDY0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Disable" "0,1"
bitfld.long 0x4 0. "TXLRDY0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Ready Interrupt Disable" "0,1"
rgroup.long 0x18++0x7
line.long 0x0 "IMRA,Interrupt Mask Register A"
bitfld.long 0x0 31. "RXROVF3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Mask" "0,1"
bitfld.long 0x0 30. "RXLOVF3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Overrun Interrupt Mask" "0,1"
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bitfld.long 0x0 29. "RXROVF2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Mask" "0,1"
bitfld.long 0x0 28. "RXLOVF2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Overrun Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "RXROVF1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Mask" "0,1"
bitfld.long 0x0 26. "RXLOVF1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Overrun Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "RXROVF0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Overrun Interrupt Mask" "0,1"
bitfld.long 0x0 24. "RXLOVF0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Overrun Interrupt Mask" "0,1"
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bitfld.long 0x0 23. "RXRRDY3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 22. "RXLRDY3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 21. "RXRRDY2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 20. "RXLRDY2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 19. "RXRRDY1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 18. "RXLRDY1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 17. "RXRRDY0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 16. "RXLRDY0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 15. "TXRUNF3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Mask" "0,1"
bitfld.long 0x0 14. "TXLUNF3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Underrun Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "TXRUNF2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Mask" "0,1"
bitfld.long 0x0 12. "TXLUNF2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Underrun Interrupt Mask" "0,1"
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bitfld.long 0x0 11. "TXRUNF1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Mask" "0,1"
bitfld.long 0x0 10. "TXLUNF1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Underrun Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "TXRUNF0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Underrun Interrupt Mask" "0,1"
bitfld.long 0x0 8. "TXLUNF0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Underrun Interrupt Mask" "0,1"
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bitfld.long 0x0 7. "TXRRDY3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 6. "TXLRDY3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "TXRRDY2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 4. "TXLRDY2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "TXRRDY1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 2. "TXLRDY1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "TXRRDY0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Interrupt Mask" "0,1"
bitfld.long 0x0 0. "TXLRDY0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Ready Interrupt Mask" "0,1"
line.long 0x4 "ISRA,Interrupt Status Register A"
bitfld.long 0x4 31. "RXROVF3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
bitfld.long 0x4 30. "RXLOVF3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
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bitfld.long 0x4 29. "RXROVF2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
bitfld.long 0x4 28. "RXLOVF2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
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bitfld.long 0x4 27. "RXROVF1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
bitfld.long 0x4 26. "RXLOVF1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
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bitfld.long 0x4 25. "RXROVF0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
bitfld.long 0x4 24. "RXLOVF0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Overrun Flag (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an overrun error occurs in I2SMCC_RHR."
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bitfld.long 0x4 23. "RXRRDY3,I2S Receive Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
bitfld.long 0x4 22. "RXLRDY3,I2S Receive Left 3 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
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bitfld.long 0x4 21. "RXRRDY2,I2S Receive Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
bitfld.long 0x4 20. "RXLRDY2,I2S Receive Left 2 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
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bitfld.long 0x4 19. "RXRRDY1,I2S Receive Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
bitfld.long 0x4 18. "RXLRDY1,I2S Receive Left 1 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
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bitfld.long 0x4 17. "RXRRDY0,I2S Receive Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
bitfld.long 0x4 16. "RXLRDY0,I2S Receive Left 0 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by reading I2SMCC_RHR)" "0: Cleared when a predefined number of read..,1: Set when received data is available in I2SMCC_RHR."
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bitfld.long 0x4 15. "TXRUNF3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Underrun Flag (Cleared on read)" "0: Cleared when the I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
bitfld.long 0x4 14. "TXLUNF3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Underrun (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
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bitfld.long 0x4 13. "TXRUNF2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Underrun Flag (Cleared on read)" "0: Cleared when the I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
bitfld.long 0x4 12. "TXLUNF2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Underrun (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
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bitfld.long 0x4 11. "TXRUNF1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Underrun Flag (Cleared on read)" "0: Cleared when the I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
bitfld.long 0x4 10. "TXLUNF1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Underrun (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
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bitfld.long 0x4 9. "TXRUNF0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Underrun Flag (Cleared on read)" "0: Cleared when the I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
bitfld.long 0x4 8. "TXLUNF0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Underrun (Cleared on read)" "0: Cleared when I2SMCC_ISRA is read.,1: Set when an underrun error occurs in I2SMCC_THR."
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bitfld.long 0x4 7. "TXRRDY3,I2S Transmit Right 3 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
bitfld.long 0x4 6. "TXLRDY3,I2S Transmit Left 3 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
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bitfld.long 0x4 5. "TXRRDY2,I2S Transmit Right 2 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
bitfld.long 0x4 4. "TXLRDY2,I2S Transmit Left 2 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
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bitfld.long 0x4 3. "TXRRDY1,I2S Transmit Right 1 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
bitfld.long 0x4 2. "TXLRDY1,I2S Transmit Left 1 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
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bitfld.long 0x4 1. "TXRRDY0,I2S Transmit Right 0 (x=0 only) or TDM Channel [2x]+1 Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
bitfld.long 0x4 0. "TXLRDY0,I2S Transmit Left 0 (x=0 only) or TDM Channel 2x Ready Flag (Cleared by writing I2SMCC_THR)" "0: Cleared when a predefined number of write..,1: Set when I2SMCC_THR is empty."
wgroup.long 0x20++0x7
line.long 0x0 "IERB,Interrupt Enable Register B"
bitfld.long 0x0 0. "WERR,Write Error Interrupt Enable" "0,1"
line.long 0x4 "IDRB,Interrupt Disable Register B"
bitfld.long 0x4 0. "WERR,Write Error Interrupt Disable" "0,1"
rgroup.long 0x28++0xB
line.long 0x0 "IMRB,Interrupt Mask Register B"
bitfld.long 0x0 0. "WERR,Write Error Interrupt Enable" "0,1"
line.long 0x4 "ISRB,Interrupt Status Register B"
bitfld.long 0x4 0. "WERR,Write Error Flag (cleared on read)" "0: Cleared when I2SMCC_ISRB is read.,1: Set when an error occurs in the I2SMCC_WPSR."
line.long 0x8 "RHR,Receiver Holding Register"
hexmask.long 0x8 0.--31. 1. "RHR,Receiver Holding Register"
wgroup.long 0x34++0x3
line.long 0x0 "THR,Transmitter Holding Register"
hexmask.long 0x0 0.--31. 1. "THR,Transmitter Holding Register"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 2. "WPCTEN,Write Protection Control Enable" "0: Disables the write protection of the control if..,1: Enables the write protection of the control if.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection of the..,1: Enables the write protection of the interruption.."
bitfld.long 0x0 0. "WPCFEN,Write Protection Configuration Enable" "0: Disables the write protection of the..,1: Enables the write protection of the.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "ISC (Image Sensor Controller)"
base ad:0xF8048000
wgroup.long 0x0++0x7
line.long 0x0 "CTRLEN,Control Enable Register"
bitfld.long 0x0 9. "FUPPRO,Force Update Color Profile" "0,1"
bitfld.long 0x0 3. "HISCLR,Histogram Table Clear" "0,1"
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bitfld.long 0x0 2. "HISREQ,Histogram Update Request" "0,1"
bitfld.long 0x0 1. "UPPRO,Update Color Profile" "0,1"
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bitfld.long 0x0 0. "CAPTURE,Single Shot or Multiple Frame Capture Input Stream Command" "0,1"
line.long 0x4 "CTRLDIS,Control Disable Register"
bitfld.long 0x4 8. "SWRST,Software Reset" "0,1"
bitfld.long 0x4 0. "DISABLE,End Capture At Next Vertical Synchronization Detection" "0,1"
rgroup.long 0x8++0x3
line.long 0x0 "CTRLSR,Control Status Register"
bitfld.long 0x0 31. "SIP,Synchronization In Progress" "0: The double domain synchronization is terminated.,1: The double domain synchronization is in progress."
bitfld.long 0x0 4. "FIELD,Field Status (only relevant when the video stream is interlaced)" "0: The current field/segment is a top field,1: The current field/segment is a bottom field."
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bitfld.long 0x0 2. "HISREQ,Histogram Request Pending" "0: There is no histogram pending request.,1: Indicates that the histogram request is still.."
bitfld.long 0x0 1. "UPPRO,Profile Update Pending" "0: There is no profile update pending request.,1: Indicates that the profile update request is.."
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bitfld.long 0x0 0. "CAPTURE,Capture Pending" "0: Capture mode is disabled.,1: Capture is pending."
group.long 0xC++0xB
line.long 0x0 "PFE_CFG0,Parallel Front End Configuration 0 Register"
bitfld.long 0x0 31. "REP,Up Multiply with Replication" "0: Unused bits are stuck at 0.,1: Unused bits are copied from MSB."
bitfld.long 0x0 28.--30. "BPS,Bits Per Sample" "0: 12-bit input,1: 11-bit input,2: 10-bit input,3: 9-bit input,4: 8-bit input,5: 40-bit input (used for MIPI formats up to forty..,?,?"
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bitfld.long 0x0 27. "CCIR_REP,CCIR Replication" "0: Unused bits are stuck at 0.,1: Unused bits are copied from MSB."
hexmask.long.byte 0x0 16.--23. 1. "SKIPCNT,Frame Skipping Counter"
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bitfld.long 0x0 14. "MIPI,MIPI Interface Connection" "0: Input Data are coming from the physical Parallel..,1: Input Data are coming from the physical MIPI.."
bitfld.long 0x0 13. "ROWEN,Row Cropping Enable" "0: Row Cropping is disabled.,1: Row Cropping is enabled."
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bitfld.long 0x0 12. "COLEN,Column Cropping Enable" "0: Column Cropping is disabled.,1: Column Cropping is enabled."
bitfld.long 0x0 11. "CCIR10_8N,CCIR 10 bits or 8 bits" "0: 8-bit mode.,1: 10-bit mode."
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bitfld.long 0x0 10. "CCIR_CRC,CCIR656 CRC Decoder" "0: Embedded CRC is discarded.,1: Embedded CRC is decoded."
bitfld.long 0x0 9. "CCIR656,CCIR656 input mode" "0: HSYNC and VSYNC signals are used to synchronize..,1: Embedded synchronization is used."
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bitfld.long 0x0 8. "GATED,Gated input clock" "0: The external pixel clock is free running.,1: The external pixel clock is gated."
bitfld.long 0x0 7. "CONT,Continuous Acquisition" "0: Single Shot mode.,1: Video mode."
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bitfld.long 0x0 4.--6. "MODE,Parallel Front End Mode" "0: Video source is progressive.,1: Video source is interlaced two fields are..,2: Video source is interlaced two fields are..,3: Video source is interlaced two fields are..,4: Video source is interlaced one field is captured..,5: Video source is interlaced one field is captured..,6: Video source is interlaced one field is captured..,?"
bitfld.long 0x0 3. "FPOL,Field Polarity" "0: Top field is sampled when F value is 0; Bottom..,1: Top field is sampled when F value is 1; Bottom.."
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bitfld.long 0x0 2. "PPOL,Pixel Clock Polarity" "0: The pixel stream is sampled on the rising edge..,1: The pixel stream is sampled on the falling edge.."
bitfld.long 0x0 1. "VPOL,Vertical Synchronization Polarity" "0: VSYNC signal is active high i.e. valid pixels..,1: VSYNC signal is active low i.e. valid pixels are.."
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bitfld.long 0x0 0. "HPOL,Horizontal Synchronization Polarity" "0: HSYNC signal is active high i.e. valid pixels..,1: HSYNC signal is active low i.e. valid pixels are.."
line.long 0x4 "PFE_CFG1,Parallel Front End Configuration 1 Register"
hexmask.long.word 0x4 16.--31. 1. "COLMAX,Column Maximum Limit"
hexmask.long.word 0x4 0.--15. 1. "COLMIN,Column Minimum Limit"
line.long 0x8 "PFE_CFG2,Parallel Front End Configuration 2 Register"
hexmask.long.word 0x8 16.--31. 1. "ROWMAX,Row Maximum Limit"
hexmask.long.word 0x8 0.--15. 1. "ROWMIN,Row Minimum Limit"
wgroup.long 0x18++0x7
line.long 0x0 "CLKEN,Clock Enable Register"
bitfld.long 0x0 1. "MCEN,Camera Sensor Clock Domain Enable" "0: No effect.,1: Enables the camera sensor clock."
bitfld.long 0x0 0. "ICEN,ISP Clock Enable" "0: No effect.,1: Enables the ISP clock."
line.long 0x4 "CLKDIS,Clock Disable Register"
bitfld.long 0x4 9. "MCSWRST,Camera Sensor Clock Domain Software Reset" "0,1"
bitfld.long 0x4 8. "ICSWRST,ISP Clock Software Reset" "0,1"
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bitfld.long 0x4 1. "MCDIS,Camera Sensor Clock Domain Disable" "0,1"
bitfld.long 0x4 0. "ICDIS,ISP Clock Disable" "0,1"
rgroup.long 0x20++0x3
line.long 0x0 "CLKSR,Clock Status Register"
bitfld.long 0x0 31. "SIP,Synchronization In Progress" "0: The double domain synchronization operation is..,1: The double domain synchronization operation is.."
bitfld.long 0x0 1. "MCSR,Camera Sensor Clock Status Register" "0: The camera sensor clock is disabled.,1: The camera sensor clock is enabled."
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bitfld.long 0x0 0. "ICSR,ISP Clock Status Register" "0: The ISP clock is disabled.,1: The ISP clock is enabled."
group.long 0x24++0x3
line.long 0x0 "CLKCFG,Clock Configuration Register"
hexmask.long.byte 0x0 16.--23. 1. "MCDIV,Camera Sensor Reference Clock Divider"
wgroup.long 0x28++0x7
line.long 0x0 "INTEN,Interrupt Enable Register"
bitfld.long 0x0 29. "GFOV,Input FIFO Overflow Interrupt Enable" "0,1"
bitfld.long 0x0 28. "CCIRERR,CCIR Decoder Error Interrupt Enable" "0,1"
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bitfld.long 0x0 27. "HDTO,Horizontal Synchronization Timeout Interrupt Enable" "0,1"
bitfld.long 0x0 26. "VDTO,Vertical Synchronization Timeout Interrupt Enable" "0,1"
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bitfld.long 0x0 25. "DAOV,Data Overflow Interrupt Enable" "0,1"
bitfld.long 0x0 24. "VFPOV,Vertical Front Porch Overflow Interrupt Enable" "0,1"
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bitfld.long 0x0 20. "RERR,Read Channel Error Interrupt Enable" "0,1"
bitfld.long 0x0 16. "WERR,Write Channel Error Interrupt Enable" "0,1"
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bitfld.long 0x0 13. "HISCLR,Histogram Clear Interrupt Enable" "0,1"
bitfld.long 0x0 12. "HISDONE,Histogram Completed Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "LDONE,DMA List Done Interrupt Enable" "0,1"
bitfld.long 0x0 8. "DDONE,DMA Done Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "DIS,Disable Completed Interrupt Enable" "0,1"
bitfld.long 0x0 4. "SWRST,Software Reset Completed Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "HD,Horizontal Synchronization Detection Interrupt Enable" "0,1"
bitfld.long 0x0 0. "VD,Vertical Synchronization Detection Interrupt Enable" "0,1"
line.long 0x4 "INTDIS,Interrupt Disable Register"
bitfld.long 0x4 29. "GFOV,FIFO Overflow Interrupt Disable" "0,1"
bitfld.long 0x4 28. "CCIRERR,CCIR Decoder Error Interrupt Disable" "0,1"
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bitfld.long 0x4 27. "HDTO,Horizontal Synchronization Timeout Interrupt Disable" "0,1"
bitfld.long 0x4 26. "VDTO,Vertical Synchronization Timeout Interrupt Disable" "0,1"
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bitfld.long 0x4 25. "DAOV,Data Overflow Interrupt Disable" "0,1"
bitfld.long 0x4 24. "VFPOV,Vertical Front Porch Overflow Interrupt Disable" "0,1"
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bitfld.long 0x4 20. "RERR,Read Channel Error Interrupt Disable" "0,1"
bitfld.long 0x4 16. "WERR,Write Channel Error Interrupt Disable" "0,1"
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bitfld.long 0x4 13. "HISCLR,Histogram Clear Interrupt Disable" "0,1"
bitfld.long 0x4 12. "HISDONE,Histogram Completed Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "LDONE,DMA List Done Interrupt Disable" "0,1"
bitfld.long 0x4 8. "DDONE,DMA Done Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "DIS,Disable Completed Interrupt Disable" "0,1"
bitfld.long 0x4 4. "SWRST,Software Reset Completed Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "HD,Horizontal Synchronization Detection Interrupt Disable" "0,1"
bitfld.long 0x4 0. "VD,Vertical Synchronization Detection Interrupt Disable" "0,1"
rgroup.long 0x30++0x7
line.long 0x0 "INTMASK,Interrupt Mask Register"
bitfld.long 0x0 29. "GFOV,FIFO Overflow Interrupt Mask" "0,1"
bitfld.long 0x0 28. "CCIRERR,CCIR Decoder Error Interrupt Mask" "0,1"
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bitfld.long 0x0 27. "HDTO,Horizontal Synchronization Timeout Interrupt Mask" "0,1"
bitfld.long 0x0 26. "VDTO,Vertical Synchronization Timeout Interrupt Mask" "0,1"
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bitfld.long 0x0 25. "DAOV,Data Overflow Interrupt Mask" "0,1"
bitfld.long 0x0 24. "VFPOV,Vertical Front Porch Overflow Interrupt Mask" "0,1"
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bitfld.long 0x0 20. "RERR,Read Channel Error Interrupt Mask" "0,1"
bitfld.long 0x0 16. "WERR,Write Channel Error Interrupt Mask" "0,1"
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bitfld.long 0x0 13. "HISCLR,Histogram Clear Interrupt Mask" "0,1"
bitfld.long 0x0 12. "HISDONE,Histogram Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 9. "LDONE,DMA List Done Interrupt Mask" "0,1"
bitfld.long 0x0 8. "DDONE,DMA Done Interrupt Mask" "0,1"
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bitfld.long 0x0 5. "DIS,Disable Completed Interrupt Mask" "0,1"
bitfld.long 0x0 4. "SWRST,Software Reset Completed Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "HD,Horizontal Synchronization Detection Interrupt Mask" "0,1"
bitfld.long 0x0 0. "VD,Vertical Synchronization Detection Interrupt Mask" "0,1"
line.long 0x4 "INTSR,Interrupt Status Register"
bitfld.long 0x4 29. "GFOV,FIFO Overflow Interrupt (relevant if MIPI interface is not selected) (cleared on read)" "0: No FIFO overflow detected since the last read of..,1: A FIFO overflow has been detected."
bitfld.long 0x4 28. "CCIRERR,CCIR Decoder Error Interrupt (cleared on read)" "0: No CCIR CRC error detected since the last read..,1: A CCIR CRC error has been detected."
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bitfld.long 0x4 27. "HDTO,Horizontal Synchronization Timeout Interrupt (cleared on read)" "0: Horizontal synchronization is detected since the..,1: No horizontal synchronization is detected."
bitfld.long 0x4 26. "VDTO,Vertical Synchronization Timeout Interrupt (cleared on read)" "0: A vertical synchronization is detected since the..,1: No vertical synchronization is detected."
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bitfld.long 0x4 25. "DAOV,Data Overflow Interrupt (cleared on read)" "0: No data overflow error occurred since the last..,1: A data overflow occurred."
bitfld.long 0x4 24. "VFPOV,Vertical Front Porch Overflow Interrupt (cleared on read)" "0: No vertical front porch error occurred since the..,1: The vertical synchronization has been detected.."
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bitfld.long 0x4 20. "RERR,Read Channel Error Interrupt (cleared on read)" "0: No read channel error since the last read of the..,1: A read channel error occurred when the ISC read.."
bitfld.long 0x4 17.--18. "WERRID,Write Channel Error Identifier" "0: An error occurred for Channel 0 (RAW/RGB/Y),1: An error occurred for Channel 1 (CbCr/Cb),2: An error occurred for Channel 2 (Cr),3: Write back channel error"
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bitfld.long 0x4 16. "WERR,Write Channel Error Interrupt (cleared on read)" "0: No write channel error since the last read of..,1: A write channel error occurred."
bitfld.long 0x4 13. "HISCLR,Histogram Clear Interrupt (cleared on read)" "0: No Histogram Clear interrupt has been raised..,1: The Histogram Clear interrupt has occurred."
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bitfld.long 0x4 12. "HISDONE,Histogram Completed Interrupt (cleared on read)" "0: No Histogram Completed interrupt has been raised..,1: The Histogram Completed interrupt has occurred."
bitfld.long 0x4 9. "LDONE,DMA List Done Interrupt (cleared on read)" "0: No DMA List Done interrupt has occurred since..,1: The DMA List Done interrupt has occurred."
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bitfld.long 0x4 8. "DDONE,DMA Done Interrupt (cleared on read)" "0: No DMA Transfer Done interrupt has occurred..,1: The DMA Transfer Done interrupt has occurred."
bitfld.long 0x4 5. "DIS,Disable Completed Interrupt (cleared on read)" "0: The disable has not occurred since the last read..,1: The disable has completed."
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bitfld.long 0x4 4. "SWRST,Software Reset Completed Interrupt (cleared on read)" "0: No software reset completion since the last read..,1: The software reset has completed."
bitfld.long 0x4 1. "HD,Horizontal Synchronization Detected Interrupt (cleared on read)" "0: No horizontal synchronization detection since..,1: A horizontal synchronization has been detected."
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bitfld.long 0x4 0. "VD,Vertical Synchronization Detected Interrupt (cleared on read)" "0: No vertical synchronization detection since the..,1: A vertical synchronization has been detected."
group.long 0x40++0x13
line.long 0x0 "DPC_CTRL,Defective Pixel Correction Control Register"
bitfld.long 0x0 2. "BLCEN,Black Level Correction Enable" "0: Black level correction is disabled.,1: Black level correction is enabled."
bitfld.long 0x0 1. "GDCEN,Green Disparity Correction Enable" "0: Green disparity correction is disabled.,1: Green disparity correction is enabled."
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bitfld.long 0x0 0. "DPCEN,Defective Pixel Correction Enable" "0: Defective pixel correction is disabled.,1: Defective pixel correction is enabled."
line.long 0x4 "DPC_CFG,Defective Pixel Correction Configuration Register"
hexmask.long.word 0x4 23.--31. 1. "BLOFST,Black Level Offset Value"
bitfld.long 0x4 20.--22. "GDCCLP,Green Disparity Clipping Value" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 17. "RE_MODE,Replacement Algorithm" "0: Median pixel is used.,1: Average pixel is used."
bitfld.long 0x4 16. "ND_MODE,Noise Detection Mode" "0: At least one detector flag is necessary to..,1: All detector flags are required to trigger the.."
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bitfld.long 0x4 14. "TA_ENABLE,Average Threshold Enable" "0: Average detector is disabled.,1: Average detector is enabled."
bitfld.long 0x4 13. "TC_ENABLE,Closest Pixels Threshold Enable" "0: Closest Pixels detector is disabled.,1: Closest Pixels detector is enabled."
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bitfld.long 0x4 12. "TM_ENABLE,Median Threshold Enable" "0: Median detector is disabled.,1: Median detector is enabled."
bitfld.long 0x4 4. "EITPOL,Edge Interpolation" "0: No edge interpolation is performed.,1: Edge interpolation is performed."
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bitfld.long 0x4 0.--1. "BAYCFG,Color Filter Array Pattern" "0: Starting row configuration is G R G R (red row),1: Starting row configuration is R G R G (red row),2: Starting row configuration is G B G B (blue row),3: Starting row configuration is B G B G (blue row)"
line.long 0x8 "DPC_THRESHM,Defective Pixel Correction Threshold M Register"
hexmask.long.word 0x8 0.--11. 1. "THRESHM,Median Threshold"
line.long 0xC "DPC_THRESHC,Defective Pixel Correction Threshold C Register"
hexmask.long.word 0xC 0.--11. 1. "THRESHC,Closest Pixel Threshold"
line.long 0x10 "DPC_THRESHA,Defective Pixel Correction Threshold A Register"
hexmask.long.word 0x10 0.--11. 1. "THRESHA,Average Threshold"
rgroup.long 0x54++0x3
line.long 0x0 "DPC_SR,Defective Pixel Correction Status Register"
hexmask.long.tbyte 0x0 0.--23. 1. "COUNTER,Defective Pixel Counter (cleared on read)"
group.long 0x58++0x3F
line.long 0x0 "WB_CTRL,White Balance Control Register"
bitfld.long 0x0 0. "ENABLE,White Balance Enable" "0: The white balance is disabled.,1: The white balance is enabled."
line.long 0x4 "WB_CFG,White Balance Configuration Register"
bitfld.long 0x4 0.--1. "BAYCFG,White Balance Bayer Configuration (Pixel Color Pattern)" "0: Starting Row configuration is G R G R (Red Row),1: Starting Row configuration is R G R G (Red Row),2: Starting Row configuration is G B G B (Blue Row),3: Starting Row configuration is B G B G (Blue Row)"
line.long 0x8 "WB_O_RGR,White Balance Offset for R. GR Register"
hexmask.long.word 0x8 16.--28. 1. "GROFST,Offset Green Component for Red Row (signed 13 bits 1:12:0)"
hexmask.long.word 0x8 0.--12. 1. "ROFST,Offset Red Component (signed 13 bits 1:12:0)"
line.long 0xC "WB_O_BGB,White Balance Offset for B. GB Register"
hexmask.long.word 0xC 16.--28. 1. "GBOFST,Offset Green Component for Blue Row (signed 13 bits 1:12:0)"
hexmask.long.word 0xC 0.--12. 1. "BOFST,Offset Blue Component (signed 13 bits 1:12:0)"
line.long 0x10 "WB_G_RGR,White Balance Gain for R. GR Register"
hexmask.long.word 0x10 16.--28. 1. "GRGAIN,Green Component (Red row) Gain (unsigned 13 bits 0:4:9)"
hexmask.long.word 0x10 0.--12. 1. "RGAIN,Red Component Gain (unsigned 13 bits 0:4:9)"
line.long 0x14 "WB_G_BGB,White Balance Gain for B. GB Register"
hexmask.long.word 0x14 16.--28. 1. "GBGAIN,Green Component (Blue Row) Gain (unsigned 13 bits 0:4:9)"
hexmask.long.word 0x14 0.--12. 1. "BGAIN,Blue Component Gain (unsigned 13 bits 0:4:9)"
line.long 0x18 "CFA_CTRL,Color Filter Array Control Register"
bitfld.long 0x18 0. "ENABLE,Color Filter Array Interpolation Enable" "0: Color Filter Array Interpolation is disabled.,1: Color Filter Array Interpolation is enabled."
line.long 0x1C "CFA_CFG,Color Filter Array Configuration Register"
bitfld.long 0x1C 10.--11. "EAL,Green Channel Edge Adaptive Level" "0: Green plane is linearly interpolated.,1: Green plane is the mean value between the..,2: Green plane is interpolated with edge adaptive..,?"
bitfld.long 0x1C 4. "EITPOL,Edge Interpolation" "0: Edges are not interpolated.,1: Edge interpolation is performed."
newline
bitfld.long 0x1C 0.--1. "BAYCFG,Bayer Color Filter Array Pattern" "0: Starting row configuration is G R G R (red row),1: Starting row configuration is R G R G (red row,2: Starting row configuration is G B G B (blue row),3: Starting row configuration is B G B G (blue row)"
line.long 0x20 "CC_CTRL,Color Correction Control Register"
bitfld.long 0x20 0. "ENABLE,Color Correction Enable" "0: Color correction is disabled.,1: Color correction is enabled."
line.long 0x24 "CC_RR_RG,Color Correction RR RG Register"
hexmask.long.word 0x24 16.--27. 1. "RGGAIN,Green Gain for Red Component (signed 12 bits 1:3:8)"
hexmask.long.word 0x24 0.--11. 1. "RRGAIN,Red Gain for Red Component (signed 12 bits 1:3:8)"
line.long 0x28 "CC_RB_OR,Color Correction RB OR Register"
hexmask.long.word 0x28 16.--28. 1. "ROFST,Red Component Offset (signed 13 bits 1:12:0)"
hexmask.long.word 0x28 0.--11. 1. "RBGAIN,Blue Gain for Red Component (signed 12 bits 1:3:8)"
line.long 0x2C "CC_GR_GG,Color Correction GR GG Register"
hexmask.long.word 0x2C 16.--27. 1. "GGGAIN,Green Gain for Green Component (signed 12 bits 1:3:8)"
hexmask.long.word 0x2C 0.--11. 1. "GRGAIN,Red Gain for Green Component (signed 12 bits 1:3:8)"
line.long 0x30 "CC_GB_OG,Color Correction GB OG Register"
hexmask.long.word 0x30 16.--28. 1. "GOFST,Green Component Offset (signed 13 bits 1:12:0)"
hexmask.long.word 0x30 0.--11. 1. "GBGAIN,Blue Gain for Green Component (signed 12 bits 1:3:8)"
line.long 0x34 "CC_BR_BG,Color Correction BR BG Register"
hexmask.long.word 0x34 16.--27. 1. "BGGAIN,Green Gain for Blue Component (signed 12 bits 1:3:8)"
hexmask.long.word 0x34 0.--11. 1. "BRGAIN,Red Gain for Blue Component (signed 12 bits 1:3:8)"
line.long 0x38 "CC_BB_OB,Color Correction BB OB Register"
hexmask.long.word 0x38 16.--28. 1. "BOFST,Blue Component Offset (signed 13 bits 1:12:0)"
hexmask.long.word 0x38 0.--11. 1. "BBGAIN,Blue Gain for Blue Component (signed 12 bits 1:3:8)"
line.long 0x3C "GAM_CTRL,Gamma Correction Control Register"
bitfld.long 0x3C 4. "BIPART,Bipartite Table Configuration" "0: Bipartite table is disabled. There are 64 points..,1: Bipartite table is enabled. There are 32 points.."
bitfld.long 0x3C 3. "RENABLE,Gamma Correction Enable for R Channel" "0: 12-bit to 10-bit compression is performed..,1: Piecewise interpolation is used to perform.."
newline
bitfld.long 0x3C 2. "GENABLE,Gamma Correction Enable for G Channel" "0: 12-bit to 10-bit compression is performed..,1: Piecewise interpolation is used to perform.."
bitfld.long 0x3C 1. "BENABLE,Gamma Correction Enable for B Channel" "0: 12-bit to 10-bit compression is performed..,1: Piecewise interpolation is used to perform.."
newline
bitfld.long 0x3C 0. "ENABLE,Gamma Correction Enable" "0: Gamma correction is disabled.,1: Gamma correction is enabled."
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x98)++0x3
line.long 0x0 "GAM_BENTRY[$1],Gamma Correction Blue Entry x"
hexmask.long.word 0x0 16.--25. 1. "BCONSTANT,Blue Color Constant for Piecewise Interpolation (unsigned 10 bits 0:10:0)"
hexmask.long.word 0x0 0.--9. 1. "BSLOPE,Blue Color Slope for Piecewise Interpolation (signed 10 bits 1:3:6)"
repeat.end
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x198)++0x3
line.long 0x0 "GAM_GENTRY[$1],Gamma Correction Green Entry x"
hexmask.long.word 0x0 16.--25. 1. "GCONSTANT,Green Color Constant for Piecewise Interpolation (unsigned 10 bits 0:10:0)"
hexmask.long.word 0x0 0.--9. 1. "GSLOPE,Green Color Slope for Piecewise Interpolation (signed 10 bits 1:3:6)"
repeat.end
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x298)++0x3
line.long 0x0 "GAM_RENTRY[$1],Gamma Correction Red Entry x"
hexmask.long.word 0x0 16.--25. 1. "RCONSTANT,Red Color Constant for Piecewise Interpolation (unsigned 10 bits 0:10:0)"
hexmask.long.word 0x0 0.--9. 1. "RSLOPE,Red Color Slope for Piecewise Interpolation (signed 10 bits 1:3:6)"
repeat.end
group.long 0x398++0x1B
line.long 0x0 "VHXS_CTRL,VHXS Control Register"
bitfld.long 0x0 1. "HXSEN,Horizontal Scaler Enable" "0: Horizontal scaler is disabled.,1: Horizontal scaler is enabled."
bitfld.long 0x0 0. "VXSEN,Vertical Scaler Enable" "0: Vertical scaler is disabled.,1: Vertical scaler is enabled."
line.long 0x4 "VHXS_SS,VHXS Source Size Register"
hexmask.long.word 0x4 16.--27. 1. "YS,Source Image Vertical Size"
hexmask.long.word 0x4 0.--11. 1. "XS,Source Image Horizontal Size"
line.long 0x8 "VHXS_DS,VHXS Destination Size Register"
hexmask.long.word 0x8 16.--27. 1. "YD,Destination Image Horizontal Size"
hexmask.long.word 0x8 0.--11. 1. "XD,Destination Image Horizontal Size"
line.long 0xC "VXS_FACT,VXS Scaling Factor Register"
hexmask.long.tbyte 0xC 0.--23. 1. "VFACT,Vertical Scaling Factor"
line.long 0x10 "HXS_FACT,HXS Scaling Factor Register"
hexmask.long.tbyte 0x10 0.--23. 1. "HFACT,Horizontal Scaling Factor"
line.long 0x14 "VXS_CFG,VXS Configuration Register"
hexmask.long.byte 0x14 28.--31. 1. "FLMAX,Flush Latency Max"
hexmask.long.byte 0x14 24.--27. 1. "FLMIN,Flush Latency Min"
newline
hexmask.long.byte 0x14 8.--11. 1. "OFFSET,Resampling Default Phase"
bitfld.long 0x14 4. "TAP2,Bilinear Interpolation" "0: Bicubic interpolation is used.,1: Bilinear interpolation is used."
newline
bitfld.long 0x14 0.--1. "FILTCFG,Vertical Filter Initial Configuration" "0,1,2,3"
line.long 0x18 "HXS_CFG,HXS Configuration Register"
hexmask.long.byte 0x18 24.--27. 1. "FL,Flush Latency"
hexmask.long.byte 0x18 8.--11. 1. "OFFSET,Resampling Default Phase"
newline
bitfld.long 0x18 4. "TAP2,Bilinear Interpolation" "0: Bicubic interpolation is used.,1: Bilinear interpolation is used."
bitfld.long 0x18 0.--1. "FILTCFG,Horizontal Filter Initial Configuration" "0,1,2,3"
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0xF80483B4 ad:0xF80483BC ad:0xF80483C4 ad:0xF80483CC ad:0xF80483D4 ad:0xF80483DC ad:0xF80483E4 ad:0xF80483EC ad:0xF80483F4 ad:0xF80483FC ad:0xF8048404 ad:0xF804840C ad:0xF8048414 ad:0xF804841C ad:0xF8048424 ad:0xF804842C)
tree "ISC_VXS_TAP[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "VXS_TAP10PHI,VXS TAP10 Phase Register"
hexmask.long.word 0x0 16.--28. 1. "TAP1,Vertical Filter Tap 1 Coefficient"
hexmask.long.word 0x0 0.--12. 1. "TAP0,Vertical Filter Tap 0 Coefficient"
line.long 0x4 "VXS_TAP32PHI,VXS TAP32 Phase Register"
hexmask.long.word 0x4 16.--28. 1. "TAP3,Vertical Filter Tap 3 Coefficient"
hexmask.long.word 0x4 0.--12. 1. "TAP2,Vertical Filter Tap 2 Coefficient"
tree.end
repeat.end
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0xF8048434 ad:0xF804843C ad:0xF8048444 ad:0xF804844C ad:0xF8048454 ad:0xF804845C ad:0xF8048464 ad:0xF804846C ad:0xF8048474 ad:0xF804847C ad:0xF8048484 ad:0xF804848C ad:0xF8048494 ad:0xF804849C ad:0xF80484A4 ad:0xF80484AC)
tree "ISC_HXS_TAP[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "HXS_TAP10PHI,HXS TAP10 Phase Register"
hexmask.long.word 0x0 16.--28. 1. "TAP1,Vertical Filter Tap 1 Coefficient"
hexmask.long.word 0x0 0.--12. 1. "TAP0,Vertical Filter Tap 0 Coefficient"
line.long 0x4 "HXS_TAP32PHI,HXS TAP32 Phase Register"
hexmask.long.word 0x4 16.--28. 1. "TAP3,Vertical Filter Tap 3 Coefficient"
hexmask.long.word 0x4 0.--12. 1. "TAP2,Vertical Filter Tap 2 Coefficient"
tree.end
repeat.end
base ad:0xF8048000
group.long 0x4B4++0x4B
line.long 0x0 "CSC_CTRL,Color Space Conversion Control Register"
bitfld.long 0x0 0. "ENABLE,RGB to YCbCr Color Space Conversion Enable" "0: Color space conversion is disabled.,1: Color space conversion is enabled."
line.long 0x4 "CSC_YR_YG,Color Space Conversion YR. YG Register"
hexmask.long.word 0x4 16.--27. 1. "YGGAIN,Green Gain for Luminance (signed 12 bits 1:3:8)"
hexmask.long.word 0x4 0.--11. 1. "YRGAIN,Reg Gain for Luminance (signed 12 bits 1:3:8)"
line.long 0x8 "CSC_YB_OY,Color Space Conversion YB. OY Register"
hexmask.long.word 0x8 16.--26. 1. "YOFST,Luminance Offset (11 bits signed 1:10:0)"
hexmask.long.word 0x8 0.--11. 1. "YBGAIN,Blue Gain for Luminance Component (12 bits signed 1:3:8)"
line.long 0xC "CSC_CBR_CBG,Color Space Conversion CBR CBG Register"
hexmask.long.word 0xC 16.--27. 1. "CBGGAIN,Green Gain for Blue Chrominance (signed 12 bits 1:3:8)"
hexmask.long.word 0xC 0.--11. 1. "CBRGAIN,Red Gain for Blue Chrominance (signed 12 bits 1:3:8)"
line.long 0x10 "CSC_CBB_OCB,Color Space Conversion CBB OCB Register"
hexmask.long.word 0x10 16.--26. 1. "CBOFST,Blue Chrominance Offset (signed 11 bits 1:10:0)"
hexmask.long.word 0x10 0.--11. 1. "CBBGAIN,Blue Gain for Blue Chrominance (signed 12 bits 1:3:8)"
line.long 0x14 "CSC_CRR_CRG,Color Space Conversion CRR CRG Register"
hexmask.long.word 0x14 16.--27. 1. "CRGGAIN,Green Gain for Red Chrominance (signed 12 bits 1:3:8)"
hexmask.long.word 0x14 0.--11. 1. "CRRGAIN,Red Gain for Red Chrominance (signed 12 bits 1:3:8)"
line.long 0x18 "CSC_CRB_OCR,Color Space Conversion CRB OCR Register"
hexmask.long.word 0x18 16.--26. 1. "CROFST,Red Chrominance Offset (signed 11 bits 1:10:0)"
hexmask.long.word 0x18 0.--11. 1. "CRBGAIN,Blue Gain for Red Chrominance (signed 12 bits 1:3:8)"
line.long 0x1C "CBHS_CTRL,CBHS Control Register"
bitfld.long 0x1C 0. "ENABLE,Contrast Brightness Hue and Saturation Control Enable" "0: CBHS control is disabled.,1: CBHS control is enabled."
line.long 0x20 "CBHS_CFG,CBHS Configuration Register"
bitfld.long 0x20 1.--2. "CCIRMODE,CCIR656 Byte Ordering" "0: Byte ordering Cb0 Y0 Cr0 Y1,1: Byte ordering Cr0 Y0 Cb0 Y1,2: Byte ordering Y0 Cb0 Y1 Cr0,3: Byte ordering Y0 Cr0 Y1 Cb0"
bitfld.long 0x20 0. "CCIR,CCIR656 Stream Enable" "0: Raw mode.,1: CCIR656 stream."
line.long 0x24 "CBHS_BRIGHT,CBHS Brightness Register"
hexmask.long.word 0x24 0.--10. 1. "BRIGHT,Image Brightness Control (signed 11 bits 1:10:0)"
line.long 0x28 "CBHS_CONT,CBHS Contrast Register"
hexmask.long.word 0x28 0.--11. 1. "CONTRAST,Image Contrast (unsigned 12 bits 0:4:8)"
line.long 0x2C "CBHS_HUE,CBHS Hue Register"
hexmask.long.word 0x2C 0.--8. 1. "HUE,Image Hue value (unsigned 9 bits 0:9:0)"
line.long 0x30 "CBHS_SAT,CBHS Saturation Register"
hexmask.long.word 0x30 0.--11. 1. "SATURATION,Image Saturation Value (unsigned 12 bits 0:8:4)"
line.long 0x34 "SUB422_CTRL,Subsampling 4:4:4 to 4:2:2 Control Register"
bitfld.long 0x34 0. "ENABLE,4:4:4 to 4:2:2 Chrominance Horizontal Subsampling Filter Enable" "0: Subsampler is disabled.,1: Subsampler is enabled."
line.long 0x38 "SUB422_CFG,Subsampling 4:4:4 to 4:2:2 Configuration Register"
bitfld.long 0x38 4.--5. "FILTER,Low Pass Filter Selection" "0: Cosited {1},1: Centered {1 1},2: Cosited {1 2 1},3: Centered {1 3 3 1}"
bitfld.long 0x38 1.--2. "CCIRMODE,CCIR656 Byte Ordering" "0: Byte ordering Cb0 Y0 Cr0 Y1,1: Byte ordering Cr0 Y0 Cb0 Y1,2: Byte ordering Y0 Cb0 Y1 Cr0,3: Byte ordering Y0 Cr0 Y1 Cb0"
newline
bitfld.long 0x38 0. "CCIR,CCIR656 Input Stream" "0: Raw mode.,1: CCIR mode."
line.long 0x3C "SUB420_CTRL,Subsampling 4:2:2 to 4:2:0 Control Register"
bitfld.long 0x3C 5. "MIPI420,MIPI YUV 420 8-bpp or 10-bpp Even Odd Splitter" "0: Normal mode.,1: When the MIPI interface is selected and the.."
bitfld.long 0x3C 4. "FILTER,Interlaced or Progressive Chrominance Filter" "0: Progressive filter {0.5 0.5}.,1: Field-dependent filter top field filter is {0.75.."
newline
bitfld.long 0x3C 0. "ENABLE,4:2:2 to 4:2:0 Vertical Subsampling Filter Enable (Center Aligned)" "0: Subsampler disabled.,1: Subsampler enabled."
line.long 0x40 "RLP_CFG,Rounding. Limiting and Packing Configuration Register"
hexmask.long.byte 0x40 8.--15. 1. "ALPHA,Alpha Value for Alpha-enabled RGB Mode"
bitfld.long 0x40 6.--7. "YMODE,YCbCr Memory Mapping Configuration Mode" "0: Byte 0 is Cr Byte 1 is Y(n) Byte 2 is Cb Byte 3..,1: Byte 0 is Cb Byte 1 is Y(n) Byte 2 is Cb Byte 3..,2: Byte 0 is Y(n) Byte 1 is Cr Byte 2 is Y(n+1)..,3: Byte 0 is Y (n) Byte 1 is Cb Byte 2 is Y(n+1).."
newline
bitfld.long 0x40 5. "LSH,Logical Left Shift for Pixel to 16-bit Container Mapping" "0: Logical left shift is disabled.,1: Pixel value is left-justified in a 16-bit.."
bitfld.long 0x40 4. "REP,Pixel Expansion with Replication Logic" "0: Replication is disabled.,1: Replication is enabled."
newline
hexmask.long.byte 0x40 0.--3. 1. "MODE,Rounding Limiting and Packing Mode"
line.long 0x44 "HIS_CTRL,Histogram Control Register"
bitfld.long 0x44 0. "ENABLE,Histogram Sub Module Enable" "0: Histogram disabled.,1: Histogram enabled."
line.long 0x48 "HIS_CFG,Histogram Configuration Register"
bitfld.long 0x48 8. "RAR,Histogram Reset After Read" "0: Reset after read mode is disabled.,1: Reset after read mode is enabled."
bitfld.long 0x48 4.--5. "BAYSEL,Bayer Color Component Selection" "0: Starting row configuration is G R G R (red row),1: Starting row configuration is R G R G (red row),2: Starting row configuration is G B G B (blue row,3: Starting row configuration is B G B G (blue row)"
newline
bitfld.long 0x48 0.--2. "MODE,Histogram Operating Mode" "0: Gr sampling,1: R sampling,2: Gb sampling,3: B sampling,4: Luminance-only mode,5: Raw sampling,6: Luminance only with CCIR656 10-bit or 8-bit mode,?"
group.long 0x51C++0x27
line.long 0x0 "DCFG,DMA Configuration Register"
hexmask.long.byte 0x0 20.--23. 1. "AWQOS,Write QoS Value"
hexmask.long.byte 0x0 16.--19. 1. "ARQOS,Read QoS Value"
newline
bitfld.long 0x0 8.--10. "CMBSIZE,DMA Memory Burst Size C channel" "0: DMA single access,1: 4-beat burst access,2: 8-beat burst access,3: 16-beat burst access,4: 32-beat burst access,?,?,?"
bitfld.long 0x0 4.--6. "YMBSIZE,DMA Memory Burst Size Y channel" "0: DMA single access,1: 4-beat burst access,2: 8-beat burst access,3: 16-beat burst access,4: 32-beat burst access,?,?,?"
newline
bitfld.long 0x0 0.--2. "IMODE,DMA Input Mode Selection" "0: 8 bits single channel packed,1: 16 bits single channel packed,2: 32 bits single channel packed,3: 32 bits dual channel,4: 32 bits triple channel,5: 32 bits dual channel,6: 32 bits triple channel,?"
line.long 0x4 "DCTRL,DMA Control Register"
bitfld.long 0x4 7. "DONE,Descriptor Processing Status" "0: Descriptor not processed yet.,1: Descriptor processed."
bitfld.long 0x4 6. "FIELD,Value of Captured Frame Field Signal" "0: Field value is 0.,1: Field value is 1."
newline
bitfld.long 0x4 5. "WB,Write Back Operation Enable" "0: Write Back operation is skipped.,1: Write Back operation is performed."
bitfld.long 0x4 4. "IE,Interrupt Enable" "0: DMA Done interrupt is generated.,1: DMA Done interrupt is not set."
newline
bitfld.long 0x4 1.--2. "DVIEW,Descriptor View" "0: Address {0} Stride {0} are updated,1: Address {0 1} Stride {0 1} are updated,2: Address {0 1 2} Stride {0 1 2} are updated,?"
bitfld.long 0x4 0. "DE,Descriptor Enable" "0: Descriptor disabled.,1: Descriptor enabled."
line.long 0x8 "DNDA,DMA Descriptor Address Register"
hexmask.long 0x8 2.--31. 1. "NDA,Next Descriptor Address Register"
line.long 0xC "DAD0,DMA Address 0 Register"
hexmask.long 0xC 0.--31. 1. "AD0,Channel 0 Address"
line.long 0x10 "DST0,DMA Stride 0 Register"
hexmask.long 0x10 0.--31. 1. "ST0,Channel 0 Stride"
line.long 0x14 "DAD1,DMA Address 1 Register"
hexmask.long 0x14 0.--31. 1. "AD1,Channel 1 Address"
line.long 0x18 "DST1,DMA Stride 1 Register"
hexmask.long 0x18 0.--31. 1. "ST1,Channel 1 Stride"
line.long 0x1C "DAD2,DMA Address 2 Register"
hexmask.long 0x1C 0.--31. 1. "AD2,Channel 2 Address"
line.long 0x20 "DST2,DMA Stride 2 Register"
hexmask.long 0x20 0.--31. 1. "ST2,Channel 2 Stride"
line.long 0x24 "WPMR,Write protection Mode Register"
hexmask.long.tbyte 0x24 8.--31. 1. "WPKEY,Write Protection Key Password"
bitfld.long 0x24 2. "WPCREN,Write Protection Control Registers Enable" "0: Disables the write protection of control..,1: Enables the write protection of control.."
newline
bitfld.long 0x24 1. "WPITEN,Write Protection Interrupt Registers Enable" "0: Disables the write protection of interrupt..,1: Enables the write protection of interrupt.."
bitfld.long 0x24 0. "WPCFGEN,Write Protection Configuration Registers Enable" "0: Disables the write protection of configuration..,1: Enables the write protection of configuration.."
rgroup.long 0x544++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
repeat 512. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x55C)++0x3
line.long 0x0 "HIS_ENTRY[$1],Histogram Entry x"
hexmask.long.tbyte 0x0 0.--19. 1. "COUNT,Entry Counter"
repeat.end
tree.end
tree "MATRIX (AHB Bus Matrix)"
base ad:0xFFFFDE00
repeat 15. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2)++0x3
line.long 0x0 "MCFG[$1],Master Configuration Register x"
bitfld.long 0x0 0.--2. "ULBT,Undefined Length Burst Type" "0: Unlimited Length Burst-No predicted end of burst..,1: Single Access-The undefined length burst is..,2: 4-beat Burst-The undefined length burst or..,3: 8-beat Burst-The undefined length burst or..,4: 16-beat Burst-The undefined length burst or..,5: 32-beat Burst-The undefined length burst or..,6: 64-beat Burst-The undefined length burst or..,7: 128-beat Burst-The undefined length burst or.."
repeat.end
repeat 13. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "SCFG[$1],Slave Configuration Register x"
hexmask.long.byte 0x0 18.--21. 1. "FIXED_DEFMSTR,Fixed Default Master"
bitfld.long 0x0 16.--17. "DEFMSTR_TYPE,Default Master Type" "0: No Default Master-At the end of the current..,1: Last Default Master-At the end of the current..,2: Fixed Default Master-At the end of the current..,?"
newline
hexmask.long.word 0x0 0.--8. 1. "SLOT_CYCLE,Maximum Bus Grant Duration for Masters"
repeat.end
repeat 13. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC)(list ad:0xFFFFDE80 ad:0xFFFFDE88 ad:0xFFFFDE90 ad:0xFFFFDE98 ad:0xFFFFDEA0 ad:0xFFFFDEA8 ad:0xFFFFDEB0 ad:0xFFFFDEB8 ad:0xFFFFDEC0 ad:0xFFFFDEC8 ad:0xFFFFDED0 ad:0xFFFFDED8 ad:0xFFFFDEE0)
tree "MATRIX_PR[$1]"
base $2
group.long ($2)++0x7
line.long 0x0 "PRAS,Priority Register A for Slave x"
bitfld.long 0x0 30. "LQOSEN7,Latency Quality of Service Enable for Master 7" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 28.--29. "M7PR,Master 7 Priority" "0,1,2,3"
newline
bitfld.long 0x0 26. "LQOSEN6,Latency Quality of Service Enable for Master 6" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 24.--25. "M6PR,Master 6 Priority" "0,1,2,3"
newline
bitfld.long 0x0 22. "LQOSEN5,Latency Quality of Service Enable for Master 5" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 20.--21. "M5PR,Master 5 Priority" "0,1,2,3"
newline
bitfld.long 0x0 18. "LQOSEN4,Latency Quality of Service Enable for Master 4" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 16.--17. "M4PR,Master 4 Priority" "0,1,2,3"
newline
bitfld.long 0x0 14. "LQOSEN3,Latency Quality of Service Enable for Master 3" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 12.--13. "M3PR,Master 3 Priority" "0,1,2,3"
newline
bitfld.long 0x0 10. "LQOSEN2,Latency Quality of Service Enable for Master 2" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 8.--9. "M2PR,Master 2 Priority" "0,1,2,3"
newline
bitfld.long 0x0 6. "LQOSEN1,Latency Quality of Service Enable for Master 1" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 4.--5. "M1PR,Master 1 Priority" "0,1,2,3"
newline
bitfld.long 0x0 2. "LQOSEN0,Latency Quality of Service Enable for Master 0" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x0 0.--1. "M0PR,Master 0 Priority" "0,1,2,3"
line.long 0x4 "PRBS,Priority Register B for Slave x"
bitfld.long 0x4 26. "LQOSEN14,Latency Quality of Service Enable for Master 14" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 24.--25. "M14PR,Master 14 Priority" "0,1,2,3"
newline
bitfld.long 0x4 22. "LQOSEN13,Latency Quality of Service Enable for Master 13" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 20.--21. "M13PR,Master 13 Priority" "0,1,2,3"
newline
bitfld.long 0x4 18. "LQOSEN12,Latency Quality of Service Enable for Master 12" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 16.--17. "M12PR,Master 12 Priority" "0,1,2,3"
newline
bitfld.long 0x4 14. "LQOSEN11,Latency Quality of Service Enable for Master 11" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 12.--13. "M11PR,Master 11 Priority" "0,1,2,3"
newline
bitfld.long 0x4 10. "LQOSEN10,Latency Quality of Service Enable for Master 10" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 8.--9. "M10PR,Master 10 Priority" "0,1,2,3"
newline
bitfld.long 0x4 6. "LQOSEN9,Latency Quality of Service Enable for Master 9" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 4.--5. "M9PR,Master 9 Priority" "0,1,2,3"
newline
bitfld.long 0x4 2. "LQOSEN8,Latency Quality of Service Enable for Master 8" "0: Disables propagation of Latency Quality of..,1: Enables the propagation of Latency Quality of.."
bitfld.long 0x4 0.--1. "M8PR,Master 8 Priority" "0,1,2,3"
tree.end
repeat.end
base ad:0xFFFFDE00
group.long 0x100++0x3
line.long 0x0 "MRCR,Master Remap Control Register"
bitfld.long 0x0 14. "RCB14,Remap Command Bit for Master 14" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 13. "RCB13,Remap Command Bit for Master 13" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 12. "RCB12,Remap Command Bit for Master 12" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 11. "RCB11,Remap Command Bit for Master 11" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 10. "RCB10,Remap Command Bit for Master 10" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 9. "RCB9,Remap Command Bit for Master 9" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 8. "RCB8,Remap Command Bit for Master 8" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 7. "RCB7,Remap Command Bit for Master 7" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 6. "RCB6,Remap Command Bit for Master 6" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 5. "RCB5,Remap Command Bit for Master 5" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 4. "RCB4,Remap Command Bit for Master 4" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 3. "RCB3,Remap Command Bit for Master 3" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 2. "RCB2,Remap Command Bit for Master 2" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
bitfld.long 0x0 1. "RCB1,Remap Command Bit for Master 1" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
newline
bitfld.long 0x0 0. "RCB0,Remap Command Bit for Master 0" "0: Disables remapped address decoding for the..,1: Enables remapped address decoding for the.."
wgroup.long 0x150++0x7
line.long 0x0 "MEIER,Master Error Interrupt Enable Register"
bitfld.long 0x0 14. "MERR14,Master 14 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 13. "MERR13,Master 13 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
newline
bitfld.long 0x0 12. "MERR12,Master 12 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 11. "MERR11,Master 11 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
newline
bitfld.long 0x0 10. "MERR10,Master 10 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 9. "MERR9,Master 9 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
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bitfld.long 0x0 8. "MERR8,Master 8 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 7. "MERR7,Master 7 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
newline
bitfld.long 0x0 6. "MERR6,Master 6 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 5. "MERR5,Master 5 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
newline
bitfld.long 0x0 4. "MERR4,Master 4 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 3. "MERR3,Master 3 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
newline
bitfld.long 0x0 2. "MERR2,Master 2 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
bitfld.long 0x0 1. "MERR1,Master 1 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
newline
bitfld.long 0x0 0. "MERR0,Master 0 Access Error" "0: No effect.,1: Enables Master x Access Error interrupt source."
line.long 0x4 "MEIDR,Master Error Interrupt Disable Register"
bitfld.long 0x4 14. "MERR14,Master 14 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 13. "MERR13,Master 13 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 12. "MERR12,Master 12 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 11. "MERR11,Master 11 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 10. "MERR10,Master 10 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 9. "MERR9,Master 9 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 8. "MERR8,Master 8 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 7. "MERR7,Master 7 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 6. "MERR6,Master 6 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 5. "MERR5,Master 5 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 4. "MERR4,Master 4 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 3. "MERR3,Master 3 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 2. "MERR2,Master 2 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
bitfld.long 0x4 1. "MERR1,Master 1 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
newline
bitfld.long 0x4 0. "MERR0,Master 0 Access Error" "0: No effect.,1: Disables Master x Access Error interrupt source."
rgroup.long 0x158++0x7
line.long 0x0 "MEIMR,Master Error Interrupt Mask Register"
bitfld.long 0x0 14. "MERR14,Master 14 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 13. "MERR13,Master 13 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 12. "MERR12,Master 12 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 11. "MERR11,Master 11 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 10. "MERR10,Master 10 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 9. "MERR9,Master 9 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 8. "MERR8,Master 8 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 7. "MERR7,Master 7 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 6. "MERR6,Master 6 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 5. "MERR5,Master 5 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 4. "MERR4,Master 4 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 3. "MERR3,Master 3 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 2. "MERR2,Master 2 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
bitfld.long 0x0 1. "MERR1,Master 1 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
newline
bitfld.long 0x0 0. "MERR0,Master 0 Access Error" "0: Master x Access Error does not trigger any..,1: Master x Access Error triggers the MATRIX.."
line.long 0x4 "MESR,Master Error Status Register"
bitfld.long 0x4 14. "MERR14,Master 14 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 13. "MERR13,Master 13 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 12. "MERR12,Master 12 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 11. "MERR11,Master 11 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 10. "MERR10,Master 10 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 9. "MERR9,Master 9 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 8. "MERR8,Master 8 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 7. "MERR7,Master 7 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 6. "MERR6,Master 6 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 5. "MERR5,Master 5 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 4. "MERR4,Master 4 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 3. "MERR3,Master 3 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 2. "MERR2,Master 2 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
bitfld.long 0x4 1. "MERR1,Master 1 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
newline
bitfld.long 0x4 0. "MERR0,Master 0 Access Error" "0: No Master Access Error has occurred since the..,1: At least one Master Access Error has occurred.."
repeat 15. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x160)++0x3
line.long 0x0 "MEAR[$1],Master x Error Address Register"
hexmask.long 0x0 0.--31. 1. "ERRADD,Master Error Address"
repeat.end
group.long 0x1E4++0x3
line.long 0x0 "WPMR,Write Protect Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 7. "CFGFRZ,Configuration Freeze" "0: The MATRIX configuration is not frozen.,1: Freezes the MATRIX configuration until hardware.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x1E8++0x3
line.long 0x0 "WPSR,Write Protect Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "MPDDRC (Multiport DDR-SDRAM Controller)"
base ad:0xFFFFE800
group.long 0x0++0x17
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 0.--2. "MODE,MPDDRC Command Mode" "0: Normal Mode. Any access to the MPDDRC is decoded..,1: The MPDDRC issues a NOP command when the..,2: The MPDDRC issues the All Banks Precharge..,3: The MPDDRC issues a Load Mode Register command..,4: The MPDDRC issues an Autorefresh command when..,5: The MPDDRC issues an Extended Load Mode Register..,6: Deep Power mode: Access to Deep Powerdown mode..,?"
line.long 0x4 "RTR,Refresh Timer Register"
hexmask.long.word 0x4 0.--11. 1. "COUNT,MPDDRC Refresh Timer Count"
line.long 0x8 "CR,Configuration Register"
bitfld.long 0x8 26.--28. "CAS_WR,CAS Write Latency" "?,?,?,?,?,5: DDR3 CAS write latency 5 DLL must be enabled DLL..,6: DDR3 CAS write latency 6 DLL enabled or not DLL..,?"
newline
bitfld.long 0x8 23. "UNAL,This bit must always be written to 1" "0,1"
newline
bitfld.long 0x8 22. "DECOD,Type of Decoding" "0: Method for address mapping where banks alternate..,1: Method for address mapping where banks alternate.."
newline
bitfld.long 0x8 21. "NDQS,Not DQS." "0: 'Not DQS' is enabled.,1: 'Not DQS' is disabled."
newline
bitfld.long 0x8 20. "NB,Number of Banks" "0: 4-bank memory devices,1: 8 banks. Only possible when using DDR2-SDRAMand.."
newline
bitfld.long 0x8 19. "LC_LPDDR1,Low-cost Low-power DDR1" "0: Any type of memory devices except of low cost..,1: Low-cost and low-density low-power DDR1. These.."
newline
bitfld.long 0x8 16. "DQMS,Mask Data is Shared" "0: DQM is not shared with another controller,1: DQM is shared with another controller"
newline
bitfld.long 0x8 15. "SUP_DDR3,Supply DDR3-SDRAM or DDR3L-SDRAM" "0: 1.35V DDR3L-SDRAM is used.,1: 1.5V DDR3-SDRAM is used."
newline
bitfld.long 0x8 12.--14. "OCD,Off-chip Driver" "0: Exit from OCD Calibration mode and maintain..,?,?,?,?,?,?,7: OCD calibration default"
newline
bitfld.long 0x8 9. "DIS_DLL,Disable DLL" "0: Enable DLL.,1: Disable DLL."
newline
bitfld.long 0x8 8. "DIC_DS,Output Driver Impedance Control (Drive Strength)" "0: Normal drive strength (DDR2)- RZQ_6 (40 [NOM]..,1: Weak drive strength (DDR2)- RZQ_7 (34 [NOM] DDR3)"
newline
bitfld.long 0x8 7. "DLL,Reset DLL" "0: Disable DLL reset,1: Enable DLL reset"
newline
bitfld.long 0x8 4.--6. "CAS,CAS Latency" "?,?,2: LPDDR1 CAS Latency 2,3: DDR2/LPDDR1 CAS Latency 3,4: DDR2 CAS Latency 4,5: DDR2/DDR3 CAS Latency 5,6: DDR2/DDR3 CAS Latency 6,?"
newline
bitfld.long 0x8 2.--3. "NR,Number of Row Bits" "0: 11 bits to define the row number up to 2048 rows,1: 12 bits to define the row number up to 4096 rows,2: 13 bits to define the row number up to 8192 rows,3: 14 bits to define the row number up to 16384 rows"
newline
bitfld.long 0x8 0.--1. "NC,Number of Column Bits" "0: 9 bits to define the column number up to 512..,1: 10 bits to define the column number up to 1024..,2: 11 bits to define the column number up to 2048..,3: 12 bits to define the column number up to 4096.."
line.long 0xC "TPR0,Timing Parameter 0 Register"
hexmask.long.byte 0xC 28.--31. 1. "TMRD,Load Mode Register Command to Activate or Refresh Command"
newline
bitfld.long 0xC 24.--26. "TWTR,Internal Write to Read Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 20.--23. 1. "TRRD,Active BankA to Active BankB"
newline
hexmask.long.byte 0xC 16.--19. 1. "TRP,Row Precharge Delay"
newline
hexmask.long.byte 0xC 12.--15. 1. "TRC,Row Cycle Delay"
newline
hexmask.long.byte 0xC 8.--11. 1. "TWR,Write Recovery Delay"
newline
hexmask.long.byte 0xC 4.--7. 1. "TRCD,Row to Column Delay"
newline
hexmask.long.byte 0xC 0.--3. 1. "TRAS,Active to Precharge Delay"
line.long 0x10 "TPR1,Timing Parameter 1 Register"
hexmask.long.byte 0x10 24.--27. 1. "TXP,Exit Powerdown Delay to First Command"
newline
hexmask.long.byte 0x10 16.--23. 1. "TXSRD,Exit Self-refresh Delay to Read Command"
newline
hexmask.long.byte 0x10 8.--15. 1. "TXSNR,Exit Self-refresh Delay to Non-Read Command"
newline
hexmask.long.byte 0x10 0.--6. 1. "TRFC,Row Refresh Cycle"
line.long 0x14 "TPR2,Timing Parameter 2 Register"
hexmask.long.byte 0x14 20.--23. 1. "TMOD,Mode Register Set Command Update Delay"
newline
hexmask.long.byte 0x14 16.--19. 1. "TFAW,Four Active Windows"
newline
bitfld.long 0x14 12.--14. "TRTP,Read to Precharge" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 8.--11. 1. "TRPA,Row Precharge All Delay"
newline
hexmask.long.byte 0x14 4.--7. 1. "TXARDS,Exit Active Power Down Delay to Read Command in Mode 'Slow Exit'"
newline
hexmask.long.byte 0x14 0.--3. 1. "TXARD,Exit Active Power Down Delay to Read Command in Mode 'Fast Exit'"
group.long 0x1C++0x7
line.long 0x0 "LPR,Low-Power Register"
bitfld.long 0x0 26. "DISTOEN_DONE,DLL Disabled to DLL Enabled is Done (read-only)" "0,1"
newline
bitfld.long 0x0 25. "SELF_DONE,Self-refresh is Done (read-only)" "0,1"
newline
bitfld.long 0x0 24. "CHG_FRQ,Change Clock Frequency During Self-refresh Mode" "0,1"
newline
bitfld.long 0x0 20.--21. "UPD_MR,Update Load Mode Register and Extended Mode Register" "0: Update of Load Mode and Extended Mode registers..,1: MPDDRC shares an external bus. Automatic update..,2: MPDDRC does not share an external bus. Automatic..,?"
newline
bitfld.long 0x0 17. "ASR,Auto Self-refresh" "0: Manual Self-refresh reference must be applied.,1: DRAM manages Self-refresh entry in either the.."
newline
bitfld.long 0x0 16. "APDE,Active Power Down Exit Time" "0: Fast Exit from Power Down. DDR2-SDRAM and..,1: Slow Exit from Power Down. DDR2-SDRAM and.."
newline
bitfld.long 0x0 15. "SRT,High Temperature Self-refresh Rate" "0: 1x refresh rate. Industrial and automative..,1: 2x refresh rate. Provides a faster rate on.."
newline
bitfld.long 0x0 14. "SELFAUTO,Self-refresh Exit Autorefresh" "0: Upon exiting Self-refresh mode active command is..,1: Upon exiting Self-refresh mode autorefresh.."
newline
bitfld.long 0x0 12.--13. "TIMEOUT,Time Between Last Transfer and Low-Power Mode" "0: SDRAM Low-power mode is activated immediately..,1: SDRAM Low-power mode is activated 64 clock..,2: SDRAM Low-power mode is activated 128 clock..,?"
newline
bitfld.long 0x0 8.--10. "DS,Drive Strength" "0: Full drive strength,1: Half drive strength,2: Quarter drive strength,3: Octant drive strength,?,?,?,?"
newline
bitfld.long 0x0 4.--6. "PASR,Partial Array Self-refresh" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 2. "CLK_FR,Clock Frozen Command Bit" "0: Clock(s) is/are not frozen.,1: Clock(s) is/are frozen."
newline
bitfld.long 0x0 0.--1. "LPCB,Low-power Command Bit" "0: Low-power feature is inhibited. No Powerdown..,1: The MPDDRC issues a self-refresh command to the..,2: The MPDDRC issues a Powerdown command to the..,3: The MPDDRC issues a Deep Powerdown command to.."
line.long 0x4 "MD,Memory Device Register"
bitfld.long 0x4 4. "DBW,Data Bus Width" "?,1: Data bus width is 16 bits."
newline
bitfld.long 0x4 0.--2. "MD,Memory Device" "?,?,?,3: Low-power DDR1-SDRAM,4: DDR3-SDRAM,?,6: DDR2-SDRAM,?"
group.long 0x2C++0xF
line.long 0x0 "DDR3_CAL,DDR3 Calibration Register"
hexmask.long.word 0x0 0.--15. 1. "COUNT_CAL,DDR3 Calibration Timer Count"
line.long 0x4 "DDR3_TIM_CAL,DDR3 Timing Calibration Register"
hexmask.long.byte 0x4 0.--7. 1. "ZQCS,ZQ Calibration Short"
line.long 0x8 "IO_CALIBR,I/O Calibration Register"
hexmask.long.byte 0x8 20.--23. 1. "CALCODEN,Number of N-type Transistors (read-only)"
newline
hexmask.long.byte 0x8 16.--19. 1. "CALCODEP,Number of P-type Transistors (read-only)"
newline
hexmask.long.word 0x8 6.--14. 1. "TZQIO,IO Calibration"
newline
bitfld.long 0x8 5. "EN_CALIB,Enable Calibration" "0: Calibration is disabled.,1: Calibration is enabled."
newline
hexmask.long.byte 0x8 0.--4. 1. "CK_F_RANGE,DDRCK Maximum Clock Frequency Range Indicator"
line.long 0xC "OCMS,OCMS Register"
bitfld.long 0xC 4. "TAMPCLR,Tamper Clear Enable" "0: A tamper detection event has no effect on MPDDRC..,1: A tamper detection event immediately clears.."
newline
bitfld.long 0xC 0. "SCR_EN,Scrambling Enable" "0: Disables 'Off-chip' scrambling for SDRAM access.,1: Enables 'Off-chip' scrambling for SDRAM access."
wgroup.long 0x3C++0x7
line.long 0x0 "OCMS_KEY1,OCMS KEY1 Register"
hexmask.long 0x0 0.--31. 1. "KEY1,Off-chip Memory Scrambling (OCMS) Key Part 1"
line.long 0x4 "OCMS_KEY2,OCMS KEY2 Register"
hexmask.long 0x4 0.--31. 1. "KEY2,Off-chip Memory Scrambling (OCMS) Key Part 2"
group.long 0x44++0xF
line.long 0x0 "CONF_ARBITER,Configuration Arbiter Register"
bitfld.long 0x0 30. "BDW_BURST_P6,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 29. "BDW_BURST_P5,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 28. "BDW_BURST_P4,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 27. "BDW_BURST_P3,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 26. "BDW_BURST_P2,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 25. "BDW_BURST_P1,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 24. "BDW_BURST_P0,Bandwidth Arbitration Mode on Port X" "0: The arbitration is done when the bandwidth limit..,1: The arbitration is done when the bandwidth limit.."
newline
bitfld.long 0x0 22. "MA_PR_P6,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 21. "MA_PR_P5,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 20. "MA_PR_P4,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 19. "MA_PR_P3,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 18. "MA_PR_P2,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 17. "MA_PR_P1,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 16. "MA_PR_P0,Host or Software Provide Information" "0: Number of requests or words is provided by the..,1: Number of requests or words is provided by.."
newline
bitfld.long 0x0 14. "RQ_WD_P6,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 13. "RQ_WD_P5,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 12. "RQ_WD_P4,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 11. "RQ_WD_P3,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 10. "RQ_WD_P2,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 9. "RQ_WD_P1,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 8. "RQ_WD_P0,Request or Word from Port X" "0: Number of requests is selected.,1: Number of words is selected."
newline
bitfld.long 0x0 3. "BDW_MAX_CUR,Bandwidth Max or Current" "0: Current bandwidth is displayed.,1: Maximum of the bandwidth is displayed."
newline
bitfld.long 0x0 2. "KEEP_LAYER,Layer (Port) Kept by Host" "0: No impact on arbitration scheme.,1: Some hosts such as LCD or DMA drive a signal.."
newline
bitfld.long 0x0 0.--1. "ARB,Type of Arbitration" "0: Round-Robin Policy,1: Request Policy,2: Bandwidth Policy,3: Quality of Service Policy"
line.long 0x4 "TIMEOUT,Timeout Register"
hexmask.long.byte 0x4 24.--27. 1. "TIMEOUT_P6,Timeout for Ports 0 1 2 3 4 5 6"
newline
hexmask.long.byte 0x4 20.--23. 1. "TIMEOUT_P5,Timeout for Ports 0 1 2 3 4 5 6"
newline
hexmask.long.byte 0x4 16.--19. 1. "TIMEOUT_P4,Timeout for Ports 0 1 2 3 4 5 6"
newline
hexmask.long.byte 0x4 12.--15. 1. "TIMEOUT_P3,Timeout for Ports 0 1 2 3 4 5 6"
newline
hexmask.long.byte 0x4 8.--11. 1. "TIMEOUT_P2,Timeout for Ports 0 1 2 3 4 5 6"
newline
hexmask.long.byte 0x4 4.--7. 1. "TIMEOUT_P1,Timeout for Ports 0 1 2 3 4 5 6"
newline
hexmask.long.byte 0x4 0.--3. 1. "TIMEOUT_P0,Timeout for Ports 0 1 2 3 4 5 6"
line.long 0x8 "REQ_PORT_0123,Request Port 0-1-2-3 Register"
hexmask.long.byte 0x8 24.--31. 1. "NRQ_NWD_BDW_P3,Number of Requests Number of Words or Bandwidth Allocation from Port 0-1-2-3"
newline
hexmask.long.byte 0x8 16.--23. 1. "NRQ_NWD_BDW_P2,Number of Requests Number of Words or Bandwidth Allocation from Port 0-1-2-3"
newline
hexmask.long.byte 0x8 8.--15. 1. "NRQ_NWD_BDW_P1,Number of Requests Number of Words or Bandwidth Allocation from Port 0-1-2-3"
newline
hexmask.long.byte 0x8 0.--7. 1. "NRQ_NWD_BDW_P0,Number of Requests Number of Words or Bandwidth Allocation from Port 0-1-2-3"
line.long 0xC "REQ_PORT_456,Request Port 4-5-6 Register"
hexmask.long.byte 0xC 16.--23. 1. "NRQ_NWD_BDW_P6,Number of Requests Number of Words or Bandwidth allocation from port 4-5-6"
newline
hexmask.long.byte 0xC 8.--15. 1. "NRQ_NWD_BDW_P5,Number of Requests Number of Words or Bandwidth allocation from port 4-5-6"
newline
hexmask.long.byte 0xC 0.--7. 1. "NRQ_NWD_BDW_P4,Number of Requests Number of Words or Bandwidth allocation from port 4-5-6"
rgroup.long 0x54++0x7
line.long 0x0 "BDW_PORT_0123,Current/Maximum Bandwidth Port 0-1-2-3 Register"
hexmask.long.byte 0x0 24.--30. 1. "BDW_P3,Current/Maximum Bandwidth from Port 0-1-2-3"
newline
hexmask.long.byte 0x0 16.--22. 1. "BDW_P2,Current/Maximum Bandwidth from Port 0-1-2-3"
newline
hexmask.long.byte 0x0 8.--14. 1. "BDW_P1,Current/Maximum Bandwidth from Port 0-1-2-3"
newline
hexmask.long.byte 0x0 0.--6. 1. "BDW_P0,Current/Maximum Bandwidth from Port 0-1-2-3"
line.long 0x4 "BDW_PORT_456,Current/Maximum Bandwidth Port 4-5-6 Register"
hexmask.long.byte 0x4 16.--22. 1. "BDW_P6,Current/Maximum Bandwidth from Port 4-5-6"
newline
hexmask.long.byte 0x4 8.--14. 1. "BDW_P5,Current/Maximum Bandwidth from Port 4-5-6"
newline
hexmask.long.byte 0x4 0.--6. 1. "BDW_P4,Current/Maximum Bandwidth from Port 4-5-6"
group.long 0x5C++0x23
line.long 0x0 "RD_DATA_PATH,Read Data Path Register"
bitfld.long 0x0 0.--1. "SHIFT_SAMPLING,Shift Sampling Point of Data" "0: Initial sampling point.,1: Sampling point is shifted by one cycle.,2: Sampling point is shifted by two cycles.,3: Sampling point is shifted by three cycles unique.."
line.long 0x4 "MCFGR,Monitor Configuration Register"
bitfld.long 0x4 11.--13. "INFO,Information Type" "0: Information concerning the transfer with the..,1: Number of transfers on the port,2: Total latency on the port,?,4: Information concerning the transfer with the..,5: Information concerning the transfer with the..,6: Indicates the total number of cycles from..,?"
newline
bitfld.long 0x4 10. "REFR_CALIB,Refresh Calibration" "0: Monitoring does not depend on Autorefresh mode..,1: Monitoring depends on Autorefresh mode.."
newline
bitfld.long 0x4 8.--9. "READ_WRITE,Read/Write Access" "0: Read and Write accesses are triggered.,1: Only Write accesses are triggered.,2: Only Read accesses are triggered.,?"
newline
bitfld.long 0x4 4. "RUN,Control Monitor" "0: Monitoring is halted. All counters are stopped.,1: Monitoring is launched."
newline
bitfld.long 0x4 1. "SOFT_RESET,Soft Reset" "0: Soft reset is not performed.,1: Soft reset is performed."
newline
bitfld.long 0x4 0. "EN_MONI,Enable Monitor" "0: Monitor is disabled.,1: Monitor is enabled."
line.long 0x8 "MADDR0,Monitor Address High/Low Port 0 Register"
hexmask.long.word 0x8 16.--31. 1. "ADDR_HIGH_PORT0,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0x8 0.--15. 1. "ADDR_LOW_PORT0,Address Low on Port [x = 0..6]"
line.long 0xC "MADDR1,Monitor Address High/Low Port 1 Register"
hexmask.long.word 0xC 16.--31. 1. "ADDR_HIGH_PORT1,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0xC 0.--15. 1. "ADDR_LOW_PORT1,Address Low on Port [x = 0..6]"
line.long 0x10 "MADDR2,Monitor Address High/Low Port 2 Register"
hexmask.long.word 0x10 16.--31. 1. "ADDR_HIGH_PORT2,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0x10 0.--15. 1. "ADDR_LOW_PORT2,Address Low on Port [x = 0..6]"
line.long 0x14 "MADDR3,Monitor Address High/Low Port 3 Register"
hexmask.long.word 0x14 16.--31. 1. "ADDR_HIGH_PORT3,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0x14 0.--15. 1. "ADDR_LOW_PORT3,Address Low on Port [x = 0..6]"
line.long 0x18 "MADDR4,Monitor Address High/Low Port 4 Register"
hexmask.long.word 0x18 16.--31. 1. "ADDR_HIGH_PORT4,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0x18 0.--15. 1. "ADDR_LOW_PORT4,Address Low on Port [x = 0..6]"
line.long 0x1C "MADDR5,Monitor Address High/Low Port 5 Register"
hexmask.long.word 0x1C 16.--31. 1. "ADDR_HIGH_PORT5,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0x1C 0.--15. 1. "ADDR_LOW_PORT5,Address Low on Port [x = 0..6]"
line.long 0x20 "MADDR6,Monitor Address High/Low Port 6 Register"
hexmask.long.word 0x20 16.--31. 1. "ADDR_HIGH_PORT6,Address High on Port [x = 0..6]"
newline
hexmask.long.word 0x20 0.--15. 1. "ADDR_LOW_PORT6,Address Low on Port [x = 0..6]"
rgroup.long 0x84++0x3
line.long 0x0 "MINFO0_MAX_WAIT_MODE,Monitor Information Port 0 Register"
bitfld.long 0x0 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x0 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x0 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x0 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x0 0.--15. 1. "MAX_PORT0_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x84++0x3
line.long 0x0 "MINFO0_NB_TRANSFERS_MODE,Monitor Information Port 0 Register"
hexmask.long 0x0 0.--31. 1. "P0_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x84++0x3
line.long 0x0 "MINFO0_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 0 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x84++0x3
line.long 0x0 "MINFO0_TOTAL_LATENCY_MODE,Monitor Information Port 0 Register"
hexmask.long 0x0 0.--31. 1. "P0_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x84++0x3
line.long 0x0 "MINFO0_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 0 Register"
hexmask.long.word 0x0 16.--31. 1. "P0_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P0_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x84++0x7
line.long 0x0 "MINFO0_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 0 Register"
hexmask.long.word 0x0 16.--31. 1. "P0_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P0_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
line.long 0x4 "MINFO1_MAX_WAIT_MODE,Monitor Information Port 1 Register"
bitfld.long 0x4 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x4 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x4 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x4 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x4 0.--15. 1. "MAX_PORT1_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x88++0x3
line.long 0x0 "MINFO1_NB_TRANSFERS_MODE,Monitor Information Port 1 Register"
hexmask.long 0x0 0.--31. 1. "P1_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x88++0x3
line.long 0x0 "MINFO1_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 1 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x88++0x3
line.long 0x0 "MINFO1_TOTAL_LATENCY_MODE,Monitor Information Port 1 Register"
hexmask.long 0x0 0.--31. 1. "P1_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x88++0x3
line.long 0x0 "MINFO1_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 1 Register"
hexmask.long.word 0x0 16.--31. 1. "P1_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P1_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x88++0x7
line.long 0x0 "MINFO1_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 1 Register"
hexmask.long.word 0x0 16.--31. 1. "P1_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P1_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
line.long 0x4 "MINFO2_MAX_WAIT_MODE,Monitor Information Port 2 Register"
bitfld.long 0x4 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x4 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x4 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x4 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x4 0.--15. 1. "MAX_PORT2_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x8C++0x3
line.long 0x0 "MINFO2_NB_TRANSFERS_MODE,Monitor Information Port 2 Register"
hexmask.long 0x0 0.--31. 1. "P2_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x8C++0x3
line.long 0x0 "MINFO2_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 2 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x8C++0x3
line.long 0x0 "MINFO2_TOTAL_LATENCY_MODE,Monitor Information Port 2 Register"
hexmask.long 0x0 0.--31. 1. "P2_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x8C++0x3
line.long 0x0 "MINFO2_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 2 Register"
hexmask.long.word 0x0 16.--31. 1. "P2_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P2_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x8C++0x7
line.long 0x0 "MINFO2_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 2 Register"
hexmask.long.word 0x0 16.--31. 1. "P2_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P2_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
line.long 0x4 "MINFO3_MAX_WAIT_MODE,Monitor Information Port 3 Register"
bitfld.long 0x4 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x4 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x4 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x4 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x4 0.--15. 1. "MAX_PORT3_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x90++0x3
line.long 0x0 "MINFO3_NB_TRANSFERS_MODE,Monitor Information Port 3 Register"
hexmask.long 0x0 0.--31. 1. "P3_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x90++0x3
line.long 0x0 "MINFO3_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 3 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x90++0x3
line.long 0x0 "MINFO3_TOTAL_LATENCY_MODE,Monitor Information Port 3 Register"
hexmask.long 0x0 0.--31. 1. "P3_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x90++0x3
line.long 0x0 "MINFO3_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 3 Register"
hexmask.long.word 0x0 16.--31. 1. "P3_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P3_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x90++0x7
line.long 0x0 "MINFO3_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 3 Register"
hexmask.long.word 0x0 16.--31. 1. "P3_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P3_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
line.long 0x4 "MINFO4_MAX_WAIT_MODE,Monitor Information Port 4 Register"
bitfld.long 0x4 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x4 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x4 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x4 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x4 0.--15. 1. "MAX_PORT4_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x94++0x3
line.long 0x0 "MINFO4_NB_TRANSFERS_MODE,Monitor Information Port 4 Register"
hexmask.long 0x0 0.--31. 1. "P4_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x94++0x3
line.long 0x0 "MINFO4_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 4 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x94++0x3
line.long 0x0 "MINFO4_TOTAL_LATENCY_MODE,Monitor Information Port 4 Register"
hexmask.long 0x0 0.--31. 1. "P4_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x94++0x3
line.long 0x0 "MINFO4_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 4 Register"
hexmask.long.word 0x0 16.--31. 1. "P4_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P4_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x94++0x7
line.long 0x0 "MINFO4_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 4 Register"
hexmask.long.word 0x0 16.--31. 1. "P4_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P4_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
line.long 0x4 "MINFO5_MAX_WAIT_MODE,Monitor Information Port 5 Register"
bitfld.long 0x4 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x4 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x4 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x4 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x4 0.--15. 1. "MAX_PORT5_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x98++0x3
line.long 0x0 "MINFO5_NB_TRANSFERS_MODE,Monitor Information Port 5 Register"
hexmask.long 0x0 0.--31. 1. "P5_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x98++0x3
line.long 0x0 "MINFO5_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 5 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x98++0x3
line.long 0x0 "MINFO5_TOTAL_LATENCY_MODE,Monitor Information Port 5 Register"
hexmask.long 0x0 0.--31. 1. "P5_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x98++0x3
line.long 0x0 "MINFO5_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 5 Register"
hexmask.long.word 0x0 16.--31. 1. "P5_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P5_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x98++0x7
line.long 0x0 "MINFO5_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 5 Register"
hexmask.long.word 0x0 16.--31. 1. "P5_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P5_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
line.long 0x4 "MINFO6_MAX_WAIT_MODE,Monitor Information Port 6 Register"
bitfld.long 0x4 25.--26. "LQOS,Value of Quality Of Service on Port [x = 0..6]" "0: Background transfers,1: Bandwidth sensitive,2: Latency sensitive,3: Latency critical"
newline
bitfld.long 0x4 24. "READ_WRITE,Read or Write Access on Port [x = 0..6]" "0: Read transfer.,1: Write transfer."
newline
bitfld.long 0x4 20.--22. "SIZE,Transfer Size on Port [x = 0..6]" "0: Byte transfer,1: Halfword transfer,2: Word transfer,3: Dword transfer,?,?,?,?"
newline
bitfld.long 0x4 16.--18. "BURST,Type of Burst on Port [x = 0..6]" "0: Single transfer,1: Incrementing burst of unspecified length,2: 4-beat wrapping burst,3: 4-beat incrementing burst,4: 8-beat wrapping burst,5: 8-beat incrementing burst,6: 16-beat wrapping burst,7: 16-beat incrementing burst"
newline
hexmask.long.word 0x4 0.--15. 1. "MAX_PORT6_WAITING,Address High on Port [x = 0..6]"
rgroup.long 0x9C++0x3
line.long 0x0 "MINFO6_NB_TRANSFERS_MODE,Monitor Information Port 6 Register"
hexmask.long 0x0 0.--31. 1. "P6_NB_TRANSFERS,Number of Transfers on Port [x = 0..6]"
rgroup.long 0x9C++0x3
line.long 0x0 "MINFO6_TOTAL_CYCLE_COUNT_MODE,Monitor Information Port 6 Register"
hexmask.long 0x0 0.--31. 1. "TOTAL_CYCLE_COUNT,Total Cycle Count"
rgroup.long 0x9C++0x3
line.long 0x0 "MINFO6_TOTAL_LATENCY_MODE,Monitor Information Port 6 Register"
hexmask.long 0x0 0.--31. 1. "P6_TOTAL_LATENCY,Total Latency on Port [x = 0..6]"
rgroup.long 0x9C++0x3
line.long 0x0 "MINFO6_TOTAL_LATENCY_QOS01_MODE,Monitor Information Port 6 Register"
hexmask.long.word 0x0 16.--31. 1. "P6_TOTAL_LATENCY_QOS1,Total Latency on Port [x = 0..6] when value of qos is 1"
newline
hexmask.long.word 0x0 0.--15. 1. "P6_TOTAL_LATENCY_QOS0,Total Latency on Port [x = 0..6] when value of qos is 0"
rgroup.long 0x9C++0x3
line.long 0x0 "MINFO6_TOTAL_LATENCY_QOS23_MODE,Monitor Information Port 6 Register"
hexmask.long.word 0x0 16.--31. 1. "P6_TOTAL_LATENCY_QOS3,Total Latency on Port [x = 0..6] when value of qos is 3"
newline
hexmask.long.word 0x0 0.--15. 1. "P6_TOTAL_LATENCY_QOS2,Total Latency on Port [x = 0..6] when value of qos is 2"
wgroup.long 0xC0++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 1. "RD_ERR,Read Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "SEC,Security and /or Safety Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 1. "RD_ERR,Read Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "SEC,Security and /or Safety Interrupt Disable" "0,1"
rgroup.long 0xC8++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 1. "RD_ERR,Read Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "SEC,Security and /or Safety Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 1. "RD_ERR,Read Error" "0: There is no error during memory check.,1: There is one error during memory check."
newline
bitfld.long 0x4 0. "SEC,Security and /or Safety Event" "0: There is no security report in MPDDRC_WPSR.,1: One security flag is set in MPDDRC_WPSR."
group.long 0xD0++0x3
line.long 0x0 "SAFETY,Safety Register"
bitfld.long 0x0 28. "EN,Enable Periodic Check of Memory Device" "0: Memory check is disabled.,1: Memory check is enabled."
newline
hexmask.long 0x0 0.--27. 1. "ADDRESS,Memory Device Address"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interruption Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: An access is performed into some registers after.."
newline
bitfld.long 0x0 24.--25. "SWETYP,Software Error Type (cleared on read)" "0: A write-only register has been read (warning).,1: MPDDRC is enabled and a write access has been..,2: Access to an undefined address (warning).,3: Abnormal use of MPDDRC user interface when.."
newline
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
newline
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
newline
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
newline
bitfld.long 0x0 0. "WPVS,Write Protection Enable" "0: No write protection violation occurred since the..,1: A write protection violation occurred since the.."
tree.end
tree "OTPC (OTP Memory Controller)"
base ad:0xEFF00000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
hexmask.long.word 0x0 16.--31. 1. "KEY,Programming Key"
bitfld.long 0x0 15. "REFRESH,Refresh the Area" "0: No effect.,1: Starts a refresh of the area."
newline
bitfld.long 0x0 12. "REPAIR,Live Repair" "0: No effect.,1: Starts the OTP live repair."
bitfld.long 0x0 9. "KBSTOP,Key Bus Transfer Stop" "0: No effect.,1: Stops an on-going transfer on the Master Key bus."
newline
bitfld.long 0x0 8. "KBSTART,Key Bus Transfer Start" "0: No effect.,1: Starts a transfer through the Master Key bus."
bitfld.long 0x0 7. "FLUSH,Flush Temporary Registers" "0: No effect.,1: Starts a flush of the temporary registers used.."
newline
bitfld.long 0x0 6. "READ,Read Packet" "0: No effect.,1: Starts a read sequence of the selected packet."
bitfld.long 0x0 4. "HIDE,Hide Packet" "0: No effect.,1: The selected packet is not readable anymore.."
newline
bitfld.long 0x0 2. "INVLD,Invalidate Packet" "0: No effect.,1: Invalidates the selected packet."
bitfld.long 0x0 1. "CKSGEN,Generate Checksum" "0: No effect.,1: Generates and programs the selected packet.."
newline
bitfld.long 0x0 0. "PGM,Program Packet" "0: No effect.,1: The selected packet is written."
group.long 0x4++0x7
line.long 0x0 "MR,Mode Register"
hexmask.long.word 0x0 16.--31. 1. "ADDR,Address"
bitfld.long 0x0 15. "LOCK,Lock Register" "0: The OTPC_MR register is unlocked; write access..,1: The OTPC_MR register is locked; write access.."
newline
bitfld.long 0x0 12. "KBDST,Key Bus Destination" "0: The TDES is the destination of the key transfer.,1: The AES is the destination of the key transfer."
bitfld.long 0x0 9. "WRDIS,Write Disable" "0: The write capability of the OTPC_DR register is..,1: The write capability of the OTPC_DR register is.."
newline
bitfld.long 0x0 8. "RDDIS,Read Disable" "0: The read capability of the OTPC_HR and OTPC_DR..,1: The read capability of the OTPC_HR and OTPC_DR.."
bitfld.long 0x0 7. "EMUL,Emulation Enable" "0: The Emulation mode of the User area is disabled..,1: The Emulation mode of the User area is enabled.."
newline
bitfld.long 0x0 4. "NPCKT,New Packet" "0: Updates the packet defined at the ADDR address.,1: Creates a new packet."
bitfld.long 0x0 0. "UHCRRDIS,User Hardware Configuration Register Read Disable" "0: The User Hardware Configuration register can be..,1: The User Hardware Configuration register cannot.."
line.long 0x4 "AR,Address Register"
bitfld.long 0x4 16. "INCRT,Increment Type" "0: Increment DADDR after a read of OTPC_DR.,1: Increment DADDR after a write of OTPC_DR."
hexmask.long.byte 0x4 0.--7. 1. "DADDR,Data Address"
rgroup.long 0xC++0x3
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 15. "MNT,Maintenance On-Going" "0: The OTP live repair is not running.,1: The OTP live repair is running OTP maintenance.."
bitfld.long 0x0 9. "ONEF,One Found" "0: No bit at '1' found during the last packet read.,1: At least one '1' has been found during the last.."
newline
bitfld.long 0x0 8. "HIDE,Hiding On-Going" "0: No packet hiding is on-going.,1: A packet hiding is on-going."
bitfld.long 0x0 7. "FLUSH,Flush On-Going" "0: The temporary registers are not flushed.,1: The temporary registers are being flushed."
newline
bitfld.long 0x0 6. "READ,Read On-Going" "0: No packet read is on-going.,1: A packet read is running."
bitfld.long 0x0 5. "SKBB,Slave Key Bus Busy" "0: The Slave Key bus is not busy.,1: The Slave Key bus is busy."
newline
bitfld.long 0x0 4. "MKBB,Master Key Bus Busy" "0: The Master Key bus is not busy.,1: The Master Key bus is busy."
bitfld.long 0x0 3. "EMUL,Emulation Enabled" "0: The User area Emulation mode is disabled.,1: The User area Emulation mode is enabled."
newline
bitfld.long 0x0 2. "INVLD,Invalidation On-Going" "0: No packet invalidation is on-going.,1: A packet invalidation is running."
bitfld.long 0x0 1. "LOCK,Lock On-Going" "0: No packet locking is on-going.,1: A packet locking is running."
newline
bitfld.long 0x0 0. "PGM,Programming On-Going" "0: No packet programming is on-going.,1: A packet programming is running."
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 28. "SECE,Security and/or Safety Event Interrupt Enable" "0,1"
bitfld.long 0x0 16. "KBERR,Key Bus Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 14. "HDERR,Hide Error Interrupt Enable" "0,1"
bitfld.long 0x0 13. "COERR,Corruption Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 12. "CKERR,Checksum Check Error Interrupt Enable" "0,1"
bitfld.long 0x0 11. "EORF,End Of Refresh Interrupt Enable" "0,1"
newline
bitfld.long 0x0 10. "EOH,End Of Hide Interrupt Enable" "0,1"
bitfld.long 0x0 9. "EOF,End Of Flush Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "EOR,End Of Read Interrupt Enable" "0,1"
bitfld.long 0x0 7. "WERR,Write Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 6. "IVERR,Invalidation Error Interrupt Enable" "0,1"
bitfld.long 0x0 5. "LKERR,Locking Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 4. "PGERR,Programming Error Interrupt Enable" "0,1"
bitfld.long 0x0 3. "EOKT,End Of Key Transfer Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "EOI,End Of Invalidation Interrupt Enable" "0,1"
bitfld.long 0x0 1. "EOL,End Of Locking Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "EOP,End Of Programming Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 28. "SECE,Security and/or Safety Event Interrupt Disable" "0,1"
bitfld.long 0x4 16. "KBERR,Key Bus Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 14. "HDERR,Hide Error Interrupt Disable" "0,1"
bitfld.long 0x4 13. "COERR,Corruption Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 12. "CKERR,Checksum Check Error Interrupt Disable" "0,1"
bitfld.long 0x4 11. "EORF,End Of Refresh Interrupt Disable" "0,1"
newline
bitfld.long 0x4 10. "EOH,End Of Hide Interrupt Disable" "0,1"
bitfld.long 0x4 9. "EOF,End Of Flush Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "EOR,End Of Read Interrupt Disable" "0,1"
bitfld.long 0x4 7. "WERR,Write Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 6. "IVERR,Invalidation Error Interrupt Disable" "0,1"
bitfld.long 0x4 5. "LKERR,Locking Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 4. "PGERR,Programming Error Interrupt Disable" "0,1"
bitfld.long 0x4 3. "EOKT,End Of Key Transfer Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "EOI,End Of Invalidation Interrupt Disable" "0,1"
bitfld.long 0x4 1. "EOL,End Of Locking Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "EOP,End Of Programming Interrupt Disable" "0,1"
rgroup.long 0x18++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 28. "SECE,Security and/or Safety Event Interrupt Mask" "0,1"
bitfld.long 0x0 16. "KBERR,Key Bus Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "HDERR,Hide Error Interrupt Mask" "0,1"
bitfld.long 0x0 13. "COERR,Corruption Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "CKERR,Checksum Check Error Interrupt Mask" "0,1"
bitfld.long 0x0 11. "EORF,End Of Refresh Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "EOH,End Of Hide Interrupt Mask" "0,1"
bitfld.long 0x0 9. "EOF,End Of Flush Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "EOR,End Of Read Interrupt Mask" "0,1"
bitfld.long 0x0 7. "WERR,Write Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 6. "IVERR,Invalidation Error Interrupt Mask" "0,1"
bitfld.long 0x0 5. "LKERR,Locking Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 4. "PGERR,Programming Error Interrupt Mask" "0,1"
bitfld.long 0x0 3. "EOKT,End Of Key Transfer Interrupt Mask" "0,1"
newline
bitfld.long 0x0 2. "EOI,End Of Invalidation Interrupt Mask" "0,1"
bitfld.long 0x0 1. "EOL,End Of Locking Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "EOP,End Of Programming Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 28. "SECE,Security and/or Safety Event (cleared on read)" "0: No security or safety event occurred since the..,1: One or more safety or security event occurred.."
bitfld.long 0x4 16. "KBERR,Key Bus Error (cleared on read)" "0: No error happened on the Key bus since the last..,1: An error happened on the Key bus since the last.."
newline
bitfld.long 0x4 14. "HDERR,Hide Error (cleared on read)" "0: No hiding error occurred since the last read of..,1: A hiding error occurred since the last read of.."
bitfld.long 0x4 13. "COERR,Corruption Error (cleared on read)" "0: No corruption occurred during the last start-up..,1: A corruption occurred since the last read of.."
newline
bitfld.long 0x4 12. "CKERR,Checksum Check Error (cleared on read)" "0: No checksum check failure occurred during last..,1: A checksum check failure occurred since the last.."
bitfld.long 0x4 11. "EORF,End Of Refresh (cleared on read)" "0: No refresh sequence completion since the last..,1: At least one refresh sequence completion since.."
newline
bitfld.long 0x4 10. "EOH,End Of Hide (cleared on read)" "0: No hiding sequence completion since the last..,1: At least one hiding sequence completion since.."
bitfld.long 0x4 9. "EOF,End Of Flush (cleared on read)" "0: No flush of the temporary registers since the..,1: At least one flush hof the temporary registers.."
newline
bitfld.long 0x4 8. "EOR,End Of Read (cleared on read)" "0: No reading sequence completion since the last..,1: At least one reading sequence completion since.."
bitfld.long 0x4 7. "WERR,Write Error (cleared on read)" "0: No write error occurred since the last read of..,1: A write error occurred since the last read of.."
newline
bitfld.long 0x4 6. "IVERR,Invalidation Error (cleared on read)" "0: No invalidation failure occurred during last..,1: A invalidation failure occurred since the last.."
bitfld.long 0x4 5. "LKERR,Locking Error (cleared on read)" "0: No locking failure occurred during last locking..,1: A locking failure occurred since the last read.."
newline
bitfld.long 0x4 4. "PGERR,Programming Error (cleared on read)" "0: No programming failure occurred during last..,1: A programming failure occurred since the last.."
bitfld.long 0x4 3. "EOKT,End Of Key Transfer (cleared on read)" "0: No key transfer completion since the last read..,1: At least one key transfer has been completed on.."
newline
bitfld.long 0x4 2. "EOI,End Of Invalidation (cleared on read)" "0: No invalidation sequence completion since the..,1: At least one invalidation sequence completion.."
bitfld.long 0x4 1. "EOL,End Of Locking (cleared on read)" "0: No locking sequence completion since the last..,1: At least one locking sequence completion since.."
newline
bitfld.long 0x4 0. "EOP,End Of Programming (cleared on read)" "0: No programming sequence completion since the..,1: At least one programming sequence completion.."
group.long 0x20++0x7
line.long 0x0 "HR,Header Register"
hexmask.long.word 0x0 16.--31. 1. "CHECKSUM,Packet Checksum"
hexmask.long.byte 0x0 8.--15. 1. "SIZE,Packet Size"
newline
bitfld.long 0x0 7. "ONE,One" "0,1"
bitfld.long 0x0 4.--5. "INVLD,Invalid Status" "0,1,2,3"
newline
bitfld.long 0x0 3. "LOCK,Lock Status" "0: The packet is not locked.,1: The packet is locked."
bitfld.long 0x0 0.--2. "PACKET,Packet Type" "?,1: Regular packet accessible through the User..,2: Key packet accessible only through the Key Buses,3: Boot Configuration packet,4: Secure Boot Configuration packet,5: Hardware Configuration packet,6: Custom packet,?"
line.long 0x4 "DR,Data Register"
hexmask.long 0x4 0.--31. 1. "DATA,Packet Data"
rgroup.long 0x30++0x7
line.long 0x0 "BAR,Boot Addresses Register"
hexmask.long.word 0x0 16.--31. 1. "SBCADDR,Secure Boot Configuration Address"
hexmask.long.word 0x0 0.--15. 1. "BCADDR,Boot Configuration Address"
line.long 0x4 "CAR,Custom Address Register"
hexmask.long.word 0x4 0.--15. 1. "CADDR,Custom Address"
group.long 0x40++0x3
line.long 0x0 "LRMR,Live Repair Mode Register"
hexmask.long.word 0x0 16.--31. 1. "KEY,Programming Key"
bitfld.long 0x0 4. "EN,Automatic Live Repair Enable" "0: The automatic start of OTP live repair is..,1: The automatic start of OTP live repair is enabled."
newline
bitfld.long 0x0 0.--1. "FREQ,Automatic Live Repair Frequency" "0: The live repair is started every day,1: The live repair is started every 4 days,2: The live repair is started every 8 days,3: The live repair is started every 16 days"
rgroup.long 0x50++0x7
line.long 0x0 "UHC0R,User Hardware Configuration 0 Register"
hexmask.long.byte 0x0 0.--7. 1. "JTAGDIS,JTAG Disable"
line.long 0x4 "UHC1R,User Hardware Configuration 1 Register"
bitfld.long 0x4 17. "URFDIS,User Refresh Disable" "0: The OTPC_CR.REFRESH bit is fully functional.,1: The OTPC_CR.REFRESH bit is only functional in.."
bitfld.long 0x4 16. "CPGDIS,Custom Packet Program Disable" "0: The programming of Custom Special Packet is..,1: The programming of Custom Special Packet is.."
newline
bitfld.long 0x4 15. "CLKDIS,Custom Packet Lock Disable" "0: The generation of the checksum (lock) of the..,1: The generation of the checksum (lock) of the.."
bitfld.long 0x4 14. "CINVDIS,Custom Packet Invalidation Disable" "0: The invalidation of the Custom Special Packet is..,1: The invalidation of the Custom Special Packet is.."
newline
bitfld.long 0x4 10. "SBCPGDIS,Secure Boot Configuration Packet Program Disable" "0: The programming of Secure Boot Configuration..,1: The programming of Secure Boot Configuration.."
bitfld.long 0x4 9. "SBCLKDIS,Secure Boot Configuration Packet Lock Disable" "0: The generation of the checksum (lock) of the..,1: The generation of the checksum (lock) of the.."
newline
bitfld.long 0x4 8. "SBCINVDIS,Secure Boot Configuration Packet Invalidation Disable" "0: The invalidation of the Secure Boot..,1: The invalidation of the Secure Boot.."
bitfld.long 0x4 7. "BCPGDIS,Boot Configuration Packet Program Disable" "0: The programming of Boot Configuration Special..,1: The programming of Boot Configuration Special.."
newline
bitfld.long 0x4 6. "BCLKDIS,Boot Configuration Packet Lock Disable" "0: The generation of the checksum (lock) of the..,1: The generation of the checksum (lock) of the.."
bitfld.long 0x4 5. "BCINVDIS,Boot Configuration Packet Invalidation Disable" "0: The invalidation of the Boot Configuration..,1: The invalidation of the Boot Configuration.."
newline
bitfld.long 0x4 4. "UHCPGDIS,User Hardware Configuration Packet Program Disable" "0: The programming of User Hardware Configuration..,1: The programming of User Hardware Configuration.."
bitfld.long 0x4 3. "UHCLKDIS,User Hardware Configuration Packet Lock Disable" "0: The generation of the checksum (lock) of the..,1: The generation of the checksum (lock) of the.."
newline
bitfld.long 0x4 2. "UHCINVDIS,User Hardware Configuration Packet Invalidation Disable" "0: The invalidation of the User Hardware..,1: The invalidation of the User Hardware.."
bitfld.long 0x4 1. "UPGDIS,User programming Disable" "0: The OTPC_CR.PGM bit is fully functional.,1: The OTPC_CR.PGM bit is not functional."
newline
bitfld.long 0x4 0. "URDDIS,User Read Disable" "0: The OTPC_CR.READ bit is fully functional.,1: The OTPC_CR.READ bit is not functional."
rgroup.long 0x60++0xF
line.long 0x0 "UID0R,Product UID 0 Register"
hexmask.long 0x0 0.--31. 1. "UID,Unique Product ID"
line.long 0x4 "UID1R,Product UID 1 Register"
hexmask.long 0x4 0.--31. 1. "UID,Unique Product ID"
line.long 0x8 "UID2R,Product UID 2 Register"
hexmask.long 0x8 0.--31. 1. "UID,Unique Product ID"
line.long 0xC "UID3R,Product UID 3 Register"
hexmask.long 0xC 0.--31. 1. "UID,Unique Product ID"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCTEN,Write Protection Control Enable" "0: Disables the write protection of the control if..,1: Enables the write protection of the control if.."
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection of the..,1: Enables the write protection of the interruption.."
newline
bitfld.long 0x0 0. "WPCFEN,Write Protection Configuration Enable" "0: Disables the write protection of the..,1: Enables the write protection of the.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class" "0: An abnormal access that does not have any impact.,1: An abnormal access that may have an impact."
hexmask.long.byte 0x0 24.--27. 1. "SWETYP,Software Error Type"
newline
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: No clock glitch has occurred since the last read..,1: A clock glitch has occurred since the last read.."
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "PIO (Parallel Input/Output Controller)"
base ad:0x0
tree "PIOA"
base ad:0xFFFFF400
wgroup.long 0x0++0x7
line.long 0x0 "PER,PIO Enable Register"
bitfld.long 0x0 31. "P31,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 30. "P30,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 29. "P29,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 28. "P28,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 27. "P27,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 26. "P26,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 25. "P25,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 24. "P24,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 23. "P23,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 22. "P22,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 21. "P21,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 20. "P20,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 19. "P19,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 18. "P18,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 17. "P17,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 16. "P16,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 15. "P15,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 14. "P14,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 13. "P13,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 12. "P12,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 11. "P11,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 10. "P10,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 9. "P9,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 8. "P8,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 7. "P7,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 6. "P6,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 5. "P5,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 4. "P4,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 3. "P3,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 2. "P2,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 1. "P1,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 0. "P0,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
line.long 0x4 "PDR,PIO Disable Register"
bitfld.long 0x4 31. "P31,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 30. "P30,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 29. "P29,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 28. "P28,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 27. "P27,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 26. "P26,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 25. "P25,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 24. "P24,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 23. "P23,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 22. "P22,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 21. "P21,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 20. "P20,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 19. "P19,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 18. "P18,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 17. "P17,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 16. "P16,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 15. "P15,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 14. "P14,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 13. "P13,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 12. "P12,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 11. "P11,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 10. "P10,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 9. "P9,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 8. "P8,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 7. "P7,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 6. "P6,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 5. "P5,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 4. "P4,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 3. "P3,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 2. "P2,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 1. "P1,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 0. "P0,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
rgroup.long 0x8++0x3
line.long 0x0 "PSR,PIO Status Register"
bitfld.long 0x0 31. "P31,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 30. "P30,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 29. "P29,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 28. "P28,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 27. "P27,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 26. "P26,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 25. "P25,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 24. "P24,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 23. "P23,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 22. "P22,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 21. "P21,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 20. "P20,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 19. "P19,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 18. "P18,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 17. "P17,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 16. "P16,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 15. "P15,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 14. "P14,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 13. "P13,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 12. "P12,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 11. "P11,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 10. "P10,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 9. "P9,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 8. "P8,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 7. "P7,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 6. "P6,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 5. "P5,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 4. "P4,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 3. "P3,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 2. "P2,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 1. "P1,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 0. "P0,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
wgroup.long 0x10++0x7
line.long 0x0 "OER,Output Enable Register"
bitfld.long 0x0 31. "P31,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 30. "P30,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 28. "P28,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 26. "P26,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 24. "P24,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 22. "P22,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 20. "P20,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 18. "P18,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 16. "P16,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 14. "P14,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 12. "P12,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 10. "P10,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 8. "P8,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 6. "P6,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 4. "P4,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 2. "P2,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 0. "P0,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
line.long 0x4 "ODR,Output Disable Register"
bitfld.long 0x4 31. "P31,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 30. "P30,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 28. "P28,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 26. "P26,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 24. "P24,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 22. "P22,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 20. "P20,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 18. "P18,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 16. "P16,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 14. "P14,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 12. "P12,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 10. "P10,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 8. "P8,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 6. "P6,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 4. "P4,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 2. "P2,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 0. "P0,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
rgroup.long 0x18++0x3
line.long 0x0 "OSR,Output Status Register"
bitfld.long 0x0 31. "P31,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 30. "P30,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 29. "P29,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 28. "P28,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 27. "P27,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 26. "P26,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 25. "P25,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 24. "P24,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 23. "P23,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 22. "P22,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 21. "P21,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 20. "P20,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 19. "P19,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 18. "P18,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 17. "P17,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 16. "P16,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 15. "P15,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 14. "P14,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 13. "P13,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 12. "P12,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 11. "P11,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 10. "P10,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 9. "P9,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 8. "P8,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 7. "P7,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 6. "P6,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 5. "P5,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 4. "P4,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 3. "P3,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 2. "P2,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 1. "P1,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 0. "P0,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
wgroup.long 0x20++0x7
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
bitfld.long 0x0 31. "P31,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 30. "P30,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 28. "P28,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 26. "P26,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 24. "P24,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 22. "P22,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 20. "P20,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 18. "P18,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 16. "P16,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 14. "P14,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 12. "P12,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 10. "P10,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 8. "P8,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 6. "P6,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 4. "P4,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 2. "P2,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 0. "P0,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
bitfld.long 0x4 31. "P31,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 30. "P30,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 29. "P29,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 28. "P28,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 27. "P27,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 26. "P26,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 25. "P25,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 24. "P24,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 23. "P23,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 22. "P22,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 21. "P21,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 20. "P20,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 19. "P19,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 18. "P18,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 17. "P17,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 16. "P16,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 15. "P15,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 14. "P14,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 13. "P13,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 12. "P12,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 11. "P11,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 10. "P10,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 9. "P9,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 8. "P8,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 7. "P7,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 6. "P6,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 5. "P5,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 4. "P4,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 3. "P3,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 2. "P2,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 1. "P1,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 0. "P0,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
rgroup.long 0x28++0x3
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
bitfld.long 0x0 31. "P31,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 30. "P30,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 29. "P29,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 28. "P28,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 27. "P27,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 26. "P26,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 25. "P25,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 24. "P24,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 23. "P23,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 22. "P22,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 20. "P20,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 19. "P19,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 18. "P18,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 17. "P17,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 16. "P16,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 15. "P15,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 14. "P14,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 12. "P12,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 11. "P11,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 10. "P10,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 8. "P8,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 7. "P7,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 6. "P6,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 5. "P5,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 4. "P4,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 2. "P2,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 0. "P0,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
wgroup.long 0x30++0x7
line.long 0x0 "SODR,Set Output Data Register"
bitfld.long 0x0 31. "P31,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 30. "P30,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 29. "P29,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 28. "P28,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 27. "P27,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 26. "P26,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 25. "P25,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 24. "P24,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 23. "P23,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 22. "P22,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 21. "P21,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 20. "P20,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 19. "P19,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 18. "P18,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 17. "P17,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 16. "P16,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 15. "P15,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 14. "P14,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 13. "P13,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 12. "P12,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 11. "P11,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 10. "P10,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 9. "P9,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 8. "P8,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 7. "P7,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 6. "P6,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 5. "P5,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 4. "P4,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 3. "P3,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 2. "P2,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 1. "P1,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 0. "P0,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
line.long 0x4 "CODR,Clear Output Data Register"
bitfld.long 0x4 31. "P31,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 30. "P30,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 29. "P29,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 28. "P28,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 27. "P27,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 26. "P26,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 25. "P25,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 24. "P24,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 23. "P23,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 22. "P22,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 21. "P21,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 20. "P20,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 19. "P19,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 18. "P18,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 17. "P17,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 16. "P16,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 15. "P15,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 14. "P14,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 13. "P13,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 12. "P12,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 11. "P11,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 10. "P10,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 9. "P9,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 8. "P8,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 7. "P7,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 6. "P6,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 5. "P5,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 4. "P4,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 3. "P3,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 2. "P2,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 1. "P1,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 0. "P0,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
group.long 0x38++0x3
line.long 0x0 "ODSR,Output Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 29. "P29,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 27. "P27,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 25. "P25,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 23. "P23,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 21. "P21,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 19. "P19,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 17. "P17,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 15. "P15,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 13. "P13,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 11. "P11,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 9. "P9,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 7. "P7,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 5. "P5,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 3. "P3,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 1. "P1,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
rgroup.long 0x3C++0x3
line.long 0x0 "PDSR,Pin Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 29. "P29,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 27. "P27,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 25. "P25,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 23. "P23,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 21. "P21,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 19. "P19,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 17. "P17,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 15. "P15,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 13. "P13,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 11. "P11,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 9. "P9,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 7. "P7,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 5. "P5,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 3. "P3,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 1. "P1,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
wgroup.long 0x40++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
rgroup.long 0x48++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
wgroup.long 0x50++0x7
line.long 0x0 "MDER,Multi-driver Enable Register"
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
line.long 0x4 "MDDR,Multi-driver Disable Register"
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
rgroup.long 0x58++0x3
line.long 0x0 "MDSR,Multi-driver Status Register"
bitfld.long 0x0 31. "P31,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 30. "P30,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 29. "P29,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 28. "P28,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 27. "P27,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 26. "P26,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 25. "P25,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 24. "P24,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 23. "P23,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 22. "P22,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 21. "P21,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 20. "P20,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 19. "P19,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 18. "P18,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 17. "P17,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 16. "P16,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 15. "P15,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 14. "P14,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 13. "P13,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 12. "P12,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 11. "P11,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 10. "P10,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 9. "P9,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 8. "P8,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 7. "P7,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 6. "P6,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 5. "P5,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 4. "P4,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 3. "P3,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 2. "P2,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 1. "P1,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 0. "P0,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
wgroup.long 0x60++0x7
line.long 0x0 "PUDR,Pull-Up Disable Register"
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
line.long 0x4 "PUER,Pull-Up Enable Register"
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
rgroup.long 0x68++0x3
line.long 0x0 "PUSR,Pad Pull-Up Status Register"
bitfld.long 0x0 31. "P31,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x70)++0x3
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 1"
bitfld.long 0x0 31. "P31,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 30. "P30,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 29. "P29,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 28. "P28,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 27. "P27,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 26. "P26,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 25. "P25,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 24. "P24,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 23. "P23,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 22. "P22,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 21. "P21,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 20. "P20,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 19. "P19,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 18. "P18,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 17. "P17,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 16. "P16,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 15. "P15,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 14. "P14,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 13. "P13,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 12. "P12,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 11. "P11,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 10. "P10,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 9. "P9,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 8. "P8,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 7. "P7,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 6. "P6,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 5. "P5,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 4. "P4,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 3. "P3,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 2. "P2,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 1. "P1,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 0. "P0,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
repeat.end
wgroup.long 0x80++0x7
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
rgroup.long 0x88++0x3
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
group.long 0x8C++0x3
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
wgroup.long 0x90++0x7
line.long 0x0 "PPDDR,Pad Pull-Down Disable Register"
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
line.long 0x4 "PPDER,Pad Pull-Down Enable Register"
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
rgroup.long 0x98++0x3
line.long 0x0 "PPDSR,Pad Pull-Down Status Register"
bitfld.long 0x0 31. "P31,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
wgroup.long 0xA0++0x7
line.long 0x0 "OWER,Output Write Enable"
bitfld.long 0x0 31. "P31,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 30. "P30,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 28. "P28,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 26. "P26,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 24. "P24,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 22. "P22,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 20. "P20,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 18. "P18,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 16. "P16,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 14. "P14,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 12. "P12,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 10. "P10,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 8. "P8,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 6. "P6,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 4. "P4,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 2. "P2,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 0. "P0,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
line.long 0x4 "OWDR,Output Write Disable"
bitfld.long 0x4 31. "P31,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 30. "P30,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 28. "P28,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 26. "P26,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 24. "P24,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 22. "P22,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 20. "P20,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 18. "P18,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 16. "P16,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 14. "P14,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 12. "P12,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 10. "P10,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 8. "P8,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 6. "P6,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 4. "P4,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 2. "P2,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 0. "P0,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
rgroup.long 0xA8++0x3
line.long 0x0 "OWSR,Output Write Status Register"
bitfld.long 0x0 31. "P31,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 30. "P30,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 28. "P28,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 26. "P26,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 24. "P24,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 22. "P22,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 20. "P20,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 18. "P18,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 16. "P16,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 14. "P14,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 12. "P12,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 10. "P10,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 8. "P8,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 6. "P6,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 4. "P4,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 2. "P2,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 0. "P0,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
wgroup.long 0xB0++0x7
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
rgroup.long 0xB8++0x3
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
bitfld.long 0x0 31. "P31,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 30. "P30,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 29. "P29,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 28. "P28,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 27. "P27,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 26. "P26,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 25. "P25,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 24. "P24,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 23. "P23,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 22. "P22,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 21. "P21,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 20. "P20,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 19. "P19,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 18. "P18,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 17. "P17,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 16. "P16,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 15. "P15,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 14. "P14,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 13. "P13,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 12. "P12,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 11. "P11,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 10. "P10,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 9. "P9,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 8. "P8,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 7. "P7,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 6. "P6,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 5. "P5,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 4. "P4,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 3. "P3,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 2. "P2,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 1. "P1,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 0. "P0,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
wgroup.long 0xC0++0x7
line.long 0x0 "ESR,Edge Select Register"
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
line.long 0x4 "LSR,Level Select Register"
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
rgroup.long 0xC8++0x3
line.long 0x0 "ELSR,Edge/Level Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
wgroup.long 0xD0++0x7
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
rgroup.long 0xD8++0x3
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
group.long 0x100++0x3
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
group.long 0x110++0x3
line.long 0x0 "SLEWR,I/O Slewrate Control Register"
bitfld.long 0x0 31. "SR31,Slewrate Control for IO line 31" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 30. "SR30,Slewrate Control for IO line 30" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 29. "SR29,Slewrate Control for IO line 29" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 28. "SR28,Slewrate Control for IO line 28" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 27. "SR27,Slewrate Control for IO line 27" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 26. "SR26,Slewrate Control for IO line 26" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 25. "SR25,Slewrate Control for IO line 25" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 24. "SR24,Slewrate Control for IO line 24" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 23. "SR23,Slewrate Control for IO line 23" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 22. "SR22,Slewrate Control for IO line 22" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 21. "SR21,Slewrate Control for IO line 21" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 20. "SR20,Slewrate Control for IO line 20" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 19. "SR19,Slewrate Control for IO line 19" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 18. "SR18,Slewrate Control for IO line 18" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 17. "SR17,Slewrate Control for IO line 17" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 16. "SR16,Slewrate Control for IO line 16" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 15. "SR15,Slewrate Control for IO line 15" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 14. "SR14,Slewrate Control for IO line 14" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 13. "SR13,Slewrate Control for IO line 13" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 12. "SR12,Slewrate Control for IO line 12" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 11. "SR11,Slewrate Control for IO line 11" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 10. "SR10,Slewrate Control for IO line 10" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 9. "SR9,Slewrate Control for IO line 9" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 8. "SR8,Slewrate Control for IO line 8" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 7. "SR7,Slewrate Control for IO line 7" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 6. "SR6,Slewrate Control for IO line 6" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 5. "SR5,Slewrate Control for IO line 5" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 4. "SR4,Slewrate Control for IO line 4" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 3. "SR3,Slewrate Control for IO line 3" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 2. "SR2,Slewrate Control for IO line 2" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 1. "SR1,Slewrate Control for IO line 1" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 0. "SR0,Slewrate Control for IO line 0" "0: No slewrate control.,1: Slewrate controlled."
group.long 0x118++0x3
line.long 0x0 "DRIVER,I/O Drive Register"
bitfld.long 0x0 31. "DR31,Drive of I/O Line 31" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 30. "DR30,Drive of I/O Line 30" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 29. "DR29,Drive of I/O Line 29" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 28. "DR28,Drive of I/O Line 28" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 27. "DR27,Drive of I/O Line 27" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 26. "DR26,Drive of I/O Line 26" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 25. "DR25,Drive of I/O Line 25" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 24. "DR24,Drive of I/O Line 24" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 23. "DR23,Drive of I/O Line 23" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 22. "DR22,Drive of I/O Line 22" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 21. "DR21,Drive of I/O Line 21" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 20. "DR20,Drive of I/O Line 20" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 19. "DR19,Drive of I/O Line 19" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 18. "DR18,Drive of I/O Line 18" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 17. "DR17,Drive of I/O Line 17" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 16. "DR16,Drive of I/O Line 16" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 15. "DR15,Drive of I/O Line 15" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 14. "DR14,Drive of I/O Line 14" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 13. "DR13,Drive of I/O Line 13" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 12. "DR12,Drive of I/O Line 12" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 11. "DR11,Drive of I/O Line 11" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 10. "DR10,Drive of I/O Line 10" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 9. "DR9,Drive of I/O Line 9" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 8. "DR8,Drive of I/O Line 8" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 7. "DR7,Drive of I/O Line 7" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 6. "DR6,Drive of I/O Line 6" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 5. "DR5,Drive of I/O Line 5" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 4. "DR4,Drive of I/O Line 4" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 3. "DR3,Drive of I/O Line 3" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 2. "DR2,Drive of I/O Line 2" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 1. "DR1,Drive of I/O Line 1" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 0. "DR0,Drive of I/O Line 0" "0: Lowest drive,1: Highest drive"
tree.end
tree "PIOB"
base ad:0xFFFFF600
wgroup.long 0x0++0x7
line.long 0x0 "PER,PIO Enable Register"
bitfld.long 0x0 31. "P31,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 30. "P30,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 29. "P29,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 28. "P28,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 27. "P27,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 26. "P26,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 25. "P25,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 24. "P24,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 23. "P23,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 22. "P22,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 21. "P21,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 20. "P20,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 19. "P19,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 18. "P18,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 17. "P17,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 16. "P16,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 15. "P15,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 14. "P14,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 13. "P13,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 12. "P12,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 11. "P11,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 10. "P10,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 9. "P9,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 8. "P8,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 7. "P7,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 6. "P6,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 5. "P5,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 4. "P4,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 3. "P3,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 2. "P2,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 1. "P1,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 0. "P0,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
line.long 0x4 "PDR,PIO Disable Register"
bitfld.long 0x4 31. "P31,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 30. "P30,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 29. "P29,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 28. "P28,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 27. "P27,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 26. "P26,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 25. "P25,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 24. "P24,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 23. "P23,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 22. "P22,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 21. "P21,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 20. "P20,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 19. "P19,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 18. "P18,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 17. "P17,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 16. "P16,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 15. "P15,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 14. "P14,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 13. "P13,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 12. "P12,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 11. "P11,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 10. "P10,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 9. "P9,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 8. "P8,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 7. "P7,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 6. "P6,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 5. "P5,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 4. "P4,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 3. "P3,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 2. "P2,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 1. "P1,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 0. "P0,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
rgroup.long 0x8++0x3
line.long 0x0 "PSR,PIO Status Register"
bitfld.long 0x0 31. "P31,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 30. "P30,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 29. "P29,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 28. "P28,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 27. "P27,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 26. "P26,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 25. "P25,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 24. "P24,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 23. "P23,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 22. "P22,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 21. "P21,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 20. "P20,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 19. "P19,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 18. "P18,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 17. "P17,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 16. "P16,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 15. "P15,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 14. "P14,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 13. "P13,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 12. "P12,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 11. "P11,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 10. "P10,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 9. "P9,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 8. "P8,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 7. "P7,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 6. "P6,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 5. "P5,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 4. "P4,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 3. "P3,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 2. "P2,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 1. "P1,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 0. "P0,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
wgroup.long 0x10++0x7
line.long 0x0 "OER,Output Enable Register"
bitfld.long 0x0 31. "P31,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 30. "P30,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 28. "P28,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 26. "P26,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 24. "P24,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 22. "P22,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 20. "P20,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 18. "P18,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 16. "P16,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 14. "P14,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 12. "P12,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 10. "P10,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 8. "P8,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 6. "P6,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 4. "P4,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 2. "P2,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 0. "P0,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
line.long 0x4 "ODR,Output Disable Register"
bitfld.long 0x4 31. "P31,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 30. "P30,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 28. "P28,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 26. "P26,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 24. "P24,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 22. "P22,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 20. "P20,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 18. "P18,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 16. "P16,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 14. "P14,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 12. "P12,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 10. "P10,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 8. "P8,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 6. "P6,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 4. "P4,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 2. "P2,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 0. "P0,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
rgroup.long 0x18++0x3
line.long 0x0 "OSR,Output Status Register"
bitfld.long 0x0 31. "P31,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 30. "P30,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 29. "P29,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 28. "P28,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 27. "P27,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 26. "P26,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 25. "P25,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 24. "P24,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 23. "P23,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 22. "P22,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 21. "P21,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 20. "P20,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 19. "P19,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 18. "P18,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 17. "P17,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 16. "P16,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 15. "P15,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 14. "P14,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 13. "P13,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 12. "P12,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 11. "P11,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 10. "P10,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 9. "P9,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 8. "P8,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 7. "P7,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 6. "P6,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 5. "P5,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 4. "P4,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 3. "P3,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 2. "P2,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 1. "P1,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 0. "P0,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
wgroup.long 0x20++0x7
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
bitfld.long 0x0 31. "P31,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 30. "P30,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 28. "P28,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 26. "P26,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 24. "P24,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 22. "P22,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 20. "P20,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 18. "P18,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 16. "P16,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 14. "P14,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 12. "P12,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 10. "P10,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 8. "P8,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 6. "P6,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 4. "P4,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 2. "P2,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 0. "P0,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
bitfld.long 0x4 31. "P31,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 30. "P30,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 29. "P29,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 28. "P28,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 27. "P27,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 26. "P26,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 25. "P25,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 24. "P24,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 23. "P23,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 22. "P22,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 21. "P21,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 20. "P20,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 19. "P19,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 18. "P18,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 17. "P17,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 16. "P16,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 15. "P15,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 14. "P14,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 13. "P13,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 12. "P12,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 11. "P11,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 10. "P10,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 9. "P9,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 8. "P8,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 7. "P7,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 6. "P6,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 5. "P5,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 4. "P4,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 3. "P3,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 2. "P2,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 1. "P1,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 0. "P0,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
rgroup.long 0x28++0x3
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
bitfld.long 0x0 31. "P31,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 30. "P30,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 29. "P29,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 28. "P28,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 27. "P27,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 26. "P26,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 25. "P25,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 24. "P24,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 23. "P23,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 22. "P22,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 20. "P20,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 19. "P19,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 18. "P18,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 17. "P17,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 16. "P16,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 15. "P15,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 14. "P14,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 12. "P12,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 11. "P11,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 10. "P10,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 8. "P8,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 7. "P7,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 6. "P6,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 5. "P5,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 4. "P4,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 2. "P2,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 0. "P0,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
wgroup.long 0x30++0x7
line.long 0x0 "SODR,Set Output Data Register"
bitfld.long 0x0 31. "P31,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 30. "P30,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 29. "P29,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 28. "P28,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 27. "P27,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 26. "P26,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 25. "P25,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 24. "P24,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 23. "P23,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 22. "P22,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 21. "P21,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 20. "P20,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 19. "P19,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 18. "P18,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 17. "P17,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 16. "P16,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 15. "P15,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 14. "P14,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 13. "P13,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 12. "P12,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 11. "P11,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 10. "P10,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 9. "P9,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 8. "P8,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 7. "P7,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 6. "P6,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 5. "P5,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 4. "P4,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 3. "P3,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 2. "P2,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
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bitfld.long 0x0 1. "P1,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 0. "P0,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
line.long 0x4 "CODR,Clear Output Data Register"
bitfld.long 0x4 31. "P31,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 30. "P30,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 29. "P29,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 28. "P28,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 27. "P27,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 26. "P26,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 25. "P25,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 24. "P24,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 23. "P23,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 22. "P22,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 21. "P21,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 20. "P20,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 19. "P19,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 18. "P18,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 17. "P17,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 16. "P16,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 15. "P15,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 14. "P14,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 13. "P13,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 12. "P12,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 11. "P11,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 10. "P10,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 9. "P9,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 8. "P8,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 7. "P7,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 6. "P6,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 5. "P5,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 4. "P4,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 3. "P3,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 2. "P2,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 1. "P1,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 0. "P0,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
group.long 0x38++0x3
line.long 0x0 "ODSR,Output Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 29. "P29,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 27. "P27,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 25. "P25,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 23. "P23,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 21. "P21,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 19. "P19,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 17. "P17,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 15. "P15,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 13. "P13,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 11. "P11,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 9. "P9,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 7. "P7,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 5. "P5,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 3. "P3,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 1. "P1,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
rgroup.long 0x3C++0x3
line.long 0x0 "PDSR,Pin Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 29. "P29,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 27. "P27,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 25. "P25,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 23. "P23,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 21. "P21,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 19. "P19,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 17. "P17,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 15. "P15,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 13. "P13,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 11. "P11,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 9. "P9,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 7. "P7,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 5. "P5,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 3. "P3,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 1. "P1,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
wgroup.long 0x40++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
rgroup.long 0x48++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
wgroup.long 0x50++0x7
line.long 0x0 "MDER,Multi-driver Enable Register"
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
line.long 0x4 "MDDR,Multi-driver Disable Register"
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
rgroup.long 0x58++0x3
line.long 0x0 "MDSR,Multi-driver Status Register"
bitfld.long 0x0 31. "P31,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 30. "P30,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 29. "P29,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 28. "P28,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 27. "P27,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 26. "P26,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 25. "P25,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 24. "P24,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 23. "P23,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 22. "P22,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 21. "P21,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 20. "P20,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 19. "P19,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 18. "P18,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 17. "P17,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 16. "P16,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 15. "P15,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 14. "P14,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 13. "P13,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 12. "P12,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 11. "P11,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 10. "P10,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 9. "P9,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 8. "P8,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 7. "P7,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 6. "P6,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 5. "P5,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 4. "P4,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 3. "P3,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 2. "P2,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 1. "P1,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 0. "P0,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
wgroup.long 0x60++0x7
line.long 0x0 "PUDR,Pull-Up Disable Register"
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
line.long 0x4 "PUER,Pull-Up Enable Register"
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
rgroup.long 0x68++0x3
line.long 0x0 "PUSR,Pad Pull-Up Status Register"
bitfld.long 0x0 31. "P31,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x70)++0x3
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 1"
bitfld.long 0x0 31. "P31,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 30. "P30,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 29. "P29,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 28. "P28,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 27. "P27,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 26. "P26,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 25. "P25,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 24. "P24,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 23. "P23,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 22. "P22,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 21. "P21,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 20. "P20,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 19. "P19,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 18. "P18,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 17. "P17,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 16. "P16,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 15. "P15,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 14. "P14,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 13. "P13,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 12. "P12,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 11. "P11,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 10. "P10,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 9. "P9,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 8. "P8,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 7. "P7,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 6. "P6,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 5. "P5,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 4. "P4,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 3. "P3,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 2. "P2,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 1. "P1,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 0. "P0,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
repeat.end
wgroup.long 0x80++0x7
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
rgroup.long 0x88++0x3
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
group.long 0x8C++0x3
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
wgroup.long 0x90++0x7
line.long 0x0 "PPDDR,Pad Pull-Down Disable Register"
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
line.long 0x4 "PPDER,Pad Pull-Down Enable Register"
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
rgroup.long 0x98++0x3
line.long 0x0 "PPDSR,Pad Pull-Down Status Register"
bitfld.long 0x0 31. "P31,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
wgroup.long 0xA0++0x7
line.long 0x0 "OWER,Output Write Enable"
bitfld.long 0x0 31. "P31,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 30. "P30,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 28. "P28,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 26. "P26,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 24. "P24,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 22. "P22,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 20. "P20,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 18. "P18,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 16. "P16,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 14. "P14,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 12. "P12,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 10. "P10,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 8. "P8,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 6. "P6,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 4. "P4,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 2. "P2,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 0. "P0,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
line.long 0x4 "OWDR,Output Write Disable"
bitfld.long 0x4 31. "P31,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 30. "P30,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 28. "P28,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 26. "P26,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 24. "P24,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 22. "P22,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 20. "P20,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 18. "P18,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 16. "P16,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 14. "P14,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 12. "P12,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 10. "P10,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 8. "P8,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 6. "P6,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 4. "P4,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 2. "P2,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 0. "P0,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
rgroup.long 0xA8++0x3
line.long 0x0 "OWSR,Output Write Status Register"
bitfld.long 0x0 31. "P31,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 30. "P30,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 28. "P28,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 26. "P26,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 24. "P24,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 22. "P22,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 20. "P20,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 18. "P18,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 16. "P16,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 14. "P14,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 12. "P12,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 10. "P10,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 8. "P8,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 6. "P6,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 4. "P4,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 2. "P2,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 0. "P0,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
wgroup.long 0xB0++0x7
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
rgroup.long 0xB8++0x3
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
bitfld.long 0x0 31. "P31,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 30. "P30,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 29. "P29,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 28. "P28,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 27. "P27,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 26. "P26,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 25. "P25,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 24. "P24,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 23. "P23,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 22. "P22,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 21. "P21,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 20. "P20,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 19. "P19,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 18. "P18,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 17. "P17,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 16. "P16,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 15. "P15,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 14. "P14,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 13. "P13,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 12. "P12,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 11. "P11,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 10. "P10,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 9. "P9,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 8. "P8,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 7. "P7,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 6. "P6,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 5. "P5,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 4. "P4,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 3. "P3,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 2. "P2,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 1. "P1,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 0. "P0,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
wgroup.long 0xC0++0x7
line.long 0x0 "ESR,Edge Select Register"
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
line.long 0x4 "LSR,Level Select Register"
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
rgroup.long 0xC8++0x3
line.long 0x0 "ELSR,Edge/Level Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
wgroup.long 0xD0++0x7
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
rgroup.long 0xD8++0x3
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
group.long 0x100++0x3
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
group.long 0x110++0x3
line.long 0x0 "SLEWR,I/O Slewrate Control Register"
bitfld.long 0x0 31. "SR31,Slewrate Control for IO line 31" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 30. "SR30,Slewrate Control for IO line 30" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 29. "SR29,Slewrate Control for IO line 29" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 28. "SR28,Slewrate Control for IO line 28" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 27. "SR27,Slewrate Control for IO line 27" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 26. "SR26,Slewrate Control for IO line 26" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 25. "SR25,Slewrate Control for IO line 25" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 24. "SR24,Slewrate Control for IO line 24" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 23. "SR23,Slewrate Control for IO line 23" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 22. "SR22,Slewrate Control for IO line 22" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 21. "SR21,Slewrate Control for IO line 21" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 20. "SR20,Slewrate Control for IO line 20" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 19. "SR19,Slewrate Control for IO line 19" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 18. "SR18,Slewrate Control for IO line 18" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 17. "SR17,Slewrate Control for IO line 17" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 16. "SR16,Slewrate Control for IO line 16" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 15. "SR15,Slewrate Control for IO line 15" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 14. "SR14,Slewrate Control for IO line 14" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 13. "SR13,Slewrate Control for IO line 13" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 12. "SR12,Slewrate Control for IO line 12" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 11. "SR11,Slewrate Control for IO line 11" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 10. "SR10,Slewrate Control for IO line 10" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 9. "SR9,Slewrate Control for IO line 9" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 8. "SR8,Slewrate Control for IO line 8" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 7. "SR7,Slewrate Control for IO line 7" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 6. "SR6,Slewrate Control for IO line 6" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 5. "SR5,Slewrate Control for IO line 5" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 4. "SR4,Slewrate Control for IO line 4" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 3. "SR3,Slewrate Control for IO line 3" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 2. "SR2,Slewrate Control for IO line 2" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 1. "SR1,Slewrate Control for IO line 1" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 0. "SR0,Slewrate Control for IO line 0" "0: No slewrate control.,1: Slewrate controlled."
group.long 0x118++0x3
line.long 0x0 "DRIVER,I/O Drive Register"
bitfld.long 0x0 31. "DR31,Drive of I/O Line 31" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 30. "DR30,Drive of I/O Line 30" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 29. "DR29,Drive of I/O Line 29" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 28. "DR28,Drive of I/O Line 28" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 27. "DR27,Drive of I/O Line 27" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 26. "DR26,Drive of I/O Line 26" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 25. "DR25,Drive of I/O Line 25" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 24. "DR24,Drive of I/O Line 24" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 23. "DR23,Drive of I/O Line 23" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 22. "DR22,Drive of I/O Line 22" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 21. "DR21,Drive of I/O Line 21" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 20. "DR20,Drive of I/O Line 20" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 19. "DR19,Drive of I/O Line 19" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 18. "DR18,Drive of I/O Line 18" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 17. "DR17,Drive of I/O Line 17" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 16. "DR16,Drive of I/O Line 16" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 15. "DR15,Drive of I/O Line 15" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 14. "DR14,Drive of I/O Line 14" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 13. "DR13,Drive of I/O Line 13" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 12. "DR12,Drive of I/O Line 12" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 11. "DR11,Drive of I/O Line 11" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 10. "DR10,Drive of I/O Line 10" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 9. "DR9,Drive of I/O Line 9" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 8. "DR8,Drive of I/O Line 8" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 7. "DR7,Drive of I/O Line 7" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 6. "DR6,Drive of I/O Line 6" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 5. "DR5,Drive of I/O Line 5" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 4. "DR4,Drive of I/O Line 4" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 3. "DR3,Drive of I/O Line 3" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 2. "DR2,Drive of I/O Line 2" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 1. "DR1,Drive of I/O Line 1" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 0. "DR0,Drive of I/O Line 0" "0: Lowest drive,1: Highest drive"
tree.end
tree "PIOC"
base ad:0xFFFFF800
wgroup.long 0x0++0x7
line.long 0x0 "PER,PIO Enable Register"
bitfld.long 0x0 31. "P31,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 30. "P30,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 29. "P29,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 28. "P28,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 27. "P27,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 26. "P26,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 25. "P25,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 24. "P24,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 23. "P23,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 22. "P22,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 21. "P21,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 20. "P20,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 19. "P19,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 18. "P18,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 17. "P17,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 16. "P16,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 15. "P15,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 14. "P14,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 13. "P13,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 12. "P12,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 11. "P11,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 10. "P10,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 9. "P9,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 8. "P8,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 7. "P7,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 6. "P6,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 5. "P5,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 4. "P4,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 3. "P3,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 2. "P2,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 1. "P1,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 0. "P0,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
line.long 0x4 "PDR,PIO Disable Register"
bitfld.long 0x4 31. "P31,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 30. "P30,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 29. "P29,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 28. "P28,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 27. "P27,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 26. "P26,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 25. "P25,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 24. "P24,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 23. "P23,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 22. "P22,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 21. "P21,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 20. "P20,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 19. "P19,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 18. "P18,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 17. "P17,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 16. "P16,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 15. "P15,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 14. "P14,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 13. "P13,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 12. "P12,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 11. "P11,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 10. "P10,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 9. "P9,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 8. "P8,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 7. "P7,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 6. "P6,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 5. "P5,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 4. "P4,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 3. "P3,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 2. "P2,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 1. "P1,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 0. "P0,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
rgroup.long 0x8++0x3
line.long 0x0 "PSR,PIO Status Register"
bitfld.long 0x0 31. "P31,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 30. "P30,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 29. "P29,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 28. "P28,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 27. "P27,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 26. "P26,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 25. "P25,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 24. "P24,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 23. "P23,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 22. "P22,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 21. "P21,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 20. "P20,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 19. "P19,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 18. "P18,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 17. "P17,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 16. "P16,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 15. "P15,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 14. "P14,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 13. "P13,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 12. "P12,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 11. "P11,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 10. "P10,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 9. "P9,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 8. "P8,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 7. "P7,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 6. "P6,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 5. "P5,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 4. "P4,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 3. "P3,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 2. "P2,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 1. "P1,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 0. "P0,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
wgroup.long 0x10++0x7
line.long 0x0 "OER,Output Enable Register"
bitfld.long 0x0 31. "P31,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 30. "P30,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 28. "P28,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 26. "P26,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 24. "P24,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 22. "P22,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 20. "P20,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 18. "P18,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 16. "P16,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 14. "P14,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 12. "P12,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 10. "P10,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 8. "P8,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 6. "P6,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 4. "P4,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 2. "P2,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 0. "P0,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
line.long 0x4 "ODR,Output Disable Register"
bitfld.long 0x4 31. "P31,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 30. "P30,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 28. "P28,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 26. "P26,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 24. "P24,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 22. "P22,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 20. "P20,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 18. "P18,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 16. "P16,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 14. "P14,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 12. "P12,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 10. "P10,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 8. "P8,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 6. "P6,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 4. "P4,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 2. "P2,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 0. "P0,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
rgroup.long 0x18++0x3
line.long 0x0 "OSR,Output Status Register"
bitfld.long 0x0 31. "P31,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 30. "P30,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 29. "P29,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 28. "P28,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 27. "P27,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 26. "P26,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 25. "P25,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 24. "P24,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 23. "P23,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 22. "P22,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 21. "P21,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 20. "P20,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 19. "P19,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 18. "P18,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 17. "P17,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 16. "P16,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 15. "P15,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 14. "P14,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 13. "P13,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 12. "P12,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 11. "P11,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 10. "P10,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 9. "P9,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 8. "P8,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 7. "P7,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 6. "P6,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 5. "P5,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 4. "P4,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 3. "P3,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 2. "P2,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 1. "P1,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 0. "P0,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
wgroup.long 0x20++0x7
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
bitfld.long 0x0 31. "P31,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 30. "P30,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 28. "P28,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 26. "P26,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 24. "P24,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 22. "P22,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 20. "P20,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 18. "P18,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 16. "P16,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 14. "P14,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 12. "P12,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 10. "P10,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 8. "P8,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 6. "P6,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 4. "P4,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 2. "P2,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 0. "P0,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
bitfld.long 0x4 31. "P31,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 30. "P30,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 29. "P29,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 28. "P28,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 27. "P27,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 26. "P26,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 25. "P25,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 24. "P24,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 23. "P23,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 22. "P22,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 21. "P21,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 20. "P20,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 19. "P19,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 18. "P18,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 17. "P17,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 16. "P16,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 15. "P15,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 14. "P14,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 13. "P13,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 12. "P12,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 11. "P11,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 10. "P10,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 9. "P9,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 8. "P8,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 7. "P7,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 6. "P6,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 5. "P5,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 4. "P4,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 3. "P3,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 2. "P2,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 1. "P1,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 0. "P0,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
rgroup.long 0x28++0x3
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
bitfld.long 0x0 31. "P31,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 30. "P30,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 29. "P29,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 28. "P28,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 27. "P27,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 26. "P26,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 25. "P25,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 24. "P24,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 23. "P23,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 22. "P22,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 20. "P20,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 19. "P19,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 18. "P18,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 17. "P17,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 16. "P16,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 15. "P15,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 14. "P14,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 12. "P12,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 11. "P11,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 10. "P10,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 8. "P8,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 7. "P7,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 6. "P6,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 5. "P5,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 4. "P4,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 2. "P2,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 0. "P0,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
wgroup.long 0x30++0x7
line.long 0x0 "SODR,Set Output Data Register"
bitfld.long 0x0 31. "P31,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 30. "P30,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 29. "P29,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 28. "P28,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 27. "P27,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 26. "P26,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 25. "P25,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 24. "P24,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 23. "P23,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 22. "P22,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 21. "P21,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 20. "P20,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 19. "P19,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 18. "P18,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 17. "P17,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 16. "P16,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 15. "P15,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 14. "P14,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 13. "P13,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 12. "P12,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 11. "P11,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 10. "P10,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 9. "P9,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 8. "P8,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 7. "P7,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 6. "P6,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 5. "P5,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 4. "P4,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 3. "P3,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 2. "P2,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 1. "P1,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 0. "P0,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
line.long 0x4 "CODR,Clear Output Data Register"
bitfld.long 0x4 31. "P31,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 30. "P30,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 29. "P29,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 28. "P28,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 27. "P27,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 26. "P26,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 25. "P25,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 24. "P24,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 23. "P23,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 22. "P22,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 21. "P21,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 20. "P20,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 19. "P19,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 18. "P18,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 17. "P17,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 16. "P16,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 15. "P15,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 14. "P14,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 13. "P13,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 12. "P12,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 11. "P11,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 10. "P10,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 9. "P9,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 8. "P8,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 7. "P7,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 6. "P6,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 5. "P5,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 4. "P4,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 3. "P3,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 2. "P2,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 1. "P1,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 0. "P0,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
group.long 0x38++0x3
line.long 0x0 "ODSR,Output Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 29. "P29,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 27. "P27,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 25. "P25,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 23. "P23,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 21. "P21,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 19. "P19,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 17. "P17,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 15. "P15,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 13. "P13,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 11. "P11,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 9. "P9,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 7. "P7,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 5. "P5,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 3. "P3,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
newline
bitfld.long 0x0 1. "P1,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
rgroup.long 0x3C++0x3
line.long 0x0 "PDSR,Pin Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 29. "P29,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 27. "P27,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 25. "P25,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 23. "P23,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 21. "P21,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 19. "P19,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 17. "P17,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 15. "P15,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 13. "P13,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 11. "P11,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 9. "P9,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 7. "P7,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 5. "P5,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 3. "P3,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
newline
bitfld.long 0x0 1. "P1,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
wgroup.long 0x40++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
rgroup.long 0x48++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
wgroup.long 0x50++0x7
line.long 0x0 "MDER,Multi-driver Enable Register"
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
line.long 0x4 "MDDR,Multi-driver Disable Register"
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
rgroup.long 0x58++0x3
line.long 0x0 "MDSR,Multi-driver Status Register"
bitfld.long 0x0 31. "P31,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 30. "P30,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 29. "P29,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 28. "P28,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 27. "P27,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 26. "P26,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 25. "P25,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 24. "P24,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 23. "P23,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 22. "P22,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 21. "P21,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 20. "P20,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 19. "P19,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 18. "P18,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 17. "P17,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 16. "P16,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 15. "P15,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 14. "P14,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 13. "P13,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 12. "P12,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 11. "P11,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 10. "P10,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 9. "P9,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 8. "P8,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 7. "P7,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 6. "P6,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 5. "P5,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 4. "P4,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 3. "P3,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 2. "P2,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 1. "P1,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 0. "P0,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
wgroup.long 0x60++0x7
line.long 0x0 "PUDR,Pull-Up Disable Register"
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
line.long 0x4 "PUER,Pull-Up Enable Register"
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
rgroup.long 0x68++0x3
line.long 0x0 "PUSR,Pad Pull-Up Status Register"
bitfld.long 0x0 31. "P31,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x70)++0x3
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 1"
bitfld.long 0x0 31. "P31,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 30. "P30,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 29. "P29,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 28. "P28,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 27. "P27,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 26. "P26,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 25. "P25,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 24. "P24,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 23. "P23,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 22. "P22,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 21. "P21,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 20. "P20,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 19. "P19,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 18. "P18,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 17. "P17,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 16. "P16,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 15. "P15,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 14. "P14,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 13. "P13,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 12. "P12,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 11. "P11,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 10. "P10,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 9. "P9,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 8. "P8,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 7. "P7,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 6. "P6,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 5. "P5,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 4. "P4,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 3. "P3,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 2. "P2,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 1. "P1,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 0. "P0,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
repeat.end
wgroup.long 0x80++0x7
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
rgroup.long 0x88++0x3
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
group.long 0x8C++0x3
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
wgroup.long 0x90++0x7
line.long 0x0 "PPDDR,Pad Pull-Down Disable Register"
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
line.long 0x4 "PPDER,Pad Pull-Down Enable Register"
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
rgroup.long 0x98++0x3
line.long 0x0 "PPDSR,Pad Pull-Down Status Register"
bitfld.long 0x0 31. "P31,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
wgroup.long 0xA0++0x7
line.long 0x0 "OWER,Output Write Enable"
bitfld.long 0x0 31. "P31,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 30. "P30,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 28. "P28,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 26. "P26,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 24. "P24,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 22. "P22,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 20. "P20,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 18. "P18,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 16. "P16,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 14. "P14,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 12. "P12,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 10. "P10,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 8. "P8,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 6. "P6,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 4. "P4,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 2. "P2,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 0. "P0,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
line.long 0x4 "OWDR,Output Write Disable"
bitfld.long 0x4 31. "P31,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 30. "P30,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 28. "P28,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 26. "P26,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 24. "P24,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 22. "P22,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 20. "P20,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 18. "P18,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 16. "P16,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 14. "P14,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 12. "P12,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 10. "P10,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 8. "P8,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 6. "P6,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 4. "P4,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 2. "P2,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 0. "P0,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
rgroup.long 0xA8++0x3
line.long 0x0 "OWSR,Output Write Status Register"
bitfld.long 0x0 31. "P31,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 30. "P30,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 28. "P28,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 26. "P26,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 24. "P24,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 22. "P22,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 20. "P20,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 18. "P18,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 16. "P16,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 14. "P14,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 12. "P12,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 10. "P10,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 8. "P8,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 6. "P6,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 4. "P4,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 2. "P2,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 0. "P0,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
wgroup.long 0xB0++0x7
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
rgroup.long 0xB8++0x3
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
bitfld.long 0x0 31. "P31,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 30. "P30,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 29. "P29,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 28. "P28,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 27. "P27,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 26. "P26,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 25. "P25,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 24. "P24,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 23. "P23,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 22. "P22,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 21. "P21,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 20. "P20,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 19. "P19,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 18. "P18,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 17. "P17,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 16. "P16,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 15. "P15,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 14. "P14,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 13. "P13,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 12. "P12,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 11. "P11,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 10. "P10,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 9. "P9,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 8. "P8,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 7. "P7,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 6. "P6,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 5. "P5,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 4. "P4,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 3. "P3,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 2. "P2,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 1. "P1,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 0. "P0,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
wgroup.long 0xC0++0x7
line.long 0x0 "ESR,Edge Select Register"
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
line.long 0x4 "LSR,Level Select Register"
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
rgroup.long 0xC8++0x3
line.long 0x0 "ELSR,Edge/Level Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
wgroup.long 0xD0++0x7
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
rgroup.long 0xD8++0x3
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
group.long 0x100++0x3
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
group.long 0x110++0x3
line.long 0x0 "SLEWR,I/O Slewrate Control Register"
bitfld.long 0x0 31. "SR31,Slewrate Control for IO line 31" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 30. "SR30,Slewrate Control for IO line 30" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 29. "SR29,Slewrate Control for IO line 29" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 28. "SR28,Slewrate Control for IO line 28" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 27. "SR27,Slewrate Control for IO line 27" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 26. "SR26,Slewrate Control for IO line 26" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 25. "SR25,Slewrate Control for IO line 25" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 24. "SR24,Slewrate Control for IO line 24" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 23. "SR23,Slewrate Control for IO line 23" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 22. "SR22,Slewrate Control for IO line 22" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 21. "SR21,Slewrate Control for IO line 21" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 20. "SR20,Slewrate Control for IO line 20" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 19. "SR19,Slewrate Control for IO line 19" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 18. "SR18,Slewrate Control for IO line 18" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 17. "SR17,Slewrate Control for IO line 17" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 16. "SR16,Slewrate Control for IO line 16" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 15. "SR15,Slewrate Control for IO line 15" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 14. "SR14,Slewrate Control for IO line 14" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 13. "SR13,Slewrate Control for IO line 13" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 12. "SR12,Slewrate Control for IO line 12" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 11. "SR11,Slewrate Control for IO line 11" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 10. "SR10,Slewrate Control for IO line 10" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 9. "SR9,Slewrate Control for IO line 9" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 8. "SR8,Slewrate Control for IO line 8" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 7. "SR7,Slewrate Control for IO line 7" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 6. "SR6,Slewrate Control for IO line 6" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 5. "SR5,Slewrate Control for IO line 5" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 4. "SR4,Slewrate Control for IO line 4" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 3. "SR3,Slewrate Control for IO line 3" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 2. "SR2,Slewrate Control for IO line 2" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 1. "SR1,Slewrate Control for IO line 1" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 0. "SR0,Slewrate Control for IO line 0" "0: No slewrate control.,1: Slewrate controlled."
group.long 0x118++0x3
line.long 0x0 "DRIVER,I/O Drive Register"
bitfld.long 0x0 31. "DR31,Drive of I/O Line 31" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 30. "DR30,Drive of I/O Line 30" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 29. "DR29,Drive of I/O Line 29" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 28. "DR28,Drive of I/O Line 28" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 27. "DR27,Drive of I/O Line 27" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 26. "DR26,Drive of I/O Line 26" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 25. "DR25,Drive of I/O Line 25" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 24. "DR24,Drive of I/O Line 24" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 23. "DR23,Drive of I/O Line 23" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 22. "DR22,Drive of I/O Line 22" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 21. "DR21,Drive of I/O Line 21" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 20. "DR20,Drive of I/O Line 20" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 19. "DR19,Drive of I/O Line 19" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 18. "DR18,Drive of I/O Line 18" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 17. "DR17,Drive of I/O Line 17" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 16. "DR16,Drive of I/O Line 16" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 15. "DR15,Drive of I/O Line 15" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 14. "DR14,Drive of I/O Line 14" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 13. "DR13,Drive of I/O Line 13" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 12. "DR12,Drive of I/O Line 12" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 11. "DR11,Drive of I/O Line 11" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 10. "DR10,Drive of I/O Line 10" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 9. "DR9,Drive of I/O Line 9" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 8. "DR8,Drive of I/O Line 8" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 7. "DR7,Drive of I/O Line 7" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 6. "DR6,Drive of I/O Line 6" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 5. "DR5,Drive of I/O Line 5" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 4. "DR4,Drive of I/O Line 4" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 3. "DR3,Drive of I/O Line 3" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 2. "DR2,Drive of I/O Line 2" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 1. "DR1,Drive of I/O Line 1" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 0. "DR0,Drive of I/O Line 0" "0: Lowest drive,1: Highest drive"
tree.end
tree "PIOD"
base ad:0xFFFFFA00
wgroup.long 0x0++0x7
line.long 0x0 "PER,PIO Enable Register"
bitfld.long 0x0 31. "P31,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 30. "P30,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 29. "P29,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 28. "P28,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 27. "P27,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 26. "P26,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 25. "P25,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 24. "P24,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 23. "P23,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 22. "P22,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 21. "P21,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 20. "P20,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 19. "P19,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 18. "P18,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 17. "P17,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 16. "P16,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 15. "P15,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 14. "P14,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 13. "P13,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 12. "P12,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 11. "P11,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 10. "P10,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 9. "P9,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 8. "P8,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 7. "P7,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 6. "P6,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 5. "P5,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 4. "P4,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 3. "P3,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 2. "P2,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
newline
bitfld.long 0x0 1. "P1,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
bitfld.long 0x0 0. "P0,PIO Enable" "0: No effect.,1: Enables the PIO to control the corresponding pin.."
line.long 0x4 "PDR,PIO Disable Register"
bitfld.long 0x4 31. "P31,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 30. "P30,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 29. "P29,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 28. "P28,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 27. "P27,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 26. "P26,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 25. "P25,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 24. "P24,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 23. "P23,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 22. "P22,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 21. "P21,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 20. "P20,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 19. "P19,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 18. "P18,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 17. "P17,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 16. "P16,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 15. "P15,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 14. "P14,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 13. "P13,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 12. "P12,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 11. "P11,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 10. "P10,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 9. "P9,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 8. "P8,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 7. "P7,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 6. "P6,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 5. "P5,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 4. "P4,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 3. "P3,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 2. "P2,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
newline
bitfld.long 0x4 1. "P1,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
bitfld.long 0x4 0. "P0,PIO Disable" "0: No effect.,1: Disables the PIO from controlling the.."
rgroup.long 0x8++0x3
line.long 0x0 "PSR,PIO Status Register"
bitfld.long 0x0 31. "P31,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 30. "P30,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 29. "P29,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 28. "P28,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 27. "P27,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 26. "P26,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 25. "P25,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 24. "P24,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 23. "P23,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 22. "P22,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 21. "P21,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 20. "P20,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 19. "P19,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 18. "P18,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 17. "P17,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 16. "P16,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 15. "P15,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 14. "P14,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 13. "P13,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 12. "P12,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 11. "P11,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 10. "P10,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 9. "P9,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 8. "P8,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 7. "P7,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 6. "P6,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 5. "P5,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 4. "P4,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 3. "P3,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 2. "P2,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
newline
bitfld.long 0x0 1. "P1,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
bitfld.long 0x0 0. "P0,PIO Status" "0: PIO is inactive on the corresponding I/O line..,1: PIO is active on the corresponding I/O line.."
wgroup.long 0x10++0x7
line.long 0x0 "OER,Output Enable Register"
bitfld.long 0x0 31. "P31,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 30. "P30,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 28. "P28,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 26. "P26,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 24. "P24,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 22. "P22,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 20. "P20,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 18. "P18,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 16. "P16,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 14. "P14,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 12. "P12,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 10. "P10,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 8. "P8,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 6. "P6,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 4. "P4,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 2. "P2,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
bitfld.long 0x0 0. "P0,Output Enable" "0: No effect.,1: Enables the output on the I/O line."
line.long 0x4 "ODR,Output Disable Register"
bitfld.long 0x4 31. "P31,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 30. "P30,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 28. "P28,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 26. "P26,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 24. "P24,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 22. "P22,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 20. "P20,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 18. "P18,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 16. "P16,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 14. "P14,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 12. "P12,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 10. "P10,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 8. "P8,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 6. "P6,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 4. "P4,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 2. "P2,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
bitfld.long 0x4 0. "P0,Output Disable" "0: No effect.,1: Disables the output on the I/O line."
rgroup.long 0x18++0x3
line.long 0x0 "OSR,Output Status Register"
bitfld.long 0x0 31. "P31,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 30. "P30,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 29. "P29,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 28. "P28,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 27. "P27,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 26. "P26,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 25. "P25,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 24. "P24,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 23. "P23,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 22. "P22,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 21. "P21,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 20. "P20,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 19. "P19,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 18. "P18,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 17. "P17,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 16. "P16,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 15. "P15,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 14. "P14,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 13. "P13,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 12. "P12,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 11. "P11,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 10. "P10,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 9. "P9,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 8. "P8,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 7. "P7,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 6. "P6,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 5. "P5,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 4. "P4,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 3. "P3,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 2. "P2,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
newline
bitfld.long 0x0 1. "P1,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
bitfld.long 0x0 0. "P0,Output Status" "0: The I/O line is a pure input.,1: The I/O line is enabled in output."
wgroup.long 0x20++0x7
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
bitfld.long 0x0 31. "P31,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 30. "P30,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 29. "P29,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 28. "P28,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 27. "P27,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 26. "P26,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 25. "P25,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 24. "P24,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 23. "P23,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 22. "P22,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 21. "P21,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 20. "P20,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 19. "P19,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 18. "P18,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 17. "P17,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 16. "P16,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 15. "P15,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 14. "P14,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 13. "P13,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 12. "P12,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 11. "P11,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 10. "P10,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 9. "P9,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 8. "P8,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 7. "P7,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 6. "P6,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 5. "P5,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 4. "P4,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 3. "P3,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 2. "P2,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
bitfld.long 0x0 0. "P0,Input Filter Enable" "0: No effect.,1: Enables the input glitch filter on the I/O line."
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
bitfld.long 0x4 31. "P31,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 30. "P30,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 29. "P29,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 28. "P28,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 27. "P27,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 26. "P26,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 25. "P25,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 24. "P24,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 23. "P23,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 22. "P22,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 21. "P21,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 20. "P20,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 19. "P19,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 18. "P18,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 17. "P17,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 16. "P16,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 15. "P15,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 14. "P14,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 13. "P13,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 12. "P12,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 11. "P11,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 10. "P10,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 9. "P9,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 8. "P8,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 7. "P7,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 6. "P6,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 5. "P5,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 4. "P4,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 3. "P3,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 2. "P2,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
newline
bitfld.long 0x4 1. "P1,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
bitfld.long 0x4 0. "P0,Input Filter Disable" "0: No effect.,1: Disables the input glitch filter on the I/O line."
rgroup.long 0x28++0x3
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
bitfld.long 0x0 31. "P31,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 30. "P30,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 29. "P29,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 28. "P28,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 27. "P27,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 26. "P26,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 25. "P25,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 24. "P24,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 23. "P23,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 22. "P22,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 21. "P21,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 20. "P20,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 19. "P19,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 18. "P18,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 17. "P17,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 16. "P16,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 15. "P15,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 14. "P14,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 13. "P13,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 12. "P12,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 11. "P11,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 10. "P10,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 9. "P9,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 8. "P8,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 7. "P7,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 6. "P6,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 5. "P5,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 4. "P4,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 3. "P3,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 2. "P2,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
newline
bitfld.long 0x0 1. "P1,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
bitfld.long 0x0 0. "P0,Input Filter Status" "0: The input glitch filter is disabled on the I/O..,1: The input glitch filter is enabled on the I/O.."
wgroup.long 0x30++0x7
line.long 0x0 "SODR,Set Output Data Register"
bitfld.long 0x0 31. "P31,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 30. "P30,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 29. "P29,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 28. "P28,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 27. "P27,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 26. "P26,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 25. "P25,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 24. "P24,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 23. "P23,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 22. "P22,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 21. "P21,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 20. "P20,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 19. "P19,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 18. "P18,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 17. "P17,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 16. "P16,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 15. "P15,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 14. "P14,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 13. "P13,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 12. "P12,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 11. "P11,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 10. "P10,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 9. "P9,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 8. "P8,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 7. "P7,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 6. "P6,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 5. "P5,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 4. "P4,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 3. "P3,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 2. "P2,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
newline
bitfld.long 0x0 1. "P1,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
bitfld.long 0x0 0. "P0,Set Output Data" "0: No effect.,1: Sets the data to be driven on the I/O line."
line.long 0x4 "CODR,Clear Output Data Register"
bitfld.long 0x4 31. "P31,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 30. "P30,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 29. "P29,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 28. "P28,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 27. "P27,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 26. "P26,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 25. "P25,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 24. "P24,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 23. "P23,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 22. "P22,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 21. "P21,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 20. "P20,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 19. "P19,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 18. "P18,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 17. "P17,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 16. "P16,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 15. "P15,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 14. "P14,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 13. "P13,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 12. "P12,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 11. "P11,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 10. "P10,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
newline
bitfld.long 0x4 9. "P9,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 8. "P8,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 7. "P7,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 6. "P6,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 5. "P5,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 4. "P4,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 3. "P3,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 2. "P2,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
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bitfld.long 0x4 1. "P1,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
bitfld.long 0x4 0. "P0,Clear Output Data" "0: No effect.,1: Clears the data to be driven on the I/O line."
group.long 0x38++0x3
line.long 0x0 "ODSR,Output Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 29. "P29,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 27. "P27,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 25. "P25,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 23. "P23,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 21. "P21,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 19. "P19,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 17. "P17,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 15. "P15,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 13. "P13,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 11. "P11,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 9. "P9,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 7. "P7,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 5. "P5,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 3. "P3,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
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bitfld.long 0x0 1. "P1,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The data to be driven on the I/O line is 0.,1: The data to be driven on the I/O line is 1."
rgroup.long 0x3C++0x3
line.long 0x0 "PDSR,Pin Data Status Register"
bitfld.long 0x0 31. "P31,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 30. "P30,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 29. "P29,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 28. "P28,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 27. "P27,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 26. "P26,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 25. "P25,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 24. "P24,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 23. "P23,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 22. "P22,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 21. "P21,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 20. "P20,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 19. "P19,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 18. "P18,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 17. "P17,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 16. "P16,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 15. "P15,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 14. "P14,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 13. "P13,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 12. "P12,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 11. "P11,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 10. "P10,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 9. "P9,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 8. "P8,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 7. "P7,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 6. "P6,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 5. "P5,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 4. "P4,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 3. "P3,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 2. "P2,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
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bitfld.long 0x0 1. "P1,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
bitfld.long 0x0 0. "P0,Output Data Status" "0: The I/O line is at level 0.,1: The I/O line is at level 1."
wgroup.long 0x40++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
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bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0: No effect.,1: Enables the input change interrupt on the I/O.."
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
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bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0: No effect.,1: Disables the input change interrupt on the I/O.."
rgroup.long 0x48++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
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bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0: Input change interrupt is disabled on the I/O..,1: Input change interrupt is enabled on the I/O line."
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
newline
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0: No input change has been detected on the I/O..,1: At least one input change has been detected on.."
wgroup.long 0x50++0x7
line.long 0x0 "MDER,Multi-driver Enable Register"
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
newline
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0: No effect.,1: Enables multi-drive on the I/O line."
line.long 0x4 "MDDR,Multi-driver Disable Register"
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
newline
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0: No effect.,1: Disables multi-drive on the I/O line."
rgroup.long 0x58++0x3
line.long 0x0 "MDSR,Multi-driver Status Register"
bitfld.long 0x0 31. "P31,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 30. "P30,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 29. "P29,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 28. "P28,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 27. "P27,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 26. "P26,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 25. "P25,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 24. "P24,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 23. "P23,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 22. "P22,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 21. "P21,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 20. "P20,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 19. "P19,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 18. "P18,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 17. "P17,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 16. "P16,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 15. "P15,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 14. "P14,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 13. "P13,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 12. "P12,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 11. "P11,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 10. "P10,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 9. "P9,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 8. "P8,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 7. "P7,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 6. "P6,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 5. "P5,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 4. "P4,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 3. "P3,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 2. "P2,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
newline
bitfld.long 0x0 1. "P1,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
bitfld.long 0x0 0. "P0,Multi-drive Status" "0: The multi-drive is disabled on the I/O line. The..,1: The multi-drive is enabled on the I/O line. The.."
wgroup.long 0x60++0x7
line.long 0x0 "PUDR,Pull-Up Disable Register"
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0: No effect.,1: Disables the pullup resistor on the I/O line."
line.long 0x4 "PUER,Pull-Up Enable Register"
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0: No effect.,1: Enables the pullup resistor on the I/O line."
rgroup.long 0x68++0x3
line.long 0x0 "PUSR,Pad Pull-Up Status Register"
bitfld.long 0x0 31. "P31,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Up Status" "0: Pullup resistor is enabled on the I/O line.,1: Pullup resistor is disabled on the I/O line."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x70)++0x3
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 1"
bitfld.long 0x0 31. "P31,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 30. "P30,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 29. "P29,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 28. "P28,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 27. "P27,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 26. "P26,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 25. "P25,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 24. "P24,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 23. "P23,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 22. "P22,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 21. "P21,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 20. "P20,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 19. "P19,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 18. "P18,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 17. "P17,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 16. "P16,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 15. "P15,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 14. "P14,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 13. "P13,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 12. "P12,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 11. "P11,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 10. "P10,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 9. "P9,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 8. "P8,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 7. "P7,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 6. "P6,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 5. "P5,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 4. "P4,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 3. "P3,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 2. "P2,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
newline
bitfld.long 0x0 1. "P1,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
bitfld.long 0x0 0. "P0,Peripheral Select" "0: Assigns the I/O line to the Peripheral C function.,1: Assigns the I/O line to the Peripheral D function."
repeat.end
wgroup.long 0x80++0x7
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
newline
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0: No effect.,1: The glitch filter is able to filter glitches.."
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0: No effect.,1: The debouncing filter is able to filter pulses.."
rgroup.long 0x88++0x3
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
newline
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0: The glitch filter is able to filter glitches..,1: The debouncing filter is able to filter pulses.."
group.long 0x8C++0x3
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
wgroup.long 0x90++0x7
line.long 0x0 "PPDDR,Pad Pull-Down Disable Register"
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0: No effect.,1: Disables the pulldown resistor on the I/O line."
line.long 0x4 "PPDER,Pad Pull-Down Enable Register"
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
newline
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0: No effect.,1: Enables the pulldown resistor on the I/O line."
rgroup.long 0x98++0x3
line.long 0x0 "PPDSR,Pad Pull-Down Status Register"
bitfld.long 0x0 31. "P31,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 30. "P30,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 29. "P29,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 28. "P28,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 27. "P27,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 26. "P26,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 25. "P25,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 24. "P24,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 23. "P23,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 22. "P22,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 21. "P21,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 20. "P20,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 19. "P19,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 18. "P18,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 17. "P17,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 16. "P16,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 15. "P15,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 14. "P14,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 13. "P13,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 12. "P12,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 11. "P11,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 10. "P10,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 9. "P9,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 8. "P8,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 7. "P7,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 6. "P6,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 5. "P5,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 4. "P4,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 3. "P3,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 2. "P2,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
newline
bitfld.long 0x0 1. "P1,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
bitfld.long 0x0 0. "P0,Pull-Down Status" "0: Pulldown resistor is enabled on the I/O line.,1: Pulldown resistor is disabled on the I/O line."
wgroup.long 0xA0++0x7
line.long 0x0 "OWER,Output Write Enable"
bitfld.long 0x0 31. "P31,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 30. "P30,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 28. "P28,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 26. "P26,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 24. "P24,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 22. "P22,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 20. "P20,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 18. "P18,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 16. "P16,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 14. "P14,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 12. "P12,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 10. "P10,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 8. "P8,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 6. "P6,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 4. "P4,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 2. "P2,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
bitfld.long 0x0 0. "P0,Output Write Enable" "0: No effect.,1: Enables writing PIO_ODSR for the I/O line."
line.long 0x4 "OWDR,Output Write Disable"
bitfld.long 0x4 31. "P31,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 30. "P30,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 29. "P29,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 28. "P28,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 27. "P27,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 26. "P26,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 25. "P25,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 24. "P24,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 23. "P23,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 22. "P22,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 21. "P21,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 20. "P20,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 19. "P19,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 18. "P18,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 17. "P17,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 16. "P16,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 15. "P15,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 14. "P14,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 13. "P13,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 12. "P12,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 11. "P11,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 10. "P10,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 9. "P9,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 8. "P8,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 7. "P7,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 6. "P6,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 5. "P5,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 4. "P4,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 3. "P3,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 2. "P2,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
newline
bitfld.long 0x4 1. "P1,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
bitfld.long 0x4 0. "P0,Output Write Disable" "0: No effect.,1: Disables writing PIO_ODSR for the I/O line."
rgroup.long 0xA8++0x3
line.long 0x0 "OWSR,Output Write Status Register"
bitfld.long 0x0 31. "P31,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 30. "P30,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 29. "P29,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 28. "P28,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 27. "P27,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 26. "P26,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 25. "P25,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 24. "P24,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 23. "P23,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 22. "P22,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 21. "P21,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 20. "P20,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 19. "P19,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 18. "P18,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 17. "P17,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 16. "P16,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 15. "P15,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 14. "P14,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 13. "P13,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 12. "P12,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 11. "P11,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 10. "P10,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 9. "P9,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 8. "P8,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 7. "P7,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 6. "P6,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 5. "P5,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 4. "P4,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 3. "P3,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 2. "P2,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
newline
bitfld.long 0x0 1. "P1,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
bitfld.long 0x0 0. "P0,Output Write Status" "0: Writing PIO_ODSR does not affect the I/O line.,1: Writing PIO_ODSR affects the I/O line."
wgroup.long 0xB0++0x7
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
newline
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0: No effect.,1: The interrupt source is the event described in.."
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
newline
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0: No effect.,1: The Interrupt mode is set to the default.."
rgroup.long 0xB8++0x3
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
bitfld.long 0x0 31. "P31,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 30. "P30,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 29. "P29,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 28. "P28,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 27. "P27,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 26. "P26,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 25. "P25,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 24. "P24,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 23. "P23,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 22. "P22,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 21. "P21,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 20. "P20,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 19. "P19,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 18. "P18,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 17. "P17,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 16. "P16,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 15. "P15,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 14. "P14,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 13. "P13,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 12. "P12,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 11. "P11,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 10. "P10,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 9. "P9,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 8. "P8,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 7. "P7,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 6. "P6,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 5. "P5,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 4. "P4,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 3. "P3,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 2. "P2,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
newline
bitfld.long 0x0 1. "P1,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
bitfld.long 0x0 0. "P0,IO Line Index" "0: The interrupt source is a both-edge detection..,1: The interrupt source is described by the.."
wgroup.long 0xC0++0x7
line.long 0x0 "ESR,Edge Select Register"
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
newline
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0: No effect.,1: The interrupt source is an edge-detection event."
line.long 0x4 "LSR,Level Select Register"
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0: No effect.,1: The interrupt source is a level-detection event."
rgroup.long 0xC8++0x3
line.long 0x0 "ELSR,Edge/Level Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is an edge-detection event.,1: The interrupt source is a level-detection event."
wgroup.long 0xD0++0x7
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
newline
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a falling edge.."
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
newline
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0: No effect.,1: The interrupt source is set to a rising edge.."
rgroup.long 0xD8++0x3
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
newline
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0: The interrupt source is a falling edge detection..,1: The interrupt source is a rising edge detection.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
group.long 0x100++0x3
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
newline
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0: Schmitt trigger is enabled.,1: Schmitt trigger is disabled."
group.long 0x110++0x3
line.long 0x0 "SLEWR,I/O Slewrate Control Register"
bitfld.long 0x0 31. "SR31,Slewrate Control for IO line 31" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 30. "SR30,Slewrate Control for IO line 30" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 29. "SR29,Slewrate Control for IO line 29" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 28. "SR28,Slewrate Control for IO line 28" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 27. "SR27,Slewrate Control for IO line 27" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 26. "SR26,Slewrate Control for IO line 26" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 25. "SR25,Slewrate Control for IO line 25" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 24. "SR24,Slewrate Control for IO line 24" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 23. "SR23,Slewrate Control for IO line 23" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 22. "SR22,Slewrate Control for IO line 22" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 21. "SR21,Slewrate Control for IO line 21" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 20. "SR20,Slewrate Control for IO line 20" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 19. "SR19,Slewrate Control for IO line 19" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 18. "SR18,Slewrate Control for IO line 18" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 17. "SR17,Slewrate Control for IO line 17" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 16. "SR16,Slewrate Control for IO line 16" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 15. "SR15,Slewrate Control for IO line 15" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 14. "SR14,Slewrate Control for IO line 14" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 13. "SR13,Slewrate Control for IO line 13" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 12. "SR12,Slewrate Control for IO line 12" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 11. "SR11,Slewrate Control for IO line 11" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 10. "SR10,Slewrate Control for IO line 10" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 9. "SR9,Slewrate Control for IO line 9" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 8. "SR8,Slewrate Control for IO line 8" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 7. "SR7,Slewrate Control for IO line 7" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 6. "SR6,Slewrate Control for IO line 6" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 5. "SR5,Slewrate Control for IO line 5" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 4. "SR4,Slewrate Control for IO line 4" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 3. "SR3,Slewrate Control for IO line 3" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 2. "SR2,Slewrate Control for IO line 2" "0: No slewrate control.,1: Slewrate controlled."
newline
bitfld.long 0x0 1. "SR1,Slewrate Control for IO line 1" "0: No slewrate control.,1: Slewrate controlled."
bitfld.long 0x0 0. "SR0,Slewrate Control for IO line 0" "0: No slewrate control.,1: Slewrate controlled."
group.long 0x118++0x3
line.long 0x0 "DRIVER,I/O Drive Register"
bitfld.long 0x0 31. "DR31,Drive of I/O Line 31" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 30. "DR30,Drive of I/O Line 30" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 29. "DR29,Drive of I/O Line 29" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 28. "DR28,Drive of I/O Line 28" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 27. "DR27,Drive of I/O Line 27" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 26. "DR26,Drive of I/O Line 26" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 25. "DR25,Drive of I/O Line 25" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 24. "DR24,Drive of I/O Line 24" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 23. "DR23,Drive of I/O Line 23" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 22. "DR22,Drive of I/O Line 22" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 21. "DR21,Drive of I/O Line 21" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 20. "DR20,Drive of I/O Line 20" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 19. "DR19,Drive of I/O Line 19" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 18. "DR18,Drive of I/O Line 18" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 17. "DR17,Drive of I/O Line 17" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 16. "DR16,Drive of I/O Line 16" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 15. "DR15,Drive of I/O Line 15" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 14. "DR14,Drive of I/O Line 14" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 13. "DR13,Drive of I/O Line 13" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 12. "DR12,Drive of I/O Line 12" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 11. "DR11,Drive of I/O Line 11" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 10. "DR10,Drive of I/O Line 10" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 9. "DR9,Drive of I/O Line 9" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 8. "DR8,Drive of I/O Line 8" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 7. "DR7,Drive of I/O Line 7" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 6. "DR6,Drive of I/O Line 6" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 5. "DR5,Drive of I/O Line 5" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 4. "DR4,Drive of I/O Line 4" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 3. "DR3,Drive of I/O Line 3" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 2. "DR2,Drive of I/O Line 2" "0: Lowest drive,1: Highest drive"
newline
bitfld.long 0x0 1. "DR1,Drive of I/O Line 1" "0: Lowest drive,1: Highest drive"
bitfld.long 0x0 0. "DR0,Drive of I/O Line 0" "0: Lowest drive,1: Highest drive"
tree.end
tree.end
tree "PIT (Periodic Interval Timer)"
base ad:0xFFFFFE40
group.long 0x0++0x3
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 25. "PITIEN,Periodic Interval Timer Interrupt Enable" "0: The bit PITS in PIT_SR has no effect on interrupt.,1: The bit PITS in PIT_SR asserts interrupt."
bitfld.long 0x0 24. "PITEN,Period Interval Timer Enabled" "0: The Periodic Interval Timer is disabled when the..,1: The Periodic Interval Timer is enabled."
hexmask.long.tbyte 0x0 0.--19. 1. "PIV,Periodic Interval Value"
rgroup.long 0x4++0xB
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 0. "PITS,Periodic Interval Timer Status" "0: The Periodic Interval timer has not reached PIV..,1: The Periodic Interval timer has reached PIV.."
line.long 0x4 "PIVR,Periodic Interval Value Register"
hexmask.long.word 0x4 20.--31. 1. "PICNT,Periodic Interval Counter"
hexmask.long.tbyte 0x4 0.--19. 1. "CPIV,Current Periodic Interval Value"
line.long 0x8 "PIIR,Periodic Interval Image Register"
hexmask.long.word 0x8 20.--31. 1. "PICNT,Periodic Interval Counter"
hexmask.long.tbyte 0x8 0.--19. 1. "CPIV,Current Periodic Interval Value"
tree.end
tree "PIT64B (64-bit Periodic Interval Timer)"
base ad:0x0
tree "PIT64B0"
base ad:0xF0028000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 8. "SWRST,Software Reset" "0: No effect.,1: Performs a software reset clears the.."
bitfld.long 0x0 0. "START,Start Timer" "0: No effect.,1: The timer counter is started for 1 or more.."
group.long 0x4++0xB
line.long 0x0 "MR,Mode Register"
hexmask.long.byte 0x0 8.--11. 1. "PRESCALER,Prescaler Period"
bitfld.long 0x0 4. "SMOD,Start Mode" "0: Writing PIT64B_LSBPR does not start the timer..,1: Writing PIT64B_LSBPR starts the timer period."
newline
bitfld.long 0x0 3. "SGCLK,Generic Clock Selection Enable" "0: The prescaler is triggered at each rising edge..,1: GCLK clock is selected as clock source of the.."
bitfld.long 0x0 0. "CONT,Continuous Mode" "0: A single period interrupt is generated from a..,1: Continuous periodic interrupts are generated.."
line.long 0x4 "LSBPR,LSB Period Register"
hexmask.long 0x4 0.--31. 1. "LSBPERIOD,32 LSB of the Timer Period"
line.long 0x8 "MSBPR,MSB Period Register"
hexmask.long 0x8 0.--31. 1. "MSBPERIOD,32 MSB of the Timer Period"
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 4. "SECE,Safety and/or Security Report Interrupt Enable" "0,1"
bitfld.long 0x0 1. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "PERIOD,Elapsed Timer Period Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 4. "SECE,Safety and/or Security Report Interrupt Disable" "0,1"
bitfld.long 0x4 1. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "PERIOD,Elapsed Timer Period Interrupt Disable" "0,1"
rgroup.long 0x18++0xF
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 4. "SECE,Safety and/or Security Report Interrupt Mask" "0,1"
bitfld.long 0x0 1. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "PERIOD,Elapsed Timer Period Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 4. "SECE,Safety/Security Report (cleared on read)" "0: There is no security report in PIT64B_WPSR since..,1: One security flag is set in PIT64B_WPSR since.."
bitfld.long 0x4 1. "OVRE,Overrun Error (cleared on read)" "0: No multiple rollovers occurred since the last..,1: More than 1 rollover occurred since the last.."
newline
bitfld.long 0x4 0. "PERIOD,Elapsed Timer Period Status Flag (cleared on read)" "0: No timer rollover occurred since the last read..,1: A timer rollover occurred since the last read of.."
line.long 0x8 "TLSBR,Timer LSB Current Value Register"
hexmask.long 0x8 0.--31. 1. "LSBTIMER,Current 32 LSB of the Timer"
line.long 0xC "TMSBR,Timer MSB Current Value Register"
hexmask.long 0xC 0.--31. 1. "MSBTIMER,Current 32 MSB of the Timer"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
bitfld.long 0x0 1. "WPITEN,Write Protection Interruption Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: A write access is performed into PIT64B_MR.."
bitfld.long 0x0 24.--25. "SWETYP,Software Error Type (cleared on read)" "0: A write-only register has been read (warning).,1: A write access has been performed on a read-only..,2: Access to an undefined address (warning).,3: A write access is performed into PIT64B_MR.."
newline
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "PIT64B1"
base ad:0xF0040000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 8. "SWRST,Software Reset" "0: No effect.,1: Performs a software reset clears the.."
bitfld.long 0x0 0. "START,Start Timer" "0: No effect.,1: The timer counter is started for 1 or more.."
group.long 0x4++0xB
line.long 0x0 "MR,Mode Register"
hexmask.long.byte 0x0 8.--11. 1. "PRESCALER,Prescaler Period"
bitfld.long 0x0 4. "SMOD,Start Mode" "0: Writing PIT64B_LSBPR does not start the timer..,1: Writing PIT64B_LSBPR starts the timer period."
newline
bitfld.long 0x0 3. "SGCLK,Generic Clock Selection Enable" "0: The prescaler is triggered at each rising edge..,1: GCLK clock is selected as clock source of the.."
bitfld.long 0x0 0. "CONT,Continuous Mode" "0: A single period interrupt is generated from a..,1: Continuous periodic interrupts are generated.."
line.long 0x4 "LSBPR,LSB Period Register"
hexmask.long 0x4 0.--31. 1. "LSBPERIOD,32 LSB of the Timer Period"
line.long 0x8 "MSBPR,MSB Period Register"
hexmask.long 0x8 0.--31. 1. "MSBPERIOD,32 MSB of the Timer Period"
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 4. "SECE,Safety and/or Security Report Interrupt Enable" "0,1"
bitfld.long 0x0 1. "OVRE,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "PERIOD,Elapsed Timer Period Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 4. "SECE,Safety and/or Security Report Interrupt Disable" "0,1"
bitfld.long 0x4 1. "OVRE,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "PERIOD,Elapsed Timer Period Interrupt Disable" "0,1"
rgroup.long 0x18++0xF
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 4. "SECE,Safety and/or Security Report Interrupt Mask" "0,1"
bitfld.long 0x0 1. "OVRE,Overrun Error Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "PERIOD,Elapsed Timer Period Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 4. "SECE,Safety/Security Report (cleared on read)" "0: There is no security report in PIT64B_WPSR since..,1: One security flag is set in PIT64B_WPSR since.."
bitfld.long 0x4 1. "OVRE,Overrun Error (cleared on read)" "0: No multiple rollovers occurred since the last..,1: More than 1 rollover occurred since the last.."
newline
bitfld.long 0x4 0. "PERIOD,Elapsed Timer Period Status Flag (cleared on read)" "0: No timer rollover occurred since the last read..,1: A timer rollover occurred since the last read of.."
line.long 0x8 "TLSBR,Timer LSB Current Value Register"
hexmask.long 0x8 0.--31. 1. "LSBTIMER,Current 32 LSB of the Timer"
line.long 0xC "TMSBR,Timer MSB Current Value Register"
hexmask.long 0xC 0.--31. 1. "MSBTIMER,Current 32 MSB of the Timer"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
bitfld.long 0x0 1. "WPITEN,Write Protection Interruption Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: A write access is performed into PIT64B_MR.."
bitfld.long 0x0 24.--25. "SWETYP,Software Error Type (cleared on read)" "0: A write-only register has been read (warning).,1: A write access has been performed on a read-only..,2: Access to an undefined address (warning).,3: A write access is performed into PIT64B_MR.."
newline
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree.end
tree "PMC (Power Management Controller)"
base ad:0xFFFFFC00
wgroup.long 0x0++0x7
line.long 0x0 "SCER,System Clock Enable Register"
bitfld.long 0x0 19. "QSPICLK,QSPI 2x Clock Enable" "0: No effect.,1: Enables the QSPI 2x clock."
bitfld.long 0x0 9. "PCK1,Programmable Clock 1 Output Enable" "0: No effect.,1: Enables the corresponding Programmable Clock.."
newline
bitfld.long 0x0 8. "PCK0,Programmable Clock 0 Output Enable" "0: No effect.,1: Enables the corresponding Programmable Clock.."
bitfld.long 0x0 6. "UHP,USB Host OHCI Clocks Enable" "0: No effect.,1: Enables the UHP48M and UHP12M OHCI clocks."
newline
bitfld.long 0x0 2. "DDRCK,MPDDRC/SDRAMC Clock Enable" "0: No effect.,1: Enables the MPDDRC or SDRAMC clock."
line.long 0x4 "SCDR,System Clock Disable Register"
bitfld.long 0x4 19. "QSPICLK,QSPI 2x Clock Disable" "0: No effect.,1: Disables the QSPI 2x clock."
bitfld.long 0x4 9. "PCK1,Programmable Clock 1 Output Disable" "0: No effect.,1: Disables the corresponding Programmable Clock.."
newline
bitfld.long 0x4 8. "PCK0,Programmable Clock 0 Output Disable" "0: No effect.,1: Disables the corresponding Programmable Clock.."
bitfld.long 0x4 6. "UHP,USB Host OHCI Clocks Disable" "0: No effect.,1: Disables the UHP48M and UHP12M OHCI clocks."
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bitfld.long 0x4 2. "DDRCK,MPDDRC/SDRAMC Clock Disable" "0: No effect.,1: Disables the MPDDRC or SDRAMC clock."
rgroup.long 0x8++0x3
line.long 0x0 "SCSR,System Clock Status Register"
bitfld.long 0x0 19. "QSPICLK,QSPI 2x Clock Status" "0: The QSPI 2x clock is disabled.,1: The QSPI 2x clock is enabled."
bitfld.long 0x0 9. "PCK1,Programmable Clock 1 Output Status" "0: The corresponding Programmable Clock output is..,1: The corresponding Programmable Clock output is.."
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bitfld.long 0x0 8. "PCK0,Programmable Clock 0 Output Status" "0: The corresponding Programmable Clock output is..,1: The corresponding Programmable Clock output is.."
bitfld.long 0x0 6. "UHP,USB Host OHCI Clocks Status" "0: The UHP48M and UHP12M OHCI clocks are disabled.,1: The UHP48M and UHP12M OHCI clocks are enabled."
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bitfld.long 0x0 2. "DDRCK,MPDDRC/SDRAMC Clock Status" "0: The MPDDRC or SDRAMC clock is disabled.,1: The MPDDRC or SDRAMC clock is enabled."
group.long 0xC++0x1F
line.long 0x0 "PLL_CTRL0,PLL Control Register 0"
bitfld.long 0x0 31. "ENLOCK,Enable PLL Lock" "0: The lock signal sent by the PLL is ignored. The..,1: The PLL is considered as locked once the.."
bitfld.long 0x0 30. "ENIOPLLCK,Enable PLL Clock for IO" "0: The clock generated by the PLL is not send to..,1: The clock generated by the PLL is sent to the IO."
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bitfld.long 0x0 29. "ENPLLCK,Enable PLL Clock for PMC" "0: The clock generated by the PLL is not send to..,1: The clock generated by the PLL is sent to the.."
bitfld.long 0x0 28. "ENPLL,Enable PLL" "0: The PLL is off.,1: The PLL is on."
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hexmask.long.byte 0x0 12.--19. 1. "DIVIO,Divider for PAD"
hexmask.long.byte 0x0 0.--7. 1. "DIVPMC,Divider for PMC"
line.long 0x4 "PLL_CTRL1,PLL Control Register 1"
hexmask.long.byte 0x4 24.--31. 1. "MUL,Multiplier Factor Value"
hexmask.long.tbyte 0x4 0.--21. 1. "FRACR,Fractional Loop Divider Setting"
line.long 0x8 "PLL_SSR,PLL Spread Spectrum Register"
bitfld.long 0x8 28. "ENSPREAD,Spread Spectrum Enable" "0: The spread spectrum is not applied to the PLL.,1: The spread spectrum is applied to the PLL."
hexmask.long.byte 0x8 16.--23. 1. "NSTEP,Spread Spectrum Number of Steps"
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hexmask.long.word 0x8 0.--15. 1. "STEP,Spread Spectrum Step Size"
line.long 0xC "PLL_ACR,PLL Analog Control Register"
hexmask.long.byte 0xC 24.--29. 1. "LOOP_FILTER,LOOP Filter Selection"
bitfld.long 0xC 16.--18. "LOCK_THR,PLL Lock Threshold Value Selection" "0,1,2,3,4,5,6,7"
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bitfld.long 0xC 13. "UTMIBG,UPLL Bandgap Control" "0: The UPLL bandgap is switched off.,1: The UPLL bandgap is switched on."
bitfld.long 0xC 12. "UTMIVR,UPLL Voltage Regulator Control" "0: The UPLL voltage regulator is switched off.,1: The UPLL voltage regulator is switched on."
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hexmask.long.word 0xC 0.--11. 1. "CONTROL,PLL CONTROL Value Selection"
line.long 0x10 "PLL_UPDT,PLL Update Register"
hexmask.long.byte 0x10 16.--21. 1. "STUPTIM,Start-up Time"
bitfld.long 0x10 8. "UPDATE,PLL Setting Update (write-only)" "0: No effect.,1: The PLL configuration written in PMC_PLL_CTRL0.."
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bitfld.long 0x10 0.--1. "ID,PLL ID" "0,1,2,3"
line.long 0x14 "CKGR_MOR,Main Oscillator Register"
bitfld.long 0x14 30. "AUTOCPUSW,Automatic Processor Clock Source Switching" "0: A main crystal oscillator failure detection has..,1: If a main crystal oscillator failure is detected.."
bitfld.long 0x14 29. "AUTOMAINSW,Automatic Main Clock Source Switching" "0: A main crystal oscillator failure detection has..,1: If a main crystal oscillator failure is detected.."
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bitfld.long 0x14 26. "XT32KFME,32.768 kHz Crystal Oscillator Frequency Monitoring Enable" "0: The 32.768 kHz crystal oscillator frequency..,1: The 32.768 kHz crystal oscillator frequency.."
bitfld.long 0x14 25. "CFDEN,Clock Failure Detector Enable" "0: The clock failure detector is disabled.,1: The clock failure detector is enabled."
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bitfld.long 0x14 24. "MOSCSEL,Main Clock Oscillator Selection" "0: The main RC oscillator is selected.,1: The main crystal oscillator is selected."
hexmask.long.byte 0x14 16.--23. 1. "KEY,Write Access Password"
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hexmask.long.byte 0x14 8.--15. 1. "MOSCXTST,Main Crystal Oscillator Start-up Time"
bitfld.long 0x14 3. "MOSCRCEN,Main RC Oscillator Enable" "0: The main RC oscillator is disabled.,1: The main RC oscillator is enabled."
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bitfld.long 0x14 2. "ULP1,ULP Mode 1 Command (write-only)" "0: No effect.,1: Puts the device in ULP mode 1."
bitfld.long 0x14 0. "MOSCXTEN,Main Crystal Oscillator Enable" "0: The main crystal oscillator is disabled.,1: The main crystal oscillator is enabled or in.."
line.long 0x18 "CKGR_MCFR,Main Clock Frequency Register"
bitfld.long 0x18 24. "CCSS,Counter Clock Source Selection" "0: The measured clock of the MAINF counter is the..,1: The measured clock of the MAINF counter is the.."
bitfld.long 0x18 20. "RCMEAS,RC Oscillator Frequency Measure (write-only)" "0: No effect.,1: Restarts measuring of the frequency of MAINCK."
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bitfld.long 0x18 16. "MAINFRDY,Main Clock Frequency Measure Ready" "0: MAINF value is not valid or the measured..,1: The measured oscillator has been enabled.."
hexmask.long.word 0x18 0.--15. 1. "MAINF,Main Clock Frequency"
line.long 0x1C "CPU_CKR,CPU Clock Register"
bitfld.long 0x1C 8.--10. "MDIV,MCK Division" "0: MCK is FCLK divided by 1.,1: MCK is FCLK divided by 2.,2: MCK is FCLK divided by 4.,3: MCK is FCLK divided by 3.,4: MCK is FCLK divided by 5.,?,?,?"
bitfld.long 0x1C 4.--6. "PRES,Processor Clock Prescaler" "0: Selected clock,1: Selected clock divided by 2,2: Selected clock divided by 4,3: Selected clock divided by 8,4: Selected clock divided by 16,5: Selected clock divided by 32,6: Selected clock divided by 64,7: Selected clock divided by 3"
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bitfld.long 0x1C 0.--1. "CSS,MCK Source Selection" "0: MD_SLCK is selected,1: MAINCK is selected,2: PLLACK is selected,3: UPLL is selected"
group.long 0x38++0x3
line.long 0x0 "USB,USB Clock Register"
hexmask.long.byte 0x0 8.--11. 1. "USBDIV,Divider for USB OHCI Clock"
bitfld.long 0x0 0.--1. "USBS,USB OHCI/EHCI Input Clock Selection" "0: USB Clock Input is PLLACK.,1: USB Clock Input is UPLLCK.,2: USB Clock Input is MAINXTALCK.,?"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "PCK[$1],Programmable Clock Register x"
hexmask.long.byte 0x0 8.--15. 1. "PRES,Programmable Clock Prescaler"
hexmask.long.byte 0x0 0.--4. 1. "CSS,Programmable Clock Source Selection"
repeat.end
wgroup.long 0x60++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 25. "PLL_INT,PLL Interrupt Enable" "0,1"
bitfld.long 0x0 23. "MCKMON,Main System Bus Clock Clock Monitor Interrupt Enable" "0,1"
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bitfld.long 0x0 21. "XT32KERR,32.768 kHz Crystal Oscillator Error Interrupt Enable" "0,1"
bitfld.long 0x0 18. "CFDEV,Clock Failure Detector Event Interrupt Enable" "0,1"
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bitfld.long 0x0 17. "MOSCRCS,Main RC Oscillator Status Interrupt Enable" "0,1"
bitfld.long 0x0 16. "MOSCSELS,Main Clock Source Oscillator Selection Status Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "PCKRDY1,Programmable Clock Ready 1 Interrupt Enable" "0,1"
bitfld.long 0x0 8. "PCKRDY0,Programmable Clock Ready 0 Interrupt Enable" "0,1"
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bitfld.long 0x0 3. "MCKRDY,Main System Bus Clock Ready Interrupt Enable" "0,1"
bitfld.long 0x0 0. "MOSCXTS,Main Crystal Oscillator Status Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 25. "PLL_INT,PLL Interrupt Disable" "0,1"
bitfld.long 0x4 23. "MCKMON,Main System Bus Clock Clock Monitor Interrupt Disable" "0,1"
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bitfld.long 0x4 21. "XT32KERR,32.768 kHz Crystal Oscillator Error Interrupt Disable" "0,1"
bitfld.long 0x4 18. "CFDEV,Clock Failure Detector Event Interrupt Disable" "0,1"
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bitfld.long 0x4 17. "MOSCRCS,Main RC Status Interrupt Disable" "0,1"
bitfld.long 0x4 16. "MOSCSELS,Main Clock Source Oscillator Selection Status Interrupt Disable" "0,1"
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bitfld.long 0x4 9. "PCKRDY1,Programmable Clock Ready 1 Interrupt Disable" "0,1"
bitfld.long 0x4 8. "PCKRDY0,Programmable Clock Ready 0 Interrupt Disable" "0,1"
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bitfld.long 0x4 3. "MCKRDY,Main System Bus Clock Ready Interrupt Disable" "0,1"
bitfld.long 0x4 0. "MOSCXTS,Main Crystal Oscillator Status Interrupt Disable" "0,1"
rgroup.long 0x68++0x7
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 25. "PLL_INT,PLL Interrupt Status" "0: No PLL interrupt has occurred.,1: A PLL interrupt has occurred. PLL interrupt is.."
bitfld.long 0x0 24. "GCLKRDY,GCLK Ready" "0: A GCLK is not ready to use (clock switching in..,1: All GCLKs are switched to their selected source.."
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bitfld.long 0x0 23. "MCKMON,Main System Bus Clock Clock Monitor Error" "0: Main System Bus Clock is correct or the CPU..,1: Main System Bus is incorrect or has been.."
bitfld.long 0x0 21. "XT32KERR,Slow Crystal Oscillator Error" "0: The frequency of the 32.768 kHz crystal..,1: The frequency of the 32.768 kHz crystal.."
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bitfld.long 0x0 20. "FOS,Clock Failure Detector Fault Output Status" "0: The fault output of the clock failure detector..,1: The fault output of the clock failure detector.."
bitfld.long 0x0 19. "CFDS,Clock Failure Detector Status" "0: A clock failure of the main crystal oscillator..,1: A clock failure of the main crystal oscillator.."
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bitfld.long 0x0 18. "CFDEV,Clock Failure Detector Event" "0: No clock failure detection of the main crystal..,1: At least one clock failure detection of the main.."
bitfld.long 0x0 17. "MOSCRCS,Main RC Oscillator Status" "0: Main RC oscillator is not stabilized.,1: Main RC oscillator is stabilized."
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bitfld.long 0x0 16. "MOSCSELS,Main Clock Source Oscillator Selection Status" "0: Selection is in progress.,1: Selection is done."
bitfld.long 0x0 9. "PCKRDY1,Programmable Clock Ready Status" "0: Programmable Clock x is not ready.,1: Programmable Clock x is ready."
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bitfld.long 0x0 8. "PCKRDY0,Programmable Clock Ready Status" "0: Programmable Clock x is not ready.,1: Programmable Clock x is ready."
bitfld.long 0x0 3. "MCKRDY,Main System Bus Clock Status" "0: Main System Bus Clock is not ready.,1: Main System Bus Clock is ready."
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bitfld.long 0x0 0. "MOSCXTS,Main Crystal Oscillator Status" "0: Main crystal oscillator is not stabilized.,1: Main crystal oscillator is stabilized."
line.long 0x4 "IMR,Interrupt Mask Register"
bitfld.long 0x4 25. "PLL_INT,PLL Interrupt Mask" "0,1"
bitfld.long 0x4 23. "MCKMON,Main System Bus Clock Monitor Error Interrupt Mask" "0,1"
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bitfld.long 0x4 21. "XT32KERR,32.768 kHz Crystal Oscillator Error Interrupt Mask" "0,1"
bitfld.long 0x4 18. "CFDEV,Clock Failure Detector Event Interrupt Mask" "0,1"
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bitfld.long 0x4 17. "MOSCRCS,Main RC Status Interrupt Mask" "0,1"
bitfld.long 0x4 16. "MOSCSELS,Main Clock Source Oscillator Selection Status Interrupt Mask" "0,1"
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bitfld.long 0x4 9. "PCKRDY1,Programmable Clock Ready 1 Interrupt Mask" "0,1"
bitfld.long 0x4 8. "PCKRDY0,Programmable Clock Ready 0 Interrupt Mask" "0,1"
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bitfld.long 0x4 3. "MCKRDY,Main System Bus Clock Ready Interrupt Mask" "0,1"
bitfld.long 0x4 0. "MOSCXTS,Main Crystal Oscillator Status Interrupt Mask" "0,1"
group.long 0x70++0x7
line.long 0x0 "FSMR,Fast Startup Mode Register"
bitfld.long 0x0 25. "WLAN1,Wakeup on LAN[x]" "0: The Wakeup on LAN[x] alarm has no effect on the..,1: The Wakeup on LAN[x] alarm enables a fast.."
bitfld.long 0x0 24. "WLAN0,Wakeup on LAN[x]" "0: The Wakeup on LAN[x] alarm has no effect on the..,1: The Wakeup on LAN[x] alarm enables a fast.."
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bitfld.long 0x0 18. "USBAL,USB Alarm Enable" "0: The USB alarm has no effect on the IP_Acronym.,1: The USB alarm enables a fast restart signal to.."
bitfld.long 0x0 17. "RTCAL,RTC Alarm Enable" "0: The RTC alarm has no effect on the IP_Acronym.,1: The RTC alarm enables a fast restart signal to.."
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bitfld.long 0x0 16. "RTTAL,RTT Alarm Enable" "0: The RTT alarm has no effect on the IP_Acronym.,1: The RTT alarm enables a fast restart signal to.."
line.long 0x4 "WCR,Wakeup Control Register"
bitfld.long 0x4 24. "CMD,Command" "0: Read mode.,1: Write mode."
bitfld.long 0x4 17. "WIP,Wakeup Input Polarity" "0,1"
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bitfld.long 0x4 16. "EN,Wakeup Input Enable" "0: The selected wakeup input has no effect on the..,1: The selected wakeup input enables a fast restart.."
hexmask.long.byte 0x4 0.--3. 1. "WKPIONB,Wakeup Input Number"
wgroup.long 0x78++0x3
line.long 0x0 "FOCR,Fault Output Clear Register"
bitfld.long 0x0 0. "FOCLR,Fault Output Clear" "0,1"
group.long 0x80++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
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bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x84++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
group.long 0x88++0x3
line.long 0x0 "PCR,Peripheral Control Register"
bitfld.long 0x0 31. "CMD,Command" "0: Read mode.,1: Write mode."
bitfld.long 0x0 29. "GCLKEN,Generic Clock Enable" "0: The selected generic clock is disabled.,1: The selected generic clock is enabled."
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bitfld.long 0x0 28. "EN,Enable" "0: Selected Peripheral clock is disabled.,1: Selected Peripheral clock is enabled."
hexmask.long.word 0x0 16.--27. 1. "GCLKDIV,Generic Clock Division Ratio"
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hexmask.long.byte 0x0 8.--12. 1. "GCLKCSS,Generic Clock Source Selection"
hexmask.long.byte 0x0 0.--6. 1. "PID,Peripheral ID"
group.long 0x9C++0x3
line.long 0x0 "MCKLIM,MCK Monitor Limits Register"
hexmask.long.byte 0x0 8.--15. 1. "MCK_HIGH_IT,MCK Monitoring High IT Limit"
hexmask.long.byte 0x0 0.--7. 1. "MCK_LOW_IT,MCK Monitoring Low IT Limit"
rgroup.long 0xA0++0x7
line.long 0x0 "CSR0,Peripheral Clock Status Register 0"
bitfld.long 0x0 30. "PID30,Peripheral Clock 30 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 29. "PID29,Peripheral Clock 29 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 28. "PID28,Peripheral Clock 28 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 26. "PID26,Peripheral Clock 26 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 25. "PID25,Peripheral Clock 25 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 24. "PID24,Peripheral Clock 24 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 23. "PID23,Peripheral Clock 23 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 22. "PID22,Peripheral Clock 22 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 20. "PID20,Peripheral Clock 20 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 19. "PID19,Peripheral Clock 19 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 18. "PID18,Peripheral Clock 18 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 17. "PID17,Peripheral Clock 17 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 16. "PID16,Peripheral Clock 16 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 15. "PID15,Peripheral Clock 15 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 14. "PID14,Peripheral Clock 14 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 13. "PID13,Peripheral Clock 13 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 12. "PID12,Peripheral Clock 12 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 11. "PID11,Peripheral Clock 11 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 10. "PID10,Peripheral Clock 10 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 9. "PID9,Peripheral Clock 9 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 8. "PID8,Peripheral Clock 8 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 7. "PID7,Peripheral Clock 7 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 6. "PID6,Peripheral Clock 6 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 5. "PID5,Peripheral Clock 5 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 4. "PID4,Peripheral Clock 4 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x0 3. "PID3,Peripheral Clock 3 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x0 2. "PID2,Peripheral Clock 2 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
line.long 0x4 "CSR1,Peripheral Clock Status Register 1"
bitfld.long 0x4 27. "PID59,Peripheral Clock 59 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 26. "PID58,Peripheral Clock 58 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 24. "PID56,Peripheral Clock 56 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 22. "PID54,Peripheral Clock 54 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 21. "PID53,Peripheral Clock 53 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 20. "PID52,Peripheral Clock 52 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 19. "PID51,Peripheral Clock 51 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 17. "PID49,Peripheral Clock 49 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 16. "PID48,Peripheral Clock 48 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 15. "PID47,Peripheral Clock 47 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 13. "PID45,Peripheral Clock 45 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 12. "PID44,Peripheral Clock 44 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 11. "PID43,Peripheral Clock 43 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 10. "PID42,Peripheral Clock 42 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 9. "PID41,Peripheral Clock 41 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 8. "PID40,Peripheral Clock 40 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 7. "PID39,Peripheral Clock 39 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 6. "PID38,Peripheral Clock 38 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 5. "PID37,Peripheral Clock 37 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 4. "PID36,Peripheral Clock 36 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 3. "PID35,Peripheral Clock 35 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 2. "PID34,Peripheral Clock 34 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
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bitfld.long 0x4 1. "PID33,Peripheral Clock 33 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
bitfld.long 0x4 0. "PID32,Peripheral Clock 32 Status" "0: The corresponding peripheral clock is disabled.,1: The corresponding peripheral clock is enabled."
rgroup.long 0xC0++0x7
line.long 0x0 "GCSR0,Generic Clock Status Register 0"
bitfld.long 0x0 30. "GPID30,Generic Clock 30 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 29. "GPID29,Generic Clock 29 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 26. "GPID26,Generic Clock 26 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 25. "GPID25,Generic Clock 25 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 24. "GPID24,Generic Clock 24 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 19. "GPID19,Generic Clock 19 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 17. "GPID17,Generic Clock 17 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 16. "GPID16,Generic Clock 16 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 15. "GPID15,Generic Clock 15 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 14. "GPID14,Generic Clock 14 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 13. "GPID13,Generic Clock 13 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 12. "GPID12,Generic Clock 12 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 11. "GPID11,Generic Clock 11 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 10. "GPID10,Generic Clock 10 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
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bitfld.long 0x0 9. "GPID9,Generic Clock 9 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 8. "GPID8,Generic Clock 8 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
newline
bitfld.long 0x0 7. "GPID7,Generic Clock 7 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x0 6. "GPID6,Generic Clock 6 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
newline
bitfld.long 0x0 5. "GPID5,Generic Clock 5 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
line.long 0x4 "GCSR1,Generic Clock Status Register 1"
bitfld.long 0x4 26. "GPID58,Generic Clock 58 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x4 23. "GPID55,Generic Clock 55 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
newline
bitfld.long 0x4 15. "GPID47,Generic Clock 47 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x4 13. "GPID45,Generic Clock 45 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
newline
bitfld.long 0x4 10. "GPID42,Generic Clock 42 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x4 5. "GPID37,Generic Clock 37 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
newline
bitfld.long 0x4 3. "GPID35,Generic Clock 35 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x4 2. "GPID34,Generic Clock 34 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
newline
bitfld.long 0x4 1. "GPID33,Generic Clock 33 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
bitfld.long 0x4 0. "GPID32,Generic Clock 32 Status" "0: The corresponding Generic clock is disabled.,1: The corresponding Generic clock is enabled."
wgroup.long 0xE0++0x7
line.long 0x0 "PLL_IER,PLL Interrupt Enable Register"
bitfld.long 0x0 19. "UNLOCKLV,LVDS PLL Unlock Interrupt Enable" "0,1"
bitfld.long 0x0 18. "UNLOCKAU,AUDIO PLL Unlock Interrupt Enable" "0,1"
newline
bitfld.long 0x0 17. "UNLOCKU,UPLL Unlock Interrupt Enable" "0,1"
bitfld.long 0x0 16. "UNLOCKA,PLLA Unlock Interrupt Enable" "0,1"
newline
bitfld.long 0x0 3. "LOCKLV,LVDS PLL Lock Interrupt Enable" "0,1"
bitfld.long 0x0 2. "LOCKAU,AUDIO PLL Lock Interrupt Enable" "0,1"
newline
bitfld.long 0x0 1. "LOCKU,UPLL Lock Interrupt Enable" "0,1"
bitfld.long 0x0 0. "LOCKA,PLLA Lock Interrupt Enable" "0,1"
line.long 0x4 "PLL_IDR,PLL Interrupt Disable Register"
bitfld.long 0x4 19. "UNLOCKLV,LVDS PLL Unlock Interrupt Disable" "0,1"
bitfld.long 0x4 18. "UNLOCKAU,AUDIO PLL Unlock Interrupt Disable" "0,1"
newline
bitfld.long 0x4 17. "UNLOCKU,UPLL Unlock Interrupt Disable" "0,1"
bitfld.long 0x4 16. "UNLOCKA,PLLA Unlock Interrupt Disable" "0,1"
newline
bitfld.long 0x4 3. "LOCKLV,LVDS PLL Lock Interrupt Disable" "0,1"
bitfld.long 0x4 2. "LOCKAU,AUDIO PLL Lock Interrupt Disable" "0,1"
newline
bitfld.long 0x4 1. "LOCKU,UPLL Lock Interrupt Disable" "0,1"
bitfld.long 0x4 0. "LOCKA,PLLA Lock Interrupt Disable" "0,1"
rgroup.long 0xE8++0xB
line.long 0x0 "PLL_IMR,PLL Interrupt Mask Register"
bitfld.long 0x0 19. "UNLOCKLV,LVDS PLL Unlock Interrupt Mask" "0,1"
bitfld.long 0x0 18. "UNLOCKAU,AUDIO PLL Unlock Interrupt Mask" "0,1"
newline
bitfld.long 0x0 17. "UNLOCKU,UPLL Unlock Interrupt Mask" "0,1"
bitfld.long 0x0 16. "UNLOCKA,PLLA Unlock Interrupt Mask" "0,1"
newline
bitfld.long 0x0 3. "LOCKLV,LVDS PLL Lock Interrupt Mask" "0,1"
bitfld.long 0x0 2. "LOCKAU,AUDIO PLL Lock Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "LOCKU,UPLL Lock Interrupt Mask" "0,1"
bitfld.long 0x0 0. "LOCKA,PLLA Lock Interrupt Mask" "0,1"
line.long 0x4 "PLL_ISR0,PLL Interrupt Status Register 0"
bitfld.long 0x4 19. "LVDSUNLOCK,LVDS PLL Unlock Interrupt Status" "0: LVDS PLL is not unlocked.,1: LVDS PLL is unlocked."
bitfld.long 0x4 18. "AUDIOUNLOCK,Audio PLL Unlock Interrupt Status" "0: Audio PLL is not unlocked.,1: Audio PLL is unlocked. To know the unlock type.."
newline
bitfld.long 0x4 17. "UNLOCKU,UPLL Unlock Interrupt Status" "0: UPLL is not unlocked.,1: UPLL is unlocked. To know the unlock type the.."
bitfld.long 0x4 16. "UNLOCKA,PLLA Unlock Interrupt Status" "0: PLLA is not unlocked.,1: PLLA is unlocked. To know the unlock type the.."
newline
bitfld.long 0x4 3. "LVDSLOCK,LVDS PLL Lock Interrupt Status" "0: LVDS PLL is not locked.,1: LVDS PLL is locked."
bitfld.long 0x4 2. "AUDIOLOCK,Audio PLL Lock Interrupt Status" "0: Audio PLL is not locked.,1: Audio PLL is locked."
newline
bitfld.long 0x4 1. "LOCKU,UPLL Lock Interrupt Status" "0: UPLL is not locked.,1: UPLL is locked."
bitfld.long 0x4 0. "LOCKA,PLLA Lock Interrupt Status" "0: PLLA is not locked.,1: PLLA is locked."
line.long 0x8 "PLL_ISR1,PLL Interrupt Status Register 1"
bitfld.long 0x8 18. "OVRAU,AUDIO PLL Overflow" "0: AUDIO PLL is not in overflow state.,1: AUDIO PLL encountered an overflow."
bitfld.long 0x8 2. "UDRAU,AUDIO PLL Underflow" "0: AUDIO PLL is not in underflow state.,1: AUDIO PLL encountered an underflow."
tree.end
tree "PMECC (Programmable Multibit Error Correction Code Controller)"
base ad:0xFFFFE000
group.long 0x0++0x13
line.long 0x0 "CFG,PMECC Configuration Register"
bitfld.long 0x0 20. "AUTO,Automatic Mode Enable" "0: Indicates that the spare area is not protected.,1: Indicates that the spare is error protected. In.."
bitfld.long 0x0 16. "SPAREEN,Spare Enable" "0: The spare area is skipped.,1: The spare area contains protected data or only.."
newline
bitfld.long 0x0 12. "NANDWR,NAND Write Access" "?,1: NAND write access"
bitfld.long 0x0 8.--9. "PAGESIZE,Number of Sectors in the Page" "0: 1 sector for main area (512 or 1024 bytes),1: 2 sectors for main area (1024 or 2048 bytes),2: 4 sectors for main area (2048 or 4096 bytes),3: 8 errors for main area (4096 or 8192 bytes)"
newline
bitfld.long 0x0 4. "SECTORSZ,Sector Size" "0: The ECC computation is based on a sector of 512..,1: The ECC computation is based on a sector of 1024.."
bitfld.long 0x0 0.--2. "BCH_ERR,Error Correct Capability" "0: 2 errors,1: 4 errors,2: 8 errors,3: 12 errors,4: 24 errors,?,?,?"
line.long 0x4 "SAREA,PMECC Spare Area Size Register"
hexmask.long.word 0x4 0.--8. 1. "SPARESIZE,Spare Area Size"
line.long 0x8 "SADDR,PMECC Start Address Register"
hexmask.long.word 0x8 0.--8. 1. "STARTADDR,ECC Area Start Address (byte oriented address)"
line.long 0xC "EADDR,PMECC End Address Register"
hexmask.long.word 0xC 0.--8. 1. "ENDADDR,ECC Area End Address (byte oriented address)"
line.long 0x10 "CLK,PMECC Clock Control Register"
bitfld.long 0x10 0.--2. "CLKCTRL,Clock Control Register" "0,1,2,3,4,5,6,7"
wgroup.long 0x14++0x3
line.long 0x0 "CTRL,PMECC Control Register"
bitfld.long 0x0 5. "DISABLE,PMECC Module Disable" "0,1"
bitfld.long 0x0 4. "ENABLE,PMECC Module Enable" "0,1"
newline
bitfld.long 0x0 2. "USER,Start a User Mode Phase" "0,1"
bitfld.long 0x0 1. "DATA,Start a Data Phase" "0,1"
newline
bitfld.long 0x0 0. "RST,Reset the PMECC Module" "0,1"
rgroup.long 0x18++0x3
line.long 0x0 "SR,PMECC Status Register"
bitfld.long 0x0 4. "ENABLE,PMECC Module Status" "0: The PMECC module is disabled and can be..,1: The PMECC module is enabled and the.."
bitfld.long 0x0 0. "BUSY,The Kernel of the PMECC is Busy" "0,1"
wgroup.long 0x1C++0x7
line.long 0x0 "IER,PMECC Interrupt Enable register"
bitfld.long 0x0 0. "ERRIE,Error Interrupt Enable" "0,1"
line.long 0x4 "IDR,PMECC Interrupt Disable Register"
bitfld.long 0x4 0. "ERRID,Error Interrupt Disable" "0,1"
rgroup.long 0x24++0x7
line.long 0x0 "IMR,PMECC Interrupt Mask Register"
bitfld.long 0x0 0. "ERRIM,Error Interrupt Mask" "0,1"
line.long 0x4 "ISR,PMECC Interrupt Status Register"
hexmask.long.byte 0x4 0.--7. 1. "ERRIS,Error Interrupt Status"
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0xFFFFE040 ad:0xFFFFE080 ad:0xFFFFE0C0 ad:0xFFFFE100 ad:0xFFFFE140 ad:0xFFFFE180 ad:0xFFFFE1C0 ad:0xFFFFE200)
tree "PMECC_ECC[$1]"
base $2
repeat 11. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2)++0x3
line.long 0x0 "ECC[$1],PMECC ECC x Register"
hexmask.long 0x0 0.--31. 1. "ECC,BCH Redundancy"
repeat.end
tree.end
repeat.end
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0xFFFFE240 ad:0xFFFFE280 ad:0xFFFFE2C0 ad:0xFFFFE300 ad:0xFFFFE340 ad:0xFFFFE380 ad:0xFFFFE3C0 ad:0xFFFFE400)
tree "PMECC_REM[$1]"
base $2
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2)++0x3
line.long 0x0 "REM[$1],PMECC REM x Register"
hexmask.long.word 0x0 16.--29. 1. "REM2NP3,BCH Remainder 2 * N + 3"
hexmask.long.word 0x0 0.--13. 1. "REM2NP1,BCH Remainder 2 * N + 1"
repeat.end
tree.end
repeat.end
tree.end
tree "PMERRLOC (Programmable Multibit ECC Error Location)"
base ad:0xFFFFE600
group.long 0x0++0x3
line.long 0x0 "ELCFG,Configuration Register"
hexmask.long.byte 0x0 16.--20. 1. "ERRNUM,Number of Errors"
bitfld.long 0x0 0. "SECTORSZ,Sector Size" "0: The ECC computation is based on a 512-byte sector.,1: The ECC computation is based on a 1024-byte.."
rgroup.long 0x4++0x3
line.long 0x0 "ELPRIM,Primitive Register"
hexmask.long.word 0x0 0.--15. 1. "PRIMITIV,Primitive Polynomial"
group.long 0x8++0xB
line.long 0x0 "ELEN,Enable Register"
hexmask.long.word 0x0 0.--13. 1. "ENINIT,Initial Number of Bits in the Codeword"
line.long 0x4 "ELDIS,Disable Register"
bitfld.long 0x4 0. "DIS,Disable Error Location Engine" "0,1"
line.long 0x8 "ELSR,Status Register"
bitfld.long 0x8 0. "BUSY,Error Location Engine Busy" "0,1"
wgroup.long 0x14++0x7
line.long 0x0 "ELIER,Interrupt Enable Register"
bitfld.long 0x0 0. "DONE,Computation Terminated Interrupt Enable" "0,1"
line.long 0x4 "ELIDR,Interrupt Disable Register"
bitfld.long 0x4 0. "DONE,Computation Terminated Interrupt Disable" "0,1"
rgroup.long 0x1C++0x7
line.long 0x0 "ELIMR,Interrupt Mask Register"
bitfld.long 0x0 0. "DONE,Computation Terminated Interrupt Mask" "0,1"
line.long 0x4 "ELISR,Interrupt Status Register"
hexmask.long.byte 0x4 8.--12. 1. "ERR_CNT,Error Counter Value"
bitfld.long 0x4 0. "DONE,Computation Terminated Interrupt Status" "0,1"
rgroup.long 0x28++0x3
line.long 0x0 "SIGMA0,SIGMA0 Register"
hexmask.long.word 0x0 0.--13. 1. "SIGMA0,Coefficient of Degree 0 in the SIGMA Polynomial"
group.long 0x2C++0x5F
line.long 0x0 "SIGMA1,SIGMA1 Register"
hexmask.long.word 0x0 0.--13. 1. "SIGMA1,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x4 "SIGMA2,SIGMA2 Register"
hexmask.long.word 0x4 0.--13. 1. "SIGMA2,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x8 "SIGMA3,SIGMA3 Register"
hexmask.long.word 0x8 0.--13. 1. "SIGMA3,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0xC "SIGMA4,SIGMA4 Register"
hexmask.long.word 0xC 0.--13. 1. "SIGMA4,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x10 "SIGMA5,SIGMA5 Register"
hexmask.long.word 0x10 0.--13. 1. "SIGMA5,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x14 "SIGMA6,SIGMA6 Register"
hexmask.long.word 0x14 0.--13. 1. "SIGMA6,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x18 "SIGMA7,SIGMA7 Register"
hexmask.long.word 0x18 0.--13. 1. "SIGMA7,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x1C "SIGMA8,SIGMA8 Register"
hexmask.long.word 0x1C 0.--13. 1. "SIGMA8,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x20 "SIGMA9,SIGMA9 Register"
hexmask.long.word 0x20 0.--13. 1. "SIGMA9,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x24 "SIGMA10,SIGMA10 Register"
hexmask.long.word 0x24 0.--13. 1. "SIGMA10,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x28 "SIGMA11,SIGMA11 Register"
hexmask.long.word 0x28 0.--13. 1. "SIGMA11,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x2C "SIGMA12,SIGMA12 Register"
hexmask.long.word 0x2C 0.--13. 1. "SIGMA12,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x30 "SIGMA13,SIGMA13 Register"
hexmask.long.word 0x30 0.--13. 1. "SIGMA13,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x34 "SIGMA14,SIGMA14 Register"
hexmask.long.word 0x34 0.--13. 1. "SIGMA14,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x38 "SIGMA15,SIGMA15 Register"
hexmask.long.word 0x38 0.--13. 1. "SIGMA15,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x3C "SIGMA16,SIGMA16 Register"
hexmask.long.word 0x3C 0.--13. 1. "SIGMA16,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x40 "SIGMA17,SIGMA17 Register"
hexmask.long.word 0x40 0.--13. 1. "SIGMA17,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x44 "SIGMA18,SIGMA18 Register"
hexmask.long.word 0x44 0.--13. 1. "SIGMA18,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x48 "SIGMA19,SIGMA19 Register"
hexmask.long.word 0x48 0.--13. 1. "SIGMA19,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x4C "SIGMA20,SIGMA20 Register"
hexmask.long.word 0x4C 0.--13. 1. "SIGMA20,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x50 "SIGMA21,SIGMA21 Register"
hexmask.long.word 0x50 0.--13. 1. "SIGMA21,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x54 "SIGMA22,SIGMA22 Register"
hexmask.long.word 0x54 0.--13. 1. "SIGMA22,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x58 "SIGMA23,SIGMA23 Register"
hexmask.long.word 0x58 0.--13. 1. "SIGMA23,Coefficient of Degree x in the SIGMA Polynomial."
line.long 0x5C "SIGMA24,SIGMA24 Register"
hexmask.long.word 0x5C 0.--13. 1. "SIGMA24,Coefficient of Degree x in the SIGMA Polynomial."
repeat 24. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x8C)++0x3
line.long 0x0 "EL[$1],Error Location x Register"
hexmask.long.word 0x0 0.--13. 1. "ERRLOCN,Error Position within the Set {sector area spare area}."
repeat.end
tree.end
tree "PUF (Physically Unclonable Function)"
base ad:0xF8030000
group.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 31. "TESTPUF,Test PUF Operation" "0,1"
bitfld.long 0x0 30. "TESTMEM,Test Memory Operation" "0,1"
newline
bitfld.long 0x0 16. "RESEED,Reseed Operation" "0,1"
bitfld.long 0x0 15. "GENRAND,Generate Random Operation" "0,1"
newline
bitfld.long 0x0 9. "WRAP,Wrap Operation" "0,1"
bitfld.long 0x0 8. "WGENRAND,Wrap Generated Random Operation" "0,1"
newline
bitfld.long 0x0 7. "UNWRAP,Unwrap Operation" "0,1"
bitfld.long 0x0 6. "GETKEY,Get Key Operation" "0,1"
newline
bitfld.long 0x0 5. "STOP,Stop Operation" "0,1"
bitfld.long 0x0 3. "RECO,Reconstruct Operation" "0,1"
newline
bitfld.long 0x0 2. "START,Start Operation" "0,1"
bitfld.long 0x0 1. "ENROLL,Enroll Operation" "0,1"
newline
bitfld.long 0x0 0. "ZEROIZE,Zeroize Operation" "0,1"
rgroup.long 0x4++0x3
line.long 0x0 "ORR,Operation Result Register"
hexmask.long.byte 0x0 24.--31. 1. "LOPNUM,Last Operation Number"
bitfld.long 0x0 15. "RESEEDR,Reseed Required" "0: No action required.,1: The maximum number of DRBG2 requests has been.."
newline
bitfld.long 0x0 14. "RESEEDW,Reseed Warning" "0: No action required.,1: The DRBG reseed counter is close to its limit it.."
hexmask.long.byte 0x0 0.--7. 1. "RCODE,Last Operation Result Code"
group.long 0x8++0x3
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 30. "RESEEDR,Reseed Required" "0: No action required.,1: The maximum number of DRBG2 requests has been.."
bitfld.long 0x0 29. "RESEEDW,Reseed Warning" "0: No action required.,1: The reseed counter of the DRBG is close to its.."
newline
bitfld.long 0x0 6. "DOREQ,Data Out Request Status" "0: No data-out transfer is in progress.,1: A data-out transfer is in progress following a.."
bitfld.long 0x0 5. "DIREQ,Data In Request Status" "0: No data-in transfer is in progress.,1: A data-in transfer is in progress following a.."
newline
bitfld.long 0x0 4. "REJECTED,Last Command Rejection Status (cleared by writing a 1)" "0: No rejection event occurred since the last..,1: A rejection event occurred when the last command.."
bitfld.long 0x0 3. "ZEROIZED,PUF Zeroization in Progress" "0: No zeroization is in progress.,1: A zeroization action is in progress or the PUF.."
newline
bitfld.long 0x0 2. "ERROR,Last Operation Failed" "0: The last operation completed successfully.,1: The last operation failed."
bitfld.long 0x0 1. "OK,Last Operation Successfully Achieved" "0: ERROR bit must be checked.,1: The last operation completed successfully."
newline
bitfld.long 0x0 0. "BUSY,Operation in Progress" "0: No operation is in progress. A new operation can..,1: An operation is in progress. No new operation.."
rgroup.long 0xC++0x3
line.long 0x0 "AR,Allow Register"
bitfld.long 0x0 31. "TESTPUF,Test PUF Operation" "0,1"
bitfld.long 0x0 30. "TESTMEM,Test Memory Operation" "0,1"
newline
bitfld.long 0x0 16. "RESEED,Reseed Operation" "0,1"
bitfld.long 0x0 15. "GENRAND,Generate Random Operation" "0,1"
newline
bitfld.long 0x0 9. "WRAP,Wrap Operation" "0,1"
bitfld.long 0x0 8. "WGENRAND,Wrap Generated Random Operation" "0,1"
newline
bitfld.long 0x0 7. "UNWRAP,Unwrap Operation" "0,1"
bitfld.long 0x0 6. "GETKEY,Get Key Operation" "0,1"
newline
bitfld.long 0x0 5. "STOP,Stop Operation" "0,1"
bitfld.long 0x0 3. "RECO,Reconstruct Operation" "0,1"
newline
bitfld.long 0x0 2. "START,Start Operation" "0,1"
bitfld.long 0x0 1. "ENROLL,Enroll Operation" "0,1"
group.long 0x10++0xB
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 0. "INTEN,Interruption Enable" "0: Disables the interruption.,1: Enables the PUF to trigger an interruption from.."
line.long 0x4 "IMR,Interrupt Mask Register"
bitfld.long 0x4 30. "RESEEDR,Reseed Action Required Event" "0,1"
bitfld.long 0x4 29. "RESEEDW,Reseed Warning Event" "0,1"
newline
bitfld.long 0x4 6. "DOREQ,Data Out Request Event" "0,1"
bitfld.long 0x4 5. "DIREQ,Data In Request Event" "0,1"
newline
bitfld.long 0x4 4. "REJECTED,Last Activation Code Rejection Event" "0,1"
bitfld.long 0x4 3. "ZEROIZED,Zeroized Operation Completed Event" "0,1"
newline
bitfld.long 0x4 2. "ERROR,Last Operation Fail Event" "0,1"
bitfld.long 0x4 1. "OK,Last Operation Successful Achievement Event" "0,1"
newline
bitfld.long 0x4 0. "BUSY,Operation Start Event" "0,1"
line.long 0x8 "ISR,Interrupt Status Register"
bitfld.long 0x8 30. "RESEEDR,Reseed Action Required (cleared by writing a 1)" "0,1"
bitfld.long 0x8 29. "RESEEDW,Reseed Warning (cleared by writing a 1)" "0,1"
newline
bitfld.long 0x8 6. "DOREQ,Data Out Request (cleared by writing a 1)" "0,1"
bitfld.long 0x8 5. "DIREQ,Data In Request (cleared by writing a 1)" "0,1"
newline
bitfld.long 0x8 4. "REJECTED,Last Activation Code Rejection (cleared by writing a 1)" "0,1"
bitfld.long 0x8 3. "ZEROIZED,Zeroized Operation Completed (cleared by writing a 1)" "0,1"
newline
bitfld.long 0x8 2. "ERROR,Last Operation Fail (cleared by writing a 1)" "0,1"
bitfld.long 0x8 1. "OK,Last Operation Achievement (cleared by writing a 1)" "0,1"
newline
bitfld.long 0x8 0. "BUSY,Operation in Progress (cleared by writing a 1)" "0,1"
group.long 0x20++0x7
line.long 0x0 "DATA_DEST,Data Destination Register"
bitfld.long 0x0 1. "SO,Data Output on Private Key Bus" "0: Private Key Bus cannot transfer PUF data.,1: Private Key Bus is enabled to transfer PUF data."
bitfld.long 0x0 0. "DO,Data Output on PUF_DOR" "0: PUF_DOR cannot be used to read data from PUF..,1: PUF_DOR is enabled to read data from PUF.."
line.long 0x4 "DATA_SRC,Data Source Register"
bitfld.long 0x4 0. "DI,Data Input Loaded from PUF_DIR" "0: PUF_DIR cannot be used to transfer data to PUF.,1: PUF_DIR is enabled to load data to PUF."
rgroup.long 0x28++0x3
line.long 0x0 "KEY_INDEX,Key Index Register"
hexmask.long.byte 0x0 0.--3. 1. "KI,Key Index"
wgroup.long 0xA0++0x3
line.long 0x0 "DIR,Data Input Register"
hexmask.long 0x0 0.--31. 1. "DI,Data Input Value"
rgroup.long 0xA8++0x3
line.long 0x0 "DOR,Data Output Register"
hexmask.long 0x0 0.--31. 1. "DO,Data Output Value"
group.long 0xC0++0x3
line.long 0x0 "MISC,Miscellaneous Register"
bitfld.long 0x0 0. "DEND,Data Endianness" "0: Little-endian mode.,1: Big-endian mode. This is the default value."
group.long 0xD0++0x3
line.long 0x0 "IF_SR,Interface Status Register"
bitfld.long 0x0 0. "BUSERR,Bus Access Error (cleared by writing a 1)" "0: No incorrect access performed since the last..,1: An incorrect access has been performed. Cleared.."
group.long 0xD8++0x3
line.long 0x0 "TEST,Test Register"
bitfld.long 0x0 31. "BISTALLOW,Built-In Self-Test Allowed" "0: BIST Start (BISTEN) command is disabled and has..,1: BIST Start command (BISTEN) is allowed."
bitfld.long 0x0 7. "BISTERR,Built-In Self-Test Error" "0: No action,1: If BISTRUN=1 and BISTACTIVE=0 BIST has failed."
newline
bitfld.long 0x0 6. "BISTOK,Built-In Self-Test Run Passed" "0: No action,1: If BISTRUN=1 and BISTACTIVE=0 BIST has passed.."
bitfld.long 0x0 5. "BISTACTIVE,Built-In Self-Test Activity Status" "0: BIST has completed if BISTRUN=1.,1: If BISTRUN=1 BIST is in progress."
newline
bitfld.long 0x0 4. "BISTRUN,Built-In Self-Test Run Status" "0: BIST is not active or has not started yet.,1: BIST is enabled."
bitfld.long 0x0 0. "BISTEN,Built-In Self-Test Enable" "0: Disables the BIST must be performed once BIST..,1: Starts the BIST."
rgroup.long 0xDC++0x3
line.long 0x0 "PSR,Score Register"
hexmask.long.byte 0x0 0.--3. 1. "SCORE,Last Test Score"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0xE0)++0x3
line.long 0x0 "HW_RUC[$1],Hardware Restrict User Context x Register"
bitfld.long 0x0 31. "RUC31,Restrict User Context Bit 31" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 30. "RUC30,Restrict User Context Bit 30" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 29. "RUC29,Restrict User Context Bit 29" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 28. "RUC28,Restrict User Context Bit 28" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 27. "RUC27,Restrict User Context Bit 27" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 26. "RUC26,Restrict User Context Bit 26" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 25. "RUC25,Restrict User Context Bit 25" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 24. "RUC24,Restrict User Context Bit 24" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 23. "RUC23,Restrict User Context Bit 23" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 22. "RUC22,Restrict User Context Bit 22" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 21. "RUC21,Restrict User Context Bit 21" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 20. "RUC20,Restrict User Context Bit 20" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 19. "RUC19,Restrict User Context Bit 19" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 18. "RUC18,Restrict User Context Bit 18" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 17. "RUC17,Restrict User Context Bit 17" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 16. "RUC16,Restrict User Context Bit 16" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 15. "RUC15,Restrict User Context Bit 15" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 14. "RUC14,Restrict User Context Bit 14" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 13. "RUC13,Restrict User Context Bit 13" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 12. "RUC12,Restrict User Context Bit 12" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 11. "RUC11,Restrict User Context Bit 11" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 10. "RUC10,Restrict User Context Bit 10" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 9. "RUC9,Restrict User Context Bit 9" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 8. "RUC8,Restrict User Context Bit 8" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 7. "RUC7,Restrict User Context Bit 7" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 6. "RUC6,Restrict User Context Bit 6" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 5. "RUC5,Restrict User Context Bit 5" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 4. "RUC4,Restrict User Context Bit 4" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 3. "RUC3,Restrict User Context Bit 3" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 2. "RUC2,Restrict User Context Bit 2" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
newline
bitfld.long 0x0 1. "RUC1,Restrict User Context Bit 1" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
bitfld.long 0x0 0. "RUC0,Restrict User Context Bit 0" "0: This bit can be used in the user context 0 field.,1: This bit cannot be used in the user context 0.."
repeat.end
rgroup.long 0xF0++0x3
line.long 0x0 "HW_SETTINGS,Hardware Settings Register"
bitfld.long 0x0 31. "TESTPUF,Test PUF Operation" "0,1"
bitfld.long 0x0 30. "TESTMEM,Test Memory Operation" "0,1"
newline
bitfld.long 0x0 29. "MEMTEST,Memory Tests Included in Initialization" "0,1"
bitfld.long 0x0 27. "EXTSVIADIR,External Entropy Required via PUF_DIR During Reseed Operation" "0,1"
newline
bitfld.long 0x0 25. "LABTESTSEL,Selection of Lab Test Mode when LABTEST=0" "0,1"
bitfld.long 0x0 24. "LABTEST,Initialization to Lab Test Mode" "0,1"
newline
bitfld.long 0x0 16. "RESEED,Reseed Operation" "0,1"
bitfld.long 0x0 15. "GENRAND,Generate Random Operation" "0,1"
newline
bitfld.long 0x0 9. "WRAP,Wrap Operation" "0,1"
bitfld.long 0x0 8. "WGENRAND,Wrap Generated Random Operation" "0,1"
newline
bitfld.long 0x0 7. "UNWRAP,Unwrap Operation" "0,1"
bitfld.long 0x0 6. "GETKEY,Get Key Operation" "0,1"
newline
bitfld.long 0x0 5. "STOP,Stop Operation" "0,1"
bitfld.long 0x0 3. "RECO,Reconstruct Operation" "0,1"
newline
bitfld.long 0x0 2. "START,Start Operation" "0,1"
bitfld.long 0x0 1. "ENROLL,Enroll Operation" "0,1"
group.long 0x1D0++0x3
line.long 0x0 "ASIER,Access Security Interrupt Enable Register"
bitfld.long 0x0 0. "SECE,Security Error Interrupt Enable" "0: Disables triggering of the interrupt line on..,1: Enables triggering of the interrupt line on.."
rgroup.long 0x1D4++0x3
line.long 0x0 "ASISR,Access Security Interrupt Status Register"
bitfld.long 0x0 0. "SECE,Access Security Error Interrupt Enable" "0: Disables triggering of the interrupt line on..,1: Enables triggering of the interrupt line on.."
group.long 0x1E4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 6. "LCKWPITEN,Write Protection Lock Enable for Interrupt Register" "0: No effect.,1: Locks the write access to the WPITEN bit until.."
newline
bitfld.long 0x0 5. "LCKWPEN,Write Protection Lock Enable for Configuration Register" "0: No effect.,1: Locks the write access to the WPEN bit until the.."
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCREN," "0,1"
bitfld.long 0x0 1. "WPITEN,Write Protection Enable for Interrupt" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Configuration Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0x1E8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 24.--25. "SWETYP,Software Error Type (cleared on read)" "0: A write-only register has been read.,1: A write access has been performed on a read-only..,2: Access to an undefined address.,3: Unexpected access to PUF_DIR/PUF_DOR."
hexmask.long.word 0x0 8.--23. 1. "WPSRC,Write Protection Source"
newline
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: Violation of a write protection (PUF_WPMR.WPEN=1.."
tree.end
tree "PWM (Pulse Width Modulation Controller)"
base ad:0xF8034000
group.long 0x0++0x3
line.long 0x0 "MR,PWM Mode Register"
hexmask.long.byte 0x0 24.--27. 1. "PREB,CLKB Source Clock Selection"
hexmask.long.byte 0x0 16.--23. 1. "DIVB,CLKB Divide Factor"
newline
hexmask.long.byte 0x0 8.--11. 1. "PREA,CLKA Source Clock Selection"
hexmask.long.byte 0x0 0.--7. 1. "DIVA,CLKA Divide Factor"
wgroup.long 0x4++0x7
line.long 0x0 "ENA,PWM Enable Register"
bitfld.long 0x0 3. "CHID3,Channel ID" "0: No effect.,1: Enable PWM output for channel x."
bitfld.long 0x0 2. "CHID2,Channel ID" "0: No effect.,1: Enable PWM output for channel x."
newline
bitfld.long 0x0 1. "CHID1,Channel ID" "0: No effect.,1: Enable PWM output for channel x."
bitfld.long 0x0 0. "CHID0,Channel ID" "0: No effect.,1: Enable PWM output for channel x."
line.long 0x4 "DIS,PWM Disable Register"
bitfld.long 0x4 3. "CHID3,Channel ID" "0: No effect.,1: Disable PWM output for channel x."
bitfld.long 0x4 2. "CHID2,Channel ID" "0: No effect.,1: Disable PWM output for channel x."
newline
bitfld.long 0x4 1. "CHID1,Channel ID" "0: No effect.,1: Disable PWM output for channel x."
bitfld.long 0x4 0. "CHID0,Channel ID" "0: No effect.,1: Disable PWM output for channel x."
rgroup.long 0xC++0x3
line.long 0x0 "SR,PWM Status Register"
bitfld.long 0x0 3. "CHID3,Channel ID" "0: PWM output for channel x is disabled.,1: PWM output for channel x is enabled."
bitfld.long 0x0 2. "CHID2,Channel ID" "0: PWM output for channel x is disabled.,1: PWM output for channel x is enabled."
newline
bitfld.long 0x0 1. "CHID1,Channel ID" "0: PWM output for channel x is disabled.,1: PWM output for channel x is enabled."
bitfld.long 0x0 0. "CHID0,Channel ID" "0: PWM output for channel x is disabled.,1: PWM output for channel x is enabled."
wgroup.long 0x10++0x7
line.long 0x0 "IER,PWM Interrupt Enable Register"
bitfld.long 0x0 3. "CHID3,Channel ID" "0: No effect.,1: Enable interrupt for PWM channel x."
bitfld.long 0x0 2. "CHID2,Channel ID" "0: No effect.,1: Enable interrupt for PWM channel x."
newline
bitfld.long 0x0 1. "CHID1,Channel ID" "0: No effect.,1: Enable interrupt for PWM channel x."
bitfld.long 0x0 0. "CHID0,Channel ID" "0: No effect.,1: Enable interrupt for PWM channel x."
line.long 0x4 "IDR,PWM Interrupt Disable Register"
bitfld.long 0x4 3. "CHID3,Channel ID" "0: No effect.,1: Disable interrupt for PWM channel x."
bitfld.long 0x4 2. "CHID2,Channel ID" "0: No effect.,1: Disable interrupt for PWM channel x."
newline
bitfld.long 0x4 1. "CHID1,Channel ID" "0: No effect.,1: Disable interrupt for PWM channel x."
bitfld.long 0x4 0. "CHID0,Channel ID" "0: No effect.,1: Disable interrupt for PWM channel x."
rgroup.long 0x18++0x7
line.long 0x0 "IMR,PWM Interrupt Mask Register"
bitfld.long 0x0 3. "CHID3,Channel ID" "0: Interrupt for PWM channel x is disabled.,1: Interrupt for PWM channel x is enabled."
bitfld.long 0x0 2. "CHID2,Channel ID" "0: Interrupt for PWM channel x is disabled.,1: Interrupt for PWM channel x is enabled."
newline
bitfld.long 0x0 1. "CHID1,Channel ID" "0: Interrupt for PWM channel x is disabled.,1: Interrupt for PWM channel x is enabled."
bitfld.long 0x0 0. "CHID0,Channel ID" "0: Interrupt for PWM channel x is disabled.,1: Interrupt for PWM channel x is enabled."
line.long 0x4 "ISR,PWM Interrupt Status Register"
bitfld.long 0x4 3. "CHID3,Channel ID" "0: No new channel period has been achieved since..,1: At least one new channel period has been.."
bitfld.long 0x4 2. "CHID2,Channel ID" "0: No new channel period has been achieved since..,1: At least one new channel period has been.."
newline
bitfld.long 0x4 1. "CHID1,Channel ID" "0: No new channel period has been achieved since..,1: At least one new channel period has been.."
bitfld.long 0x4 0. "CHID0,Channel ID" "0: No new channel period has been achieved since..,1: At least one new channel period has been.."
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0xF8034200 ad:0xF8034220 ad:0xF8034240 ad:0xF8034260)
tree "PWM_CH_NUM[$1]"
base $2
group.long ($2)++0xB
line.long 0x0 "CMR,PWM Channel Mode Register"
bitfld.long 0x0 10. "CPD,Channel Update Period" "0: Writing to PWM_CUPDx will modify the duty cycle..,1: Writing to PWM_CUPDx will modify the period at.."
bitfld.long 0x0 9. "CPOL,Channel Polarity" "0: The output waveform starts at a low level.,1: The output waveform starts at a high level."
bitfld.long 0x0 8. "CALG,Channel Alignment" "0: The period is left-aligned.,1: The period is center-aligned."
newline
hexmask.long.byte 0x0 0.--3. 1. "CPRE,Channel Prescaler"
line.long 0x4 "CDTY,PWM Channel Duty Cycle Register"
hexmask.long 0x4 0.--31. 1. "CDTY,Channel Duty Cycle"
line.long 0x8 "CPRD,PWM Channel Period Register"
hexmask.long 0x8 0.--31. 1. "CPRD,Channel Period"
rgroup.long ($2+0xC)++0x3
line.long 0x0 "CCNT,PWM Channel Counter Register"
hexmask.long 0x0 0.--31. 1. "CNT,Channel Counter Register"
wgroup.long ($2+0x10)++0x3
line.long 0x0 "CUPD,PWM Channel Update Register"
hexmask.long 0x0 0.--31. 1. "CUPD,Channel Update Register"
tree.end
repeat.end
tree.end
tree "QSPI (Quad Serial Peripheral Interface)"
base ad:0xF0014000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0: No effect.,1: The chip select is deasserted after the end of.."
bitfld.long 0x0 10. "RTOUT,Reset Time-out" "0: No effect.,1: Request a TOUT flag reset."
newline
bitfld.long 0x0 9. "STTFR,Start Transfer" "0: No effect.,1: Starts the transfer when TFRTYP = 0 and SMRM = 1.."
bitfld.long 0x0 8. "UPDCFG,Update Configuration" "0: No effect.,1: Requests an update of the QSPI Controller core.."
newline
bitfld.long 0x0 7. "SWRST,QSPI Software Reset" "0: No effect.,1: Resets the QSPI. A software-triggered hardware.."
bitfld.long 0x0 5. "SRFRSH,Start REFRESH" "0: No effect.,1: Starts a refresh sequence. QSPI_ISR.RFRSHD.."
newline
bitfld.long 0x0 1. "QSPIDIS,QSPI Disable" "0: No effect.,1: Disables the QSPI."
bitfld.long 0x0 0. "QSPIEN,QSPI Enable" "0: No effect.,1: Enables the QSPI to transfer and receive data."
group.long 0x4++0x3
line.long 0x0 "MR,Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "DLYCS,Minimum Inactive QCS Delay"
hexmask.long.byte 0x0 16.--23. 1. "DLYBCT,Delay Between Consecutive Transfers"
newline
bitfld.long 0x0 15. "OENSD,Output Enable Shift Disabled" "0: By default the pad output enable signal is held..,1: The pad output enable signal is not held for one.."
bitfld.long 0x0 13. "QICMEN,QSPI Inter-chip Mode Enable" "0: QSPI_WICR.WROPT and QSPI_RICR.RDOPT define the..,1: No dummy cycles are inserted for write accesses.."
newline
hexmask.long.byte 0x0 8.--11. 1. "NBBITS,Number Of Bits Per Transfer"
bitfld.long 0x0 7. "TAMPCLR,Tamper Clear Enable" "0: A tamper detection event has no effect on QSPI..,1: A tamper detection event immediately clears QSPI.."
newline
bitfld.long 0x0 4.--5. "CSMODE,Chip Select Mode" "0: The chip select is deasserted if QSPI_TDR.TD has..,1: The chip select is deasserted when the bit..,2: The chip select is deasserted systematically..,?"
bitfld.long 0x0 3. "DQSDLYEN,DQS Delay Enable" "0: DQS Delay cell is disabled.,1: DQS Delay cell is enabled. The DQS Delay cell.."
newline
bitfld.long 0x0 2. "WDRBT,Wait Data Read Before Transfer" "0: No effect. In SPI mode a transfer can be..,1: In SPI mode a transfer can start only if.."
bitfld.long 0x0 0. "SMM,Serial Memory Mode" "0: The QSPI is in SPI mode.,1: The QSPI is in Serial Memory mode."
rgroup.long 0x8++0x3
line.long 0x0 "RDR,Receive Data Register"
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
wgroup.long 0xC++0x3
line.long 0x0 "TDR,Transmit Data Register"
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
rgroup.long 0x10++0x3
line.long 0x0 "ISR,Interrupt Status Register"
bitfld.long 0x0 17. "TOUT,QSPI Time-out" "0: No QSPI time-out occurred since the last write..,1: At least one QSPI time-out occurred since the.."
bitfld.long 0x0 16. "RFRSHD,Refresh Done" "0: No refresh done event occurred since the last..,1: One refresh done event has been detected since.."
newline
bitfld.long 0x0 15. "CSRA,Chip Select Rise Autoclear" "0: No chip select rise has been detected since..,1: One chip select rise has been detected since the.."
bitfld.long 0x0 14. "CSFA,Chip Select Fall Autoclear" "0: No chip select fall has been detected since end..,1: One chip select fall has been detected since the.."
newline
bitfld.long 0x0 13. "QITR,QSPI Interrupt Rise" "0: No rising of the QSPI memory interrupt line has..,1: At least one QSPI memory interrupt line rising.."
bitfld.long 0x0 12. "QITF,QSPI Interrupt Fall" "0: No falling of the QSPI memory interrupt line has..,1: At least one QSPI memory interrupt line falling.."
newline
bitfld.long 0x0 11. "LWRA,Last Write Access (cleared on read)" "0: Last write access has not been sent since the..,1: At least one last write access has been sent.."
bitfld.long 0x0 10. "INSTRE,Instruction End Status (cleared on read)" "0: No instruction end has been detected since the..,1: At least one instruction end has been detected.."
newline
bitfld.long 0x0 8. "CSR,Chip Select Rise (cleared on read)" "0: No chip select rise has been detected since the..,1: At least one chip select rise has been detected.."
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0: No overrun has been detected since the last read..,1: At least one overrun error has occurred since.."
newline
bitfld.long 0x0 2. "TXEMPTY,Transmission Registers Empty (cleared by writing QSPI_TDR)" "0: As soon as data is written in QSPI_TDR.,1: QSPI_TDR and the internal shifter are empty. If.."
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing QSPI_TDR)" "0: Data has been written to QSPI_TDR and not yet..,1: The last data written in the QSPI_TDR has been.."
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading QSPI_RDR)" "0: No data has been received since the last read of..,1: Data has been received and the received data has.."
wgroup.long 0x14++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 17. "TOUT,QSPI Time-out Interrupt Enable" "0,1"
bitfld.long 0x0 16. "RFRSHD,Refresh Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 15. "CSRA,Chip Select Rise Autoclear Interrupt Enable" "0,1"
bitfld.long 0x0 14. "CSFA,Chip Select Fall Autoclear Interrupt Enable" "0,1"
newline
bitfld.long 0x0 13. "QITR,QSPI Interrupt Rise Interrupt Enable" "0,1"
bitfld.long 0x0 12. "QITF,QSPI Interrupt Fall Interrupt Enable" "0,1"
newline
bitfld.long 0x0 11. "LWRA,Last Write Access Interrupt Enable" "0,1"
bitfld.long 0x0 10. "INSTRE,Instruction End Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "CSR,Chip Select Rise Interrupt Enable" "0,1"
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
newline
bitfld.long 0x0 2. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 17. "TOUT,QSPI Time-out Interrupt Disable" "0,1"
bitfld.long 0x4 16. "RFRSHD,Refresh Done Interrupt Disable" "0,1"
newline
bitfld.long 0x4 15. "CSRA,Chip Select Rise Autoclear Interrupt Disable" "0,1"
bitfld.long 0x4 14. "CSFA,Chip Select Fall Autoclear Interrupt Disable" "0,1"
newline
bitfld.long 0x4 13. "QITR,QSPI Interrupt Rise Interrupt Disable" "0,1"
bitfld.long 0x4 12. "QITF,QSPI Interrupt Fall Interrupt Disable" "0,1"
newline
bitfld.long 0x4 11. "LWRA,Last Write Access Interrupt Disable" "0,1"
bitfld.long 0x4 10. "INSTRE,Instruction End Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "CSR,Chip Select Rise Interrupt Disable" "0,1"
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
newline
bitfld.long 0x4 2. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
bitfld.long 0x4 1. "TDRE,Transmit Data Register Empty Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 17. "TOUT,QSPI Time-out Interrupt Mask" "0,1"
bitfld.long 0x0 16. "RFRSHD,Refresh Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 15. "CSRA,Chip Select Rise Autoclear Interrupt Mask" "0,1"
bitfld.long 0x0 14. "CSFA,Chip Select Fall Autoclear Interrupt Mask" "0,1"
newline
bitfld.long 0x0 13. "QITR,QSPI Interrupt Rise Interrupt Mask" "0,1"
bitfld.long 0x0 12. "QITF,QSPI Interrupt Fall Interrupt Mask" "0,1"
newline
bitfld.long 0x0 11. "LWRA,Last Write Access Interrupt Mask" "0,1"
bitfld.long 0x0 10. "INSTRE,Instruction End Interrupt Mask" "0,1"
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bitfld.long 0x0 8. "CSR,Chip Select Rise Interrupt Mask" "0,1"
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
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bitfld.long 0x0 2. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty Interrupt Mask" "0,1"
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bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
group.long 0x20++0x7
line.long 0x0 "SCR,Serial Clock Register"
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before QSCK"
bitfld.long 0x0 1. "CPHA,Clock Phase" "0: Data is captured on the leading edge of QSCK and..,1: Data is changed on the leading edge of QSCK and.."
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bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: The inactive state value of QSCK is logic level..,1: The inactive state value of QSCK is logic level.."
line.long 0x4 "SR,Status Register"
bitfld.long 0x4 4. "HIDLE,QSPI Idle" "0: The QSPI is not in Idle state (either..,1: The QSPI is in Idle state (not transmitting and.."
bitfld.long 0x4 3. "RBUSY,Read Busy" "0: The system bus interface has no activity.,1: The system bus interface is currently processing.."
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bitfld.long 0x4 2. "CSS,Chip Select Status" "0: The chip select is asserted.,1: The chip select is not asserted."
bitfld.long 0x4 1. "QSPIENS,QSPI Enable Status" "0: The QSPI is disabled.,1: The QSPI is enabled."
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bitfld.long 0x4 0. "SYNCBSY,Synchronization Busy" "0: No event synchronization between the QSPI..,1: Event synchronization between the QSPI.."
group.long 0x30++0x13
line.long 0x0 "IAR,Instruction Address Register"
hexmask.long 0x0 0.--31. 1. "ADDR,Address"
line.long 0x4 "WICR,Write Instruction Code Register"
hexmask.long.byte 0x4 16.--23. 1. "WROPT,Write Option Code"
hexmask.long.word 0x4 0.--15. 1. "WRINST,Write Instruction Code"
line.long 0x8 "IFR,Instruction Frame Register"
bitfld.long 0x8 28.--29. "PROTTYP,Protocol Type" "0: Standard (Q)SPI Protocol,1: Twin-Quad Protocol,2: OctaFlash Protocol,3: HyperFlash Protocol"
bitfld.long 0x8 27. "HFWBEN,HyperFlash Write Buffer Enable" "0: No effect.,1: Each write access received on the system bus.."
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bitfld.long 0x8 26. "DDRCMDEN,DDR Mode Command Enable" "0: Transfer of instruction field is performed in..,1: Transfer of instruction field is performed in.."
bitfld.long 0x8 25. "DQSEN,DQS Sampling Enable" "0: Data from the memory are not sampled with DQS..,1: Data from the memory are sampled with DQS signal."
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bitfld.long 0x8 24. "APBTFRTYP,Peripheral BusTransfer Type" "0: Peripheral bus register transfer to the memory..,1: Peripheral bus register transfer to the memory.."
bitfld.long 0x8 23. "SMRM,Serial Memory Register Mode" "0: Serial Memory registers are written via AHB..,1: Serial Memory registers are written via APB.."
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bitfld.long 0x8 22. "END,Endianness" "0: Data are sent in little-endian format to the..,1: Data are sent in big-endian format to the memory."
hexmask.long.byte 0x8 16.--20. 1. "NBDUM,Number Of Dummy Cycles"
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bitfld.long 0x8 15. "DDREN,DDR Mode Enable" "0: Transfers are performed in Single Data Rate mode.,1: Transfers are performed in Double Data Rate mode.."
bitfld.long 0x8 14. "CRM,Continuous Read Mode" "0: Continuous Read mode is disabled.,1: Continuous Read mode is enabled."
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bitfld.long 0x8 12. "TFRTYP,Data Transfer Type" "0: Read/Write of memory register write of memory..,1: Read/Write accesses to the memory space. This.."
bitfld.long 0x8 10.--11. "ADDRL,Address Length" "0: 8-bit address size,1: 16-bit address size,2: 24-bit address size,3: 32-bit address size"
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bitfld.long 0x8 8.--9. "OPTL,Option Code Length" "0: The option code is 1 bit long.,1: The option code is 2 bits long.,2: The option code is 4 bits long.,3: The option code is 8 bits long."
bitfld.long 0x8 7. "DATAEN,Data Enable" "0: No data is sent/received to/from the serial..,1: Data is sent/received to/from the serial Flash.."
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bitfld.long 0x8 6. "OPTEN,Option Enable" "0: The option is not sent to the serial Flash memory.,1: The option is sent to the serial Flash memory."
bitfld.long 0x8 5. "ADDREN,Address Enable" "0: The transfer address is not sent to the serial..,1: The transfer address is sent to the serial Flash.."
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bitfld.long 0x8 4. "INSTEN,Instruction Enable" "0: The instruction is not sent to the serial Flash..,1: The instruction is sent to the serial Flash.."
hexmask.long.byte 0x8 0.--3. 1. "WIDTH,Width of Instruction Code Address Option Code and Data"
line.long 0xC "RICR,Read Instruction Code Register"
hexmask.long.byte 0xC 16.--23. 1. "RDOPT,Read Option Code"
hexmask.long.word 0xC 0.--15. 1. "RDINST,Read Instruction Code"
line.long 0x10 "SMR,Scrambling Mode Register"
bitfld.long 0x10 2. "SCRKL,Scrambling Key Lock" "0: No action.,1: QSPI_SKR.USRK cannot be written until the next.."
bitfld.long 0x10 1. "RVDIS,Scrambling/Unscrambling Random Value Disable" "0: The scrambling/unscrambling algorithm includes..,1: The scrambling/unscrambling algorithm includes.."
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bitfld.long 0x10 0. "SCREN,Scrambling/Unscrambling Enable" "0: The scrambling/unscrambling is disabled.,1: The scrambling/unscrambling is enabled."
wgroup.long 0x44++0x3
line.long 0x0 "SKR,Scrambling Key Register"
hexmask.long 0x0 0.--31. 1. "USRK,User Scrambling Key"
group.long 0x50++0x7
line.long 0x0 "REFRESH,Refresh Register"
hexmask.long 0x0 0.--31. 1. "REFRESH,REFRESH Delay Counter"
line.long 0x4 "WRACNT,Write Access Counter Register"
hexmask.long 0x4 0.--31. 1. "NBWRA,Number of Write Accesses"
group.long 0x5C++0x3
line.long 0x0 "PCALCFG,Pad Calibration Configuration Register"
bitfld.long 0x0 2. "DIFFPM,Differential Pad Mode" "0: Pad differential mode is not enabled.,1: Pad differential mode is enabled."
group.long 0x64++0x3
line.long 0x0 "TOUT,Timeout Register"
hexmask.long.word 0x0 0.--15. 1. "TCNTM,Time-out Counter Maximum Value"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 2. "WPCREN,Write Protection Control Register Enable" "0: Disables the write protection on the Control..,1: Enables the write protection on the Control.."
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bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on Interrupt..,1: Enables the write protection on Interrupt.."
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
group.long 0x300++0xF
line.long 0x0 "DLL_OS,QSPI DLL Offset Selection Register"
bitfld.long 0x0 0. "SELOFF,Offset Selection" "0: The hardcoded offsets are selected.,1: The programmable offsets are selected."
line.long 0x4 "DLL_MAO,QSPI DLL Host Offset Register"
hexmask.long.byte 0x4 0.--7. 1. "MAOFF,Host Delay Line Offset"
line.long 0x8 "DLL_SO0,QSPI DLL Client Offset 0 Register"
hexmask.long.byte 0x8 24.--31. 1. "S3OFF,SLAVEx Delay Line Offset"
hexmask.long.byte 0x8 16.--23. 1. "S2OFF,SLAVEx Delay Line Offset"
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hexmask.long.byte 0x8 8.--15. 1. "S1OFF,SLAVEx Delay Line Offset"
hexmask.long.byte 0x8 0.--7. 1. "S0OFF,SLAVEx Delay Line Offset"
line.long 0xC "DLL_SO1,QSPI DLL Client Offset 1 Register"
hexmask.long.byte 0xC 24.--31. 1. "S7OFF,SLAVEx Delay Line Offset"
hexmask.long.byte 0xC 16.--23. 1. "S6OFF,SLAVEx Delay Line Offset"
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hexmask.long.byte 0xC 8.--15. 1. "S5OFF,SLAVEx Delay Line Offset"
hexmask.long.byte 0xC 0.--7. 1. "S4OFF,SLAVEx Delay Line Offset"
rgroup.long 0x318++0x3
line.long 0x0 "DLL_SM0,QSPI DLL Status Host 0 Register"
hexmask.long.byte 0x0 20.--27. 1. "MDCNT,MASTER0 Delay Counter Value"
hexmask.long.byte 0x0 8.--15. 1. "MDLVAL,MASTER0 Delay Lock Value"
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bitfld.long 0x0 2. "MDOVF,MASTER0 Delay Overflow Flag" "0: The MASTER0 delay counter has not reached its..,1: The MASTER0 delay counter has reached its.."
bitfld.long 0x0 1. "MDDEC,MASTER0 Delay Decrement" "0: The DQSDELAY is not decrementing the MASTER0..,1: The DQSDELAY is decrementing the MASTER0 delay.."
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bitfld.long 0x0 0. "MDINC,MASTER0 Delay Increment" "0: The DQSDELAY is not incrementing the MASTER0..,1: The DQSDELAY is incrementing the MASTER0 delay.."
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x328)++0x3
line.long 0x0 "DLL_SSL[$1],QSPI DLL Status Client x Register"
hexmask.long.byte 0x0 20.--27. 1. "SDCVAL,SLAVE0 Delay Correction Value"
hexmask.long.byte 0x0 8.--15. 1. "SDCNT,SLAVE0 Delay Counter Value"
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bitfld.long 0x0 2. "SDERF,SLAVE0 Delay Correction Error Flag" "0: The DQSDELAY has succeeded in computing the..,1: The DQSDELAY has not succeeded in computing the.."
bitfld.long 0x0 1. "SDCUDF,SLAVE0 Delay Correction Underflow Flag" "0: Due to the correction the SLAVE0 delay counter..,1: Due to the correction the SLAVE0 delay counter.."
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bitfld.long 0x0 0. "SDCOVF,SLAVE0 Delay Correction Overflow Flag" "0: Due to the correction the SLAVE0 delay counter..,1: Due to the correction the SLAVE0 delay counter.."
repeat.end
group.long 0x3D0++0x3
line.long 0x0 "DLL_BCR,QSPI DLL BIST Control Register"
hexmask.long.tbyte 0x0 8.--31. 1. "BISTKEY,BIST Key"
bitfld.long 0x0 1. "BMOD2,BIST Mode 2" "0,1"
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bitfld.long 0x0 0. "BMOD,BIST Mode" "0,1"
rgroup.long 0x3D4++0x3
line.long 0x0 "DLL_BSR,QSPI DLL BIST Status Register"
bitfld.long 0x0 11. "DLB2FAIL3,Delay Line BIST 2 Fail for Delay Line 3" "0: The BIST 2 test did not fail.,1: The BIST 2 test failed for delay line x."
bitfld.long 0x0 10. "DLB2FAIL2,Delay Line BIST 2 Fail for Delay Line 2" "0: The BIST 2 test did not fail.,1: The BIST 2 test failed for delay line x."
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bitfld.long 0x0 9. "DLB2FAIL1,Delay Line BIST 2 Fail for Delay Line 1" "0: The BIST 2 test did not fail.,1: The BIST 2 test failed for delay line x."
bitfld.long 0x0 8. "DLB2FAIL0,Delay Line BIST 2 Fail for Delay Line 0" "0: The BIST 2 test did not fail.,1: The BIST 2 test failed for delay line x."
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bitfld.long 0x0 3. "B2FAIL,BIST 2 Fail" "0: The BIST 2 test has not finished or succeeded.,1: The BIST 2 test failed. Check DLB2FAILx bits to.."
bitfld.long 0x0 2. "B2PASS,BIST 2 Pass" "0: The BIST 2 test has not finished or failed.,1: The BIST 2 test ended successfully."
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bitfld.long 0x0 1. "B2END,BIST 2 End" "0: BIST 2 test has not started or in progress.,1: BIST 2 test is finished."
bitfld.long 0x0 0. "BEND,BIST End" "0: BIST test has not started or is in progress.,1: BIST test is finished."
group.long 0x3E0++0x3
line.long 0x0 "DLL_SYNCR,QSPI DLL Synchro Register"
bitfld.long 0x0 0. "UPDT,Update configuration" "0: Configuration is up to date.,1: Configuration is being updated."
rgroup.long 0x3FC++0x3
line.long 0x0 "DLL_REVISION,QSPI DQSDELAY Revision Register"
bitfld.long 0x0 16.--18. "MFN,Metal Fix Number" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 0.--11. 1. "VERSION,Hardware Module Version"
tree.end
tree "RSTC (Reset Controller)"
base ad:0xFFFFFE00
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
hexmask.long.byte 0x0 24.--31. 1. "KEY,System Reset Key"
bitfld.long 0x0 3. "EXTRST,External Reset" "0: No effect.,1: If KEY = 0xA5 asserts the NRST_OUT pin."
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bitfld.long 0x0 0. "PROCRST,Processor Reset" "0: No effect.,1: If KEY = 0xA5 resets the processor and all the.."
rgroup.long 0x4++0x3
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 17. "SRCMP,Software Reset Command in Progress" "0: No software command is being performed by the..,1: A Software reset command is being performed by.."
bitfld.long 0x0 16. "NRSTL,NRST Pin Level" "0,1"
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bitfld.long 0x0 8.--10. "RSTTYP,Reset Type" "0: First powerup reset,1: Return from Backup mode,2: Watchdog fault occurred,3: Processor reset required by the software,4: NRST pin detected low,?,?,7: 32.768 kHz crystal failure detection fault.."
bitfld.long 0x0 0. "URSTS,User Reset Status" "0: No high-to-low edge on NRST happened since the..,1: At least one high-to-low transition of NRST has.."
group.long 0x8++0x3
line.long 0x0 "MR,Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "KEY,Write Access Password"
bitfld.long 0x0 20. "ENGCLR,Enable GPBR Clear on Tamper Event" "0: Disables the GPBR immediate clear on tamper..,1: Enables the GPBR immediate clear on tamper.."
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hexmask.long.byte 0x0 8.--11. 1. "ERSTL,External Reset Length"
bitfld.long 0x0 4. "URSTIEN,User Reset Interrupt Enable" "0: RSTC_SR.USRTS at '1' has no effect on the RSTC..,1: RSTC_SR.USRTS at '1' asserts the RSTC interrupt.."
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bitfld.long 0x0 2. "URSTASYNC,User Reset Asynchronous Control" "0: The NRST input signal is managed synchronously.,1: The NRST input signal is managed asynchronously."
bitfld.long 0x0 1. "SCKSW,Slow Clock Switching" "0: The detection of a 32.768 kHz crystal failure..,1: The detection of a 32.768 kHz crystal failure.."
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bitfld.long 0x0 0. "URSTEN,User Reset Enable" "0: The detection of a low level on the NRST pin..,1: The detection of a low level on the NRST pin.."
tree.end
tree "RTC (Real-time Clock)"
base ad:0xFFFFFEA8
group.long 0x0++0xB
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 16.--17. "CALEVSEL,Calendar Event Selection" "0: Week change (every Monday at time 00:00:00),1: Month change (every 01 of each month at time..,2: Year change (every January 1 at time 00:00:00),?"
bitfld.long 0x0 8.--9. "TIMEVSEL,Time Event Selection" "0: Minute change,1: Hour change,2: Every day at midnight,3: Every day at noon"
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bitfld.long 0x0 1. "UPDCAL,Update Request Calendar Register" "0: No effect or if UPDCAL has been previously..,1: Stops the RTC calendar counting."
bitfld.long 0x0 0. "UPDTIM,Update Request Time Register" "0: No effect or if UPDTIM has been previously..,1: Stops the RTC time counting."
line.long 0x4 "MR,Mode Register"
bitfld.long 0x4 28.--29. "TPERIOD,Period of the Output Pulse" "0: 1 second,1: 500 ms,2: 250 ms,3: 125 ms"
bitfld.long 0x4 24.--26. "THIGH,High Duration of the Output Pulse" "0: 31.2 ms,1: 15.6 ms,2: 3.91 ms,3: 976 us,4: 488 us,5: 122 us,6: 30.5 us,7: 15.2 us"
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bitfld.long 0x4 20.--22. "OUT1,ADC Last Channel Trigger Event Source Selection" "0: No waveform stuck at '0',1: 1 Hz square wave,2: 32 Hz square wave,3: 64 Hz square wave,4: 512 Hz square wave,5: Output toggles when alarm flag rises,6: Output is a copy of the alarm flag,7: Duty cycle programmable pulse"
bitfld.long 0x4 16.--18. "OUT0,All ADC Channel Trigger Event Source Selection" "0: No waveform stuck at '0',1: 1 Hz square wave,2: 32 Hz square wave,3: 64 Hz square wave,4: 512 Hz square wave,5: Output toggles when alarm flag rises,6: Output is a copy of the alarm flag,7: Duty cycle programmable pulse"
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bitfld.long 0x4 15. "HIGHPPM,HIGH PPM Correction" "0: Lower range ppm correction with accurate..,1: Higher range ppm correction with accurate.."
hexmask.long.byte 0x4 8.--14. 1. "CORRECTION,Slow Clock Correction"
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bitfld.long 0x4 4. "NEGPPM,NEGative PPM Correction" "0: Positive correction (the divider will be..,1: Negative correction (the divider will be.."
bitfld.long 0x4 2. "UTC,UTC Time Format" "0: Gregorian or Persian calendar.,1: UTC format."
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bitfld.long 0x4 1. "PERSIAN,PERSIAN Calendar" "0: Gregorian calendar.,1: Persian calendar."
bitfld.long 0x4 0. "HRMOD,12-/24-hour Mode" "0: 24-hour mode is selected.,1: 12-hour mode is selected."
line.long 0x8 "TIMR,Time Register"
bitfld.long 0x8 22. "AMPM,Ante Meridiem Post Meridiem Indicator" "0: AM.,1: PM."
hexmask.long.byte 0x8 16.--21. 1. "HOUR,Current Hour"
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hexmask.long.byte 0x8 8.--14. 1. "MIN,Current Minute"
hexmask.long.byte 0x8 0.--6. 1. "SEC,Current Second"
group.long 0x8++0xB
line.long 0x0 "TIMR_UTC_MODE,Time Register"
hexmask.long 0x0 0.--31. 1. "UTC_TIME,Current UTC Time"
line.long 0x4 "CALR,Calendar Register"
hexmask.long.byte 0x4 24.--29. 1. "DATE,Current Day in Current Month"
bitfld.long 0x4 21.--23. "DAY,Current Day in Current Week" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x4 16.--20. 1. "MONTH,Current Month"
hexmask.long.byte 0x4 8.--15. 1. "YEAR,Current Year"
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hexmask.long.byte 0x4 0.--6. 1. "CENT,Current Century"
line.long 0x8 "TIMALR,Time Alarm Register"
bitfld.long 0x8 23. "HOUREN,Hour Alarm Enable" "0: The hour-matching alarm is disabled.,1: The hour-matching alarm is enabled."
bitfld.long 0x8 22. "AMPM,AM/PM Indicator" "0,1"
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hexmask.long.byte 0x8 16.--21. 1. "HOUR,Hour Alarm"
bitfld.long 0x8 15. "MINEN,Minute Alarm Enable" "0: The minute-matching alarm is disabled.,1: The minute-matching alarm is enabled."
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hexmask.long.byte 0x8 8.--14. 1. "MIN,Minute Alarm"
bitfld.long 0x8 7. "SECEN,Second Alarm Enable" "0: The second-matching alarm is disabled.,1: The second-matching alarm is enabled."
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hexmask.long.byte 0x8 0.--6. 1. "SEC,Second Alarm"
group.long 0x10++0x7
line.long 0x0 "TIMALR_UTC_MODE,Time Alarm Register"
hexmask.long 0x0 0.--31. 1. "UTC_TIME,UTC_TIME Alarm"
line.long 0x4 "CALALR,Calendar Alarm Register"
bitfld.long 0x4 31. "DATEEN,Date Alarm Enable" "0: The date-matching alarm is disabled.,1: The date-matching alarm is enabled."
hexmask.long.byte 0x4 24.--29. 1. "DATE,Date Alarm"
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bitfld.long 0x4 23. "MTHEN,Month Alarm Enable" "0: The month-matching alarm is disabled.,1: The month-matching alarm is enabled."
hexmask.long.byte 0x4 16.--20. 1. "MONTH,Month Alarm"
group.long 0x14++0x3
line.long 0x0 "CALALR_UTC_MODE,Calendar Alarm Register"
bitfld.long 0x0 0. "UTCEN,UTC Alarm Enable" "0: The UTC-matching alarm is disabled.,1: The UTC-matching alarm is enabled."
rgroup.long 0x18++0x3
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 5. "TDERR,Time and/or Date Free Running Error" "0: The internal free running counters are carrying..,1: The internal free running counters have been.."
bitfld.long 0x0 4. "CALEV,Calendar Event" "0: No calendar event has occurred since the last..,1: At least one calendar event has occurred since.."
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bitfld.long 0x0 3. "TIMEV,Time Event" "0: No time event has occurred since the last clear.,1: At least one time event has occurred since the.."
bitfld.long 0x0 2. "SEC,Second Event" "0: No second event has occurred since the last clear.,1: At least one second event has occurred since the.."
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bitfld.long 0x0 1. "ALARM,Alarm Flag" "0: No alarm matching condition occurred.,1: An alarm matching condition has occurred."
bitfld.long 0x0 0. "ACKUPD,Acknowledge for Update" "0: Time and calendar registers cannot be updated.,1: Time and calendar registers can be updated."
wgroup.long 0x1C++0xB
line.long 0x0 "SCCR,Status Clear Command Register"
bitfld.long 0x0 5. "TDERRCLR,Time and/or Date Free Running Error Clear" "0,1"
bitfld.long 0x0 4. "CALCLR,Calendar Clear" "0,1"
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bitfld.long 0x0 3. "TIMCLR,Time Clear" "0,1"
bitfld.long 0x0 2. "SECCLR,Second Clear" "0,1"
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bitfld.long 0x0 1. "ALRCLR,Alarm Clear" "0,1"
bitfld.long 0x0 0. "ACKCLR,Acknowledge Clear" "0,1"
line.long 0x4 "IER,Interrupt Enable Register"
bitfld.long 0x4 5. "TDERREN,Time and/or Date Error Interrupt Enable" "0,1"
bitfld.long 0x4 4. "CALEN,Calendar Event Interrupt Enable" "0,1"
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bitfld.long 0x4 3. "TIMEN,Time Event Interrupt Enable" "0,1"
bitfld.long 0x4 2. "SECEN,Second Event Interrupt Enable" "0,1"
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bitfld.long 0x4 1. "ALREN,Alarm Interrupt Enable" "0,1"
bitfld.long 0x4 0. "ACKEN,Acknowledge Update Interrupt Enable" "0,1"
line.long 0x8 "IDR,Interrupt Disable Register"
bitfld.long 0x8 5. "TDERRDIS,Time and/or Date Error Interrupt Disable" "0,1"
bitfld.long 0x8 4. "CALDIS,Calendar Event Interrupt Disable" "0,1"
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bitfld.long 0x8 3. "TIMDIS,Time Event Interrupt Disable" "0,1"
bitfld.long 0x8 2. "SECDIS,Second Event Interrupt Disable" "0,1"
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bitfld.long 0x8 1. "ALRDIS,Alarm Interrupt Disable" "0,1"
bitfld.long 0x8 0. "ACKDIS,Acknowledge Update Interrupt Disable" "0,1"
rgroup.long 0x28++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 5. "TDERR,Time and/or Date Error Mask" "0,1"
bitfld.long 0x0 4. "CAL,Calendar Event Interrupt Mask" "0,1"
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bitfld.long 0x0 3. "TIM,Time Event Interrupt Mask" "0,1"
bitfld.long 0x0 2. "SEC,Second Event Interrupt Mask" "0,1"
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bitfld.long 0x0 1. "ALR,Alarm Interrupt Mask" "0,1"
bitfld.long 0x0 0. "ACK,Acknowledge Update Interrupt Mask" "0,1"
line.long 0x4 "VER,Valid Entry Register"
bitfld.long 0x4 3. "NVCALALR,Non-valid Calendar Alarm" "0: No invalid data has been detected in RTC_CALALR..,1: RTC_CALALR has contained invalid data since it.."
bitfld.long 0x4 2. "NVTIMALR,Non-valid Time Alarm" "0: No invalid data has been detected in RTC_TIMALR..,1: RTC_TIMALR has contained invalid data since it.."
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bitfld.long 0x4 1. "NVCAL,Non-valid Calendar" "0: No invalid data has been detected in RTC_CALR..,1: RTC_CALR has contained invalid data since it was.."
bitfld.long 0x4 0. "NVTIM,Non-valid Time" "0: No invalid data has been detected in RTC_TIMR..,1: RTC_TIMR has contained invalid data since it was.."
group.long 0x58++0x7
line.long 0x0 "TMR,Tamper Mode Register"
bitfld.long 0x0 31. "TRLOCK,Tamper Registers Lock (Write-once cleared by VDDCORE reset)" "0: RTC_TMR and RTC_TDPR can be written.,1: RTC_TMR and RTC_TDPR cannot be written until the.."
bitfld.long 0x0 23. "POL7,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
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bitfld.long 0x0 22. "POL6,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
bitfld.long 0x0 21. "POL5,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
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bitfld.long 0x0 20. "POL4,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
bitfld.long 0x0 19. "POL3,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
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bitfld.long 0x0 18. "POL2,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
bitfld.long 0x0 17. "POL1,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
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bitfld.long 0x0 16. "POL0,WKUPx+1 Polarity" "0: If the source of tamper remains low for a..,1: If the source of tamper remains high for a.."
bitfld.long 0x0 7. "EN7,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
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bitfld.long 0x0 6. "EN6,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
bitfld.long 0x0 5. "EN5,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
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bitfld.long 0x0 4. "EN4,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
bitfld.long 0x0 3. "EN3,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
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bitfld.long 0x0 2. "EN2,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
bitfld.long 0x0 1. "EN1,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
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bitfld.long 0x0 0. "EN0,WKUPx+1 Tamper Source Enable" "0: WKUP pin index x+1 is not enabled as a source of..,1: WKUP pin index x+1 is enabled as a source of.."
line.long 0x4 "TDPR,Tamper Debounce Period register"
bitfld.long 0x4 23. "SELP7,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
bitfld.long 0x4 22. "SELP6,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
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bitfld.long 0x4 21. "SELP5,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
bitfld.long 0x4 20. "SELP4,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
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bitfld.long 0x4 19. "SELP3,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
bitfld.long 0x4 18. "SELP2,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
newline
bitfld.long 0x4 17. "SELP1,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
bitfld.long 0x4 16. "SELP0,WKUPx+1 Debounce Period Selection" "0: WKUP pin index x+1 is debounced with PERA period.,1: WKUP pin index x+1 is debounced with PERB period."
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hexmask.long.byte 0x4 4.--7. 1. "PERB,Debounce Period B"
hexmask.long.byte 0x4 0.--3. 1. "PERA,Debounce Period A"
rgroup.long 0xB0++0x3
line.long 0x0 "TSTR0,Timestamp Time Register 0"
bitfld.long 0x0 31. "BACKUP,System Mode of the Tamper (cleared by reading RTC_TSSR0)" "0: The state of the system is different from backup..,1: The system is in backup mode when the tamper.."
hexmask.long.byte 0x0 24.--27. 1. "TEVCNT,Tamper Events Counter (cleared by reading RTC_TSSR0)"
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bitfld.long 0x0 22. "AMPM,AM/PM Indicator of the Tamper (cleared by reading RTC_TSSR0)" "0,1"
hexmask.long.byte 0x0 16.--21. 1. "HOUR,Hours of the Tamper (cleared by reading RTC_TSSR0)"
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hexmask.long.byte 0x0 8.--14. 1. "MIN,Minutes of the Tamper (cleared by reading RTC_TSSR0)"
hexmask.long.byte 0x0 0.--6. 1. "SEC,Seconds of the Tamper (cleared by reading RTC_TSSR0)"
rgroup.long 0xB0++0x7
line.long 0x0 "TSTR0_UTC_MODE,Timestamp Time Register 0"
bitfld.long 0x0 31. "BACKUP,System Mode of the Tamper (cleared by reading RTC_TSSR0)" "0: The state of the system is different from Backup..,1: The system is in Backup mode when the tamper.."
hexmask.long.byte 0x0 24.--27. 1. "TEVCNT,Tamper Events Counter (cleared by reading RTC_TSSR0)"
line.long 0x4 "TSDR0,Timestamp Date Register 0"
hexmask.long.byte 0x4 24.--29. 1. "DATE,Date of the Tamper (cleared by reading RTC_TSSRx)"
bitfld.long 0x4 21.--23. "DAY,Day of the Tamper (cleared by reading RTC_TSSRx)" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x4 16.--20. 1. "MONTH,Month of the Tamper (cleared by reading RTC_TSSRx)"
hexmask.long.byte 0x4 8.--15. 1. "YEAR,Year of the Tamper (cleared by reading RTC_TSSRx)"
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hexmask.long.byte 0x4 0.--6. 1. "CENT,Century of the Tamper (cleared by reading RTC_TSSRx)"
rgroup.long 0xB4++0xB
line.long 0x0 "TSDR0_UTC_MODE,Timestamp Date Register 0"
hexmask.long 0x0 0.--31. 1. "UTC_TIME,Time of the Tamper (UTC format)"
line.long 0x4 "TSSR0,Timestamp Source Register 0"
bitfld.long 0x4 23. "DET7,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 22. "DET6,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
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bitfld.long 0x4 21. "DET5,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 20. "DET4,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
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bitfld.long 0x4 19. "DET3,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 18. "DET2,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
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bitfld.long 0x4 17. "DET1,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 16. "DET0,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
line.long 0x8 "TSTR1,Timestamp Time Register 1"
bitfld.long 0x8 31. "BACKUP,System Mode of the Tamper (cleared by reading RTC_TSSR1)" "0: The state of the system is different from Backup..,1: The system is in Backup mode when the tamper.."
bitfld.long 0x8 22. "AMPM,AM/PM Indicator of the Tamper (cleared by reading RTC_TSSR1)" "0,1"
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hexmask.long.byte 0x8 16.--21. 1. "HOUR,Hours of the Tamper (cleared by reading RTC_TSSR1)"
hexmask.long.byte 0x8 8.--14. 1. "MIN,Minutes of the Tamper (cleared by reading RTC_TSSR1)"
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hexmask.long.byte 0x8 0.--6. 1. "SEC,Seconds of the Tamper (cleared by reading RTC_TSSR1)"
rgroup.long 0xBC++0x7
line.long 0x0 "TSTR1_UTC_MODE,Timestamp Time Register 1"
bitfld.long 0x0 31. "BACKUP,System Mode of the Tamper (cleared by reading RTC_TSSR1)" "0: The state of the system is different from Backup..,1: The system is in Backup mode when the tamper.."
line.long 0x4 "TSDR1,Timestamp Date Register 1"
hexmask.long.byte 0x4 24.--29. 1. "DATE,Date of the Tamper (cleared by reading RTC_TSSRx)"
bitfld.long 0x4 21.--23. "DAY,Day of the Tamper (cleared by reading RTC_TSSRx)" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x4 16.--20. 1. "MONTH,Month of the Tamper (cleared by reading RTC_TSSRx)"
hexmask.long.byte 0x4 8.--15. 1. "YEAR,Year of the Tamper (cleared by reading RTC_TSSRx)"
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hexmask.long.byte 0x4 0.--6. 1. "CENT,Century of the Tamper (cleared by reading RTC_TSSRx)"
rgroup.long 0xC0++0x7
line.long 0x0 "TSDR1_UTC_MODE,Timestamp Date Register 1"
hexmask.long 0x0 0.--31. 1. "UTC_TIME,Time of the Tamper (UTC format)"
line.long 0x4 "TSSR1,Timestamp Source Register 1"
bitfld.long 0x4 23. "DET7,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 22. "DET6,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
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bitfld.long 0x4 21. "DET5,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 20. "DET4,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
newline
bitfld.long 0x4 19. "DET3,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 18. "DET2,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
newline
bitfld.long 0x4 17. "DET1,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
bitfld.long 0x4 16. "DET0,Tamper Detection on VDDCORE WKUP[8:1] (cleared on read)" "0,1"
tree.end
tree "RTT (Real-time Timer)"
base ad:0xFFFFFE20
group.long 0x0++0x7
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 24. "RTC1HZ,Real-Time Clock 1Hz Clock Selection" "0: The RTT 32-bit counter is driven by the 16-bit..,1: The RTT 32-bit counter is driven by the 1Hz RTC.."
bitfld.long 0x0 21. "INC2AEN,RTTINC2 Alarm and Interrupt Enable" "0: The RTTINC2 flag is not a source of the RTT..,1: The RTTINC2 flag is a source of the RTT alarm.."
newline
bitfld.long 0x0 20. "RTTDIS,Real-time Timer Disable" "0: The real-time timer is enabled.,1: The real-time timer is disabled (no dynamic.."
bitfld.long 0x0 18. "RTTRST,Real-time Timer Restart" "0: No effect.,1: Reloads and restarts the clock divider with the.."
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bitfld.long 0x0 17. "RTTINCIEN,Real-time Timer Increment Interrupt Enable" "0: The bit RTTINC in RTT_SR has no effect on..,1: The bit RTTINC in RTT_SR asserts interrupt."
bitfld.long 0x0 16. "ALMIEN,Alarm Interrupt Enable" "0: The bit ALMS in RTT_SR has no effect on interrupt.,1: The bit ALMS in RTT_SR asserts interrupt."
newline
hexmask.long.word 0x0 0.--15. 1. "RTPRES,Real-time Timer Prescaler Value"
line.long 0x4 "AR,Alarm Register"
hexmask.long 0x4 0.--31. 1. "ALMV,Alarm Value"
rgroup.long 0x8++0x7
line.long 0x0 "VR,Value Register"
hexmask.long 0x0 0.--31. 1. "CRTV,Current Real-time Value"
line.long 0x4 "SR,Status Register"
bitfld.long 0x4 2. "RTTINC2,Predefined Number of Prescaler Roll-overs Status (cleared on read)" "0: SELINC2=0 or the number of prescaler roll-overs..,1: The number of prescaler roll-overs programmed.."
bitfld.long 0x4 1. "RTTINC,Prescaler Roll-over Status (cleared on read)" "0: No prescaler roll-over occurred since the last..,1: Prescaler roll-over occurred since the last read.."
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bitfld.long 0x4 0. "ALMS,Real-time Alarm Status (cleared on read)" "0: The Real-time Alarm has not occurred since the..,1: The Real-time Alarm occurred since the last read.."
group.long 0x10++0x3
line.long 0x0 "MODR,Modulo Selection Register"
bitfld.long 0x0 0.--2. "SELINC2,Selection of the 32-bit Counter Modulo to generate RTTINC2 Flag" "0: The RTTINC2 flag never rises,1: The RTTINC2 flag is set when CRTV modulo 64..,2: The RTTINC2 flag is set when CRTV modulo 128..,3: The RTTINC2 flag is set when CRTV modulo 256..,4: The RTTINC2 flag is set when CRTV modulo 512..,5: The RTTINC2 flag is set when CRTV modulo 1024..,6: The RTTINC2 flag is set when CRTV modulo 2048..,7: The RTTINC2 flag is set when CRTV modulo 4096.."
rgroup.long 0x14++0x3
line.long 0x0 "TSR,TimeStamp Register"
hexmask.long.tbyte 0x0 0.--23. 1. "TSTAMP,Real-time Timer Value Timestamp"
tree.end
tree "SCKC (Slow Clock Controller)"
base ad:0xFFFFFE50
group.long 0x0++0x3
line.long 0x0 "CR,Slow Clock Controller Configuration Register"
bitfld.long 0x0 24. "TD_OSCSEL,Timing Domain Slow Clock Selector" "0: Slow clock of the timing domain is driven by the..,1: Slow clock of the timing domain is driven by the.."
bitfld.long 0x0 2. "OSC32BYP,32.768 kHz Crystal Oscillator Bypass" "0: 32.768 kHz crystal oscillator is not bypassed.,1: 32.768 kHz crystal oscillator is bypassed and.."
newline
bitfld.long 0x0 1. "OSC32EN,32.768 kHz Crystal Oscillator" "0: 32.768 kHz crystal oscillator is disabled.,1: 32.768 kHz crystal oscillator is enabled."
tree.end
tree "SDMMC (Secure Digital MultiMedia Card Controller)"
base ad:0x0
tree "SDMMC0"
base ad:0x80000000
group.long 0x0++0x3
line.long 0x0 "SSAR,SDMA System Address / Argument 2 Register"
hexmask.long 0x0 0.--31. 1. "ADDR,SDMA System Address"
group.long 0x0++0x3
line.long 0x0 "SSAR_CMD23_MODE,SDMA System Address / Argument 2 Register"
hexmask.long 0x0 0.--31. 1. "ARG2,Argument 2"
group.word 0x4++0x3
line.word 0x0 "BSR,Block Size Register"
bitfld.word 0x0 12.--14. "BOUNDARY,SDMA Buffer Boundary" "0: 4-Kbyte boundary,1: 8-Kbyte boundary,2: 16-Kbyte boundary,3: 32-Kbyte boundary,4: 64-Kbyte boundary,5: 128-Kbyte boundary,6: 256-Kbyte boundary,7: 512-Kbyte boundary"
hexmask.word 0x0 0.--9. 1. "BLKSIZE,Transfer Block Size"
line.word 0x2 "BCR,Block Count Register"
hexmask.word 0x2 0.--15. 1. "BLKCNT,Block Count for Current Transfer"
group.long 0x8++0x3
line.long 0x0 "ARG1R,Argument 1 Register"
hexmask.long 0x0 0.--31. 1. "ARG1,Argument 1"
group.word 0xC++0x3
line.word 0x0 "TMR,Transfer Mode Register"
bitfld.word 0x0 5. "MSBSEL,Multi/Single Block Selection" "0,1"
bitfld.word 0x0 4. "DTDSEL,Data Transfer Direction Selection" "0: Writes data from the SDMMC to the device.,1: Reads data from the device to the SDMMC."
newline
bitfld.word 0x0 2.--3. "ACMDEN,Auto Command Enable" "0: Auto Command Disabled,1: Auto CMD12 Enabled,2: Auto CMD23 Enabled,?"
bitfld.word 0x0 1. "BCEN,Block Count Enable" "0: Block count is disabled.,1: Block count is enabled."
newline
bitfld.word 0x0 0. "DMAEN,DMA Enable" "0: DMA functionality is disabled.,1: DMA functionality is enabled."
line.word 0x2 "CR,Command Register"
hexmask.word.byte 0x2 8.--13. 1. "CMDIDX,Command Index"
bitfld.word 0x2 6.--7. "CMDTYP,Command Type" "0: Other commands,1: CMD52 to write 'Bus Suspend' in the Card Common..,2: CMD52 to write 'Function Select' in the Card..,3: CMD12 CMD52 to write 'I/O Abort' in the Card.."
newline
bitfld.word 0x2 5. "DPSEL,Data Present Select" "0: No data present,1: Data present"
bitfld.word 0x2 4. "CMDICEN,Command Index Check Enable" "0: The Command Index Check is disabled.,1: The Command Index Check is enabled."
newline
bitfld.word 0x2 3. "CMDCCEN,Command CRC Check Enable" "0: The Command CRC Check is disabled.,1: The Command CRC Check is enabled."
bitfld.word 0x2 0.--1. "RESPTYP,Response Type" "0: No Response,1: Response Length 136,2: Response Length 48,3: Response Length 48 with Busy"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x10)++0x3
line.long 0x0 "RR[$1],Response Register x"
hexmask.long 0x0 0.--31. 1. "CMDRESP,Command Response"
repeat.end
group.long 0x20++0x3
line.long 0x0 "BDPR,Buffer Data Port Register"
hexmask.long 0x0 0.--31. 1. "BUFDATA,Buffer Data"
rgroup.long 0x24++0x3
line.long 0x0 "PSR,Present State Register"
bitfld.long 0x0 24. "CMDLL,CMD Line Level" "0,1"
hexmask.long.byte 0x0 20.--23. 1. "DATLL,DAT[3:0] Line Level"
newline
bitfld.long 0x0 11. "BUFRDEN,Buffer Read Enable" "0,1"
bitfld.long 0x0 10. "BUFWREN,Buffer Write Enable" "0,1"
newline
bitfld.long 0x0 9. "RTACT,Read Transfer Active" "0,1"
bitfld.long 0x0 8. "WTACT,Write Transfer Active" "0,1"
newline
bitfld.long 0x0 2. "DLACT,DAT Line Active" "0: DAT line inactive.,1: DAT line active."
bitfld.long 0x0 1. "CMDINHD,Command Inhibit (DAT)" "0: Can issue a command which uses the DAT line(s).,1: Cannot issue a command which uses the DAT line(s)."
newline
bitfld.long 0x0 0. "CMDINHC,Command Inhibit (CMD)" "0: Can issue a command using only CMD line.,1: Cannot issue a command."
group.byte 0x28++0x0
line.byte 0x0 "HC1R_EMMC_MODE,Host Control 1 Register"
bitfld.byte 0x0 5. "EXTDW,Extended Data Width" "0,1"
bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?"
newline
bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0,1"
bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode.,1: 4-bit mode."
group.byte 0x28++0x2
line.byte 0x0 "HC1R_SD_SDIO_MODE,Host Control 1 Register"
bitfld.byte 0x0 6. "CARDDTL,Card Detect Test Level" "0: No card.,1: Card inserted."
bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?"
newline
bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0: Normal Speed mode.,1: High Speed mode."
bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode.,1: 4-bit mode."
newline
bitfld.byte 0x0 0. "LEDCTRL,LED Control" "0: LED off.,1: LED on."
line.byte 0x1 "PCR,Power Control Register"
bitfld.byte 0x1 0. "SDBPWR,SD Bus Power" "0,1"
line.byte 0x2 "BGCR_EMMC_MODE,Block Gap Control Register"
bitfld.byte 0x2 1. "CONTR,Continue Request" "0: No effect.,1: Restart."
bitfld.byte 0x2 0. "STPBGR,Stop At Block Gap Request" "0: Transfer,1: Stop"
group.byte 0x2A++0x1
line.byte 0x0 "BGCR_SD_SDIO_MODE,Block Gap Control Register"
bitfld.byte 0x0 3. "INTBG,Interrupt at Block Gap" "0: Interrupt detection disabled.,1: Interrupt detection enabled."
bitfld.byte 0x0 2. "RWCTRL,Read Wait Control" "0: Disables Read Wait control.,1: Enables Read Wait control."
newline
bitfld.byte 0x0 1. "CONTR,Continue Request" "0: No effect.,1: Restart."
bitfld.byte 0x0 0. "STPBGR,Stop At Block Gap Request" "0: Transfer,1: Stop"
line.byte 0x1 "WCR,Wakeup Control Register"
bitfld.byte 0x1 0. "WKENCINT,Wakeup Event Enable on Card Interrupt" "0: Wakeup Event disabled.,1: Wakeup Event enabled."
group.word 0x2C++0x1
line.word 0x0 "CCR,Clock Control Register"
hexmask.word.byte 0x0 8.--15. 1. "SDCLKFSEL,SDCLK Frequency Select"
bitfld.word 0x0 6.--7. "USDCLKFSEL,Upper Bits of SDCLK Frequency Select" "0,1,2,3"
newline
bitfld.word 0x0 5. "CLKGSEL,Clock Generator Select" "0: Divided Clock mode (BASECLK is used to generate..,1: Programmable Clock mode (MULTCLK is used to.."
bitfld.word 0x0 2. "SDCLKEN,SD Clock Enable" "0: SD Clock disabled,1: SD Clock enabled"
newline
bitfld.word 0x0 1. "INTCLKS,Internal Clock Stable" "0: Internal clock not ready.,1: Internal clock ready."
bitfld.word 0x0 0. "INTCLKEN,Internal Clock Enable" "0: The internal clock stops.,1: The internal clock oscillates."
group.byte 0x2E++0x1
line.byte 0x0 "TCR,Timeout Control Register"
hexmask.byte 0x0 0.--3. 1. "DTCVAL,Data Timeout Counter Value"
line.byte 0x1 "SRR,Software Reset Register"
bitfld.byte 0x1 2. "SWRSTDAT,Software reset for DAT line" "0: Work,1: Reset"
bitfld.byte 0x1 1. "SWRSTCMD,Software reset for CMD line" "0: Work,1: Reset"
newline
bitfld.byte 0x1 0. "SWRSTALL,Software reset for All" "0: Work,1: Reset"
group.word 0x30++0x1
line.word 0x0 "NISTR_EMMC_MODE,Normal Interrupt Status Register"
bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0: No error.,1: Error."
bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received" "0: Boot Acknowledge pattern not received.,1: Boot Acknowledge pattern received."
newline
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0: Not ready to read buffer.,1: Ready to read buffer."
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0: Not ready to write buffer.,1: Ready to write buffer."
newline
bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA interrupt.,1: DMA interrupt."
bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0,1"
newline
bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0,1"
bitfld.word 0x0 0. "CMDC,Command Complete" "0,1"
group.word 0x30++0x3
line.word 0x0 "NISTR_SD_SDIO_MODE,Normal Interrupt Status Register"
bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0,1"
bitfld.word 0x0 8. "CINT,Card Interrupt" "0: No card interrupt.,1: Card interrupt."
newline
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0,1"
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0,1"
newline
bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA Interrupt.,1: DMA Interrupt."
bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0: No block gap event.,1: Transaction stopped at block gap."
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bitfld.word 0x0 1. "TRFC,Transfer Complete" "0: Command execution is not complete.,1: Command execution is complete."
bitfld.word 0x0 0. "CMDC,Command Complete" "0: No command complete.,1: Command complete."
line.word 0x2 "EISTR_EMMC_MODE,Error Interrupt Status Register"
bitfld.word 0x2 12. "BOOTAE,Boot Acknowledge Error" "0: No error.,1: Error."
bitfld.word 0x2 9. "ADMA,ADMA Error" "0: No error.,1: Error."
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bitfld.word 0x2 8. "ACMD,Auto CMD Error" "0: No error.,1: Error."
bitfld.word 0x2 7. "CURLIM,Current Limit Error" "0: No error.,1: Error."
newline
bitfld.word 0x2 6. "DATEND,Data End Bit Error" "0: No error.,1: Error."
bitfld.word 0x2 5. "DATCRC,Data CRC Error" "0: No error.,1: Error."
newline
bitfld.word 0x2 4. "DATTEO,Data Timeout error" "0: No error.,1: Error."
bitfld.word 0x2 3. "CMDIDX,Command Index Error" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Command End Bit Error" "0,1"
bitfld.word 0x2 1. "CMDCRC,Command CRC Error" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Command Timeout Error" "0,1"
group.word 0x32++0x3
line.word 0x0 "EISTR_SD_SDIO_MODE,Error Interrupt Status Register"
bitfld.word 0x0 9. "ADMA,ADMA Error" "0,1"
bitfld.word 0x0 8. "ACMD,Auto CMD Error" "0,1"
newline
bitfld.word 0x0 7. "CURLIM,Current Limit Error" "0,1"
bitfld.word 0x0 6. "DATEND,Data End Bit Error" "0,1"
newline
bitfld.word 0x0 5. "DATCRC,Data CRC error" "0: No error.,1: Error."
bitfld.word 0x0 4. "DATTEO,Data Timeout Error" "0: No error.,1: Error."
newline
bitfld.word 0x0 3. "CMDIDX,Command Index Error" "0: No error.,1: Error."
bitfld.word 0x0 2. "CMDEND,Command End Bit Error" "0: No error.,1: Error."
newline
bitfld.word 0x0 1. "CMDCRC,Command CRC Error" "0,1"
bitfld.word 0x0 0. "CMDTEO,Command Timeout Error" "0,1"
line.word 0x2 "NISTER_EMMC_MODE,Normal Interrupt Status Enable Register"
bitfld.word 0x2 14. "BOOTAR,Boot Acknowledge Received Status Enable" "0: The BOOTAR status flag in SDMMC_NISTR is masked.,1: The BOOTAR status flag in SDMMC_NISTR is enabled."
bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Status Enable" "0,1"
newline
bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Status Enable" "0,1"
bitfld.word 0x2 3. "DMAINT,DMA Interrupt Status Enable" "0,1"
newline
bitfld.word 0x2 2. "BLKGE,Block Gap Event Status Enable" "0,1"
bitfld.word 0x2 1. "TRFC,Transfer Complete Status Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDC,Command Complete Status Enable" "0,1"
group.word 0x34++0x3
line.word 0x0 "NISTER_SD_SDIO_MODE,Normal Interrupt Status Enable Register"
bitfld.word 0x0 8. "CINT,Card Interrupt Status Enable" "0: The CINT status flag in SDMMC_NISTR is masked.,1: The CINT status flag in SDMMC_NISTR is enabled."
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Status Enable" "0: The BRDRDY status flag in SDMMC_NISTR is masked.,1: The BRDRDY status flag in SDMMC_NISTR is enabled."
newline
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Status Enable" "0: The BWRRDY status flag in SDMMC_NISTR is masked.,1: The BWRRDY status flag in SDMMC_NISTR is enabled."
bitfld.word 0x0 3. "DMAINT,DMA Interrupt Status Enable" "0: The DMAINT status flag in SDMMC_NISTR is masked.,1: The DMAINT status flag in SDMMC_NISTR is enabled."
newline
bitfld.word 0x0 2. "BLKGE,Block Gap Event Status Enable" "0: The BLKGE status flag in SDMMC_NISTR is masked.,1: The BLKGE status flag in SDMMC_NISTR is enabled."
bitfld.word 0x0 1. "TRFC,Transfer Complete Status Enable" "0: The TRFC status flag in SDMMC_NISTR is masked.,1: The TRFC status flag in SDMMC_NISTR is enabled."
newline
bitfld.word 0x0 0. "CMDC,Command Complete Status Enable" "0: The CMDC status flag in SDMMC_NISTR is masked.,1: The CMDC status flag in SDMMC_NISTR is enabled."
line.word 0x2 "EISTER_EMMC_MODE,Error Interrupt Status Enable Register"
bitfld.word 0x2 12. "BOOTAE,Boot Acknowledge Error Status Enable" "0: The BOOTAE status flag in SDMMC_EISTR is masked.,1: The BOOTAE status flag in SDMMC_EISTR is enabled."
bitfld.word 0x2 9. "ADMA,ADMA Error Status Enable" "0,1"
newline
bitfld.word 0x2 8. "ACMD,Auto CMD Error Status Enable" "0,1"
bitfld.word 0x2 7. "CURLIM,Current Limit Error Status Enable" "0,1"
newline
bitfld.word 0x2 6. "DATEND,Data End Bit Error Status Enable" "0,1"
bitfld.word 0x2 5. "DATCRC,Data CRC Error Status Enable" "0,1"
newline
bitfld.word 0x2 4. "DATTEO,Data Timeout Error Status Enable" "0,1"
bitfld.word 0x2 3. "CMDIDX,Command Index Error Status Enable" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Command End Bit Error Status Enable" "0,1"
bitfld.word 0x2 1. "CMDCRC,Command CRC Error Status Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Status Enable" "0,1"
group.word 0x36++0x3
line.word 0x0 "EISTER_SD_SDIO_MODE,Error Interrupt Status Enable Register"
bitfld.word 0x0 9. "ADMA,ADMA Error Status Enable" "0: The ADMA status flag in SDMMC_EISTR is masked.,1: The ADMA status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 8. "ACMD,Auto CMD Error Status Enable" "0: The ACMD status flag in SDMMC_EISTR is masked.,1: The ACMD status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 7. "CURLIM,Current Limit Error Status Enable" "0: The CURLIM status flag in SDMMC_EISTR is masked.,1: The CURLIM status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 6. "DATEND,Data End Bit Error Status Enable" "0: The DATEND status flag in SDMMC_EISTR is masked.,1: The DATEND status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 5. "DATCRC,Data CRC Error Status Enable" "0: The DATCRC status flag in SDMMC_EISTR is masked.,1: The DATCRC status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 4. "DATTEO,Data Timeout Error Status Enable" "0: The DATTEO status flag in SDMMC_EISTR is masked.,1: The DATTEO status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 3. "CMDIDX,Command Index Error Status Enable" "0: The CMDIDX status flag in SDMMC_EISTR is masked.,1: The CMDIDX status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 2. "CMDEND,Command End Bit Error Status Enable" "0: The CMDEND status flag in SDMMC_EISTR is masked.,1: The CMDEND status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 1. "CMDCRC,Command CRC Error Status Enable" "0: The CMDCRC status flag in SDMMC_EISTR is masked.,1: The CMDCRC status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Status Enable" "0: The CMDTEO status flag in SDMMC_EISTR is masked.,1: The CMDTEO status flag in SDMMC_EISTR is enabled."
line.word 0x2 "NISIER_EMMC_MODE,Normal Interrupt Signal Enable Register"
bitfld.word 0x2 14. "BOOTAR,Boot Acknowledge Received Signal Enable" "0: No interrupt is generated when the BOOTAR status..,1: An interrupt is generated when the BOOTAR status.."
bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Signal Enable" "0,1"
newline
bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Signal Enable" "0,1"
bitfld.word 0x2 3. "DMAINT,DMA Interrupt Signal Enable" "0,1"
newline
bitfld.word 0x2 2. "BLKGE,Block Gap Event Signal Enable" "0,1"
bitfld.word 0x2 1. "TRFC,Transfer Complete Signal Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDC,Command Complete Signal Enable" "0,1"
group.word 0x38++0x3
line.word 0x0 "NISIER_SD_SDIO_MODE,Normal Interrupt Signal Enable Register"
bitfld.word 0x0 8. "CINT,Card Interrupt Signal Enable" "0: No interrupt is generated when the CINT status..,1: An interrupt is generated when the CINT status.."
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Signal Enable" "0: No interrupt is generated when the BRDRDY status..,1: An interrupt is generated when the BRDRDY status.."
newline
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Signal Enable" "0: No interrupt is generated when the BWRRDY status..,1: An interrupt is generated when the BWRRDY status.."
bitfld.word 0x0 3. "DMAINT,DMA Interrupt Signal Enable" "0: No interrupt is generated when the DMAINT status..,1: An interrupt is generated when the DMAINT status.."
newline
bitfld.word 0x0 2. "BLKGE,Block Gap Event Signal Enable" "0: No interrupt is generated when the BLKGE status..,1: An interrupt is generated when the BLKGE status.."
bitfld.word 0x0 1. "TRFC,Transfer Complete Signal Enable" "0: No interrupt is generated when the TRFC status..,1: An interrupt is generated when the TRFC status.."
newline
bitfld.word 0x0 0. "CMDC,Command Complete Signal Enable" "0: No interrupt is generated when the CMDC status..,1: An interrupt is generated when the CMDC status.."
line.word 0x2 "EISIER_EMMC_MODE,Error Interrupt Signal Enable Register"
bitfld.word 0x2 12. "BOOTAE,Boot Acknowledge Error Signal Enable" "0: No interrupt is generated when the BOOTAE status..,1: An interrupt is generated when the BOOTAE status.."
bitfld.word 0x2 9. "ADMA,ADMA Error Signal Enable" "0,1"
newline
bitfld.word 0x2 8. "ACMD,Auto CMD Error Signal Enable" "0,1"
bitfld.word 0x2 7. "CURLIM,Current Limit Error Signal Enable" "0,1"
newline
bitfld.word 0x2 6. "DATEND,Data End Bit Error Signal Enable" "0,1"
bitfld.word 0x2 5. "DATCRC,Data CRC Error Signal Enable" "0,1"
newline
bitfld.word 0x2 4. "DATTEO,Data Timeout Error Signal Enable" "0,1"
bitfld.word 0x2 3. "CMDIDX,Command Index Error Signal Enable" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Command End Bit Error Signal Enable" "0,1"
bitfld.word 0x2 1. "CMDCRC,Command CRC Error Signal Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Signal Enable" "0,1"
group.word 0x3A++0x1
line.word 0x0 "EISIER_SD_SDIO_MODE,Error Interrupt Signal Enable Register"
bitfld.word 0x0 9. "ADMA,ADMA Error Signal Enable" "0: No interrupt is generated when the ADMA status..,1: An interrupt is generated when the ADMA status.."
bitfld.word 0x0 8. "ACMD,Auto CMD Error Signal Enable" "0: No interrupt is generated when the ACMD status..,1: An interrupt is generated when the ACMD status.."
newline
bitfld.word 0x0 7. "CURLIM,Current Limit Error Signal Enable" "0: No interrupt is generated when the CURLIM status..,1: An interrupt is generated when the CURLIM status.."
bitfld.word 0x0 6. "DATEND,Data End Bit Error Signal Enable" "0: No interrupt is generated when the DATEND status..,1: An interrupt is generated when the DATEND status.."
newline
bitfld.word 0x0 5. "DATCRC,Data CRC Error Signal Enable" "0: No interrupt is generated when the DATCRC status..,1: An interrupt is generated when the DATCRC status.."
bitfld.word 0x0 4. "DATTEO,Data Timeout Error Signal Enable" "0: No interrupt is generated when the DATTEO status..,1: An interrupt is generated when the DATTEO status.."
newline
bitfld.word 0x0 3. "CMDIDX,Command Index Error Signal Enable" "0: No interrupt is generated when the CMDIDX status..,1: An interrupt is generated when the CMDIDX status.."
bitfld.word 0x0 2. "CMDEND,Command End Bit Error Signal Enable" "0: No interrupt is generated when the CMDEND status..,1: An interrupt is generated when the CMDEND status.."
newline
bitfld.word 0x0 1. "CMDCRC,Command CRC Error Signal Enable" "0: No interrupt is generated when the CDMCRC status..,1: An interrupt is generated when the CMDCRC status.."
bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Signal Enable" "0: No interrupt is generated when the CMDTEO status..,1: An interrupt is generated when the CMDTEO status.."
rgroup.word 0x3C++0x1
line.word 0x0 "ACESR,Auto CMD Error Status Register"
bitfld.word 0x0 7. "CMDNI,Command Not Issued by Auto CMD12 Error" "0: No error.,1: Error."
bitfld.word 0x0 4. "ACMDIDX,Auto CMD Index Error" "0: No error.,1: Error."
newline
bitfld.word 0x0 3. "ACMDEND,Auto CMD End Bit Error" "0: No error.,1: Error."
bitfld.word 0x0 2. "ACMDCRC,Auto CMD CRC Error" "0,1"
newline
bitfld.word 0x0 1. "ACMDTEO,Auto CMD Timeout Error" "0,1"
bitfld.word 0x0 0. "ACMD12NE,Auto CMD12 Not Executed" "0: No error.,1: Error."
group.word 0x3E++0x1
line.word 0x0 "HC2R_EMMC_MODE,Host Control 2 Register"
bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver strength are controlled by the..,1: Automatic selection by Preset Value is enabled."
group.word 0x3E++0x1
line.word 0x0 "HC2R_SD_SDIO_MODE,Host Control 2 Register"
bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver strength are controlled by the..,1: Automatic selection by Preset Value is enabled."
bitfld.word 0x0 14. "ASINTEN,Asynchronous Interrupt Enable" "0: Disabled,1: Enabled"
group.long 0x40++0xB
line.long 0x0 "CA0R,Capabilities 0 Register"
bitfld.long 0x0 30.--31. "SLTYPE,Slot Type" "0: Removable Card Slot,1: Embedded Slot for One Device,?,?"
bitfld.long 0x0 29. "ASINTSUP,Asynchronous Interrupt Support" "0: Asynchronous interrupt not supported.,1: Asynchronous interrupt supported."
newline
bitfld.long 0x0 28. "SB64SUP,64-Bit System Bus Support" "0: 64-bit address bus not supported.,1: 64-bit address bus supported."
bitfld.long 0x0 26. "V18VSUP,Voltage Support 1.8V" "0: 1.8V Voltage supply not supported.,1: 1.8V Voltage supply supported."
newline
bitfld.long 0x0 25. "V30VSUP,Voltage Support 3.0V" "0: 3.0V Voltage supply not supported.,1: 3.0V Voltage supply supported."
bitfld.long 0x0 24. "V33VSUP,Voltage Support 3.3V" "0: 3.3V Voltage supply not supported.,1: 3.3V Voltage supply supported."
newline
bitfld.long 0x0 23. "SRSUP,Suspend/Resume Support" "0: Suspend/Resume not supported.,1: Suspend/Resume supported."
bitfld.long 0x0 22. "SDMASUP,SDMA Support" "0: SDMA not supported.,1: SDMA supported."
newline
bitfld.long 0x0 21. "HSSUP,High Speed Support" "0: High Speed not supported.,1: High Speed supported."
bitfld.long 0x0 19. "ADMA2SUP,ADMA2 Support" "0: ADMA2 not supported.,1: ADMA2 supported."
newline
bitfld.long 0x0 18. "ED8SUP,8-Bit Support for Embedded Device" "0: 8-bit bus width not supported.,1: 8-bit bus width supported."
bitfld.long 0x0 16.--17. "MAXBLKL,Max Block Length" "0: 512 bytes,1: 1024 bytes,2: 2048 bytes,?"
newline
hexmask.long.byte 0x0 8.--15. 1. "BASECLKF,Base Clock Frequency"
bitfld.long 0x0 7. "TEOCLKU,Timeout Clock Unit" "0: KHz,1: MHz"
newline
hexmask.long.byte 0x0 0.--5. 1. "TEOCLKF,Timeout Clock Frequency"
line.long 0x4 "CA1R,Capabilities 1 Register"
hexmask.long.byte 0x4 16.--23. 1. "CLKMULT,Clock Multiplier"
bitfld.long 0x4 6. "DRVDSUP,Driver Type D Support" "0: Driver type D is not supported.,1: Driver type D is supported."
newline
bitfld.long 0x4 5. "DRVCSUP,Driver Type C Support" "0: Driver type C is not supported.,1: Driver type C is supported."
bitfld.long 0x4 4. "DRVASUP,Driver Type A Support" "0: Driver type A is not supported.,1: Driver type A is supported."
newline
bitfld.long 0x4 2. "DDR50SUP,DDR50 Support" "0: DDR50 mode is not supported.,1: DDR50 mode is supported."
bitfld.long 0x4 1. "SDR104SUP,SDR104 Support" "0: SDR104 mode is not supported.,1: SDR104 mode is supported."
newline
bitfld.long 0x4 0. "SDR50SUP,SDR50 Support" "0: SDR50 mode is not supported.,1: SDR50 mode is supported."
line.long 0x8 "MCCAR,Maximum Current Capabilities Register"
hexmask.long.byte 0x8 16.--23. 1. "MAXCUR18V,Maximum Current for 1.8V"
hexmask.long.byte 0x8 8.--15. 1. "MAXCUR30V,Maximum Current for 3.0V"
newline
hexmask.long.byte 0x8 0.--7. 1. "MAXCUR33V,Maximum Current for 3.3V"
wgroup.word 0x50++0x3
line.word 0x0 "FERACES,Force Event Register for Auto CMD Error Status"
bitfld.word 0x0 7. "CMDNI,Force Event for Command Not Issued by Auto CMD12 Error" "0,1"
bitfld.word 0x0 4. "ACMDIDX,Force Event for Auto CMD Index Error" "0,1"
newline
bitfld.word 0x0 3. "ACMDEND,Force Event for Auto CMD End Bit Error" "0,1"
bitfld.word 0x0 2. "ACMDCRC,Force Event for Auto CMD CRC Error" "0,1"
newline
bitfld.word 0x0 1. "ACMDTEO,Force Event for Auto CMD Timeout Error" "0,1"
bitfld.word 0x0 0. "ACMD12NE,Force Event for Auto CMD12 Not Executed" "0,1"
line.word 0x2 "FEREIS,Force Event Register for Error Interrupt Status"
bitfld.word 0x2 12. "BOOTAE,Force Event for Boot Acknowledge Error" "0,1"
bitfld.word 0x2 9. "ADMA,Force Event for ADMA Error" "0,1"
newline
bitfld.word 0x2 8. "ACMD,Force Event for Auto CMD Error" "0,1"
bitfld.word 0x2 7. "CURLIM,Force Event for Current Limit Error" "0,1"
newline
bitfld.word 0x2 6. "DATEND,Force Event for Data End Bit Error" "0,1"
bitfld.word 0x2 5. "DATCRC,Force Event for Data CRC error" "0,1"
newline
bitfld.word 0x2 4. "DATTEO,Force Event for Data Timeout error" "0,1"
bitfld.word 0x2 3. "CMDIDX,Force Event for Command Index Error" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Force Event for Command End Bit Error" "0,1"
bitfld.word 0x2 1. "CMDCRC,Force Event for Command CRC Error" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Force Event for Command Timeout Error" "0,1"
rgroup.byte 0x54++0x0
line.byte 0x0 "AESR,ADMA Error Status Register"
bitfld.byte 0x0 2. "LMIS,ADMA Length Mismatch Error" "0: No error.,1: Error."
bitfld.byte 0x0 0.--1. "ERRST,ADMA Error State" "0: (Stop DMA) SDMMC_ASAR points to the descriptor..,1: (Fetch Descriptor) SDMMC_ASAR points to the..,?,3: (Transfer Data) SDMMC_ASAR points to the.."
group.long 0x58++0x3
line.long 0x0 "ASAR0,ADMA System Address Register 0"
hexmask.long 0x0 0.--31. 1. "ADMASA,ADMA System Address"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x60)++0x1
line.word 0x0 "PVR[$1],Preset Value Register x (for initialization)"
bitfld.word 0x0 10. "CLKGSEL,Clock Generator Select" "0,1"
hexmask.word 0x0 0.--9. 1. "SDCLKFSEL,SDCLK Frequency Select"
repeat.end
rgroup.word 0xFC++0x3
line.word 0x0 "SISR,Slot Interrupt Status Register"
bitfld.word 0x0 0.--1. "INTSSL,Interrupt Signal for Each Slot" "0,1,2,3"
line.word 0x2 "HCVR,Host Controller Version Register"
hexmask.word.byte 0x2 8.--15. 1. "VVER,Vendor Version Number"
hexmask.word.byte 0x2 0.--7. 1. "SVER,Specification Version Number"
rgroup.long 0x200++0x3
line.long 0x0 "APSR,Additional Present State Register"
hexmask.long.byte 0x0 0.--3. 1. "HDATLL,DAT[7:4] High Line Level"
group.byte 0x204++0x0
line.byte 0x0 "MC1R,e.MMC Control 1 Register"
bitfld.byte 0x0 5. "BOOTA,e.MMC Boot Acknowledge Enable" "0,1"
bitfld.byte 0x0 4. "OPD,e.MMC Open Drain Mode" "0: The command line is in push-pull.,1: The command line is in open drain."
newline
bitfld.byte 0x0 3. "DDR,e.MMC HSDDR Mode" "0: High Speed DDR is not selected.,1: High Speed DDR is selected."
bitfld.byte 0x0 0.--1. "CMDTYP,e.MMC Command Type" "0: The command is not an e.MMC specific command.,1: This bit must be set to 1 when the e.MMC is in..,2: This bit must be set to 1 in the case of Stream..,3: Starts a Boot Operation mode at the next write.."
wgroup.byte 0x205++0x0
line.byte 0x0 "MC2R,e.MMC Control 2 Register"
bitfld.byte 0x0 1. "ABOOT,e.MMC Abort Boot" "0,1"
bitfld.byte 0x0 0. "SRESP,e.MMC Abort Wait IRQ" "0,1"
group.long 0x208++0x7
line.long 0x0 "ACR,AHB Control Register"
bitfld.long 0x0 0.--1. "BMAX,AHB Maximum Burst" "0: The maximum burst size is INCR16.,1: The maximum burst size is INCR8.,2: The maximum burst size is INCR4.,3: Only SINGLE transfers are performed."
line.long 0x4 "CC2R,Clock Control 2 Register"
bitfld.long 0x4 0. "FSDCLKD,Force SDCLK Disabled" "0: The SDCLK is forced and it cannot be stopped..,1: The SDCLK is not forced and it can be stopped.."
group.long 0x230++0x7
line.long 0x0 "CACR,Capabilities Control Register"
hexmask.long.byte 0x0 8.--15. 1. "KEY,Key"
bitfld.long 0x0 0. "CAPWREN,Capabilities Write Enable" "0: Capabilities registers (SDMMC_CA0R SDMMC_CA1R..,1: Capabilities registers (SDMMC_CA0R SDMMC_CA1R.."
line.long 0x4 "DBGR,Debug Register"
bitfld.long 0x4 0. "NIDBG,Nonintrusive Debug" "0: Reading the SDMMC_BDPR via debugger increments..,1: Reading the SDMMC_BDPR via debugger does not.."
tree.end
tree "SDMMC1"
base ad:0x90000000
group.long 0x0++0x3
line.long 0x0 "SSAR,SDMA System Address / Argument 2 Register"
hexmask.long 0x0 0.--31. 1. "ADDR,SDMA System Address"
group.long 0x0++0x3
line.long 0x0 "SSAR_CMD23_MODE,SDMA System Address / Argument 2 Register"
hexmask.long 0x0 0.--31. 1. "ARG2,Argument 2"
group.word 0x4++0x3
line.word 0x0 "BSR,Block Size Register"
bitfld.word 0x0 12.--14. "BOUNDARY,SDMA Buffer Boundary" "0: 4-Kbyte boundary,1: 8-Kbyte boundary,2: 16-Kbyte boundary,3: 32-Kbyte boundary,4: 64-Kbyte boundary,5: 128-Kbyte boundary,6: 256-Kbyte boundary,7: 512-Kbyte boundary"
hexmask.word 0x0 0.--9. 1. "BLKSIZE,Transfer Block Size"
line.word 0x2 "BCR,Block Count Register"
hexmask.word 0x2 0.--15. 1. "BLKCNT,Block Count for Current Transfer"
group.long 0x8++0x3
line.long 0x0 "ARG1R,Argument 1 Register"
hexmask.long 0x0 0.--31. 1. "ARG1,Argument 1"
group.word 0xC++0x3
line.word 0x0 "TMR,Transfer Mode Register"
bitfld.word 0x0 5. "MSBSEL,Multi/Single Block Selection" "0,1"
bitfld.word 0x0 4. "DTDSEL,Data Transfer Direction Selection" "0: Writes data from the SDMMC to the device.,1: Reads data from the device to the SDMMC."
newline
bitfld.word 0x0 2.--3. "ACMDEN,Auto Command Enable" "0: Auto Command Disabled,1: Auto CMD12 Enabled,2: Auto CMD23 Enabled,?"
bitfld.word 0x0 1. "BCEN,Block Count Enable" "0: Block count is disabled.,1: Block count is enabled."
newline
bitfld.word 0x0 0. "DMAEN,DMA Enable" "0: DMA functionality is disabled.,1: DMA functionality is enabled."
line.word 0x2 "CR,Command Register"
hexmask.word.byte 0x2 8.--13. 1. "CMDIDX,Command Index"
bitfld.word 0x2 6.--7. "CMDTYP,Command Type" "0: Other commands,1: CMD52 to write 'Bus Suspend' in the Card Common..,2: CMD52 to write 'Function Select' in the Card..,3: CMD12 CMD52 to write 'I/O Abort' in the Card.."
newline
bitfld.word 0x2 5. "DPSEL,Data Present Select" "0: No data present,1: Data present"
bitfld.word 0x2 4. "CMDICEN,Command Index Check Enable" "0: The Command Index Check is disabled.,1: The Command Index Check is enabled."
newline
bitfld.word 0x2 3. "CMDCCEN,Command CRC Check Enable" "0: The Command CRC Check is disabled.,1: The Command CRC Check is enabled."
bitfld.word 0x2 0.--1. "RESPTYP,Response Type" "0: No Response,1: Response Length 136,2: Response Length 48,3: Response Length 48 with Busy"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x10)++0x3
line.long 0x0 "RR[$1],Response Register x"
hexmask.long 0x0 0.--31. 1. "CMDRESP,Command Response"
repeat.end
group.long 0x20++0x3
line.long 0x0 "BDPR,Buffer Data Port Register"
hexmask.long 0x0 0.--31. 1. "BUFDATA,Buffer Data"
rgroup.long 0x24++0x3
line.long 0x0 "PSR,Present State Register"
bitfld.long 0x0 24. "CMDLL,CMD Line Level" "0,1"
hexmask.long.byte 0x0 20.--23. 1. "DATLL,DAT[3:0] Line Level"
newline
bitfld.long 0x0 11. "BUFRDEN,Buffer Read Enable" "0,1"
bitfld.long 0x0 10. "BUFWREN,Buffer Write Enable" "0,1"
newline
bitfld.long 0x0 9. "RTACT,Read Transfer Active" "0,1"
bitfld.long 0x0 8. "WTACT,Write Transfer Active" "0,1"
newline
bitfld.long 0x0 2. "DLACT,DAT Line Active" "0: DAT line inactive.,1: DAT line active."
bitfld.long 0x0 1. "CMDINHD,Command Inhibit (DAT)" "0: Can issue a command which uses the DAT line(s).,1: Cannot issue a command which uses the DAT line(s)."
newline
bitfld.long 0x0 0. "CMDINHC,Command Inhibit (CMD)" "0: Can issue a command using only CMD line.,1: Cannot issue a command."
group.byte 0x28++0x0
line.byte 0x0 "HC1R_EMMC_MODE,Host Control 1 Register"
bitfld.byte 0x0 5. "EXTDW,Extended Data Width" "0,1"
bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?"
newline
bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0,1"
bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode.,1: 4-bit mode."
group.byte 0x28++0x2
line.byte 0x0 "HC1R_SD_SDIO_MODE,Host Control 1 Register"
bitfld.byte 0x0 6. "CARDDTL,Card Detect Test Level" "0: No card.,1: Card inserted."
bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?"
newline
bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0: Normal Speed mode.,1: High Speed mode."
bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode.,1: 4-bit mode."
newline
bitfld.byte 0x0 0. "LEDCTRL,LED Control" "0: LED off.,1: LED on."
line.byte 0x1 "PCR,Power Control Register"
bitfld.byte 0x1 0. "SDBPWR,SD Bus Power" "0,1"
line.byte 0x2 "BGCR_EMMC_MODE,Block Gap Control Register"
bitfld.byte 0x2 1. "CONTR,Continue Request" "0: No effect.,1: Restart."
bitfld.byte 0x2 0. "STPBGR,Stop At Block Gap Request" "0: Transfer,1: Stop"
group.byte 0x2A++0x1
line.byte 0x0 "BGCR_SD_SDIO_MODE,Block Gap Control Register"
bitfld.byte 0x0 3. "INTBG,Interrupt at Block Gap" "0: Interrupt detection disabled.,1: Interrupt detection enabled."
bitfld.byte 0x0 2. "RWCTRL,Read Wait Control" "0: Disables Read Wait control.,1: Enables Read Wait control."
newline
bitfld.byte 0x0 1. "CONTR,Continue Request" "0: No effect.,1: Restart."
bitfld.byte 0x0 0. "STPBGR,Stop At Block Gap Request" "0: Transfer,1: Stop"
line.byte 0x1 "WCR,Wakeup Control Register"
bitfld.byte 0x1 0. "WKENCINT,Wakeup Event Enable on Card Interrupt" "0: Wakeup Event disabled.,1: Wakeup Event enabled."
group.word 0x2C++0x1
line.word 0x0 "CCR,Clock Control Register"
hexmask.word.byte 0x0 8.--15. 1. "SDCLKFSEL,SDCLK Frequency Select"
bitfld.word 0x0 6.--7. "USDCLKFSEL,Upper Bits of SDCLK Frequency Select" "0,1,2,3"
newline
bitfld.word 0x0 5. "CLKGSEL,Clock Generator Select" "0: Divided Clock mode (BASECLK is used to generate..,1: Programmable Clock mode (MULTCLK is used to.."
bitfld.word 0x0 2. "SDCLKEN,SD Clock Enable" "0: SD Clock disabled,1: SD Clock enabled"
newline
bitfld.word 0x0 1. "INTCLKS,Internal Clock Stable" "0: Internal clock not ready.,1: Internal clock ready."
bitfld.word 0x0 0. "INTCLKEN,Internal Clock Enable" "0: The internal clock stops.,1: The internal clock oscillates."
group.byte 0x2E++0x1
line.byte 0x0 "TCR,Timeout Control Register"
hexmask.byte 0x0 0.--3. 1. "DTCVAL,Data Timeout Counter Value"
line.byte 0x1 "SRR,Software Reset Register"
bitfld.byte 0x1 2. "SWRSTDAT,Software reset for DAT line" "0: Work,1: Reset"
bitfld.byte 0x1 1. "SWRSTCMD,Software reset for CMD line" "0: Work,1: Reset"
newline
bitfld.byte 0x1 0. "SWRSTALL,Software reset for All" "0: Work,1: Reset"
group.word 0x30++0x1
line.word 0x0 "NISTR_EMMC_MODE,Normal Interrupt Status Register"
bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0: No error.,1: Error."
bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received" "0: Boot Acknowledge pattern not received.,1: Boot Acknowledge pattern received."
newline
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0: Not ready to read buffer.,1: Ready to read buffer."
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0: Not ready to write buffer.,1: Ready to write buffer."
newline
bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA interrupt.,1: DMA interrupt."
bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0,1"
newline
bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0,1"
bitfld.word 0x0 0. "CMDC,Command Complete" "0,1"
group.word 0x30++0x3
line.word 0x0 "NISTR_SD_SDIO_MODE,Normal Interrupt Status Register"
bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0,1"
bitfld.word 0x0 8. "CINT,Card Interrupt" "0: No card interrupt.,1: Card interrupt."
newline
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0,1"
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0,1"
newline
bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA Interrupt.,1: DMA Interrupt."
bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0: No block gap event.,1: Transaction stopped at block gap."
newline
bitfld.word 0x0 1. "TRFC,Transfer Complete" "0: Command execution is not complete.,1: Command execution is complete."
bitfld.word 0x0 0. "CMDC,Command Complete" "0: No command complete.,1: Command complete."
line.word 0x2 "EISTR_EMMC_MODE,Error Interrupt Status Register"
bitfld.word 0x2 12. "BOOTAE,Boot Acknowledge Error" "0: No error.,1: Error."
bitfld.word 0x2 9. "ADMA,ADMA Error" "0: No error.,1: Error."
newline
bitfld.word 0x2 8. "ACMD,Auto CMD Error" "0: No error.,1: Error."
bitfld.word 0x2 7. "CURLIM,Current Limit Error" "0: No error.,1: Error."
newline
bitfld.word 0x2 6. "DATEND,Data End Bit Error" "0: No error.,1: Error."
bitfld.word 0x2 5. "DATCRC,Data CRC Error" "0: No error.,1: Error."
newline
bitfld.word 0x2 4. "DATTEO,Data Timeout error" "0: No error.,1: Error."
bitfld.word 0x2 3. "CMDIDX,Command Index Error" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Command End Bit Error" "0,1"
bitfld.word 0x2 1. "CMDCRC,Command CRC Error" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Command Timeout Error" "0,1"
group.word 0x32++0x3
line.word 0x0 "EISTR_SD_SDIO_MODE,Error Interrupt Status Register"
bitfld.word 0x0 9. "ADMA,ADMA Error" "0,1"
bitfld.word 0x0 8. "ACMD,Auto CMD Error" "0,1"
newline
bitfld.word 0x0 7. "CURLIM,Current Limit Error" "0,1"
bitfld.word 0x0 6. "DATEND,Data End Bit Error" "0,1"
newline
bitfld.word 0x0 5. "DATCRC,Data CRC error" "0: No error.,1: Error."
bitfld.word 0x0 4. "DATTEO,Data Timeout Error" "0: No error.,1: Error."
newline
bitfld.word 0x0 3. "CMDIDX,Command Index Error" "0: No error.,1: Error."
bitfld.word 0x0 2. "CMDEND,Command End Bit Error" "0: No error.,1: Error."
newline
bitfld.word 0x0 1. "CMDCRC,Command CRC Error" "0,1"
bitfld.word 0x0 0. "CMDTEO,Command Timeout Error" "0,1"
line.word 0x2 "NISTER_EMMC_MODE,Normal Interrupt Status Enable Register"
bitfld.word 0x2 14. "BOOTAR,Boot Acknowledge Received Status Enable" "0: The BOOTAR status flag in SDMMC_NISTR is masked.,1: The BOOTAR status flag in SDMMC_NISTR is enabled."
bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Status Enable" "0,1"
newline
bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Status Enable" "0,1"
bitfld.word 0x2 3. "DMAINT,DMA Interrupt Status Enable" "0,1"
newline
bitfld.word 0x2 2. "BLKGE,Block Gap Event Status Enable" "0,1"
bitfld.word 0x2 1. "TRFC,Transfer Complete Status Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDC,Command Complete Status Enable" "0,1"
group.word 0x34++0x3
line.word 0x0 "NISTER_SD_SDIO_MODE,Normal Interrupt Status Enable Register"
bitfld.word 0x0 8. "CINT,Card Interrupt Status Enable" "0: The CINT status flag in SDMMC_NISTR is masked.,1: The CINT status flag in SDMMC_NISTR is enabled."
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Status Enable" "0: The BRDRDY status flag in SDMMC_NISTR is masked.,1: The BRDRDY status flag in SDMMC_NISTR is enabled."
newline
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Status Enable" "0: The BWRRDY status flag in SDMMC_NISTR is masked.,1: The BWRRDY status flag in SDMMC_NISTR is enabled."
bitfld.word 0x0 3. "DMAINT,DMA Interrupt Status Enable" "0: The DMAINT status flag in SDMMC_NISTR is masked.,1: The DMAINT status flag in SDMMC_NISTR is enabled."
newline
bitfld.word 0x0 2. "BLKGE,Block Gap Event Status Enable" "0: The BLKGE status flag in SDMMC_NISTR is masked.,1: The BLKGE status flag in SDMMC_NISTR is enabled."
bitfld.word 0x0 1. "TRFC,Transfer Complete Status Enable" "0: The TRFC status flag in SDMMC_NISTR is masked.,1: The TRFC status flag in SDMMC_NISTR is enabled."
newline
bitfld.word 0x0 0. "CMDC,Command Complete Status Enable" "0: The CMDC status flag in SDMMC_NISTR is masked.,1: The CMDC status flag in SDMMC_NISTR is enabled."
line.word 0x2 "EISTER_EMMC_MODE,Error Interrupt Status Enable Register"
bitfld.word 0x2 12. "BOOTAE,Boot Acknowledge Error Status Enable" "0: The BOOTAE status flag in SDMMC_EISTR is masked.,1: The BOOTAE status flag in SDMMC_EISTR is enabled."
bitfld.word 0x2 9. "ADMA,ADMA Error Status Enable" "0,1"
newline
bitfld.word 0x2 8. "ACMD,Auto CMD Error Status Enable" "0,1"
bitfld.word 0x2 7. "CURLIM,Current Limit Error Status Enable" "0,1"
newline
bitfld.word 0x2 6. "DATEND,Data End Bit Error Status Enable" "0,1"
bitfld.word 0x2 5. "DATCRC,Data CRC Error Status Enable" "0,1"
newline
bitfld.word 0x2 4. "DATTEO,Data Timeout Error Status Enable" "0,1"
bitfld.word 0x2 3. "CMDIDX,Command Index Error Status Enable" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Command End Bit Error Status Enable" "0,1"
bitfld.word 0x2 1. "CMDCRC,Command CRC Error Status Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Status Enable" "0,1"
group.word 0x36++0x3
line.word 0x0 "EISTER_SD_SDIO_MODE,Error Interrupt Status Enable Register"
bitfld.word 0x0 9. "ADMA,ADMA Error Status Enable" "0: The ADMA status flag in SDMMC_EISTR is masked.,1: The ADMA status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 8. "ACMD,Auto CMD Error Status Enable" "0: The ACMD status flag in SDMMC_EISTR is masked.,1: The ACMD status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 7. "CURLIM,Current Limit Error Status Enable" "0: The CURLIM status flag in SDMMC_EISTR is masked.,1: The CURLIM status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 6. "DATEND,Data End Bit Error Status Enable" "0: The DATEND status flag in SDMMC_EISTR is masked.,1: The DATEND status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 5. "DATCRC,Data CRC Error Status Enable" "0: The DATCRC status flag in SDMMC_EISTR is masked.,1: The DATCRC status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 4. "DATTEO,Data Timeout Error Status Enable" "0: The DATTEO status flag in SDMMC_EISTR is masked.,1: The DATTEO status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 3. "CMDIDX,Command Index Error Status Enable" "0: The CMDIDX status flag in SDMMC_EISTR is masked.,1: The CMDIDX status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 2. "CMDEND,Command End Bit Error Status Enable" "0: The CMDEND status flag in SDMMC_EISTR is masked.,1: The CMDEND status flag in SDMMC_EISTR is enabled."
newline
bitfld.word 0x0 1. "CMDCRC,Command CRC Error Status Enable" "0: The CMDCRC status flag in SDMMC_EISTR is masked.,1: The CMDCRC status flag in SDMMC_EISTR is enabled."
bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Status Enable" "0: The CMDTEO status flag in SDMMC_EISTR is masked.,1: The CMDTEO status flag in SDMMC_EISTR is enabled."
line.word 0x2 "NISIER_EMMC_MODE,Normal Interrupt Signal Enable Register"
bitfld.word 0x2 14. "BOOTAR,Boot Acknowledge Received Signal Enable" "0: No interrupt is generated when the BOOTAR status..,1: An interrupt is generated when the BOOTAR status.."
bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Signal Enable" "0,1"
newline
bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Signal Enable" "0,1"
bitfld.word 0x2 3. "DMAINT,DMA Interrupt Signal Enable" "0,1"
newline
bitfld.word 0x2 2. "BLKGE,Block Gap Event Signal Enable" "0,1"
bitfld.word 0x2 1. "TRFC,Transfer Complete Signal Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDC,Command Complete Signal Enable" "0,1"
group.word 0x38++0x3
line.word 0x0 "NISIER_SD_SDIO_MODE,Normal Interrupt Signal Enable Register"
bitfld.word 0x0 8. "CINT,Card Interrupt Signal Enable" "0: No interrupt is generated when the CINT status..,1: An interrupt is generated when the CINT status.."
bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Signal Enable" "0: No interrupt is generated when the BRDRDY status..,1: An interrupt is generated when the BRDRDY status.."
newline
bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Signal Enable" "0: No interrupt is generated when the BWRRDY status..,1: An interrupt is generated when the BWRRDY status.."
bitfld.word 0x0 3. "DMAINT,DMA Interrupt Signal Enable" "0: No interrupt is generated when the DMAINT status..,1: An interrupt is generated when the DMAINT status.."
newline
bitfld.word 0x0 2. "BLKGE,Block Gap Event Signal Enable" "0: No interrupt is generated when the BLKGE status..,1: An interrupt is generated when the BLKGE status.."
bitfld.word 0x0 1. "TRFC,Transfer Complete Signal Enable" "0: No interrupt is generated when the TRFC status..,1: An interrupt is generated when the TRFC status.."
newline
bitfld.word 0x0 0. "CMDC,Command Complete Signal Enable" "0: No interrupt is generated when the CMDC status..,1: An interrupt is generated when the CMDC status.."
line.word 0x2 "EISIER_EMMC_MODE,Error Interrupt Signal Enable Register"
bitfld.word 0x2 12. "BOOTAE,Boot Acknowledge Error Signal Enable" "0: No interrupt is generated when the BOOTAE status..,1: An interrupt is generated when the BOOTAE status.."
bitfld.word 0x2 9. "ADMA,ADMA Error Signal Enable" "0,1"
newline
bitfld.word 0x2 8. "ACMD,Auto CMD Error Signal Enable" "0,1"
bitfld.word 0x2 7. "CURLIM,Current Limit Error Signal Enable" "0,1"
newline
bitfld.word 0x2 6. "DATEND,Data End Bit Error Signal Enable" "0,1"
bitfld.word 0x2 5. "DATCRC,Data CRC Error Signal Enable" "0,1"
newline
bitfld.word 0x2 4. "DATTEO,Data Timeout Error Signal Enable" "0,1"
bitfld.word 0x2 3. "CMDIDX,Command Index Error Signal Enable" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Command End Bit Error Signal Enable" "0,1"
bitfld.word 0x2 1. "CMDCRC,Command CRC Error Signal Enable" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Signal Enable" "0,1"
group.word 0x3A++0x1
line.word 0x0 "EISIER_SD_SDIO_MODE,Error Interrupt Signal Enable Register"
bitfld.word 0x0 9. "ADMA,ADMA Error Signal Enable" "0: No interrupt is generated when the ADMA status..,1: An interrupt is generated when the ADMA status.."
bitfld.word 0x0 8. "ACMD,Auto CMD Error Signal Enable" "0: No interrupt is generated when the ACMD status..,1: An interrupt is generated when the ACMD status.."
newline
bitfld.word 0x0 7. "CURLIM,Current Limit Error Signal Enable" "0: No interrupt is generated when the CURLIM status..,1: An interrupt is generated when the CURLIM status.."
bitfld.word 0x0 6. "DATEND,Data End Bit Error Signal Enable" "0: No interrupt is generated when the DATEND status..,1: An interrupt is generated when the DATEND status.."
newline
bitfld.word 0x0 5. "DATCRC,Data CRC Error Signal Enable" "0: No interrupt is generated when the DATCRC status..,1: An interrupt is generated when the DATCRC status.."
bitfld.word 0x0 4. "DATTEO,Data Timeout Error Signal Enable" "0: No interrupt is generated when the DATTEO status..,1: An interrupt is generated when the DATTEO status.."
newline
bitfld.word 0x0 3. "CMDIDX,Command Index Error Signal Enable" "0: No interrupt is generated when the CMDIDX status..,1: An interrupt is generated when the CMDIDX status.."
bitfld.word 0x0 2. "CMDEND,Command End Bit Error Signal Enable" "0: No interrupt is generated when the CMDEND status..,1: An interrupt is generated when the CMDEND status.."
newline
bitfld.word 0x0 1. "CMDCRC,Command CRC Error Signal Enable" "0: No interrupt is generated when the CDMCRC status..,1: An interrupt is generated when the CMDCRC status.."
bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Signal Enable" "0: No interrupt is generated when the CMDTEO status..,1: An interrupt is generated when the CMDTEO status.."
rgroup.word 0x3C++0x1
line.word 0x0 "ACESR,Auto CMD Error Status Register"
bitfld.word 0x0 7. "CMDNI,Command Not Issued by Auto CMD12 Error" "0: No error.,1: Error."
bitfld.word 0x0 4. "ACMDIDX,Auto CMD Index Error" "0: No error.,1: Error."
newline
bitfld.word 0x0 3. "ACMDEND,Auto CMD End Bit Error" "0: No error.,1: Error."
bitfld.word 0x0 2. "ACMDCRC,Auto CMD CRC Error" "0,1"
newline
bitfld.word 0x0 1. "ACMDTEO,Auto CMD Timeout Error" "0,1"
bitfld.word 0x0 0. "ACMD12NE,Auto CMD12 Not Executed" "0: No error.,1: Error."
group.word 0x3E++0x1
line.word 0x0 "HC2R_EMMC_MODE,Host Control 2 Register"
bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver strength are controlled by the..,1: Automatic selection by Preset Value is enabled."
group.word 0x3E++0x1
line.word 0x0 "HC2R_SD_SDIO_MODE,Host Control 2 Register"
bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver strength are controlled by the..,1: Automatic selection by Preset Value is enabled."
bitfld.word 0x0 14. "ASINTEN,Asynchronous Interrupt Enable" "0: Disabled,1: Enabled"
group.long 0x40++0xB
line.long 0x0 "CA0R,Capabilities 0 Register"
bitfld.long 0x0 30.--31. "SLTYPE,Slot Type" "0: Removable Card Slot,1: Embedded Slot for One Device,?,?"
bitfld.long 0x0 29. "ASINTSUP,Asynchronous Interrupt Support" "0: Asynchronous interrupt not supported.,1: Asynchronous interrupt supported."
newline
bitfld.long 0x0 28. "SB64SUP,64-Bit System Bus Support" "0: 64-bit address bus not supported.,1: 64-bit address bus supported."
bitfld.long 0x0 26. "V18VSUP,Voltage Support 1.8V" "0: 1.8V Voltage supply not supported.,1: 1.8V Voltage supply supported."
newline
bitfld.long 0x0 25. "V30VSUP,Voltage Support 3.0V" "0: 3.0V Voltage supply not supported.,1: 3.0V Voltage supply supported."
bitfld.long 0x0 24. "V33VSUP,Voltage Support 3.3V" "0: 3.3V Voltage supply not supported.,1: 3.3V Voltage supply supported."
newline
bitfld.long 0x0 23. "SRSUP,Suspend/Resume Support" "0: Suspend/Resume not supported.,1: Suspend/Resume supported."
bitfld.long 0x0 22. "SDMASUP,SDMA Support" "0: SDMA not supported.,1: SDMA supported."
newline
bitfld.long 0x0 21. "HSSUP,High Speed Support" "0: High Speed not supported.,1: High Speed supported."
bitfld.long 0x0 19. "ADMA2SUP,ADMA2 Support" "0: ADMA2 not supported.,1: ADMA2 supported."
newline
bitfld.long 0x0 18. "ED8SUP,8-Bit Support for Embedded Device" "0: 8-bit bus width not supported.,1: 8-bit bus width supported."
bitfld.long 0x0 16.--17. "MAXBLKL,Max Block Length" "0: 512 bytes,1: 1024 bytes,2: 2048 bytes,?"
newline
hexmask.long.byte 0x0 8.--15. 1. "BASECLKF,Base Clock Frequency"
bitfld.long 0x0 7. "TEOCLKU,Timeout Clock Unit" "0: KHz,1: MHz"
newline
hexmask.long.byte 0x0 0.--5. 1. "TEOCLKF,Timeout Clock Frequency"
line.long 0x4 "CA1R,Capabilities 1 Register"
hexmask.long.byte 0x4 16.--23. 1. "CLKMULT,Clock Multiplier"
bitfld.long 0x4 6. "DRVDSUP,Driver Type D Support" "0: Driver type D is not supported.,1: Driver type D is supported."
newline
bitfld.long 0x4 5. "DRVCSUP,Driver Type C Support" "0: Driver type C is not supported.,1: Driver type C is supported."
bitfld.long 0x4 4. "DRVASUP,Driver Type A Support" "0: Driver type A is not supported.,1: Driver type A is supported."
newline
bitfld.long 0x4 2. "DDR50SUP,DDR50 Support" "0: DDR50 mode is not supported.,1: DDR50 mode is supported."
bitfld.long 0x4 1. "SDR104SUP,SDR104 Support" "0: SDR104 mode is not supported.,1: SDR104 mode is supported."
newline
bitfld.long 0x4 0. "SDR50SUP,SDR50 Support" "0: SDR50 mode is not supported.,1: SDR50 mode is supported."
line.long 0x8 "MCCAR,Maximum Current Capabilities Register"
hexmask.long.byte 0x8 16.--23. 1. "MAXCUR18V,Maximum Current for 1.8V"
hexmask.long.byte 0x8 8.--15. 1. "MAXCUR30V,Maximum Current for 3.0V"
newline
hexmask.long.byte 0x8 0.--7. 1. "MAXCUR33V,Maximum Current for 3.3V"
wgroup.word 0x50++0x3
line.word 0x0 "FERACES,Force Event Register for Auto CMD Error Status"
bitfld.word 0x0 7. "CMDNI,Force Event for Command Not Issued by Auto CMD12 Error" "0,1"
bitfld.word 0x0 4. "ACMDIDX,Force Event for Auto CMD Index Error" "0,1"
newline
bitfld.word 0x0 3. "ACMDEND,Force Event for Auto CMD End Bit Error" "0,1"
bitfld.word 0x0 2. "ACMDCRC,Force Event for Auto CMD CRC Error" "0,1"
newline
bitfld.word 0x0 1. "ACMDTEO,Force Event for Auto CMD Timeout Error" "0,1"
bitfld.word 0x0 0. "ACMD12NE,Force Event for Auto CMD12 Not Executed" "0,1"
line.word 0x2 "FEREIS,Force Event Register for Error Interrupt Status"
bitfld.word 0x2 12. "BOOTAE,Force Event for Boot Acknowledge Error" "0,1"
bitfld.word 0x2 9. "ADMA,Force Event for ADMA Error" "0,1"
newline
bitfld.word 0x2 8. "ACMD,Force Event for Auto CMD Error" "0,1"
bitfld.word 0x2 7. "CURLIM,Force Event for Current Limit Error" "0,1"
newline
bitfld.word 0x2 6. "DATEND,Force Event for Data End Bit Error" "0,1"
bitfld.word 0x2 5. "DATCRC,Force Event for Data CRC error" "0,1"
newline
bitfld.word 0x2 4. "DATTEO,Force Event for Data Timeout error" "0,1"
bitfld.word 0x2 3. "CMDIDX,Force Event for Command Index Error" "0,1"
newline
bitfld.word 0x2 2. "CMDEND,Force Event for Command End Bit Error" "0,1"
bitfld.word 0x2 1. "CMDCRC,Force Event for Command CRC Error" "0,1"
newline
bitfld.word 0x2 0. "CMDTEO,Force Event for Command Timeout Error" "0,1"
rgroup.byte 0x54++0x0
line.byte 0x0 "AESR,ADMA Error Status Register"
bitfld.byte 0x0 2. "LMIS,ADMA Length Mismatch Error" "0: No error.,1: Error."
bitfld.byte 0x0 0.--1. "ERRST,ADMA Error State" "0: (Stop DMA) SDMMC_ASAR points to the descriptor..,1: (Fetch Descriptor) SDMMC_ASAR points to the..,?,3: (Transfer Data) SDMMC_ASAR points to the.."
group.long 0x58++0x3
line.long 0x0 "ASAR0,ADMA System Address Register 0"
hexmask.long 0x0 0.--31. 1. "ADMASA,ADMA System Address"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x60)++0x1
line.word 0x0 "PVR[$1],Preset Value Register x (for initialization)"
bitfld.word 0x0 10. "CLKGSEL,Clock Generator Select" "0,1"
hexmask.word 0x0 0.--9. 1. "SDCLKFSEL,SDCLK Frequency Select"
repeat.end
rgroup.word 0xFC++0x3
line.word 0x0 "SISR,Slot Interrupt Status Register"
bitfld.word 0x0 0.--1. "INTSSL,Interrupt Signal for Each Slot" "0,1,2,3"
line.word 0x2 "HCVR,Host Controller Version Register"
hexmask.word.byte 0x2 8.--15. 1. "VVER,Vendor Version Number"
hexmask.word.byte 0x2 0.--7. 1. "SVER,Specification Version Number"
rgroup.long 0x200++0x3
line.long 0x0 "APSR,Additional Present State Register"
hexmask.long.byte 0x0 0.--3. 1. "HDATLL,DAT[7:4] High Line Level"
group.byte 0x204++0x0
line.byte 0x0 "MC1R,e.MMC Control 1 Register"
bitfld.byte 0x0 5. "BOOTA,e.MMC Boot Acknowledge Enable" "0,1"
bitfld.byte 0x0 4. "OPD,e.MMC Open Drain Mode" "0: The command line is in push-pull.,1: The command line is in open drain."
newline
bitfld.byte 0x0 3. "DDR,e.MMC HSDDR Mode" "0: High Speed DDR is not selected.,1: High Speed DDR is selected."
bitfld.byte 0x0 0.--1. "CMDTYP,e.MMC Command Type" "0: The command is not an e.MMC specific command.,1: This bit must be set to 1 when the e.MMC is in..,2: This bit must be set to 1 in the case of Stream..,3: Starts a Boot Operation mode at the next write.."
wgroup.byte 0x205++0x0
line.byte 0x0 "MC2R,e.MMC Control 2 Register"
bitfld.byte 0x0 1. "ABOOT,e.MMC Abort Boot" "0,1"
bitfld.byte 0x0 0. "SRESP,e.MMC Abort Wait IRQ" "0,1"
group.long 0x208++0x7
line.long 0x0 "ACR,AHB Control Register"
bitfld.long 0x0 0.--1. "BMAX,AHB Maximum Burst" "0: The maximum burst size is INCR16.,1: The maximum burst size is INCR8.,2: The maximum burst size is INCR4.,3: Only SINGLE transfers are performed."
line.long 0x4 "CC2R,Clock Control 2 Register"
bitfld.long 0x4 0. "FSDCLKD,Force SDCLK Disabled" "0: The SDCLK is forced and it cannot be stopped..,1: The SDCLK is not forced and it can be stopped.."
group.long 0x230++0x7
line.long 0x0 "CACR,Capabilities Control Register"
hexmask.long.byte 0x0 8.--15. 1. "KEY,Key"
bitfld.long 0x0 0. "CAPWREN,Capabilities Write Enable" "0: Capabilities registers (SDMMC_CA0R SDMMC_CA1R..,1: Capabilities registers (SDMMC_CA0R SDMMC_CA1R.."
line.long 0x4 "DBGR,Debug Register"
bitfld.long 0x4 0. "NIDBG,Nonintrusive Debug" "0: Reading the SDMMC_BDPR via debugger increments..,1: Reading the SDMMC_BDPR via debugger does not.."
tree.end
tree.end
tree "SFR (Special Function Registers)"
base ad:0xF8050000
group.long 0x4++0x3
line.long 0x0 "CCFG_EBICSA,EBI Chip Select Register"
bitfld.long 0x0 25. "DDR_MP_EN,DDR Multi-port Enable" "0: DDR Multi-port is disabled (default).,1: DDR Multi-port is enabled performance is.."
newline
bitfld.long 0x0 24. "NFD0_ON_D16,NAND Flash Databus Selection" "0: NAND Flash I/Os are connected to D0-D7 (default).,1: NAND Flash I/Os are connected to D16-D23."
newline
bitfld.long 0x0 20. "DQIEN_F,Force Analog Input Comparator Configuration" "0: No effect,1: Enables the input comparator in the VDDIOM I/O.."
newline
bitfld.long 0x0 9. "EBI_DBPDC,EBI Data Bus Pulldown Configuration" "0: EBI D0-D15 Data Bus bits are not internally..,1: EBI D0-D15 Data Bus bits are internally pulled.."
newline
bitfld.long 0x0 8. "EBI_DBPUC,EBI Data Bus Pullup Configuration" "0: EBI D0-D15 Data Bus bits are internally pulled..,1: EBI D0-D15 Data Bus bits are not internally.."
newline
bitfld.long 0x0 2. "EBI_CS2A,EBI Chip Select 2 Assignment" "0: EBI Chip Select 2 is only assigned to the SMC..,1: EBI Chip Select 2 is assigned to the SMC and the.."
newline
bitfld.long 0x0 1. "EBI_CS1A,EBI Chip Select 1 Assignment" "0: EBI Chip Select 1 is assigned to the Static..,1: EBI Chip Select 1 is assigned to the AHB.."
group.long 0x10++0x3
line.long 0x0 "OHCIICR,OHCI Interrupt Configuration Register"
bitfld.long 0x0 23. "UDPPUDIS," "0: Must write 0.,?"
newline
bitfld.long 0x0 10. "SUSP2,USB PORTx" "0: Does not suspend USB PORTx.,1: Forces PORTx suspend."
newline
bitfld.long 0x0 9. "SUSP1,USB PORTx" "0: Does not suspend USB PORTx.,1: Forces PORTx suspend."
newline
bitfld.long 0x0 8. "SUSP0,USB PORTx" "0: Does not suspend USB PORTx.,1: Forces PORTx suspend."
newline
bitfld.long 0x0 5. "APPSTART," "0: Must write 0.,?"
newline
bitfld.long 0x0 4. "ARIE,OHCI Asynchronous Resume Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt."
newline
bitfld.long 0x0 2. "RES2,USB PORTx Reset" "0: No effect (USB PORTx reset released default value),1: Resets USB PORTx."
newline
bitfld.long 0x0 1. "RES1,USB PORTx Reset" "0: No effect (USB PORTx reset released default value),1: Resets USB PORTx."
newline
bitfld.long 0x0 0. "RES0,USB PORTx Reset" "0: No effect (USB PORTx reset released default value),1: Resets USB PORTx."
rgroup.long 0x14++0x3
line.long 0x0 "OHCIISR,OHCI Interrupt Status Register"
bitfld.long 0x0 2. "RIS2,OHCI Resume Interrupt Status Port 2" "0: OHCI port resume is not detected.,1: OHCI port resume is detected."
newline
bitfld.long 0x0 1. "RIS1,OHCI Resume Interrupt Status Port 1" "0: OHCI port resume is not detected.,1: OHCI port resume is detected."
newline
bitfld.long 0x0 0. "RIS0,OHCI Resume Interrupt Status Port 0" "0: OHCI port resume is not detected.,1: OHCI port resume is detected."
group.long 0x34++0xB
line.long 0x0 "UTMIHSTRIM,UTMI High-Speed Trimming Register"
bitfld.long 0x0 16.--18. "SLOPE2,UTMI HS PORTx Transceiver Slope Trimming" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12.--14. "SLOPE1,UTMI HS PORTx Transceiver Slope Trimming" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8.--10. "SLOPE0,UTMI HS PORTx Transceiver Slope Trimming" "0,1,2,3,4,5,6,7"
line.long 0x4 "UTMIFSTRIM,UTMI Full-Speed Trimming Register"
bitfld.long 0x4 28.--30. "ZP_CAL,FS Transceiver PMOS Impedance Calibration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 24.--26. "ZN_CAL,FS Transceiver NMOS Impedance Calibration" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 20.--22. "ZP,FS Transceiver PMOS Impedance Trimming" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 16.--18. "ZN,FS Transceiver NMOS Impedance Trimming" "0,1,2,3,4,5,6,7"
line.long 0x8 "UTMISWAP,UTMI DP/DM Pin Swapping Register"
bitfld.long 0x8 2. "PORT2,Port 2 DP/DM Pin Swapping" "0: DP/DM normal pinout,1: DP/DM swapped pinout"
newline
bitfld.long 0x8 1. "PORT1,Port 1 DP/DM Pin Swapping" "0: DP/DM normal pinout,1: DP/DM swapped pinout"
newline
bitfld.long 0x8 0. "PORT0,Port 0 DP/DM Pin Swapping" "0: DP/DM normal pinout,1: DP/DM swapped pinout"
group.long 0xA0++0x3
line.long 0x0 "LS,Light Sleep Register"
bitfld.long 0x0 16. "MEM_POWER_GATING_ULP1_EN,Light Sleep Value for ULP1 Power-Gated Memories" "0: Light Sleep mode is not activated by the..,1: Light Sleep mode is activated when the.."
newline
bitfld.long 0x0 13. "LS13,Light Sleep Value (GMAC)" "0,1"
newline
bitfld.long 0x0 12. "LS12,Light Sleep Value (DSI)" "0,1"
newline
bitfld.long 0x0 11. "LS11,Light Sleep Value (ISC)" "0,1"
newline
bitfld.long 0x0 10. "LS10,Light Sleep Value (CSI2DC)" "0,1"
newline
bitfld.long 0x0 9. "LS9,Light Sleep Value (ARM926)" "0,1"
newline
bitfld.long 0x0 8. "LS8,Light Sleep Value (ROM + OTPC)" "0,1"
newline
bitfld.long 0x0 7. "LS7,Light Sleep Value (FLEXRAM1 (OTPC))" "0,1"
newline
bitfld.long 0x0 6. "LS6,Light Sleep Value (FLEXRAM0)" "0,1"
newline
bitfld.long 0x0 5. "LS5,Light Sleep Value (UHPHS)" "0,1"
newline
bitfld.long 0x0 4. "LS4,Light Sleep Value (XDMAC)" "0,1"
newline
bitfld.long 0x0 3. "LS3,Light Sleep Value (UDPHS)" "0,1"
newline
bitfld.long 0x0 2. "LS2,Light Sleep Value (SDMMC)" "0,1"
newline
bitfld.long 0x0 1. "LS1,Light Sleep Value (XLCDC)" "0,1"
newline
bitfld.long 0x0 0. "LS0,Light Sleep Value (GFX2D)" "0,1"
group.long 0xB4++0x3
line.long 0x0 "CAL1,I/O Calibration 1 Register"
bitfld.long 0x0 8. "TEST_M,Enable Calibration of Low/High Level Output Impedance of Pads with VDDIOM Supply" "0,1"
newline
hexmask.long.byte 0x0 4.--7. 1. "CALP_M,Calibration of High Level Output Impedance of Pads with VDDIOM Supply"
newline
hexmask.long.byte 0x0 0.--3. 1. "CALN_M,Calibration of Low Level Output Impedance of Pads with VDDIOM Supply"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables write protection if WPKEY corresponds..,1: Enables write protection if WPKEY corresponds to.."
group.long 0x20C++0xF
line.long 0x0 "PUFRUCR0,Quidikkey Restrict User Context 0 Register"
hexmask.long 0x0 0.--31. 1. "RESTRICT_USER_CONTEXT_0,Value Connected to qk_restrict_user_context_0 input for QK"
line.long 0x4 "PUFRUCR1,Quidikkey Restrict User Context 1 Register"
hexmask.long 0x4 0.--31. 1. "RESTRICT_USER_CONTEXT_1,Value Connected to qk_restrict_user_context_1 input for QK"
line.long 0x8 "PUFWORUCR0,Quidikkey Restrict User Context 0 Write Ones Register"
hexmask.long 0x8 0.--31. 1. "RESTRICT_USER_CONTEXT_0_WO,Value Connected to qk_restrict_user_context_0 input for QK"
line.long 0xC "PUFWORUCR1,Quidikkey Restrict User Context 1 Write Ones Register"
hexmask.long 0xC 0.--31. 1. "RESTRICT_USER_CONTEXT_1_WO,Value Connected to qk_restrict_user_context_1 input for QK"
group.long 0x220++0x3
line.long 0x0 "FLEXRAMS_CLKG_DIS,FLEXRAMS Clock Gating Disable Register"
bitfld.long 0x0 1. "FLEX1_CLKG_DIS,Clock Gating Disable for FLEXRAM1" "0: Clock Gating is enabled.,1: Clock Gating is disabled."
newline
bitfld.long 0x0 0. "FLEX0_CLKG_DIS,Clock Gating Disable for FLEXRAM0" "0: Clock Gating is enabled.,1: Clock Gating is disabled."
group.long 0x240++0x3
line.long 0x0 "ISS_CFG,ISS Configuration Register"
bitfld.long 0x0 0. "MODE,DSI/CSI Selection" "0: CSI mode,1: DSI mode"
group.long 0x250++0x3
line.long 0x0 "TSU_CFG,TSU Configuration Register"
hexmask.long.byte 0x0 0.--7. 1. "WIDTH,Number of TSU Cycles to Increase GTSUCOMP Width"
group.long 0x260++0x3
line.long 0x0 "REMAP_MP_DDR,Remap Multiport DDR Register"
tree.end
tree "SHA (Secure Hash Algorithm)"
base ad:0xF002C000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 24. "UNLOCK,Unlock Processing" "0: No effect.,1: Unlocks the processing in case of abnormal event.."
bitfld.long 0x0 13. "WUIEHV,Write User Initial or Expected Hash Values" "0: SHA_IDATARx accesses are routed to the data..,1: SHA_IDATARx accesses are routed to the internal.."
newline
bitfld.long 0x0 12. "WUIHV,Write User Initial Hash Values" "0: SHA_IDATARx accesses are routed to the data..,1: SHA_IDATARx accesses are routed to the internal.."
bitfld.long 0x0 8. "SWRST,Software Reset" "0: No effect.,1: Resets the SHA. A software-triggered hardware.."
newline
bitfld.long 0x0 4. "FIRST,First Block of a Message" "0: No effect.,1: Indicates that the next block to process is the.."
bitfld.long 0x0 0. "START,Start Processing" "0: No effect.,1: Starts manual hash algorithm process."
group.long 0x4++0x3
line.long 0x0 "MR,Mode Register"
hexmask.long.byte 0x0 28.--31. 1. "CHKCNT,Check Counter"
bitfld.long 0x0 24.--25. "CHECK,Hash Check" "0: No check is performed,1: Check is performed with expected hash stored in..,2: Check is performed with expected hash provided..,?"
newline
bitfld.long 0x0 16. "DUALBUFF,Dual Input Buffer" "0: SHA_IDATARx and SHA_IODATARx cannot be written..,1: SHA_IDATARx and SHA_IODATARx can be written.."
bitfld.long 0x0 15. "TMPLCK,Tamper Lock Enable" "0: A tamper event has no effect.,1: A tamper event locks the SHA until the tamper.."
newline
hexmask.long.byte 0x0 8.--11. 1. "ALGO,SHA Algorithm"
bitfld.long 0x0 7. "BPE,Block Processing End" "0: BPE must be cleared when a DMA transfers data.,1: When processing small messages data transfer by.."
newline
bitfld.long 0x0 6. "UIEHV,User Initial or Expected Hash Value Registers" "0: The SHA algorithm is started with the standard..,1: The SHA algorithm is started with the user.."
bitfld.long 0x0 5. "UIHV,User Initial Hash Value Registers" "0: The SHA algorithm is started with the standard..,1: The SHA algorithm is started with the user.."
newline
bitfld.long 0x0 4. "PROCDLY,Processing Delay" "0: SHA processing runtime is the shortest one,1: SHA processing runtime is the longest one.."
bitfld.long 0x0 3. "AOE,Always ON Enable" "0: The SHA operates in functional operating modes.,1: As soon as a START command is written the SHA.."
newline
bitfld.long 0x0 0.--1. "SMOD,Start Mode" "0: Manual mode,1: Auto mode,2: SHA_IDATAR0 access only mode (mandatory when DMA..,?"
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 24. "SECE,Security and/or Safety Event Interrupt Enable" "0,1"
bitfld.long 0x0 16. "CHECKF,Check Done Interrupt Enable" "0,1"
newline
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Enable" "0,1"
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 24. "SECE,Security and/or Safety Event Interrupt Disable" "0,1"
bitfld.long 0x4 16. "CHECKF,Check Done Interrupt Disable" "0,1"
newline
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Interrupt Disable" "0,1"
bitfld.long 0x4 0. "DATRDY,Data Ready Interrupt Disable" "0,1"
rgroup.long 0x18++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 24. "SECE,Security and/or Safety Event Interrupt Mask" "0,1"
bitfld.long 0x0 16. "CHECKF,Check Done Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Mask" "0,1"
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 24. "SECE,Security and/or Safety Event" "0: There is no report in SHA_WPSR.,1: There is a Security and/or Safety Event reported.."
hexmask.long.byte 0x4 20.--23. 1. "CHKST,Check Status (cleared by writing START or SWRST bits in SHA_CR or by reading SHA_IODATARx)"
newline
bitfld.long 0x4 16. "CHECKF,Check Done Status (cleared by writing START or SWRST bits in SHA_CR or by reading SHA_IODATARx)" "0: Hash check has not been computed.,1: Hash check has been computed status is available.."
bitfld.long 0x4 12.--14. "URAT,Unspecified Register Access Type (cleared by writing a 1 to SWRST bit in SHA_CR)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Status (cleared by writing a 1 to SWRST bit in SHA_CR)" "0: No unspecified register access has been detected..,1: At least one unspecified register access has.."
bitfld.long 0x4 4. "WRDY,Input Data Register Write Ready" "0: SHA_IDATAR0 cannot be written,1: SHA_IDATAR0 can be written"
newline
bitfld.long 0x4 0. "DATRDY,Data Ready (cleared by writing a 1 to bit SWRST or START in SHA_CR or by reading SHA_IODATARx)" "0: Output data is not valid.,1: 512/1024-bit block process is completed."
group.long 0x20++0x3
line.long 0x0 "MSR,Message Size Register"
hexmask.long 0x0 0.--31. 1. "MSGSIZE,Message Size"
group.long 0x30++0x3
line.long 0x0 "BCR,Bytes Count Register"
hexmask.long 0x0 0.--31. 1. "BYTCNT,Remaining Byte Count Before Auto Padding"
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x40)++0x3
line.long 0x0 "IDATAR[$1],Input Data x Register"
hexmask.long 0x0 0.--31. 1. "IDATA,Input Data"
repeat.end
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "IODATAR[$1],Input/Output Data x Register"
hexmask.long 0x0 0.--31. 1. "IODATA,Input/Output Data"
repeat.end
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 5.--6. "ACTION,Action on Abnormal Event Detection" "0: No action (stop or clear key) is performed when..,1: If a processing is in progress when the..,2: If a processing is in progress when the..,3: If a processing is in progress when the.."
newline
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interruption Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
bitfld.long 0x0 0. "WPEN,Write Protection Configuration Enable" "0: Disables the write protection on configuration..,1: Enables the write protection on configuration.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: An access is performed into key input data.."
hexmask.long.byte 0x0 24.--27. 1. "SWETYP,Software Error Type (cleared on read)"
newline
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protect violation has occurred since..,1: A write protect violation has occurred since the.."
tree.end
tree "SHDWC (Shutdown Controller)"
base ad:0xFFFFFE10
wgroup.long 0x0++0x3
line.long 0x0 "SHDW_CR,Control Register"
hexmask.long.byte 0x0 24.--31. 1. "KEY,Password"
bitfld.long 0x0 0. "SHDW,Shutdown Command" "0: No effect.,1: If KEY value is correct asserts the SHDN pin."
group.long 0x4++0x3
line.long 0x0 "SHDW_MR,Mode Register"
bitfld.long 0x0 24.--26. "WKUPDBC,Wakeup Inputs Debouncer Period" "0: Immediate no debouncing detected active at least..,1: WKUP shall be in its active state for at least 3..,2: WKUP shall be in its active state for at least..,3: WKUP shall be in its active state for at least..,4: WKUP shall be in its active state for at least 4..,5: WKUP shall be in its active state for at least..,?,?"
bitfld.long 0x0 17. "RTCWKEN,Real-time Clock Wakeup Enable" "0: The RTC Alarm signal has no effect on the..,1: The RTC Alarm signal forces the de-assertion of.."
newline
bitfld.long 0x0 16. "RTTWKEN,Real-time Timer Wakeup Enable" "0: The RTT Alarm signal has no effect on the..,1: The RTT Alarm signal forces the de-assertion of.."
rgroup.long 0x8++0x3
line.long 0x0 "SHDW_SR,Status Register"
bitfld.long 0x0 16. "WKUPIS0,Wakeup 0 Input Status" "0: The wakeup 0 input is disabled or was inactive..,1: The wakeup 0 input was active at the time the.."
bitfld.long 0x0 5. "RTCWK,Real-time Clock Wakeup" "0: No wakeup alarm from the RTC occurred since the..,1: At least one wakeup alarm from the RTC occurred.."
newline
bitfld.long 0x0 4. "RTTWK,Real-time Timer Wakeup" "0: No wakeup alarm from the RTT occurred since the..,1: At least one wakeup alarm from the RTT occurred.."
bitfld.long 0x0 0. "WKUPS,WKUP Wakeup Status" "0: No wakeup due to the assertion of the WKUP pin..,1: At least one wakeup due to the assertion of the.."
group.long 0xC++0x3
line.long 0x0 "SHDW_WUIR,Wakeup Inputs Register"
bitfld.long 0x0 16. "WKUPT0,Wakeup 0 Input Type" "0: A falling edge followed by a low level on the..,1: A rising edge followed by a high level on the.."
bitfld.long 0x0 0. "WKUPEN0,Wakeup 0 Input Enable" "0: The wakeup 0 input has no wakeup effect.,1: The wakeup 0 input forces wakeup of the core.."
tree.end
tree "SMC (Static Memory Controller)"
base ad:0xFFFFEA00
repeat 3. (list 0x0 0x1 0x2)(list ad:0xFFFFEA00 ad:0xFFFFEA10 ad:0xFFFFEA20)
tree "SMC_CS_NUMBER[$1]"
base $2
group.long ($2)++0xF
line.long 0x0 "SETUP,SMC Setup Register"
hexmask.long.byte 0x0 24.--29. 1. "NCS_RD_SETUP,NCS Setup Length in READ Access"
hexmask.long.byte 0x0 16.--21. 1. "NRD_SETUP,NRD Setup Length"
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hexmask.long.byte 0x0 8.--13. 1. "NCS_WR_SETUP,NCS Setup Length in WRITE Access"
hexmask.long.byte 0x0 0.--5. 1. "NWE_SETUP,NWE Setup Length"
line.long 0x4 "PULSE,SMC Pulse Register"
hexmask.long.byte 0x4 24.--30. 1. "NCS_RD_PULSE,NCS Pulse Length in READ Access"
hexmask.long.byte 0x4 16.--22. 1. "NRD_PULSE,NRD Pulse Length"
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hexmask.long.byte 0x4 8.--14. 1. "NCS_WR_PULSE,NCS Pulse Length in WRITE Access"
hexmask.long.byte 0x4 0.--6. 1. "NWE_PULSE,NWE Pulse Length"
line.long 0x8 "CYCLE,SMC Cycle Register"
hexmask.long.word 0x8 16.--24. 1. "NRD_CYCLE,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. "NWE_CYCLE,Total Write Cycle Length"
line.long 0xC "MODE,SMC Mode Register"
bitfld.long 0xC 28.--29. "PS,Page Size" "0: 4-byte page,1: 8-byte page,2: 16-byte page,3: 32-byte page"
bitfld.long 0xC 24. "PMEN,Page Mode Enabled" "0: Standard read is applied.,1: Asynchronous burst read in Page mode is applied.."
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bitfld.long 0xC 20. "TDF_MODE,TDF Optimization" "0: TDF optimization disabled-The number of TDF wait..,1: TDF optimization enabled-The number of TDF wait.."
hexmask.long.byte 0xC 16.--19. 1. "TDF_CYCLES,Data Float Time"
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bitfld.long 0xC 12.--13. "DBW,Data Bus Width" "0: 8-bit bus,1: 16-bit bus,?,?"
bitfld.long 0xC 8. "BAT,Byte Access Type" "0: Byte select access type: - Write operation is..,1: Byte write access type: - Write operation is.."
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bitfld.long 0xC 4.--5. "EXNW_MODE,NWAIT Mode" "0: Disabled Mode-The NWAIT input signal is ignored..,?,2: Frozen Mode-If asserted the NWAIT signal freezes..,3: Ready Mode-The NWAIT signal indicates the.."
bitfld.long 0xC 1. "WRITE_MODE,Selection of the Control Signal for Write Operation" "0: Write operation controlled by NCS signal-If TDF..,1: Write operation controlled by NWE signal-If TDF.."
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bitfld.long 0xC 0. "READ_MODE,Selection of the Control Signal for Read Operation" "0: Read operation controlled by NCS signal - If TDF..,1: Read operation controlled by NRD signal - If TDF.."
tree.end
repeat.end
base ad:0xFFFFEA00
group.long 0x80++0x3
line.long 0x0 "OCMS,SMC Off-Chip Memory Scrambling Register"
bitfld.long 0x0 10. "CS2SE,Chip Select (x = 0 to 2) Scrambling Enable" "0: Disables scrambling for CSx.,1: Enables scrambling for CSx."
bitfld.long 0x0 9. "CS1SE,Chip Select (x = 0 to 2) Scrambling Enable" "0: Disables scrambling for CSx.,1: Enables scrambling for CSx."
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bitfld.long 0x0 8. "CS0SE,Chip Select (x = 0 to 2) Scrambling Enable" "0: Disables scrambling for CSx.,1: Enables scrambling for CSx."
bitfld.long 0x0 4. "TAMPCLR,Tamper Clear Enable" "0: A tamper detection event has no effect on SMC..,1: A tamper detection event immediately clears SMC.."
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bitfld.long 0x0 0. "SMSE,Static Memory Controller Scrambling Enable" "0: Disables scrambling for SMC access.,1: Enables scrambling for SMC access."
wgroup.long 0x84++0x7
line.long 0x0 "KEY1,SMC Off-Chip Memory Scrambling KEY1 Register"
hexmask.long 0x0 0.--31. 1. "KEY1,Off-Chip Memory Scrambling (OCMS) Key Part 1"
line.long 0x4 "KEY2,SMC Off-Chip Memory Scrambling KEY2 Register"
hexmask.long 0x4 0.--31. 1. "KEY2,Off-Chip Memory Scrambling (OCMS) Key Part 2"
group.long 0x90++0x3
line.long 0x0 "SRIER,SMC Safety Report Interrupt Enable Register"
bitfld.long 0x0 0. "SRIE,Safety Report Interrupt Enable" "0: Disables the SMC safety report interrupt from..,1: Enables the SMC safety report interrupt from.."
group.long 0xE4++0x3
line.long 0x0 "WPMR,SMC Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables write protection if WPKEY value..,1: Enables write protection if WPKEY value.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,SMC Write Protection Status Register"
bitfld.long 0x0 24.--25. "SWETYP,Software Error Type (Cleared on read)" "0: A write-only register has been read.,1: A write access has been performed on a read-only..,2: Access to an undefined address.,?"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
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bitfld.long 0x0 3. "SWE,Software Control Error (Cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (Cleared on read)" "0: No internal sequencer error has occurred since..,1: A internal sequencer error has occurred since.."
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bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (Cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation occurred since the.."
tree.end
tree "SSC (Synchronous Serial Controller)"
base ad:0xF0010000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 15. "SWRST,Software Reset" "0: No effect.,1: Performs a software reset. Has priority on any.."
bitfld.long 0x0 9. "TXDIS,Transmit Disable" "0: No effect.,1: Disables Transmit. If a character is currently.."
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bitfld.long 0x0 8. "TXEN,Transmit Enable" "0: No effect.,1: Enables Transmit if TXDIS is not set."
bitfld.long 0x0 1. "RXDIS,Receive Disable" "0: No effect.,1: Disables Receive. If a character is currently.."
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bitfld.long 0x0 0. "RXEN,Receive Enable" "0: No effect.,1: Enables Receive if RXDIS is not set."
group.long 0x4++0x3
line.long 0x0 "CMR,Clock Mode Register"
hexmask.long.word 0x0 0.--11. 1. "DIV,Clock Divider"
group.long 0x10++0xF
line.long 0x0 "RCMR,Receive Clock Mode Register"
hexmask.long.byte 0x0 24.--31. 1. "PERIOD,Receive Period Divider Selection"
hexmask.long.byte 0x0 16.--23. 1. "STTDLY,Receive Start Delay"
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bitfld.long 0x0 12. "STOP,Receive Stop Selection" "0: After completion of a data transfer when..,1: After starting a receive with a Compare 0 the.."
hexmask.long.byte 0x0 8.--11. 1. "START,Receive Start Selection"
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bitfld.long 0x0 6.--7. "CKG,Receive Clock Gating Selection" "0: None,1: Receive Clock enabled only if RF Low,2: Receive Clock enabled only if RF High,?"
bitfld.long 0x0 5. "CKI,Receive Clock Inversion" "0: The data inputs (Data and Frame Sync signals)..,1: The data inputs (Data and Frame Sync signals).."
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bitfld.long 0x0 2.--4. "CKO,Receive Clock Output Mode Selection" "0: None RK pin is an input,1: Continuous Receive Clock RK pin is an output,2: Receive Clock only during data transfers RK pin..,?,?,?,?,?"
bitfld.long 0x0 0.--1. "CKS,Receive Clock Selection" "0: Divided Clock,1: TK Clock signal,2: RK pin,?"
line.long 0x4 "RFMR,Receive Frame Mode Register"
hexmask.long.byte 0x4 28.--31. 1. "FSLEN_EXT,FSLEN Field Extension"
bitfld.long 0x4 24. "FSEDGE,Frame Sync Edge Detection" "0: Positive Edge Detection,1: Negative Edge Detection"
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bitfld.long 0x4 20.--22. "FSOS,Receive Frame Sync Output Selection" "0: None RF pin is an input,1: Negative Pulse RF pin is an output,2: Positive Pulse RF pin is an output,3: Driven Low during data transfer RF pin is an..,4: Driven High during data transfer RF pin is an..,5: Toggling at each start of data transfer RF pin..,?,?"
hexmask.long.byte 0x4 16.--19. 1. "FSLEN,Receive Frame Sync Length"
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hexmask.long.byte 0x4 8.--11. 1. "DATNB,Data Number per Frame"
bitfld.long 0x4 7. "MSBF,Most Significant Bit First" "0: The lowest significant bit of the data register..,1: The most significant bit of the data register is.."
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bitfld.long 0x4 5. "LOOP,Loop Mode" "0: Normal operating mode.,1: RD is driven by TD RF is driven by TF and TK.."
hexmask.long.byte 0x4 0.--4. 1. "DATLEN,Data Length"
line.long 0x8 "TCMR,Transmit Clock Mode Register"
hexmask.long.byte 0x8 24.--31. 1. "PERIOD,Transmit Period Divider Selection"
hexmask.long.byte 0x8 16.--23. 1. "STTDLY,Transmit Start Delay"
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hexmask.long.byte 0x8 8.--11. 1. "START,Transmit Start Selection"
bitfld.long 0x8 6.--7. "CKG,Transmit Clock Gating Selection" "0: None,1: Transmit Clock enabled only if TF Low,2: Transmit Clock enabled only if TF High,?"
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bitfld.long 0x8 5. "CKI,Transmit Clock Inversion" "0: The data outputs (Data and Frame Sync signals)..,1: The data outputs (Data and Frame Sync signals).."
bitfld.long 0x8 2.--4. "CKO,Transmit Clock Output Mode Selection" "0: None TK pin is an input,1: Continuous Transmit Clock TK pin is an output,2: Transmit Clock only during data transfers TK pin..,?,?,?,?,?"
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bitfld.long 0x8 0.--1. "CKS,Transmit Clock Selection" "0: Divided Clock,1: RK Clock signal,2: TK pin,?"
line.long 0xC "TFMR,Transmit Frame Mode Register"
hexmask.long.byte 0xC 28.--31. 1. "FSLEN_EXT,FSLEN Field Extension"
bitfld.long 0xC 24. "FSEDGE,Frame Sync Edge Detection" "0: Positive Edge Detection,1: Negative Edge Detection"
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bitfld.long 0xC 23. "FSDEN,Frame Sync Data Enable" "0: The TD line is driven with the default value..,1: SSC_TSHR value is shifted out during the.."
bitfld.long 0xC 20.--22. "FSOS,Transmit Frame Sync Output Selection" "0: None TF pin is an input,1: Negative Pulse TF pin is an output,2: Positive Pulse TF pin is an output,3: Driven Low during data transfer,4: Driven High during data transfer,5: Toggling at each start of data transfer,?,?"
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hexmask.long.byte 0xC 16.--19. 1. "FSLEN,Transmit Frame Sync Length"
hexmask.long.byte 0xC 8.--11. 1. "DATNB,Data Number per Frame"
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bitfld.long 0xC 7. "MSBF,Most Significant Bit First" "0: The lowest significant bit of the data register..,1: The most significant bit of the data register is.."
bitfld.long 0xC 5. "DATDEF,Data Default Value" "0,1"
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hexmask.long.byte 0xC 0.--4. 1. "DATLEN,Data Length"
rgroup.long 0x20++0x3
line.long 0x0 "RHR,Receive Holding Register"
hexmask.long 0x0 0.--31. 1. "RDAT,Receive Data"
wgroup.long 0x24++0x3
line.long 0x0 "THR,Transmit Holding Register"
hexmask.long 0x0 0.--31. 1. "TDAT,Transmit Data"
rgroup.long 0x30++0x3
line.long 0x0 "RSHR,Receive Sync. Holding Register"
hexmask.long.word 0x0 0.--15. 1. "RSDAT,Receive Synchronization Data"
group.long 0x34++0xB
line.long 0x0 "TSHR,Transmit Sync. Holding Register"
hexmask.long.word 0x0 0.--15. 1. "TSDAT,Transmit Synchronization Data"
line.long 0x4 "RC0R,Receive Compare 0 Register"
hexmask.long.word 0x4 0.--15. 1. "CP0,Receive Compare Data 0"
line.long 0x8 "RC1R,Receive Compare 1 Register"
hexmask.long.word 0x8 0.--15. 1. "CP1,Receive Compare Data 1"
rgroup.long 0x40++0x3
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 17. "RXEN,Receive Enable" "0: Receive is disabled.,1: Receive is enabled."
bitfld.long 0x0 16. "TXEN,Transmit Enable" "0: Transmit is disabled.,1: Transmit is enabled."
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bitfld.long 0x0 11. "RXSYN,Receive Sync" "0: An Rx Sync has not occurred since the last read..,1: An Rx Sync has occurred since the last read of.."
bitfld.long 0x0 10. "TXSYN,Transmit Sync" "0: A Tx Sync has not occurred since the last read..,1: A Tx Sync has occurred since the last read of.."
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bitfld.long 0x0 9. "CP1,Compare 1" "0: A compare 1 has not occurred since the last read..,1: A compare 1 has occurred since the last read of.."
bitfld.long 0x0 8. "CP0,Compare 0" "0: A compare 0 has not occurred since the last read..,1: A compare 0 has occurred since the last read of.."
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bitfld.long 0x0 5. "OVRUN,Receive Overrun" "0: No data has been loaded in SSC_RHR while..,1: Data has been loaded in SSC_RHR while previous.."
bitfld.long 0x0 4. "RXRDY,Receive Ready" "0: SSC_RHR is empty.,1: Data has been received and loaded in SSC_RHR."
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bitfld.long 0x0 1. "TXEMPTY,Transmit Empty" "0: Data remains in SSC_THR or is currently..,1: Last data written in SSC_THR has been loaded in.."
bitfld.long 0x0 0. "TXRDY,Transmit Ready" "0: Data has been loaded in SSC_THR and is waiting..,1: SSC_THR is empty."
wgroup.long 0x44++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 11. "RXSYN,Rx Sync Interrupt Enable" "0,1"
bitfld.long 0x0 10. "TXSYN,Tx Sync Interrupt Enable" "0,1"
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bitfld.long 0x0 9. "CP1,Compare 1 Interrupt Enable" "0,1"
bitfld.long 0x0 8. "CP0,Compare 0 Interrupt Enable" "0,1"
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bitfld.long 0x0 5. "OVRUN,Receive Overrun Interrupt Enable" "0,1"
bitfld.long 0x0 4. "RXRDY,Receive Ready Interrupt Enable" "0,1"
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bitfld.long 0x0 1. "TXEMPTY,Transmit Empty Interrupt Enable" "0,1"
bitfld.long 0x0 0. "TXRDY,Transmit Ready Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 11. "RXSYN,Rx Sync Interrupt Enable" "0,1"
bitfld.long 0x4 10. "TXSYN,Tx Sync Interrupt Enable" "0,1"
newline
bitfld.long 0x4 9. "CP1,Compare 1 Interrupt Disable" "0,1"
bitfld.long 0x4 8. "CP0,Compare 0 Interrupt Disable" "0,1"
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bitfld.long 0x4 5. "OVRUN,Receive Overrun Interrupt Disable" "0,1"
bitfld.long 0x4 4. "RXRDY,Receive Ready Interrupt Disable" "0,1"
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bitfld.long 0x4 1. "TXEMPTY,Transmit Empty Interrupt Disable" "0,1"
bitfld.long 0x4 0. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
rgroup.long 0x4C++0x3
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 11. "RXSYN,Rx Sync Interrupt Mask" "0,1"
bitfld.long 0x0 10. "TXSYN,Tx Sync Interrupt Mask" "0,1"
newline
bitfld.long 0x0 9. "CP1,Compare 1 Interrupt Mask" "0,1"
bitfld.long 0x0 8. "CP0,Compare 0 Interrupt Mask" "0,1"
newline
bitfld.long 0x0 5. "OVRUN,Receive Overrun Interrupt Mask" "0,1"
bitfld.long 0x0 4. "RXRDY,Receive Ready Interrupt Mask" "0,1"
newline
bitfld.long 0x0 1. "TXEMPTY,Transmit Empty Interrupt Mask" "0,1"
bitfld.long 0x0 0. "TXRDY,Transmit Ready Interrupt Mask" "0,1"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protect Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "SYSCWP (System Controller Write Protection)"
base ad:0xFFFFFEDC
group.long 0x0++0x3
line.long 0x0 "SYSC_WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 1. "WPITEN,Write Protection RTC Interrupt Enable" "0: Disables the write protection of the..,1: Enables the write protection of the.."
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection of the..,1: Enables the write protection of the.."
rgroup.long 0x4++0x3
line.long 0x0 "SYSC_WPSR,Write Protection Status Register"
hexmask.long.byte 0x0 8.--15. 1. "WVSRC,Write Violation Source"
bitfld.long 0x0 0. "WPVS,Write Protection Register Violation Status" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "TC (Timer/Counter)"
base ad:0x0
tree "TC0"
base ad:0xF8008000
repeat 3. (list 0x0 0x1 0x2)(list ad:0xF8008000 ad:0xF8008040 ad:0xF8008080)
tree "TC_CHANNEL[$1]"
base $2
wgroup.long ($2)++0x3
line.long 0x0 "CCR,Channel Control Register"
bitfld.long 0x0 2. "SWTRG,Software Trigger Command" "0: No effect.,1: A software trigger is performed: the counter is.."
bitfld.long 0x0 1. "CLKDIS,Counter Clock Disable Command" "0: No effect.,1: Disables the clock."
newline
bitfld.long 0x0 0. "CLKEN,Counter Clock Enable Command" "0: No effect.,1: Enables the clock if CLKDIS is not 1."
group.long ($2+0x4)++0x3
line.long 0x0 "CMR_CAPTURE_MODE,Channel Mode Register"
bitfld.long 0x0 20.--22. "SBSMPLR,Loading Edge Subsampling Ratio" "0: Load a Capture register each selected edge,1: Load a Capture register every 2 selected edges,2: Load a Capture register every 4 selected edges,3: Load a Capture register every 8 selected edges,4: Load a Capture register every 16 selected edges,?,?,?"
bitfld.long 0x0 18.--19. "LDRB,RB Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
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bitfld.long 0x0 16.--17. "LDRA,RA Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0: Capture mode is enabled.,1: Capture mode is disabled (Waveform mode is.."
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bitfld.long 0x0 15. "WAVE,Waveform Mode" "0: Waveform mode is disabled (Capture mode is..,1: Waveform mode is enabled."
bitfld.long 0x0 14. "CPCTRG,RC Compare Trigger Enable" "0: RC Compare has no effect on the counter and its..,1: RC Compare resets the counter and starts the.."
newline
bitfld.long 0x0 10. "ABETRG,TIOAx or TIOBx External Trigger Selection" "0: TIOBx is used as an external trigger.,1: TIOAx is used as an external trigger."
bitfld.long 0x0 8.--9. "ETRGEDG,External Trigger Edge Selection" "0: The clock is not gated by an external signal.,1: Rising edge,2: Falling edge,3: Each edge"
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bitfld.long 0x0 7. "LDBDIS,Counter Clock Disable with RB Loading" "0: Counter clock is not disabled when RB loading..,1: Counter clock is disabled when RB loading occurs."
bitfld.long 0x0 6. "LDBSTOP,Counter Clock Stopped with RB Loading" "0: Counter clock is not stopped when RB loading..,1: Counter clock is stopped when RB loading occurs."
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bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
bitfld.long 0x0 3. "CLKI,Clock Invert" "0: Counter is incremented on rising edge of the..,1: Counter is incremented on falling edge of the.."
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bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal GCLK [17] GCLK[45]..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal MD_SLCK clock signal..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
group.long ($2+0x4)++0x7
line.long 0x0 "CMR_WAVEFORM_MODE,Channel Mode Register"
bitfld.long 0x0 30.--31. "BSWTRG,Software Trigger Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 28.--29. "BEEVT,External Event Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
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bitfld.long 0x0 26.--27. "BCPC,RC Compare Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 24.--25. "BCPB,RB Compare Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
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bitfld.long 0x0 22.--23. "ASWTRG,Software Trigger Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 20.--21. "AEEVT,External Event Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
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bitfld.long 0x0 18.--19. "ACPC,RC Compare Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 16.--17. "ACPA,RA Compare Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
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bitfld.long 0x0 15. "WAVE,Waveform Mode" "0: Waveform mode is disabled (Capture mode is..,1: Waveform mode is enabled."
bitfld.long 0x0 13.--14. "WAVSEL,Waveform Selection" "0: UP mode without automatic trigger on RC Compare,1: UPDOWN mode without automatic trigger on RC..,2: UP mode with automatic trigger on RC Compare,3: UPDOWN mode with automatic trigger on RC Compare"
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bitfld.long 0x0 12. "ENETRG,External Event Trigger Enable" "0: The external event has no effect on the counter..,1: The external event resets the counter and starts.."
bitfld.long 0x0 10.--11. "EEVT,External Event Selection" "0: TIOB,1: XC0,2: XC1,3: XC2"
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bitfld.long 0x0 8.--9. "EEVTEDG,External Event Edge Selection" "0: None,1: Rising edge,2: Falling edge,3: Each edge"
bitfld.long 0x0 7. "CPCDIS,Counter Clock Disable with RC Compare" "0: Counter clock is not disabled when counter..,1: Counter clock is disabled when counter reaches RC."
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bitfld.long 0x0 6. "CPCSTOP,Counter Clock Stopped with RC Compare" "0: Counter clock is not stopped when counter..,1: Counter clock is stopped when counter reaches RC."
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
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bitfld.long 0x0 3. "CLKI,Clock Invert" "0: Counter is incremented on rising edge of the..,1: Counter is incremented on falling edge of the.."
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal GCLK [17] GCLK[45]..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal MD_SLCK clock signal..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
line.long 0x4 "SMMR,Stepper Motor Mode Register"
bitfld.long 0x4 1. "DOWN,Down Count" "0: Up counter.,1: Down counter."
bitfld.long 0x4 0. "GCEN,Gray Count Enable" "0: TIOAx [x=0..2] and TIOBx [x=0..2] are driven by..,1: TIOAx [x=0..2] and TIOBx [x=0..2] are driven by.."
rgroup.long ($2+0xC)++0x7
line.long 0x0 "RAB,Register AB"
hexmask.long 0x0 0.--31. 1. "RAB,Register A or Register B"
line.long 0x4 "CV,Counter Value"
hexmask.long 0x4 0.--31. 1. "CV,Counter Value"
group.long ($2+0x14)++0xB
line.long 0x0 "RA,Register A"
hexmask.long 0x0 0.--31. 1. "RA,Register A"
line.long 0x4 "RB,Register B"
hexmask.long 0x4 0.--31. 1. "RB,Register B"
line.long 0x8 "RC,Register C"
hexmask.long 0x8 0.--31. 1. "RC,Register C"
rgroup.long ($2+0x20)++0x3
line.long 0x0 "SR,Interrupt Status Register"
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0: TIOBx is low. If TC_CMRx.WAVE = 0 TIOBx pin is..,1: TIOBx is high. If TC_CMRx.WAVE = 0 TIOBx pin is.."
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0: TIOAx is low. If TC_CMRx.WAVE = 0 TIOAx pin is..,1: TIOAx is high. If TC_CMRx.WAVE = 0 TIOAx pin is.."
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bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0: Clock is disabled.,1: Clock is enabled."
bitfld.long 0x0 8. "SECE,Security and/or Safety Event (cleared on read)" "0: No security or safety event occurred.,1: One or more safety or security event occurred.."
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bitfld.long 0x0 7. "ETRGS,External Trigger Status (cleared on read)" "0: External trigger has not occurred since the last..,1: External trigger has occurred since the last.."
bitfld.long 0x0 6. "LDRBS,RB Loading Status (cleared on read)" "0: RB Load has not occurred since the last read of..,1: RB Load has occurred since the last read of the.."
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bitfld.long 0x0 5. "LDRAS,RA Loading Status (cleared on read)" "0: RA Load has not occurred since the last read of..,1: RA Load has occurred since the last read of the.."
bitfld.long 0x0 4. "CPCS,RC Compare Status (cleared on read)" "0: RC Compare has not occurred since the last read..,1: RC Compare has occurred since the last read of.."
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bitfld.long 0x0 3. "CPBS,RB Compare Status (cleared on read)" "0: RB Compare has not occurred since the last read..,1: RB Compare has occurred since the last read of.."
bitfld.long 0x0 2. "CPAS,RA Compare Status (cleared on read)" "0: RA Compare has not occurred since the last read..,1: RA Compare has occurred since the last read of.."
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bitfld.long 0x0 1. "LOVRS,Load Overrun Status (cleared on read)" "0: Load overrun has not occurred since the last..,1: RA or RB have been loaded at least twice without.."
bitfld.long 0x0 0. "COVFS,Counter Overflow Status (cleared on read)" "0: No counter overflow has occurred since the last..,1: A counter overflow has occurred since the last.."
wgroup.long ($2+0x24)++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 10. "SECE,Security and/or Safety Event Interrupt Enable" "0,1"
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
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bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
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bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
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bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
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bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 10. "SECE,Security and/or Safety Event Interrupt Disable" "0,1"
bitfld.long 0x4 7. "ETRGS,External Trigger" "0,1"
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bitfld.long 0x4 6. "LDRBS,RB Loading" "0,1"
bitfld.long 0x4 5. "LDRAS,RA Loading" "0,1"
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bitfld.long 0x4 4. "CPCS,RC Compare" "0,1"
bitfld.long 0x4 3. "CPBS,RB Compare" "0,1"
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bitfld.long 0x4 2. "CPAS,RA Compare" "0,1"
bitfld.long 0x4 1. "LOVRS,Load Overrun" "0,1"
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bitfld.long 0x4 0. "COVFS,Counter Overflow" "0,1"
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 10. "SECE,Security and/or Safety Event Interrupt Mask" "0,1"
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
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bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
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bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
newline
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
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bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
group.long ($2+0x30)++0x3
line.long 0x0 "EMR,Extended Mode Register"
bitfld.long 0x0 8. "NODIVCLK,No Divided Clock" "0: The selected clock is defined by field TCCLKS in..,1: The selected clock is peripheral clock and.."
bitfld.long 0x0 4.--5. "TRIGSRCB,Trigger Source for Input B" "0: The trigger/capture input B is driven by..,1: The trigger/capture input B is driven internally..,?,?"
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bitfld.long 0x0 0.--1. "TRIGSRCA,Trigger Source for Input A" "0: The trigger/capture input A is driven by..,1: The trigger/capture input A is driven internally..,?,?"
rgroup.long ($2+0x34)++0x7
line.long 0x0 "CSR,Channel Status Register"
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0: TIOBx is low. If TC_CMRx.WAVE = 0 TIOBx is low.,1: TIOBx is high. If TC_CMRx.WAVE = 0 TIOBx is.."
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0: TIOAx is low. If TC_CMRx.WAVE = 0 TIOAx is low.,1: TIOAx is high. If TC_CMRx.WAVE = 0 TIOAx is.."
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bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0: Clock is disabled.,1: Clock is enabled."
line.long 0x4 "SSR,Safety Status Register"
bitfld.long 0x4 31. "ECLASS,Software Error Class" "0: An abnormal access that does not have any impact.,1: An abnormal access that may have an impact."
hexmask.long.byte 0x4 24.--27. 1. "SWETYP,Software Error Type (cleared on read)"
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hexmask.long.word 0x4 8.--23. 1. "WPVSRC,Write Protection Violation Source (cleared on read)"
bitfld.long 0x4 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
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bitfld.long 0x4 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No internal counter error has occurred since the..,1: An internal counter error has occurred since the.."
bitfld.long 0x4 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring has not been corrupted..,1: The clock monitoring has been corrupted since.."
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bitfld.long 0x4 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
repeat.end
base ad:0xF8008000
wgroup.long 0xC0++0x3
line.long 0x0 "BCR,Block Control Register"
bitfld.long 0x0 0. "SYNC,Synchro Command" "0: No effect.,1: Asserts the SYNC signal which generates a.."
group.long 0xC4++0x3
line.long 0x0 "BMR,Block Mode Register"
hexmask.long.byte 0x0 20.--25. 1. "MAXFILT,Maximum Filter"
bitfld.long 0x0 17. "IDXPHB,Index Pin is PHB Pin" "0: IDX pin of the rotary sensor must drive TIOA1.,1: IDX pin of the rotary sensor must drive TIOB0."
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bitfld.long 0x0 16. "SWAP,Swap PHA and PHB" "0: No swap between PHA and PHB.,1: Swap PHA and PHB internally prior to driving the.."
bitfld.long 0x0 15. "INVIDX,Inverted Index" "0: IDX (TIOA1) is directly driving the QDEC.,1: IDX is inverted before driving the QDEC."
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bitfld.long 0x0 14. "INVB,Inverted PHB" "0: PHB (TIOB0) is directly driving the QDEC.,1: PHB is inverted before driving the QDEC."
bitfld.long 0x0 13. "INVA,Inverted PHA" "0: PHA (TIOA0) is directly driving the QDEC.,1: PHA is inverted before driving the QDEC."
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bitfld.long 0x0 12. "EDGPHA,Edge on PHA Count Mode" "0: Edges are detected on PHA only.,1: Edges are detected on both PHA and PHB."
bitfld.long 0x0 11. "QDTRANS,Quadrature Decoding Transparent" "0: Full quadrature decoding logic is active..,1: Quadrature decoding logic is inactive (direction.."
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bitfld.long 0x0 10. "SPEEDEN,Speed Enabled" "0: Disabled.,1: Enables the speed measure on channel 0 the time.."
bitfld.long 0x0 9. "POSEN,Position Enabled" "0: Disable position.,1: Enables the position measure on channel 0 and 1."
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bitfld.long 0x0 8. "QDEN,Quadrature Decoder Enabled" "0: Disabled.,1: Enables the QDEC (filter edge detection and.."
bitfld.long 0x0 4.--5. "TC2XC2S,External Clock Signal 2 Selection" "0: Signal connected to XC2: TCLK2,?,2: Signal connected to XC2: TIOA0,3: Signal connected to XC2: TIOA1"
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bitfld.long 0x0 2.--3. "TC1XC1S,External Clock Signal 1 Selection" "0: Signal connected to XC1: TCLK1,?,2: Signal connected to XC1: TIOA0,3: Signal connected to XC1: TIOA2"
bitfld.long 0x0 0.--1. "TC0XC0S,External Clock Signal 0 Selection" "0: Signal connected to XC0: TCLK0,?,2: Signal connected to XC0: TIOA1,3: Signal connected to XC0: TIOA2"
wgroup.long 0xC8++0x7
line.long 0x0 "QIER,QDEC Interrupt Enable Register"
bitfld.long 0x0 7. "FMP,Filtered Missing Pulse" "0: No effect.,1: Enables the interrupt when phase A or phase B.."
bitfld.long 0x0 6. "FIDX,Filtered Index Line" "0: No effect.,1: Enables the interrupt when index line has a.."
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bitfld.long 0x0 5. "FPHB,Filtered Phase B Line" "0: No effect.,1: Enables the interrupt when phase B line has a.."
bitfld.long 0x0 4. "FPHA,Filtered Phase A Line" "0: No effect.,1: Enables the interrupt when phase A line has a.."
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bitfld.long 0x0 2. "QERR,Quadrature Error" "0: No effect.,1: Enables the interrupt when a quadrature error.."
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0: No effect.,1: Enables the interrupt when a change on rotation.."
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bitfld.long 0x0 0. "IDX,Index" "0: No effect.,1: Enables the interrupt when a rising edge occurs.."
line.long 0x4 "QIDR,QDEC Interrupt Disable Register"
bitfld.long 0x4 7. "FMP,Filtered Missing Pulse" "0: No effect.,1: Disables the interrupt when phase A or phase B.."
bitfld.long 0x4 6. "FIDX,Filtered Index Line" "0: No effect.,1: Disables the interrupt when index line has a.."
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bitfld.long 0x4 5. "FPHB,Filtered Phase B Line" "0: No effect.,1: Disables the interrupt when phase B line has a.."
bitfld.long 0x4 4. "FPHA,Filtered Phase A Line" "0: No effect.,1: Disables the interrupt when phase A line has a.."
newline
bitfld.long 0x4 2. "QERR,Quadrature Error" "0: No effect.,1: Disables the interrupt when a quadrature error.."
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0: No effect.,1: Disables the interrupt when a change on rotation.."
newline
bitfld.long 0x4 0. "IDX,Index" "0: No effect.,1: Disables the interrupt when a rising edge occurs.."
rgroup.long 0xD0++0x7
line.long 0x0 "QIMR,QDEC Interrupt Mask Register"
bitfld.long 0x0 7. "FMP,Filtered Missing Pulse" "0: The interrupt on auto-corrected missing pulse is..,1: The interrupt on auto-corrected missing pulse is.."
bitfld.long 0x0 6. "FIDX,Filtered Index Line" "0: The interrupt on index line filtered..,1: The interrupt on index line filtered.."
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bitfld.long 0x0 5. "FPHB,Filtered Phase B Line" "0: The interrupt on phase B line filtered..,1: The interrupt on phase B line filtered.."
bitfld.long 0x0 4. "FPHA,Filtered Phase A Line" "0: The interrupt on phase A line filtered..,1: The interrupt on phase A line filtered.."
newline
bitfld.long 0x0 2. "QERR,Quadrature Error" "0: The interrupt on quadrature error is disabled.,1: The interrupt on quadrature error is enabled."
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0: The interrupt on rotation direction change is..,1: The interrupt on rotation direction change is.."
newline
bitfld.long 0x0 0. "IDX,Index" "0: The interrupt on IDX input is disabled.,1: The interrupt on IDX input is enabled."
line.long 0x4 "QISR,QDEC Interrupt Status Register"
bitfld.long 0x4 8. "DIR,Direction" "0,1"
bitfld.long 0x4 7. "FMP,Filtered Missing Pulse" "0: No correction of missing pulse on phase A or B..,1: A correction of missing pulse on phase A or B.."
newline
bitfld.long 0x4 6. "FIDX,Filtered Index Line" "0: No filtered contamination on index line since..,1: A contamination has been successfully on index.."
bitfld.long 0x4 5. "FPHB,Filtered Phase B Line" "0: No filtered contamination on phase B line since..,1: A contamination has been successfully on phase B.."
newline
bitfld.long 0x4 4. "FPHA,Filtered Phase A Line" "0: No filtered contamination on phase A line since..,1: A contamination has been successfully on phase A.."
bitfld.long 0x4 2. "QERR,Quadrature Error" "0: No quadrature error since the last read of..,1: A quadrature error occurred since the last read.."
newline
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0: No change on rotation direction since the last..,1: The rotation direction changed since the last.."
bitfld.long 0x4 0. "IDX,Index" "0: No Index input change since the last read of..,1: The IDX input has changed since the last read of.."
rgroup.long 0xDC++0x3
line.long 0x0 "QSR,QDEC Status Register"
bitfld.long 0x0 8. "DIR,Direction" "0,1"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
tree.end
tree "TC1"
base ad:0xF800C000
repeat 3. (list 0x0 0x1 0x2)(list ad:0xF800C000 ad:0xF800C040 ad:0xF800C080)
tree "TC_CHANNEL[$1]"
base $2
wgroup.long ($2)++0x3
line.long 0x0 "CCR,Channel Control Register"
bitfld.long 0x0 2. "SWTRG,Software Trigger Command" "0: No effect.,1: A software trigger is performed: the counter is.."
bitfld.long 0x0 1. "CLKDIS,Counter Clock Disable Command" "0: No effect.,1: Disables the clock."
newline
bitfld.long 0x0 0. "CLKEN,Counter Clock Enable Command" "0: No effect.,1: Enables the clock if CLKDIS is not 1."
group.long ($2+0x4)++0x3
line.long 0x0 "CMR_CAPTURE_MODE,Channel Mode Register"
bitfld.long 0x0 20.--22. "SBSMPLR,Loading Edge Subsampling Ratio" "0: Load a Capture register each selected edge,1: Load a Capture register every 2 selected edges,2: Load a Capture register every 4 selected edges,3: Load a Capture register every 8 selected edges,4: Load a Capture register every 16 selected edges,?,?,?"
bitfld.long 0x0 18.--19. "LDRB,RB Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
newline
bitfld.long 0x0 16.--17. "LDRA,RA Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0: Capture mode is enabled.,1: Capture mode is disabled (Waveform mode is.."
newline
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0: Waveform mode is disabled (Capture mode is..,1: Waveform mode is enabled."
bitfld.long 0x0 14. "CPCTRG,RC Compare Trigger Enable" "0: RC Compare has no effect on the counter and its..,1: RC Compare resets the counter and starts the.."
newline
bitfld.long 0x0 10. "ABETRG,TIOAx or TIOBx External Trigger Selection" "0: TIOBx is used as an external trigger.,1: TIOAx is used as an external trigger."
bitfld.long 0x0 8.--9. "ETRGEDG,External Trigger Edge Selection" "0: The clock is not gated by an external signal.,1: Rising edge,2: Falling edge,3: Each edge"
newline
bitfld.long 0x0 7. "LDBDIS,Counter Clock Disable with RB Loading" "0: Counter clock is not disabled when RB loading..,1: Counter clock is disabled when RB loading occurs."
bitfld.long 0x0 6. "LDBSTOP,Counter Clock Stopped with RB Loading" "0: Counter clock is not stopped when RB loading..,1: Counter clock is stopped when RB loading occurs."
newline
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
bitfld.long 0x0 3. "CLKI,Clock Invert" "0: Counter is incremented on rising edge of the..,1: Counter is incremented on falling edge of the.."
newline
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal GCLK [17] GCLK[45]..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal MD_SLCK clock signal..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
group.long ($2+0x4)++0x7
line.long 0x0 "CMR_WAVEFORM_MODE,Channel Mode Register"
bitfld.long 0x0 30.--31. "BSWTRG,Software Trigger Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 28.--29. "BEEVT,External Event Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
newline
bitfld.long 0x0 26.--27. "BCPC,RC Compare Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 24.--25. "BCPB,RB Compare Effect on TIOBx" "0: None,1: Set,2: Clear,3: Toggle"
newline
bitfld.long 0x0 22.--23. "ASWTRG,Software Trigger Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 20.--21. "AEEVT,External Event Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
newline
bitfld.long 0x0 18.--19. "ACPC,RC Compare Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
bitfld.long 0x0 16.--17. "ACPA,RA Compare Effect on TIOAx" "0: None,1: Set,2: Clear,3: Toggle"
newline
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0: Waveform mode is disabled (Capture mode is..,1: Waveform mode is enabled."
bitfld.long 0x0 13.--14. "WAVSEL,Waveform Selection" "0: UP mode without automatic trigger on RC Compare,1: UPDOWN mode without automatic trigger on RC..,2: UP mode with automatic trigger on RC Compare,3: UPDOWN mode with automatic trigger on RC Compare"
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bitfld.long 0x0 12. "ENETRG,External Event Trigger Enable" "0: The external event has no effect on the counter..,1: The external event resets the counter and starts.."
bitfld.long 0x0 10.--11. "EEVT,External Event Selection" "0: TIOB,1: XC0,2: XC1,3: XC2"
newline
bitfld.long 0x0 8.--9. "EEVTEDG,External Event Edge Selection" "0: None,1: Rising edge,2: Falling edge,3: Each edge"
bitfld.long 0x0 7. "CPCDIS,Counter Clock Disable with RC Compare" "0: Counter clock is not disabled when counter..,1: Counter clock is disabled when counter reaches RC."
newline
bitfld.long 0x0 6. "CPCSTOP,Counter Clock Stopped with RC Compare" "0: Counter clock is not stopped when counter..,1: Counter clock is stopped when counter reaches RC."
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
newline
bitfld.long 0x0 3. "CLKI,Clock Invert" "0: Counter is incremented on rising edge of the..,1: Counter is incremented on falling edge of the.."
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal GCLK [17] GCLK[45]..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal MD_SLCK clock signal..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
line.long 0x4 "SMMR,Stepper Motor Mode Register"
bitfld.long 0x4 1. "DOWN,Down Count" "0: Up counter.,1: Down counter."
bitfld.long 0x4 0. "GCEN,Gray Count Enable" "0: TIOAx [x=0..2] and TIOBx [x=0..2] are driven by..,1: TIOAx [x=0..2] and TIOBx [x=0..2] are driven by.."
rgroup.long ($2+0xC)++0x7
line.long 0x0 "RAB,Register AB"
hexmask.long 0x0 0.--31. 1. "RAB,Register A or Register B"
line.long 0x4 "CV,Counter Value"
hexmask.long 0x4 0.--31. 1. "CV,Counter Value"
group.long ($2+0x14)++0xB
line.long 0x0 "RA,Register A"
hexmask.long 0x0 0.--31. 1. "RA,Register A"
line.long 0x4 "RB,Register B"
hexmask.long 0x4 0.--31. 1. "RB,Register B"
line.long 0x8 "RC,Register C"
hexmask.long 0x8 0.--31. 1. "RC,Register C"
rgroup.long ($2+0x20)++0x3
line.long 0x0 "SR,Interrupt Status Register"
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0: TIOBx is low. If TC_CMRx.WAVE = 0 TIOBx pin is..,1: TIOBx is high. If TC_CMRx.WAVE = 0 TIOBx pin is.."
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0: TIOAx is low. If TC_CMRx.WAVE = 0 TIOAx pin is..,1: TIOAx is high. If TC_CMRx.WAVE = 0 TIOAx pin is.."
newline
bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0: Clock is disabled.,1: Clock is enabled."
bitfld.long 0x0 8. "SECE,Security and/or Safety Event (cleared on read)" "0: No security or safety event occurred.,1: One or more safety or security event occurred.."
newline
bitfld.long 0x0 7. "ETRGS,External Trigger Status (cleared on read)" "0: External trigger has not occurred since the last..,1: External trigger has occurred since the last.."
bitfld.long 0x0 6. "LDRBS,RB Loading Status (cleared on read)" "0: RB Load has not occurred since the last read of..,1: RB Load has occurred since the last read of the.."
newline
bitfld.long 0x0 5. "LDRAS,RA Loading Status (cleared on read)" "0: RA Load has not occurred since the last read of..,1: RA Load has occurred since the last read of the.."
bitfld.long 0x0 4. "CPCS,RC Compare Status (cleared on read)" "0: RC Compare has not occurred since the last read..,1: RC Compare has occurred since the last read of.."
newline
bitfld.long 0x0 3. "CPBS,RB Compare Status (cleared on read)" "0: RB Compare has not occurred since the last read..,1: RB Compare has occurred since the last read of.."
bitfld.long 0x0 2. "CPAS,RA Compare Status (cleared on read)" "0: RA Compare has not occurred since the last read..,1: RA Compare has occurred since the last read of.."
newline
bitfld.long 0x0 1. "LOVRS,Load Overrun Status (cleared on read)" "0: Load overrun has not occurred since the last..,1: RA or RB have been loaded at least twice without.."
bitfld.long 0x0 0. "COVFS,Counter Overflow Status (cleared on read)" "0: No counter overflow has occurred since the last..,1: A counter overflow has occurred since the last.."
wgroup.long ($2+0x24)++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 10. "SECE,Security and/or Safety Event Interrupt Enable" "0,1"
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
newline
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
newline
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
newline
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
newline
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 10. "SECE,Security and/or Safety Event Interrupt Disable" "0,1"
bitfld.long 0x4 7. "ETRGS,External Trigger" "0,1"
newline
bitfld.long 0x4 6. "LDRBS,RB Loading" "0,1"
bitfld.long 0x4 5. "LDRAS,RA Loading" "0,1"
newline
bitfld.long 0x4 4. "CPCS,RC Compare" "0,1"
bitfld.long 0x4 3. "CPBS,RB Compare" "0,1"
newline
bitfld.long 0x4 2. "CPAS,RA Compare" "0,1"
bitfld.long 0x4 1. "LOVRS,Load Overrun" "0,1"
newline
bitfld.long 0x4 0. "COVFS,Counter Overflow" "0,1"
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 10. "SECE,Security and/or Safety Event Interrupt Mask" "0,1"
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
newline
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
newline
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
newline
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
newline
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
group.long ($2+0x30)++0x3
line.long 0x0 "EMR,Extended Mode Register"
bitfld.long 0x0 8. "NODIVCLK,No Divided Clock" "0: The selected clock is defined by field TCCLKS in..,1: The selected clock is peripheral clock and.."
bitfld.long 0x0 4.--5. "TRIGSRCB,Trigger Source for Input B" "0: The trigger/capture input B is driven by..,1: The trigger/capture input B is driven internally..,?,?"
newline
bitfld.long 0x0 0.--1. "TRIGSRCA,Trigger Source for Input A" "0: The trigger/capture input A is driven by..,1: The trigger/capture input A is driven internally..,?,?"
rgroup.long ($2+0x34)++0x7
line.long 0x0 "CSR,Channel Status Register"
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0: TIOBx is low. If TC_CMRx.WAVE = 0 TIOBx is low.,1: TIOBx is high. If TC_CMRx.WAVE = 0 TIOBx is.."
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0: TIOAx is low. If TC_CMRx.WAVE = 0 TIOAx is low.,1: TIOAx is high. If TC_CMRx.WAVE = 0 TIOAx is.."
newline
bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0: Clock is disabled.,1: Clock is enabled."
line.long 0x4 "SSR,Safety Status Register"
bitfld.long 0x4 31. "ECLASS,Software Error Class" "0: An abnormal access that does not have any impact.,1: An abnormal access that may have an impact."
hexmask.long.byte 0x4 24.--27. 1. "SWETYP,Software Error Type (cleared on read)"
newline
hexmask.long.word 0x4 8.--23. 1. "WPVSRC,Write Protection Violation Source (cleared on read)"
bitfld.long 0x4 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x4 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No internal counter error has occurred since the..,1: An internal counter error has occurred since the.."
bitfld.long 0x4 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring has not been corrupted..,1: The clock monitoring has been corrupted since.."
newline
bitfld.long 0x4 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
repeat.end
base ad:0xF800C000
wgroup.long 0xC0++0x3
line.long 0x0 "BCR,Block Control Register"
bitfld.long 0x0 0. "SYNC,Synchro Command" "0: No effect.,1: Asserts the SYNC signal which generates a.."
group.long 0xC4++0x3
line.long 0x0 "BMR,Block Mode Register"
hexmask.long.byte 0x0 20.--25. 1. "MAXFILT,Maximum Filter"
bitfld.long 0x0 17. "IDXPHB,Index Pin is PHB Pin" "0: IDX pin of the rotary sensor must drive TIOA1.,1: IDX pin of the rotary sensor must drive TIOB0."
newline
bitfld.long 0x0 16. "SWAP,Swap PHA and PHB" "0: No swap between PHA and PHB.,1: Swap PHA and PHB internally prior to driving the.."
bitfld.long 0x0 15. "INVIDX,Inverted Index" "0: IDX (TIOA1) is directly driving the QDEC.,1: IDX is inverted before driving the QDEC."
newline
bitfld.long 0x0 14. "INVB,Inverted PHB" "0: PHB (TIOB0) is directly driving the QDEC.,1: PHB is inverted before driving the QDEC."
bitfld.long 0x0 13. "INVA,Inverted PHA" "0: PHA (TIOA0) is directly driving the QDEC.,1: PHA is inverted before driving the QDEC."
newline
bitfld.long 0x0 12. "EDGPHA,Edge on PHA Count Mode" "0: Edges are detected on PHA only.,1: Edges are detected on both PHA and PHB."
bitfld.long 0x0 11. "QDTRANS,Quadrature Decoding Transparent" "0: Full quadrature decoding logic is active..,1: Quadrature decoding logic is inactive (direction.."
newline
bitfld.long 0x0 10. "SPEEDEN,Speed Enabled" "0: Disabled.,1: Enables the speed measure on channel 0 the time.."
bitfld.long 0x0 9. "POSEN,Position Enabled" "0: Disable position.,1: Enables the position measure on channel 0 and 1."
newline
bitfld.long 0x0 8. "QDEN,Quadrature Decoder Enabled" "0: Disabled.,1: Enables the QDEC (filter edge detection and.."
bitfld.long 0x0 4.--5. "TC2XC2S,External Clock Signal 2 Selection" "0: Signal connected to XC2: TCLK2,?,2: Signal connected to XC2: TIOA0,3: Signal connected to XC2: TIOA1"
newline
bitfld.long 0x0 2.--3. "TC1XC1S,External Clock Signal 1 Selection" "0: Signal connected to XC1: TCLK1,?,2: Signal connected to XC1: TIOA0,3: Signal connected to XC1: TIOA2"
bitfld.long 0x0 0.--1. "TC0XC0S,External Clock Signal 0 Selection" "0: Signal connected to XC0: TCLK0,?,2: Signal connected to XC0: TIOA1,3: Signal connected to XC0: TIOA2"
wgroup.long 0xC8++0x7
line.long 0x0 "QIER,QDEC Interrupt Enable Register"
bitfld.long 0x0 7. "FMP,Filtered Missing Pulse" "0: No effect.,1: Enables the interrupt when phase A or phase B.."
bitfld.long 0x0 6. "FIDX,Filtered Index Line" "0: No effect.,1: Enables the interrupt when index line has a.."
newline
bitfld.long 0x0 5. "FPHB,Filtered Phase B Line" "0: No effect.,1: Enables the interrupt when phase B line has a.."
bitfld.long 0x0 4. "FPHA,Filtered Phase A Line" "0: No effect.,1: Enables the interrupt when phase A line has a.."
newline
bitfld.long 0x0 2. "QERR,Quadrature Error" "0: No effect.,1: Enables the interrupt when a quadrature error.."
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0: No effect.,1: Enables the interrupt when a change on rotation.."
newline
bitfld.long 0x0 0. "IDX,Index" "0: No effect.,1: Enables the interrupt when a rising edge occurs.."
line.long 0x4 "QIDR,QDEC Interrupt Disable Register"
bitfld.long 0x4 7. "FMP,Filtered Missing Pulse" "0: No effect.,1: Disables the interrupt when phase A or phase B.."
bitfld.long 0x4 6. "FIDX,Filtered Index Line" "0: No effect.,1: Disables the interrupt when index line has a.."
newline
bitfld.long 0x4 5. "FPHB,Filtered Phase B Line" "0: No effect.,1: Disables the interrupt when phase B line has a.."
bitfld.long 0x4 4. "FPHA,Filtered Phase A Line" "0: No effect.,1: Disables the interrupt when phase A line has a.."
newline
bitfld.long 0x4 2. "QERR,Quadrature Error" "0: No effect.,1: Disables the interrupt when a quadrature error.."
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0: No effect.,1: Disables the interrupt when a change on rotation.."
newline
bitfld.long 0x4 0. "IDX,Index" "0: No effect.,1: Disables the interrupt when a rising edge occurs.."
rgroup.long 0xD0++0x7
line.long 0x0 "QIMR,QDEC Interrupt Mask Register"
bitfld.long 0x0 7. "FMP,Filtered Missing Pulse" "0: The interrupt on auto-corrected missing pulse is..,1: The interrupt on auto-corrected missing pulse is.."
bitfld.long 0x0 6. "FIDX,Filtered Index Line" "0: The interrupt on index line filtered..,1: The interrupt on index line filtered.."
newline
bitfld.long 0x0 5. "FPHB,Filtered Phase B Line" "0: The interrupt on phase B line filtered..,1: The interrupt on phase B line filtered.."
bitfld.long 0x0 4. "FPHA,Filtered Phase A Line" "0: The interrupt on phase A line filtered..,1: The interrupt on phase A line filtered.."
newline
bitfld.long 0x0 2. "QERR,Quadrature Error" "0: The interrupt on quadrature error is disabled.,1: The interrupt on quadrature error is enabled."
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0: The interrupt on rotation direction change is..,1: The interrupt on rotation direction change is.."
newline
bitfld.long 0x0 0. "IDX,Index" "0: The interrupt on IDX input is disabled.,1: The interrupt on IDX input is enabled."
line.long 0x4 "QISR,QDEC Interrupt Status Register"
bitfld.long 0x4 8. "DIR,Direction" "0,1"
bitfld.long 0x4 7. "FMP,Filtered Missing Pulse" "0: No correction of missing pulse on phase A or B..,1: A correction of missing pulse on phase A or B.."
newline
bitfld.long 0x4 6. "FIDX,Filtered Index Line" "0: No filtered contamination on index line since..,1: A contamination has been successfully on index.."
bitfld.long 0x4 5. "FPHB,Filtered Phase B Line" "0: No filtered contamination on phase B line since..,1: A contamination has been successfully on phase B.."
newline
bitfld.long 0x4 4. "FPHA,Filtered Phase A Line" "0: No filtered contamination on phase A line since..,1: A contamination has been successfully on phase A.."
bitfld.long 0x4 2. "QERR,Quadrature Error" "0: No quadrature error since the last read of..,1: A quadrature error occurred since the last read.."
newline
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0: No change on rotation direction since the last..,1: The rotation direction changed since the last.."
bitfld.long 0x4 0. "IDX,Index" "0: No Index input change since the last read of..,1: The IDX input has changed since the last read of.."
rgroup.long 0xDC++0x3
line.long 0x0 "QSR,QDEC Status Register"
bitfld.long 0x0 8. "DIR,Direction" "0,1"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
tree.end
tree.end
tree "TDES (Triple Data Encryption Standard)"
base ad:0xF0038000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 24. "UNLOCK,Unlock Processing" "0: No effect.,1: Unlocks the processing in case of abnormal event.."
bitfld.long 0x0 8. "SWRST,Software Reset" "0: No effect,1: Resets the TDES. A software-triggered reset of.."
newline
bitfld.long 0x0 0. "START,Start Processing" "0: No effect,1: Starts Manual encryption/decryption process."
group.long 0x4++0x3
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 31. "TAMPCLR,Tamper Pin Clear Key Enable" "0: A tamper detection event has no effect on..,1: A tamper detection event immediately clears.."
bitfld.long 0x0 16.--17. "CFBS,Cipher Feedback Data Size" "0: 64-bit,1: 32-bit,2: 16-bit,3: 8-bit"
newline
bitfld.long 0x0 15. "LOD,Last Output Data Mode" "0: No effect.,1: The DATRDY flag is cleared when at least one of.."
bitfld.long 0x0 12.--13. "OPMOD,Operating Mode" "0: Electronic Code Book mode,1: Cipher Block Chaining mode,2: Output Feedback mode,3: Cipher Feedback mode"
newline
bitfld.long 0x0 8.--9. "SMOD,Start Mode" "0: Manual Mode,1: Auto Mode,2: TDES_IDATAR0 accesses only Auto mode,?"
bitfld.long 0x0 7. "PKRS,Private Key Internal Register Select" "0: The keys used by the TDES are in the..,1: The keys used by the TDES are the in the Private.."
newline
bitfld.long 0x0 6. "PKWO,Private Key Write Once" "0: The Private Key internal registers can be..,1: The Private Key internal registers can be.."
bitfld.long 0x0 4. "KEYMOD,Key Mode" "0: Three-key algorithm is selected.,1: Two-key algorithm is selected. There is no need.."
newline
bitfld.long 0x0 1.--2. "TDESMOD,ALGORITHM Mode" "0: Single DES processing using TDES_KEY1WRy.,1: Triple DES processing using TDES_KEY1WRy..,2: XTEA processing using TDES_KEY1WRy and..,?"
bitfld.long 0x0 0. "CIPHER,Processing Mode" "0: Decrypts data.,1: Encrypts data."
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 16. "SECE,Security and/or Safety Event Interrupt Enable" "0,1"
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Enable" "0,1"
newline
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Enable" "0,1"
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 16. "SECE,Security and/or Safety Event Interrupt Disable" "0,1"
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Interrupt Disable" "0,1"
newline
bitfld.long 0x4 0. "DATRDY,Data Ready Interrupt Disable" "0,1"
rgroup.long 0x18++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 16. "SECE,Security and/or Safety Event Interrupt Mask" "0,1"
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Mask" "0,1"
newline
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Mask" "0,1"
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 16. "SECE,Security and/or Safety Event Interrupt Mask" "0: There is no security report in TDES_WPSR.,1: One security flag is set in TDES_WPSR."
bitfld.long 0x4 12.--13. "URAT,Unspecified Register Access (cleared by setting TDES_CR.SWRST)" "0: TDES_IDATAR written during data processing when..,1: TDES_ODATAR read during data processing.,2: TDES_MR written during data processing.,3: Write-only register read access."
newline
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Status (cleared by setting TDES_CR.SWRST)" "0: No unspecified register access has been detected..,1: At least one unspecified register access has.."
bitfld.long 0x4 0. "DATRDY,Data Ready (cleared by setting TDES_CR.START or TDES_CR.SWRST or by reading TDES_ODATARx)" "0: Output data is not valid.,1: Encryption or decryption process is completed."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x20)++0x3
line.long 0x0 "KEY1WR[$1],Key 1 Word Register x"
hexmask.long 0x0 0.--31. 1. "KEY1W,Key 1 Word"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x28)++0x3
line.long 0x0 "KEY2WR[$1],Key 2 Word Register x"
hexmask.long 0x0 0.--31. 1. "KEY2W,Key 2 Word"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x30)++0x3
line.long 0x0 "KEY3WR[$1],Key 3 Word Register x"
hexmask.long 0x0 0.--31. 1. "KEY3W,Key 3 Word"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x40)++0x3
line.long 0x0 "IDATAR[$1],Input Data Register x"
hexmask.long 0x0 0.--31. 1. "IDATA,Input Data"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x50)++0x3
line.long 0x0 "ODATAR[$1],Output Data Register x"
hexmask.long 0x0 0.--31. 1. "ODATA,Output Data"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x60)++0x3
line.long 0x0 "IVR[$1],Initialization Vector Register x"
hexmask.long 0x0 0.--31. 1. "IV,Initialization Vector"
repeat.end
group.long 0x70++0x3
line.long 0x0 "XTEA_RNDR,XTEA Rounds Register"
hexmask.long.byte 0x0 0.--5. 1. "XTEA_RNDS,Number of Rounds"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 5.--7. "ACTION,Action on Abnormal Event Detection" "0: No action (stop or clear key) is performed when..,1: If a processing is in progress when the..,2: If a processing is in progress when the..,3: If a processing is in progress when the..,4: If a processing is in progress when the..,5: If a processing is in progress when the..,6: If a processing is in progress when the..,?"
newline
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
newline
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: An access is performed into key input data.."
hexmask.long.byte 0x0 24.--27. 1. "SWETYP,Software Error Type (cleared on read)"
newline
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source (cleared on read)"
bitfld.long 0x0 4. "PKRPVS,Private Key Register Protection Violation Status (cleared on read)" "0: No Private Key internal register access..,1: A Private Key internal register access violation.."
newline
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
newline
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "TRNG (True Random Number Generator)"
base ad:0xF0030000
wgroup.long 0x0++0x3
line.long 0x0 "CR,Control Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WAKEY,Register Write Access Key"
bitfld.long 0x0 0. "ENABLE,Enable TRNG to Provide Random Values" "0: Disables the TRNG if 0x524E47 ('RNG' in ASCII)..,1: Enables the TRNG if 0x524E47 ('RNG' in ASCII) is.."
group.long 0x4++0x3
line.long 0x0 "MR,Mode Register"
bitfld.long 0x0 7. "DIFF,Minimum Hamming Distance" "0: Delivers a new random sample without condition..,?"
bitfld.long 0x0 0. "HALFR,Half Rate Enable" "0: Maximum stream rate provided (1 sample every 84..,1: Half maximum stream rate provided if the.."
wgroup.long 0x8++0x3
line.long 0x0 "PKBCR,Private Key Bus Control Register"
hexmask.long.word 0x0 16.--31. 1. "WAKEY,Register Write Access Key"
hexmask.long.byte 0x0 8.--15. 1. "KLENGTH,Key Length"
newline
bitfld.long 0x0 4.--5. "KSLAVE,Key Bus Client" "0: TDES,1: AES,2: OTPC,?"
bitfld.long 0x0 0. "KID,Key ID (Must be Always Written to 0)" "0,1"
wgroup.long 0x10++0x7
line.long 0x0 "IER,Interrupt Enable Register"
bitfld.long 0x0 2. "EOTPKB,End Of Transfer on Private Key Bus Interrupt Enable" "0: No effect.,1: Enables the corresponding interrupt."
bitfld.long 0x0 1. "SECE,Security and/or Safety Event Interrupt Enable" "0: No effect.,1: Enables the corresponding interrupt."
newline
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Enable" "0: No effect.,1: Enables the corresponding interrupt."
line.long 0x4 "IDR,Interrupt Disable Register"
bitfld.long 0x4 2. "EOTPKB,End Of Transfer on Private Key Bus Interrupt Disable" "0: No effect.,1: Disables the corresponding interrupt."
bitfld.long 0x4 1. "SECE,Security and/or Safety Event Interrupt Disable" "0: No effect.,1: Disables the corresponding interrupt."
newline
bitfld.long 0x4 0. "DATRDY,Data Ready Interrupt Disable" "0: No effect.,1: Disables the corresponding interrupt."
rgroup.long 0x18++0x7
line.long 0x0 "IMR,Interrupt Mask Register"
bitfld.long 0x0 2. "EOTPKB,End Of Transfer on Private Key Bus Interrupt Mask" "0: The corresponding interrupt is not enabled.,1: The corresponding interrupt is enabled."
bitfld.long 0x0 1. "SECE,Security and/or Safety Event Interrupt Mask" "0: The corresponding interrupt is not enabled.,1: The corresponding interrupt is enabled"
newline
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Mask" "0: The corresponding interrupt is not enabled.,1: The corresponding interrupt is enabled."
line.long 0x4 "ISR,Interrupt Status Register"
bitfld.long 0x4 2. "EOTPKB,End Of Transfer on Private Key Bus (cleared on read)" "0: No private key bus transfer has ended since the..,1: The private key bus transfer has ended."
bitfld.long 0x4 1. "SECE,Security and/or Safety Event (cleared on read)" "0: No safety or security event occurred since the..,1: One or more safety or security event occurred.."
newline
bitfld.long 0x4 0. "DATRDY,Data Ready (cleared on read)" "0: Output data is not valid or TRNG is disabled.,1: New random value has been completed since the.."
rgroup.long 0x50++0x3
line.long 0x0 "ODATA,Output Data Register"
hexmask.long 0x0 0.--31. 1. "ODATA,Output Data"
group.long 0xE4++0x3
line.long 0x0 "WPMR,Write Protection Mode Register"
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
bitfld.long 0x0 4. "FIRSTE,First Error Report Enable" "0: The last write protection violation source is..,1: Only the first write protection violation source.."
newline
bitfld.long 0x0 2. "WPCREN,Write Protection Control Enable" "0: Disables the write protection on control..,1: Enables the write protection on control register.."
bitfld.long 0x0 1. "WPITEN,Write Protection Interrupt Enable" "0: Disables the write protection on interrupt..,1: Enables the write protection on interrupt.."
newline
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0: Disables the write protection if WPKEY..,1: Enables the write protection if WPKEY.."
rgroup.long 0xE8++0x3
line.long 0x0 "WPSR,Write Protection Status Register"
bitfld.long 0x0 31. "ECLASS,Software Error Class (cleared on read)" "0: An abnormal access that does not affect system..,1: Reading TRNG_ODATA when TRNG was disabled or.."
hexmask.long.byte 0x0 24.--27. 1. "SWETYP,Software Error Type (cleared on read)"
newline
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source (cleared on read)"
bitfld.long 0x0 3. "SWE,Software Control Error (cleared on read)" "0: No software error has occurred since the last..,1: A software error has occurred since the last.."
newline
bitfld.long 0x0 2. "SEQE,Internal Sequencer Error (cleared on read)" "0: No peripheral internal sequencer error has..,1: A peripheral internal sequencer error has.."
bitfld.long 0x0 1. "CGD,Clock Glitch Detected (cleared on read)" "0: The clock monitoring circuitry has not been..,1: The clock monitoring circuitry has been.."
newline
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status (cleared on read)" "0: No write protection violation has occurred since..,1: A write protection violation has occurred since.."
tree.end
tree "UDPHS (USB Device High Speed Port)"
base ad:0xF803C000
group.long 0x0++0x3
line.long 0x0 "CTRL,UDPHS Control Register"
bitfld.long 0x0 11. "PULLD_DIS,Pulldown Disable (cleared upon USB reset)" "0,1"
bitfld.long 0x0 10. "REWAKEUP,Send Remote Wakeup (cleared upon USB reset)" "0: Remote Wakeup is disabled (read) or this bit has..,1: Remote Wakeup is enabled (read) or this bit.."
newline
bitfld.long 0x0 9. "DETACH,Detach Command" "0: UDPHS is attached (read) or this bit pulls up..,1: UDPHS is detached UTMI transceiver is suspended.."
bitfld.long 0x0 8. "EN_UDPHS,UDPHS Enable" "0: UDPHS is disabled (read) or this bit disables..,1: UDPHS is enabled (read) or this bit enables the.."
newline
bitfld.long 0x0 7. "FADDR_EN,Function Address Enable (cleared upon USB reset)" "0: The device is not in Address state (read) or..,1: The device is in Address state (read) or this.."
hexmask.long.byte 0x0 0.--6. 1. "DEV_ADDR,UDPHS Address (cleared upon USB reset)"
rgroup.long 0x4++0x3
line.long 0x0 "FNUM,UDPHS Frame Number Register"
bitfld.long 0x0 31. "FNUM_ERR,Frame Number CRC Error (cleared upon USB reset)" "0,1"
hexmask.long.word 0x0 3.--13. 1. "FRAME_NUMBER,Frame Number as defined in the Packet Field Formats (cleared upon USB reset)"
newline
bitfld.long 0x0 0.--2. "MICRO_FRAME_NUM,Microframe Number (cleared upon USB reset)" "0,1,2,3,4,5,6,7"
group.long 0x10++0x3
line.long 0x0 "IEN,UDPHS Interrupt Enable Register"
bitfld.long 0x0 31. "DMA_7,DMA Channel 7 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
bitfld.long 0x0 30. "DMA_6,DMA Channel 6 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
newline
bitfld.long 0x0 29. "DMA_5,DMA Channel 5 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
bitfld.long 0x0 28. "DMA_4,DMA Channel 4 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
newline
bitfld.long 0x0 27. "DMA_3,DMA Channel 3 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
bitfld.long 0x0 26. "DMA_2,DMA Channel 2 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
newline
bitfld.long 0x0 25. "DMA_1,DMA Channel 1 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this channel.,1: Enable the interrupts for this channel."
bitfld.long 0x0 14. "EPT_6,Endpoint 6 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
newline
bitfld.long 0x0 13. "EPT_5,Endpoint 5 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
bitfld.long 0x0 12. "EPT_4,Endpoint 4 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
newline
bitfld.long 0x0 11. "EPT_3,Endpoint 3 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
bitfld.long 0x0 10. "EPT_2,Endpoint 2 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
newline
bitfld.long 0x0 9. "EPT_1,Endpoint 1 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
bitfld.long 0x0 8. "EPT_0,Endpoint 0 Interrupt Enable (cleared upon USB reset)" "0: Disable the interrupts for this endpoint.,1: Enable the interrupts for this endpoint."
newline
bitfld.long 0x0 7. "UPSTR_RES,Upstream Resume Interrupt Enable (cleared upon USB reset)" "0: Disable Upstream Resume Interrupt.,1: Enable Upstream Resume Interrupt."
bitfld.long 0x0 6. "ENDOFRSM,End Of Resume Interrupt Enable (cleared upon USB reset)" "0: Disable Resume Interrupt.,1: Enable Resume Interrupt."
newline
bitfld.long 0x0 5. "WAKE_UP,Wake Up CPU Interrupt Enable (cleared upon USB reset)" "0: Disable Wakeup CPU Interrupt.,1: Enable Wakeup CPU Interrupt."
bitfld.long 0x0 4. "ENDRESET,End Of Reset Interrupt Enable (cleared upon USB reset)" "0: Disable End Of Reset Interrupt.,1: Enable End Of Reset Interrupt. Automatically.."
newline
bitfld.long 0x0 3. "INT_SOF,SOF Interrupt Enable (cleared upon USB reset)" "0: Disable SOF Interrupt.,1: Enable SOF Interrupt."
bitfld.long 0x0 2. "MICRO_SOF,Micro-SOF Interrupt Enable (cleared upon USB reset)" "0: Disable Micro-SOF Interrupt.,1: Enable Micro-SOF Interrupt."
newline
bitfld.long 0x0 1. "DET_SUSPD,Suspend Interrupt Enable (cleared upon USB reset)" "0: Disable Suspend Interrupt.,1: Enable Suspend Interrupt."
rgroup.long 0x14++0x3
line.long 0x0 "INTSTA,UDPHS Interrupt Status Register"
bitfld.long 0x0 31. "DMA_7,DMA Channel 7 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 30. "DMA_6,DMA Channel 6 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
newline
bitfld.long 0x0 29. "DMA_5,DMA Channel 5 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 28. "DMA_4,DMA Channel 4 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
newline
bitfld.long 0x0 27. "DMA_3,DMA Channel 3 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 26. "DMA_2,DMA Channel 2 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
newline
bitfld.long 0x0 25. "DMA_1,DMA Channel 1 Interrupt" "0: Reset when the UDPHS_DMASTATUSx interrupt source..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 14. "EPT_6,Endpoint 6 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
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bitfld.long 0x0 13. "EPT_5,Endpoint 5 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 12. "EPT_4,Endpoint 4 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
newline
bitfld.long 0x0 11. "EPT_3,Endpoint 3 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 10. "EPT_2,Endpoint 2 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
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bitfld.long 0x0 9. "EPT_1,Endpoint 1 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
bitfld.long 0x0 8. "EPT_0,Endpoint 0 Interrupt (cleared upon USB reset)" "0: Reset when the UDPHS_EPTSTAx interrupt source is..,1: Set by hardware when an interrupt is triggered.."
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bitfld.long 0x0 7. "UPSTR_RES,Upstream Resume Interrupt" "0: Cleared by setting the UPSTR_RES bit in..,1: Set by hardware when the UDPHS controller is.."
bitfld.long 0x0 6. "ENDOFRSM,End Of Resume Interrupt" "0: Cleared by setting the ENDOFRSM bit in..,1: Set by hardware when the UDPHS controller.."
newline
bitfld.long 0x0 5. "WAKE_UP,Wake Up CPU Interrupt" "0: Cleared by setting the WAKE_UP bit in..,1: Set by hardware when the UDPHS controller is in.."
bitfld.long 0x0 4. "ENDRESET,End Of Reset Interrupt" "0: Cleared by setting the ENDRESET bit in..,1: Set by hardware when an End Of Reset has been.."
newline
bitfld.long 0x0 3. "INT_SOF,Start Of Frame Interrupt" "0: Cleared by setting the INT_SOF bit in..,1: Set by hardware when an UDPHS Start Of Frame PID.."
bitfld.long 0x0 2. "MICRO_SOF,Micro Start Of Frame Interrupt" "0: Cleared by setting the MICRO_SOF bit in..,1: Set by hardware when an UDPHS micro start of.."
newline
bitfld.long 0x0 1. "DET_SUSPD,Suspend Interrupt" "0: Cleared by setting the DET_SUSPD bit in..,1: Set by hardware when a UDPHS Suspend (Idle bus.."
bitfld.long 0x0 0. "SPEED,Speed Status" "0: Reset by hardware when the hardware is in Full..,1: Set by hardware when the hardware is in High.."
wgroup.long 0x18++0x7
line.long 0x0 "CLRINT,UDPHS Clear Interrupt Register"
bitfld.long 0x0 7. "UPSTR_RES,Upstream Resume Interrupt Clear" "0: No effect.,1: Clear the UPSTR_RES bit in UDPHS_INTSTA."
bitfld.long 0x0 6. "ENDOFRSM,End Of Resume Interrupt Clear" "0: No effect.,1: Clear the ENDOFRSM bit in UDPHS_INTSTA."
newline
bitfld.long 0x0 5. "WAKE_UP,Wake Up CPU Interrupt Clear" "0: No effect.,1: Clear the WAKE_UP bit in UDPHS_INTSTA."
bitfld.long 0x0 4. "ENDRESET,End Of Reset Interrupt Clear" "0: No effect.,1: Clear the ENDRESET bit in UDPHS_INTSTA."
newline
bitfld.long 0x0 3. "INT_SOF,Start Of Frame Interrupt Clear" "0: No effect.,1: Clear the INT_SOF bit in UDPHS_INTSTA."
bitfld.long 0x0 2. "MICRO_SOF,Micro Start Of Frame Interrupt Clear" "0: No effect.,1: Clear the MICRO_SOF bit in UDPHS_INTSTA."
newline
bitfld.long 0x0 1. "DET_SUSPD,Suspend Interrupt Clear" "0: No effect.,1: Clear the DET_SUSPD bit in UDPHS_INTSTA."
line.long 0x4 "EPTRST,UDPHS Endpoints Reset Register"
bitfld.long 0x4 6. "EPT_6,Endpoint 6 Reset" "0: No effect.,1: Reset the Endpointx state."
bitfld.long 0x4 5. "EPT_5,Endpoint 5 Reset" "0: No effect.,1: Reset the Endpointx state."
newline
bitfld.long 0x4 4. "EPT_4,Endpoint 4 Reset" "0: No effect.,1: Reset the Endpointx state."
bitfld.long 0x4 3. "EPT_3,Endpoint 3 Reset" "0: No effect.,1: Reset the Endpointx state."
newline
bitfld.long 0x4 2. "EPT_2,Endpoint 2 Reset" "0: No effect.,1: Reset the Endpointx state."
bitfld.long 0x4 1. "EPT_1,Endpoint 1 Reset" "0: No effect.,1: Reset the Endpointx state."
newline
bitfld.long 0x4 0. "EPT_0,Endpoint 0 Reset" "0: No effect.,1: Reset the Endpointx state."
group.long 0xD0++0x13
line.long 0x0 "TSTSOFCNT,UDPHS Test SOF Counter Register"
bitfld.long 0x0 7. "SOFCTLOAD,SOF Counter Load" "0,1"
hexmask.long.byte 0x0 0.--6. 1. "SOFCNTMAX,SOF Counter Max Value"
line.long 0x4 "TSTCNTA,UDPHS Test A Counter Register"
bitfld.long 0x4 15. "CNTALOAD,A Counter Load" "0,1"
hexmask.long.word 0x4 0.--14. 1. "CNTAMAX,A Counter Max Value"
line.long 0x8 "TSTCNTB,UDPHS Test B Counter Register"
bitfld.long 0x8 15. "CNTBLOAD,B Counter Load" "0,1"
hexmask.long.word 0x8 0.--14. 1. "CNTBMAX,B Counter Max Value"
line.long 0xC "TSTMODEREG,UDPHS Test Mode Register"
hexmask.long.byte 0xC 1.--5. 1. "TSTMODE,UDPHS Core TestModeReg"
line.long 0x10 "TST,UDPHS Test Register"
bitfld.long 0x10 5. "OPMODE2,OpMode2" "0: No effect.,1: Set to force the OpMode signal (UTMI interface).."
bitfld.long 0x10 4. "TST_PKT,Test Packet Mode" "0: No effect.,1: Set to repetitively transmit the packet stored.."
newline
bitfld.long 0x10 3. "TST_K,Test K Mode" "0: No effect.,1: Set to send the K state on the UDPHS line. This.."
bitfld.long 0x10 2. "TST_J,Test J Mode" "0: No effect.,1: Set to send the J state on the UDPHS line. This.."
newline
bitfld.long 0x10 0.--1. "SPEED_CFG,Speed Configuration" "0: Normal mode: The macro is in Full Speed mode..,?,2: Force High Speed: Set this value to force the..,3: Force Full Speed: Set this value to force the.."
repeat 7. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6)(list ad:0xF803C100 ad:0xF803C120 ad:0xF803C140 ad:0xF803C160 ad:0xF803C180 ad:0xF803C1A0 ad:0xF803C1C0)
tree "UDPHS_EPT[$1]"
base $2
group.long ($2)++0x3
line.long 0x0 "EPTCFG,UDPHS Endpoint Configuration Register"
bitfld.long 0x0 31. "EPT_MAPD,Endpoint Mapped (cleared upon USB reset)" "0: The user should reprogram the register with..,1: Set by hardware when the endpoint size.."
newline
bitfld.long 0x0 8.--9. "NB_TRANS,Number Of Transactions per Microframe (cleared upon USB reset)" "0,1,2,3"
newline
bitfld.long 0x0 6.--7. "BK_NUMBER,Number of Banks (cleared upon USB reset)" "0: Zero bank the endpoint is not mapped in memory,1: One bank (bank 0),2: Double bank (Ping-Pong: bank0/bank1),3: Triple bank (bank0/bank1/bank2)"
newline
bitfld.long 0x0 4.--5. "EPT_TYPE,Endpoint Type (cleared upon USB reset)" "0: Control endpoint,1: Isochronous endpoint,2: Bulk endpoint,3: Interrupt endpoint"
newline
bitfld.long 0x0 3. "EPT_DIR,Endpoint Direction (cleared upon USB reset)" "0: Clear this bit to configure OUT direction for..,1: Set this bit to configure IN direction for Bulk.."
newline
bitfld.long 0x0 0.--2. "EPT_SIZE,Endpoint Size (cleared upon USB reset)" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes,4: 128 bytes,5: 256 bytes,6: 512 bytes,7: 1024 bytes"
wgroup.long ($2+0x4)++0x3
line.long 0x0 "EPTCTLENB,UDPHS Endpoint Control Enable Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet Send/Short Packet Interrupt Enable" "0: No effect.,1: Enable Short Packet Interrupt."
newline
bitfld.long 0x0 18. "BUSY_BANK,Busy Bank Interrupt Enable" "0: No effect.,1: Enable Busy Bank Interrupt."
newline
bitfld.long 0x0 15. "NAK_OUT,NAKOUT Interrupt Enable" "0: No effect.,1: Enable NAKOUT Interrupt."
newline
bitfld.long 0x0 14. "NAK_IN,NAKIN Interrupt Enable" "0: No effect.,1: Enable NAKIN Interrupt."
newline
bitfld.long 0x0 13. "STALL_SNT,Stall Sent Interrupt Enable" "0: No effect.,1: Enable Stall Sent Interrupt."
newline
bitfld.long 0x0 12. "RX_SETUP,Received SETUP" "0: No effect.,1: Enable RX_SETUP Interrupt."
newline
bitfld.long 0x0 11. "TXRDY,TX Packet Ready Interrupt Enable" "0: No effect.,1: Enable TX Packet Ready/Transaction Error.."
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete Interrupt Enable" "0: No effect.,1: Enable Transmitted IN Data Complete Interrupt."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data Interrupt Enable" "0: No effect.,1: Enable Received OUT Data Interrupt."
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error Interrupt Enable" "0: No effect.,1: Enable Overflow Error Interrupt."
newline
bitfld.long 0x0 4. "NYET_DIS,NYET Disable (Only for High Speed Bulk OUT endpoints)" "0: No effect.,1: Forces an ACK response to the next High Speed.."
newline
bitfld.long 0x0 3. "INTDIS_DMA,Interrupts Disable DMA" "0: No effect.,1: If set when an enabled endpoint-originated.."
newline
bitfld.long 0x0 1. "AUTO_VALID,Packet Auto-Valid Enable" "0: No effect.,1: Enable this bit to automatically validate the.."
newline
bitfld.long 0x0 0. "EPT_ENABL,Endpoint Enable" "0: No effect.,1: Enable endpoint according to the device.."
wgroup.long ($2+0x4)++0x7
line.long 0x0 "EPTCTLENB_ISOENDPT_MODE,UDPHS Endpoint Control Enable Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet Send/Short Packet Interrupt Enable" "0: No effect.,1: Enable Short Packet Interrupt."
newline
bitfld.long 0x0 18. "BUSY_BANK,Busy Bank Interrupt Enable" "0: No effect.,1: Enable Busy Bank Interrupt."
newline
bitfld.long 0x0 14. "ERR_FLUSH,Bank Flush Error Interrupt Enable" "0: No effect.,1: Enable Bank Flush Error Interrupt."
newline
bitfld.long 0x0 13. "ERR_CRC_NTR,ISO CRC Error/Number of Transaction Error Interrupt Enable" "0: No effect.,1: Enable Error CRC ISO/Error Number of Transaction.."
newline
bitfld.long 0x0 12. "ERR_FL_ISO,Error Flow Interrupt Enable" "0: No effect.,1: Enable Error Flow ISO Interrupt."
newline
bitfld.long 0x0 11. "TXRDY_TRER,TX Packet Ready/Transaction Error Interrupt Enable" "0: No effect.,1: Enable TX Packet Ready/Transaction Error.."
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete Interrupt Enable" "0: No effect.,1: Enable Transmitted IN Data Complete Interrupt."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data Interrupt Enable" "0: No effect.,1: Enable Received OUT Data Interrupt."
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error Interrupt Enable" "0: No effect.,1: Enable Overflow Error Interrupt."
newline
bitfld.long 0x0 7. "MDATA_RX,MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)" "0: No effect.,1: Enable MDATA Interrupt."
newline
bitfld.long 0x0 6. "DATAX_RX,DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)" "0: No effect.,1: Enable DATAx Interrupt."
newline
bitfld.long 0x0 3. "INTDIS_DMA,Interrupts Disable DMA" "0: No effect.,1: If set when an enabled endpoint-originated.."
newline
bitfld.long 0x0 1. "AUTO_VALID,Packet Auto-Valid Enable" "0: No effect.,1: Enable this bit to automatically validate the.."
newline
bitfld.long 0x0 0. "EPT_ENABL,Endpoint Enable" "0: No effect.,1: Enable endpoint according to the device.."
line.long 0x4 "EPTCTLDIS,UDPHS Endpoint Control Disable Register"
bitfld.long 0x4 31. "SHRT_PCKT,Short Packet Interrupt Disable" "0: No effect.,1: Disable Short Packet Interrupt."
newline
bitfld.long 0x4 18. "BUSY_BANK,Busy Bank Interrupt Disable" "0: No effect.,1: Disable Busy Bank Interrupt."
newline
bitfld.long 0x4 15. "NAK_OUT,NAKOUT Interrupt Disable" "0: No effect.,1: Disable NAKOUT Interrupt."
newline
bitfld.long 0x4 14. "NAK_IN,NAKIN Interrupt Disable" "0: No effect.,1: Disable NAKIN Interrupt."
newline
bitfld.long 0x4 13. "STALL_SNT,Stall Sent Interrupt Disable" "0: No effect.,1: Disable Stall Sent Interrupt."
newline
bitfld.long 0x4 12. "RX_SETUP,Received SETUP Interrupt Disable" "0: No effect.,1: Disable RX_SETUP Interrupt."
newline
bitfld.long 0x4 11. "TXRDY,TX Packet Ready Interrupt Disable" "0: No effect.,1: Disable TX Packet Ready/Transaction Error.."
newline
bitfld.long 0x4 10. "TX_COMPLT,Transmitted IN Data Complete Interrupt Disable" "0: No effect.,1: Disable Transmitted IN Data Complete Interrupt."
newline
bitfld.long 0x4 9. "RXRDY_TXKL,Received OUT Data Interrupt Disable" "0: No effect.,1: Disable Received OUT Data Interrupt."
newline
bitfld.long 0x4 8. "ERR_OVFLW,Overflow Error Interrupt Disable" "0: No effect.,1: Disable Overflow Error Interrupt."
newline
bitfld.long 0x4 4. "NYET_DIS,NYET Enable (Only for High Speed Bulk OUT endpoints)" "0: No effect.,1: Let the hardware handle the handshake response.."
newline
bitfld.long 0x4 3. "INTDIS_DMA,Interrupts Disable DMA" "0: No effect.,1: Disable the 'Interrupts Disable DMA'."
newline
bitfld.long 0x4 1. "AUTO_VALID,Packet Auto-Valid Disable" "0: No effect.,1: Disable this bit to not automatically validate.."
newline
bitfld.long 0x4 0. "EPT_DISABL,Endpoint Disable" "0: No effect.,1: Disable endpoint."
wgroup.long ($2+0x8)++0x3
line.long 0x0 "EPTCTLDIS_ISOENDPT_MODE,UDPHS Endpoint Control Disable Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet Interrupt Disable" "0: No effect.,1: Disable Short Packet Interrupt."
newline
bitfld.long 0x0 18. "BUSY_BANK,Busy Bank Interrupt Disable" "0: No effect.,1: Disable Busy Bank Interrupt."
newline
bitfld.long 0x0 14. "ERR_FLUSH,bank flush error Interrupt Disable" "0: No effect.,1: Disable Bank Flush Error Interrupt."
newline
bitfld.long 0x0 13. "ERR_CRC_NTR,ISO CRC Error/Number of Transaction Error Interrupt Disable" "0: No effect.,1: Disable Error CRC ISO/Error Number of.."
newline
bitfld.long 0x0 12. "ERR_FL_ISO,Error Flow Interrupt Disable" "0: No effect.,1: Disable Error Flow ISO Interrupt."
newline
bitfld.long 0x0 11. "TXRDY_TRER,TX Packet Ready/Transaction Error Interrupt Disable" "0: No effect.,1: Disable TX Packet Ready/Transaction Error.."
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete Interrupt Disable" "0: No effect.,1: Disable Transmitted IN Data Complete Interrupt."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data Interrupt Disable" "0: No effect.,1: Disable Received OUT Data Interrupt."
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error Interrupt Disable" "0: No effect.,1: Disable Overflow Error Interrupt."
newline
bitfld.long 0x0 7. "MDATA_RX,MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)" "0: No effect.,1: Disable MDATA Interrupt."
newline
bitfld.long 0x0 6. "DATAX_RX,DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)" "0: No effect.,1: Disable DATAx Interrupt."
newline
bitfld.long 0x0 3. "INTDIS_DMA,Interrupts Disable DMA" "0: No effect.,1: Disable the 'Interrupts Disable DMA'."
newline
bitfld.long 0x0 1. "AUTO_VALID,Packet Auto-Valid Disable" "0: No effect.,1: Disable this bit to not automatically validate.."
newline
bitfld.long 0x0 0. "EPT_DISABL,Endpoint Disable" "0: No effect.,1: Disable endpoint."
rgroup.long ($2+0xC)++0x3
line.long 0x0 "EPTCTL,UDPHS Endpoint Control Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet Interrupt Enabled (cleared upon USB reset)" "0: Short Packet Interrupt is masked.,1: Short Packet Interrupt is enabled."
newline
bitfld.long 0x0 18. "BUSY_BANK,Busy Bank Interrupt Enabled (cleared upon USB reset)" "0: BUSY_BANK Interrupt is masked.,1: BUSY_BANK Interrupt is enabled."
newline
bitfld.long 0x0 15. "NAK_OUT,NAKOUT Interrupt Enabled (cleared upon USB reset)" "0: NAKOUT Interrupt is masked.,1: NAKOUT Interrupt is enabled."
newline
bitfld.long 0x0 14. "NAK_IN,NAKIN Interrupt Enabled (cleared upon USB reset)" "0: NAKIN Interrupt is masked.,1: NAKIN Interrupt is enabled."
newline
bitfld.long 0x0 13. "STALL_SNT,Stall Sent Interrupt Enabled (cleared upon USB reset)" "0: Stall Sent Interrupt is masked.,1: Stall Sent Interrupt is enabled."
newline
bitfld.long 0x0 12. "RX_SETUP,Received SETUP Interrupt Enabled (cleared upon USB reset)" "0: Received SETUP is masked.,1: Received SETUP is enabled."
newline
bitfld.long 0x0 11. "TXRDY,TX Packet Ready Interrupt Enabled (cleared upon USB reset)" "0: TX Packet Ready Interrupt is masked.,1: TX Packet Ready Interrupt is enabled."
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete Interrupt Enabled (cleared upon USB reset)" "0: Transmitted IN Data Complete Interrupt is masked.,1: Transmitted IN Data Complete Interrupt is enabled."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data Interrupt Enabled (cleared upon USB reset)" "0: Received OUT Data Interrupt is masked.,1: Received OUT Data Interrupt is enabled."
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error Interrupt Enabled (cleared upon USB reset)" "0: Overflow Error Interrupt is masked.,1: Overflow Error Interrupt is enabled."
newline
bitfld.long 0x0 4. "NYET_DIS,NYET Disable (Only for High Speed Bulk OUT Endpoints) (cleared upon USB reset)" "0: Lets the hardware handle the handshake response..,1: Forces an ACK response to the next High Speed.."
newline
bitfld.long 0x0 3. "INTDIS_DMA,Interrupt Disables DMA (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 1. "AUTO_VALID,Packet Auto-Valid Enabled (Not for CONTROL Endpoints) (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 0. "EPT_ENABL,Endpoint Enable (cleared upon USB reset)" "0: The endpoint is disabled according to the device..,1: The endpoint is enabled according to the device.."
rgroup.long ($2+0xC)++0x3
line.long 0x0 "EPTCTL_ISOENDPT_MODE,UDPHS Endpoint Control Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet Interrupt Enabled (cleared upon USB reset)" "0: Short Packet Interrupt is masked.,1: Short Packet Interrupt is enabled."
newline
bitfld.long 0x0 18. "BUSY_BANK,Busy Bank Interrupt Enabled (cleared upon USB reset)" "0: BUSY_BANK Interrupt is masked.,1: BUSY_BANK Interrupt is enabled."
newline
bitfld.long 0x0 14. "ERR_FLUSH,Bank Flush Error Interrupt Enabled (cleared upon USB reset)" "0: Bank Flush Error Interrupt is masked.,1: Bank Flush Error Interrupt is enabled."
newline
bitfld.long 0x0 13. "ERR_CRC_NTR,ISO CRC Error/Number of Transaction Error Interrupt Enabled (cleared upon USB reset)" "0: ISO CRC error/number of Transaction Error..,1: ISO CRC error/number of Transaction Error.."
newline
bitfld.long 0x0 12. "ERR_FL_ISO,Error Flow Interrupt Enabled (cleared upon USB reset)" "0: Error Flow Interrupt is masked.,1: Error Flow Interrupt is enabled."
newline
bitfld.long 0x0 11. "TXRDY_TRER,TX Packet Ready/Transaction Error Interrupt Enabled (cleared upon USB reset)" "0: TX Packet Ready/Transaction Error Interrupt is..,1: TX Packet Ready/Transaction Error Interrupt is.."
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete Interrupt Enabled (cleared upon USB reset)" "0: Transmitted IN Data Complete Interrupt is masked.,1: Transmitted IN Data Complete Interrupt is enabled."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data Interrupt Enabled (cleared upon USB reset)" "0: Received OUT Data Interrupt is masked.,1: Received OUT Data Interrupt is enabled."
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error Interrupt Enabled (cleared upon USB reset)" "0: Overflow Error Interrupt is masked.,1: Overflow Error Interrupt is enabled."
newline
bitfld.long 0x0 7. "MDATA_RX,MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) (cleared upon USB reset)" "0: No effect.,1: Send an interrupt when an MDATA packet has been.."
newline
bitfld.long 0x0 6. "DATAX_RX,DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) (cleared upon USB reset)" "0: No effect.,1: Send an interrupt when a DATA2 DATA1 or DATA0.."
newline
bitfld.long 0x0 3. "INTDIS_DMA,Interrupt Disables DMA (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 1. "AUTO_VALID,Packet Auto-Valid Enabled (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 0. "EPT_ENABL,Endpoint Enable (cleared upon USB reset)" "0: The endpoint is disabled according to the device..,1: The endpoint is enabled according to the device.."
wgroup.long ($2+0x14)++0x3
line.long 0x0 "EPTSETSTA,UDPHS Endpoint Set Status Register"
bitfld.long 0x0 11. "TXRDY,TX Packet Ready Set" "0: No effect.,1: Set this bit after a packet has been written.."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,KILL Bank Set (for IN Endpoint)" "0: No effect.,1: Kill the last written bank."
newline
bitfld.long 0x0 5. "FRCESTALL,Stall Handshake Request Set" "0: No effect.,1: Set this bit to request a STALL answer to the.."
wgroup.long ($2+0x14)++0x7
line.long 0x0 "EPTSETSTA_ISOENDPT_MODE,UDPHS Endpoint Set Status Register"
bitfld.long 0x0 11. "TXRDY_TRER,TX Packet Ready Set" "0: No effect.,1: Set this bit after a packet has been written.."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,KILL Bank Set (for IN Endpoint)" "0: No effect.,1: Kill the last written bank."
line.long 0x4 "EPTCLRSTA,UDPHS Endpoint Clear Status Register"
bitfld.long 0x4 15. "NAK_OUT,NAKOUT Clear" "0: No effect.,1: Clear the NAK_OUT flag of UDPHS_EPTSTAx."
newline
bitfld.long 0x4 14. "NAK_IN,NAKIN Clear" "0: No effect.,1: Clear the NAK_IN flags of UDPHS_EPTSTAx."
newline
bitfld.long 0x4 13. "STALL_SNT,Stall Sent Clear" "0: No effect.,1: Clear the STALL_SNT flags of UDPHS_EPTSTAx."
newline
bitfld.long 0x4 12. "RX_SETUP,Received SETUP Clear" "0: No effect.,1: Clear the RX_SETUP flags of UDPHS_EPTSTAx."
newline
bitfld.long 0x4 10. "TX_COMPLT,Transmitted IN Data Complete Clear" "0: No effect.,1: Clear the TX_COMPLT flag of UDPHS_EPTSTAx."
newline
bitfld.long 0x4 9. "RXRDY_TXKL,Received OUT Data Clear" "0: No effect.,1: Clear the RXRDY_TXKL flag of UDPHS_EPTSTAx."
newline
bitfld.long 0x4 6. "TOGGLESQ,Data Toggle Clear" "0: No effect.,1: Clear the PID data of the current bank"
newline
bitfld.long 0x4 5. "FRCESTALL,Stall Handshake Request Clear" "0: No effect.,1: Clear the STALL request. The next packets from.."
wgroup.long ($2+0x18)++0x3
line.long 0x0 "EPTCLRSTA_ISOENDPT_MODE,UDPHS Endpoint Clear Status Register"
bitfld.long 0x0 14. "ERR_FLUSH,Bank Flush Error Clear" "0: No effect.,1: Clear the ERR_FLUSH flags of UDPHS_EPTSTAx."
newline
bitfld.long 0x0 13. "ERR_CRC_NTR,Number of Transaction Error Clear" "0: No effect.,1: Clear the ERR_CRC_NTR flags of UDPHS_EPTSTAx."
newline
bitfld.long 0x0 12. "ERR_FL_ISO,Error Flow Clear" "0: No effect.,1: Clear the ERR_FL_ISO flags of UDPHS_EPTSTAx."
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete Clear" "0: No effect.,1: Clear the TX_COMPLT flag of UDPHS_EPTSTAx."
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data Clear" "0: No effect.,1: Clear the RXRDY_TXKL flag of UDPHS_EPTSTAx."
newline
bitfld.long 0x0 6. "TOGGLESQ,Data Toggle Clear" "0: No effect.,1: Clear the PID data of the current bank"
rgroup.long ($2+0x1C)++0x3
line.long 0x0 "EPTSTA,UDPHS Endpoint Status Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet (cleared upon USB reset)" "0,1"
newline
hexmask.long.word 0x0 20.--30. 1. "BYTE_COUNT,UDPHS Byte Count (cleared upon USB reset)"
newline
bitfld.long 0x0 18.--19. "BUSY_BANK_STA,Busy Bank Number (cleared upon USB reset)" "0: All banks are free,1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
newline
bitfld.long 0x0 16.--17. "CURBK_CTLDIR,Current Bank/Control Direction (cleared upon USB reset)" "0: Bank 0 (or single bank),1: Bank 1,2: Bank 2,?"
newline
bitfld.long 0x0 15. "NAK_OUT,NAK OUT (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 14. "NAK_IN,NAK IN (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 13. "STALL_SNT,Stall Sent (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 12. "RX_SETUP,Received SETUP (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 11. "TXRDY,TX Packet Ready (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data/KILL Bank (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 6.--7. "TOGGLESQ_STA,Toggle Sequencing (cleared upon USB reset)" "0: DATA0,1: DATA1,2: Reserved for High Bandwidth Isochronous Endpoint,3: Reserved for High Bandwidth Isochronous Endpoint"
newline
bitfld.long 0x0 5. "FRCESTALL,Stall Handshake Request (cleared upon USB reset)" "0: No effect.,1: If set a STALL answer will be done to the host.."
rgroup.long ($2+0x1C)++0x3
line.long 0x0 "EPTSTA_ISOENDPT_MODE,UDPHS Endpoint Status Register"
bitfld.long 0x0 31. "SHRT_PCKT,Short Packet (cleared upon USB reset)" "0,1"
newline
hexmask.long.word 0x0 20.--30. 1. "BYTE_COUNT,UDPHS Byte Count (cleared upon USB reset)"
newline
bitfld.long 0x0 18.--19. "BUSY_BANK_STA,Busy Bank Number (cleared upon USB reset)" "0: All banks are free,1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
newline
bitfld.long 0x0 16.--17. "CURBK,Current Bank (cleared upon USB reset)" "0: Bank 0 (or single bank),1: Bank 1,2: Bank 2,?"
newline
bitfld.long 0x0 14. "ERR_FLUSH,Bank Flush Error (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 13. "ERR_CRC_NTR,CRC ISO Error/Number of Transaction Error (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 12. "ERR_FL_ISO,Error Flow (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 11. "TXRDY_TRER,TX Packet Ready/Transaction Error (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 10. "TX_COMPLT,Transmitted IN Data Complete (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 9. "RXRDY_TXKL,Received OUT Data/KILL Bank (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 8. "ERR_OVFLW,Overflow Error (cleared upon USB reset)" "0,1"
newline
bitfld.long 0x0 6.--7. "TOGGLESQ_STA,Toggle Sequencing (cleared upon USB reset)" "0: DATA0,1: DATA1,2: Data2 (only for High Bandwidth Isochronous..,3: MData (only for High Bandwidth Isochronous.."
tree.end
repeat.end
repeat 7. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6)(list ad:0xF803C300 ad:0xF803C310 ad:0xF803C320 ad:0xF803C330 ad:0xF803C340 ad:0xF803C350 ad:0xF803C360)
tree "UDPHS_DMA[$1]"
base $2
group.long ($2)++0xF
line.long 0x0 "DMANXTDSC,UDPHS DMA Next Descriptor Address Register"
hexmask.long 0x0 0.--31. 1. "NXT_DSC_ADD,Next Descriptor Address"
line.long 0x4 "DMAADDRESS,UDPHS DMA Channel Address Register"
hexmask.long 0x4 0.--31. 1. "BUFF_ADD,Buffer Address"
line.long 0x8 "DMACONTROL,UDPHS DMA Channel Control Register"
hexmask.long.word 0x8 16.--31. 1. "BUFF_LENGTH,Buffer Byte Length (Write-only)"
bitfld.long 0x8 7. "BURST_LCK,Burst Lock Enable" "0: The DMA never locks bus access.,1: USB packets AHB data bursts are locked for.."
newline
bitfld.long 0x8 6. "DESC_LD_IT,Descriptor Loaded Interrupt Enable" "0: UDPHS_DMASTATUSx/DESC_LDST rising will not..,1: An interrupt is generated when a descriptor has.."
bitfld.long 0x8 5. "END_BUFFIT,End of Buffer Interrupt Enable" "0: UDPHS_DMA_STATUSx/END_BF_ST rising will not..,1: An interrupt is generated when the.."
newline
bitfld.long 0x8 4. "END_TR_IT,End of Transfer Interrupt Enable" "0: UDPHS device initiated buffer transfer..,1: An interrupt is sent after the buffer transfer.."
bitfld.long 0x8 3. "END_B_EN,End of Buffer Enable (Control)" "0: DMA Buffer End has no impact on USB packet..,1: Endpoint can validate the packet (according to.."
newline
bitfld.long 0x8 2. "END_TR_EN,End of Transfer Enable (Control)" "0: USB end of transfer is ignored.,1: UDPHS device can put an end to the current.."
bitfld.long 0x8 1. "LDNXT_DSC,Load Next Channel Transfer Descriptor Enable (Command)" "0: No channel register is loaded after the end of..,1: The channel controller loads the next descriptor.."
newline
bitfld.long 0x8 0. "CHANN_ENB,(Channel Enable Command)" "0: DMA channel is disabled at and no transfer will..,1: UDPHS_DMASTATUS register CHANN_ENB bit will be.."
line.long 0xC "DMASTATUS,UDPHS DMA Channel Status Register"
hexmask.long.word 0xC 16.--31. 1. "BUFF_COUNT,Buffer Byte Count"
bitfld.long 0xC 6. "DESC_LDST,Descriptor Loaded Status" "0: Cleared automatically when read by software.,1: Set by hardware when a descriptor has been.."
newline
bitfld.long 0xC 5. "END_BF_ST,End of Channel Buffer Status" "0: Cleared automatically when read by software.,1: Set by hardware when the BUFF_COUNT countdown.."
bitfld.long 0xC 4. "END_TR_ST,End of Channel Transfer Status" "0: Cleared automatically when read by software.,1: Set by hardware when the last packet transfer is.."
newline
bitfld.long 0xC 1. "CHANN_ACT,Channel Active Status" "0: The DMA channel is no longer trying to source..,1: The DMA channel is currently trying to source.."
bitfld.long 0xC 0. "CHANN_ENB,Channel Enable Status" "0: The DMA channel no longer transfers data and may..,1: The DMA channel is currently enabled and.."
tree.end
repeat.end
tree.end
AUTOINDENT.OFF
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