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Gen4_R-Car_Trace32/2_Trunk/pers3c2416.per
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: S3C2416 On-Chip Peripherals
; @Props: Released
; @Author: MAV
; @Changelog: 2010-01-07 MAV
; @Manufacturer: SAMSUNG - Samsung Semiconductor
; @Doc: S3C2416x_ds_rev10.pdf (2008-10-06)
; @Core: ARM926EJ
; @Chip: S3C2416
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pers3c2416.per 7592 2017-02-18 13:54:14Z askoncej $
config 16. 8.
base ad:0x00000000
tree "ARM Core Registers"
AUTOINDENT.PUSH
AUTOINDENT.OFF
width 8.
tree "ID Registers"
group c15:0x0000--0x0000
line.long 0x0 "MIDR,Identity Code"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
group c15:0x0100--0x0100
line.long 0x0 "CTR,Cache Type"
bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
textline " "
bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
textline " "
bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
group c15:0x0200--0x0200
line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
tree.end
tree "MMU Control and Configuration"
width 8.
group c15:0x0001--0x0001
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
textline " "
bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
textline " "
bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
textline " "
group c15:0x0002--0x0002
line.long 0x0 "TTBR,Translation Table Base Register"
hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
textline " "
group c15:0x3--0x3
line.long 0x0 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
textline " "
group c15:0x0005--0x0005
line.long 0x0 "DFSR,Data Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0105--0x0105
line.long 0x0 "IFSR,Instruction Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0006--0x0006
line.long 0x0 "DFAR,Data Fault Address Register"
textline " "
group c15:0x000a--0x000a
line.long 0x0 "TLBR,TLB Lockdown Register"
bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. " P ,P bit" "0,1"
textline " "
group c15:0x000d--0x000d
line.long 0x0 "FCSEPID,FCSE Process ID"
group c15:0x010d--0x010d
line.long 0x0 "CONTEXT,Context ID"
tree.end
tree "Cache Control and Configuration"
group c15:0x0009--0x0009
line.long 0x0 "DCACHE,Data Cache Lockdown"
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
group c15:0x0109--0x0109
line.long 0x0 "ICACHE,Instruction Cache Lockdown"
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
tree.end
tree "TCM Control and Configuration"
group c15:0x0019--0x0019
line.long 0x0 "DTCM,Data TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
group c15:0x0119--0x0119
line.long 0x0 "ITCM,Instruction TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
tree.end
tree "Test and Debug"
group c15:0x000f--0x000f
line.long 0x0 "DOVRR,Debug Override Register"
bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
textline " "
bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
group c15:0x001f--0x001f
line.long 0x0 "ADDRESS,Debug/Test Address"
;wgroup c15:0x402f--0x402f
; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
;wgroup c15:0x403f--0x403f
; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
;wgroup c15:0x404f--0x404f
; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
;wgroup c15:0x405f--0x405f
; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
;wgroup c15:0x407f--0x407f
; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
;wgroup c15:0x412f--0x412f
; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
;wgroup c15:0x413f--0x413f
; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
;wgroup c15:0x414f--0x414f
; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
;wgroup c15:0x415f--0x415f
; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
;wgroup c15:0x417f--0x417f
; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
group c15:0x101f--0x101f
line.long 0x0 "TRACE,Trace Control"
bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
group c15:0x700f--0x700f
line.long 0x0 "CACHE,Cache Debug Control"
bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
group c15:0x701f--0x701f
line.long 0x0 "MMU,MMU Debug Control"
bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
textline " "
bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
group c15:0x002f--0x002f
line.long 0x0 "REMAP,Memory Region Remap"
bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
textline " "
bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
tree.end
tree "ICEbreaker"
width 8.
group ice:0x0--0x5 "Debug Control"
line.long 0x0 "DBGCTRL,Debug Control Register"
bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
textline " "
bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x4 "DBGSTAT,Debug Status Register"
bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x8 "VECTOR,Vector Catch Register"
bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
line.long 0x10 "COMCTRL,Debug Communication Control Register"
bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
line.long 0x14 "COMDATA,Debug Communication Data Register"
group ice:0x8--0x0d "Watchpoint 0"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x15 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
AUTOINDENT.POP
tree.end
tree "SYSCON (System Controller)"
base ad:0x4c000000
width 10.
group.long 0x00++0xb "Clock Source Control Registers"
line.long 0x00 "LOCKCON0,MPLL Lock Time Count Register"
hexmask.long.word 0x00 0.--15. 1. " M_LTIME ,MPLL Lock Time Count Value For ARMCLK, HCLK, and PCLK"
line.long 0x04 "LOCKCON1,EPLL Lock Time Count Register"
hexmask.long.word 0x04 0.--15. 1. " E_LTIME ,EPLL Lock Time Count Value For UARTCLK, SPICLK"
line.long 0x08 "OSCSET,Oscillator Stabilization Control Register"
hexmask.long.word 0x08 0.--15. 1. " XTALWAIT ,Crystal Oscillator Settle-down Wait Time"
group.long 0x10++0x03
line.long 0x00 "MPLLCON,MPLL Configuration Register"
bitfld.long 0x00 25. " MPLLEN_STOP ,MPLL ON/OFF In STOP Mode" "Off,On"
bitfld.long 0x00 24. " ONOF ,MPLL ON/OFF" "On,Off"
textline " "
hexmask.long.word 0x00 14.--23. 1. " MDIV ,Main Divider Value Of MPLL"
bitfld.long 0x00 5.--10. " PDIV ,MPLL Pre-divider Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x00 0.--2. " SDIV ,MPLL Post-divider Value" "Reserved,1,2,3,4,5,6,7"
group.long 0x18++0x07
line.long 0x00 "EPLLCON,EPLL Configuartion Register"
bitfld.long 0x00 25. " EPLLEN_STOP ,EPLL ON/OFF In STOP Mode" "Off,On"
bitfld.long 0x00 24. " ONOF ,EPLL ON/OFF" "On,Off"
textline " "
hexmask.long.byte 0x00 16.--23. 1. " MDIV ,EPLL Main Divider Value"
bitfld.long 0x00 8.--13. " PDIV ,EPLL Pre-divider Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x00 0.--2. " SDIV ,EPLL Post-scaler Value" "Reserved,1,2,3,4,5,6,7"
line.long 0x04 "EPLLCON_K,EPLL Configuration Register For K Value"
hexmask.long.word 0x04 0.--15. 1. " KDIV ,EPLL Fractional Modulator"
width 9.
group.long 0x20++0x1b "Clock Control Registers"
line.long 0x00 "CLKSRC,Clock Source Control Register"
sif (cpu()=="S3C2450")
bitfld.long 0x00 20. " SEL_CAMCLK ,Source clock of CAMCLK divider" "EPLL,HCLK"
bitfld.long 0x00 19. " SELHSSPI1 ,HS-SPI0 clock" "EPLL,MPLL"
textline " "
endif
bitfld.long 0x00 18. " SELHSSPI0 ,HS-SPI0 Clock" "EPLL,MPLL"
bitfld.long 0x00 17. " SELHSMMC1 ,HSMMC1 Clock" "EPLL,EXTCLK"
textline " "
bitfld.long 0x00 16. " SELHSMMC0 ,HSMMC0 Clock" "EPLL,EXTCLK"
sif (cpu()=="S3C2450")
bitfld.long 0x00 14.--15. " SELI2S ,I2S clock source selection" "EPLL,External I2S,EpllRefClk,EpllRefClk"
textline " "
bitfld.long 0x00 12.--13. " SELI2S_1 ,I2S_1 clock source selection" "EPLL,External I2S,EpllRefClk,EpllRefClk"
bitfld.long 0x00 7.--8. " SELESRC ,Selection EPLL Reference Clock" "MPLL,MPLL,XTAL,EXTCLK"
else
bitfld.long 0x00 7.--8. " SELESRC ,Selection EPLL Reference Clock" "MPLL,MPLL,XTAL,EXTCLK"
endif
textline " "
bitfld.long 0x00 6. " SELEPLL ,EsysClk Selection" "EPLL clock,EPLL output"
bitfld.long 0x00 4. " SELLMPLL ,MSYSCLK Selection" "MPLL clock,MPLL output"
textline " "
bitfld.long 0x00 3. " SELEXTCLK ,Configure MPLL Reference Clock Divider" "Disabled,Enabled"
line.long 0x04 "CLKDIV0,Clock Divider Ratio Control Register 0"
bitfld.long 0x04 13. " DVS ,Enable Dynamic Voltage Scaling" "Disabled,Enabled"
bitfld.long 0x04 9.--11. " ARMDIV ,ARM Clock Divider Ratio" "1/1,1/2,1/3,1/4,Reserved,1/6,Reserved,1/8"
textline " "
bitfld.long 0x04 6.--8. " EXTDIV ,External Clock Divider Ratio" "MPLL,MPLL/3,MPLL/5,MPLL/7,MPLL/9,MPLL/11,MPLL/13,MPLL/15"
bitfld.long 0x04 4.--5. " PREDIV ,Pre Divifer For HCLK" "0,1,2,3"
textline " "
bitfld.long 0x04 3. " HALFHCLK ,HCLKx1_2 Clock Divider Ratio" "HCLK,HCLK/2"
bitfld.long 0x04 2. " PCLKDIV ,PCLK Clock Divider Ratio" "HCLK,HCLK/2"
textline " "
bitfld.long 0x04 0.--1. " HCLKDIV ,HCLK Clock Divider Ratio" "0,1,Reserved,3"
line.long 0x08 "CLKDIV1,Clock Divider Ratio Control Register 1"
sif (cpu()=="S3C2450")
bitfld.long 0x08 26.--29. " CAMDIV ,CAM clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
endif
bitfld.long 0x08 24.--25. " SPDIV_0 ,HS-SPI Clock Clock Divider Ratio" "1,2,3,4"
hexmask.long.byte 0x08 16.--23. 1. " DISPDIV ,Display Controller Clock Divider Ratio"
textline " "
bitfld.long 0x08 12.--15. " I2SDIV_0 ,I2S0 Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x08 8.--11. " UARTDIV ,UART Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x08 6.--7. " HSMMCDIV_1 ,HSMMC_1 Clock Divider Ratio" "1,2,3,4"
bitfld.long 0x08 4.--5. " USBHOSTDIV ,USB Host Clock Divider Ratio" "1,2,3,4"
line.long 0x0c "CLKDIV2,Clock Divider Ratio Control Register 2"
sif (cpu()=="S3C2450")
bitfld.long 0x0c 24.--25. " SPIDIV1_EPLL ,HS-SPI_1 clock divider ratio" "1,2,3,4"
bitfld.long 0x0c 16.--20. " SPIDIV1_MPLL ,HS-SPI1 Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
textline " "
bitfld.long 0x0c 12.--15. " I2SDIV_1 ,I2S1 clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
endif
bitfld.long 0x0c 6.--7. " HSMMCDIV_0 ,HSMMC_0 Clock Divider Ratio" "1,2,3,4"
bitfld.long 0x0c 0.--4. " SPIDIV0_MPLL ,HS-SPI0 Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
line.long 0x10 "HCLKCON,HCLK Enable Register"
bitfld.long 0x10 20. " 2D ,Enable HCLK Into 2D" "Disabled,Enabled"
bitfld.long 0x10 19. " DRAMC ,Enable HCLK Into DRAM Controller" "Disabled,Enabled"
textline " "
bitfld.long 0x10 18. " SSMC ,Enable HCLK Into SSMC Block" "Disabled,Enabled"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x10 17. " CFC ,Enable HCLK into the CF" "Disabled,Enabled"
endif
textline " "
bitfld.long 0x10 16. " HSMMC1 ,Enable HCLK Into HSMMC1" "Disabled,Enabled"
textline " "
bitfld.long 0x10 15. " HSMMC0 ,Enable HCLK Into HSMMC0" "Disabled,Enabled"
bitfld.long 0x10 13. " IROM ,Enable HCLK Into IROM" "Disabled,Enabled"
textline " "
bitfld.long 0x10 12. " USBDEV ,Enable HCLK Into USB Device" "Disabled,Enabled"
bitfld.long 0x10 11. " USBHOST ,Enable HCLK Into USB HOST" "Disabled,Enabled"
textline " "
bitfld.long 0x10 9. " DISPCON ,Enable HCLK Into Display Controller" "Disabled,Enabled"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x10 8. " CAMIF ,Enable HCLK into the camera interface" "Disabled,Enabled"
bitfld.long 0x10 7. " DMA7 ,Enable HCLK Into DMA Channel 7" "Disabled,Enabled"
textline " "
bitfld.long 0x10 6. " DMA6 ,Enable HCLK Into DMA Channel 6" "Disabled,Enabled"
endif
textline " "
bitfld.long 0x10 5. " DMA5 ,Enable HCLK Into DMA Channel 5" "Disabled,Enabled"
textline " "
bitfld.long 0x10 4. " DMA4 ,Enable HCLK Into DMA Channel 4" "Disabled,Enabled"
bitfld.long 0x10 3. " DMA3 ,Enable HCLK Into DMA Channel 3" "Disabled,Enabled"
textline " "
bitfld.long 0x10 2. " DMA2 ,Enable HCLK Into DMA Channel 2" "Disabled,Enabled"
bitfld.long 0x10 1. " DMA1 ,Enable HCLK Into DMA Channel 1" "Disabled,Enabled"
textline " "
bitfld.long 0x10 0. " DMA0 ,Enable HCLK Into DMA Channel 0" "Disabled,Enabled"
line.long 0x14 "PCLKCON,PCLK Enable Register"
bitfld.long 0x14 19. " PCM ,Enable PCLK Into PCM" "Disabled,Enabled"
sif (cpu()=="S3C2450")
bitfld.long 0x14 17. " I2S_1 ,Enable PCLK into the I2S_1" "Disabled,Enabled"
textline " "
bitfld.long 0x14 16. " I2C_1 ,Enable PCLK into the I2C_1" "Disabled,Enabled"
bitfld.long 0x14 15. " CHIP_ID ,Enable PCLK into the CHIP_ID" "Disabled,Enabled"
textline " "
bitfld.long 0x14 14. " SPI_HS_1 ,Enable PCLK into the SPI_HS1" "Disabled,Enabled"
endif
bitfld.long 0x14 13. " GPIO ,Enable PCLK Into GPIO" "Disabled,Enabled"
textline " "
bitfld.long 0x14 12. " RTC ,Enable PCLK Into RTC" "Disabled,Enabled"
bitfld.long 0x14 11. " WDT ,Enable PCLK Into WDT" "Disabled,Enabled"
textline " "
bitfld.long 0x14 10. " PWM ,Enable PCLK Into PWM" "Disabled,Enabled"
bitfld.long 0x14 9. " I2S_0 ,Enable PCLK Into I2S_0" "Disabled,Enabled"
textline " "
bitfld.long 0x14 8. " AC97 ,Enable PCLK Into AC97" "Disabled,Enabled"
bitfld.long 0x14 7. " TSADC ,Enable PCLK Into TSADC" "Disabled,Enabled"
textline " "
bitfld.long 0x14 6. " SPI_HS_0 ,Enable PCLK Into SPI_HS0" "Disabled,Enabled"
bitfld.long 0x14 4. " I2C_0 ,Enable PCLK Into I2C_0" "Disabled,Enabled"
textline " "
bitfld.long 0x14 3. " UART3 ,Enable PCLK Into UART3" "Disabled,Enabled"
bitfld.long 0x14 2. " UART2 ,Enable PCLK Into UART2" "Disabled,Enabled"
textline " "
bitfld.long 0x14 1. " UART1 ,Enable PCLK Into UART1" "Disabled,Enabled"
bitfld.long 0x14 0. " UART0 ,Enable PCLK Into UART0" "Disabled,Enabled"
line.long 0x18 "SCLKCON,Special Clock Enable Register"
sif (cpu()=="S3C2450")
bitfld.long 0x18 20. " SPICLK_MPLL1 ,Enable SPICLK1" "Disabled,Enabled"
bitfld.long 0x18 19. " SPICLK_MPLL0 ,Enable SPICLK0" "Disabled,Enabled"
textline " "
bitfld.long 0x18 18. " PCM1_EXT ,Enable PCM1 Extrenal Clock" "Disabled,Enabled"
bitfld.long 0x18 17. " PCM0_EXT ,Enable PCM0 Extrenal Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 16. " DDRCLK ,Enable DDRCLK" "Disabled,Enabled"
bitfld.long 0x18 15. " SSMCCLK ,Enable SSMCCLK" "Disabled,Enabled"
textline " "
bitfld.long 0x18 14. " SPICLK_0 ,Enable HS-SPI_0 Clock" "Disabled,Enabled"
bitfld.long 0x18 13. " HSMMCCLK_EXT ,Enable HSMMC_EXT Clock For HSMMC0" "Disabled,Enabled"
textline " "
bitfld.long 0x18 12. " HSMMCCLK_1 ,Enable HSSMMC1_1 Clock" "Disabled,Enabled"
bitfld.long 0x18 11. " CAMCLK ,Enable CAM clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 10. " DISPCLK ,Enable Display Controller Clock" "Disabled,Enabled"
bitfld.long 0x18 9. " I2SCLK_0 ,Enable I2S_0 Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 8. " UARTCLK ,Enable UART Clock" "Disabled,Enabled"
bitfld.long 0x18 7. " SPICLK_1 ,Enable HS-SPI_1 Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 6. " HSMMCCLK_0 ,Enable HSMMC_0 Clock" "Disabled,Enabled"
bitfld.long 0x18 5. " I2SCLK_1 ,Enable I2S_1 Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 1. " USB_HOST ,Enable USB HOST Clock" "Disabled,Enabled"
else
bitfld.long 0x18 19. " SPICLK_MPLL0 ,Enable SPICLK0" "Disabled,Enabled"
bitfld.long 0x18 17. " PCM0_EXT ,Enable PCM0 Extrenal Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 16. " DDRCLK ,Enable DDRCLK" "Disabled,Enabled"
bitfld.long 0x18 15. " SSMCCLK ,Enable SSMCCLK" "Disabled,Enabled"
textline " "
bitfld.long 0x18 14. " SPICLK_0 ,Enable HS-SPI_0 Clock" "Disabled,Enabled"
bitfld.long 0x18 13. " HSMMCCLK_EXT ,Enable HSMMC_EXT Clock For HSMMC0" "Disabled,Enabled"
textline " "
bitfld.long 0x18 12. " HSMMCCLK_1 ,Enable HSSMMC1_1 Clock" "Disabled,Enabled"
bitfld.long 0x18 10. " DISPCLK ,Enable Display Controller Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 9. " I2SCLK_0 ,Enable I2S_0 Clock" "Disabled,Enabled"
bitfld.long 0x18 8. " UARTCLK ,Enable UART Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x18 6. " HSMMCCLK_0 ,Enable HSMMC_0 Clock" "Disabled,Enabled"
bitfld.long 0x18 1. " USB_HOST ,Enable USB HOST Clock" "Disabled,Enabled"
endif
width 9.
group.long 0x40++0x03 "Power Management Registers"
line.long 0x00 "PWRMODE,Power Mode Control Register"
bitfld.long 0x00 16. " STOP ,Enable Entering STOP Mode" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. " SLEEP ,Enable Entering SLEEP Mode"
group.long 0x60++0x03
line.long 0x00 "PWRCFG,Power Managment Configuration Register"
bitfld.long 0x00 17. " STANDBYWFI_EN ,Enable Entering IDLE Mode By STANDYWFI" "Disabled,Enabled"
bitfld.long 0x00 16. " DEEP-STOP ,Enable Entering DEEP-STOP Mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " SLEEP_CFG ,Enable Wakeup Source In Sleep Mode " "Disabled,Enabled"
bitfld.long 0x00 9. " NFRESET_CFG ,Reset Configuration When Internal Reset Is Generated" "Reset,No reset"
textline " "
bitfld.long 0x00 8. " RTC_CFG ,Configure RTC Alarm Interrupt Wake-up Mask" "Not masked,Masked"
bitfld.long 0x00 7. " RTCTICK_CFG ,Configure RTC Tick Interrupt Wake-up Mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 4. " nSW_PHY_OFF_USB ,Power On/Off of USB PHY" "Off,On"
bitfld.long 0x00 3. " OSC_EN_SLP ,Cristal Oscillator Enable Bit In SLEEP Mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " OSC_EN_STOP ,Cristal Oscillator Enable Bit In STOP Mode" "Disabled,Enabled"
bitfld.long 0x00 0.--1. " BATT_CFG ,Configure BATT_FLT Operation" "Ignored,Generated,Ignored,?..."
width 8.
group.long 0x44++0x03 "Reset Control Registers"
line.long 0x00 "SWRST,Software Reset Control Register"
hexmask.long 0x00 0.--31. 1. " SWRST ,Enable System Restart"
group.long 0x64++0x03
line.long 0x00 "RSTCON,Reset Control Register"
bitfld.long 0x00 16. " PWROFF_SLP ,Power Control On Pad Retention Cell I/O" "Cleared,Set"
hexmask.long.byte 0x00 8.--15. 1. " RSTCNT ,Delay Of Releasing Reset"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " PWRSETCNT ,Power Settle Down Counter"
width 10.
rgroup.long 0x68++0x03 "System Controller Status Registers"
line.long 0x00 "RSTSTAT,Reset Status Register"
bitfld.long 0x00 5. " SWRST ,Reset Software" "No reset,Reset"
bitfld.long 0x00 4. " DEEP-STOP ,Wake-up From DEEP-STOP" "No wake-up,Wake-up"
textline " "
bitfld.long 0x00 3. " SLEEP ,Wake-up From RTC_TICK,RTC_ALARM,EINT And Battery Fault" "No wake-up,Wake-up"
bitfld.long 0x00 2. " WDTRST ,Reset By Watch-dog Reset" "No reset,Reset"
textline " "
bitfld.long 0x00 0. " EXTRST ,External Reset By nRESET Pin" "No reset,Reset"
group.long 0x6c++0x03
line.long 0x00 "WKUPSTAT,Wake-up Register"
bitfld.long 0x00 5. " BATF ,Wake-up By BATT_FLT Assertion" "Disabled,Enabled"
bitfld.long 0x00 4. " RTC_TICK ,Waked-up By RTC Tick" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " RTC ,Waked-up By RTC Alarm" "Disabled,Enabled"
bitfld.long 0x00 0. " EINT ,Waked-up By Extrenal Interrupts" "Disabled,Enabled"
width 9.
group.long 0x50++0x03 "Bus Configuration Register"
line.long 0x00 "BUSPRI0,Bus Priority Control Register 0"
bitfld.long 0x00 14.--15. " TYPE_S ,Priority Type For AHB-System Bus" "Fixed,Granted maser,Rotated,Undefined"
bitfld.long 0x00 8.--11. " ORDER_S ,Fixed Priority Order For AHB-S Bus" "0-1-2-3-4-5-6-7-8-9-10-11-12-13-14-15,1-2-3-4-5-6-7-8-9-10-11-12-13-14-15-0,2-3-4-5-6-7-8-9-10-11-12-13-14-15-0-1,3-4-5-6-7-8-9-10-11-12-13-14-15-0-1-2,4-5-6-7-8-9-10-11-12-13-14-15-0-1-2-3,5-6-7-8-9-10-11-12-13-14-15-0-1-2-3-4,6-7-8-9-10-11-12-13-14-15-0-1-2-3-4-5,7-8-9-10-11-12-13-14-15-0-1-2-3-4-5-6,8-9-10-11-12-13-14-15-0-1-2-3-4-5-6-7,9-10-11-12-13-14-15-0-1-2-3-4-5-6-7-8,10-11-12-13-14-15-0-1-2-3-4-5-6-7-8-9,11-12-13-14-15-0-1-2-3-4-5-6-7-8-9-10,12-13-14-15-0-1-2-3-4-5-6-7-8-9-10-11,13-14-15-0-1-2-3-4-5-6-7-8-9-10-11-12,14-15-0-1-2-3-4-5-6-7-8-9-10-11-12-13,15-0-1-2-3-4-5-6-7-8-9-10-11-12-13-14"
textline " "
bitfld.long 0x00 6.--7. " TYPE_I ,Priority Type For AHB-Image Bus" "Fixed,Granted maser,Rotated,Undefined"
bitfld.long 0x00 0.--2. " ORDER_I ,Fixed Priority Order For AHB-I Bus" "0-1-2-3-4-5-6-7,1-2-3-4-5-6-0-7,2-3-4-5-6-0-1-7,3-4-5-6-0-1-2-7,4-5-6-0-1-2-3-7,5-6-0-1-2-3-4-7,6-0-1-2-3-4-5-7,?..."
width 9.
group.long 0x70++0x0f "Information Registers"
line.long 0x00 "INFORM0,SLEEP Mode Information Register 0"
hexmask.long 0x00 0.--31. 1. " DATA ,User Specfic Information"
line.long 0x04 "INFORM1,SLEEP Mode Information Register 1"
hexmask.long 0x04 0.--31. 1. " DATA ,User Specfic Information"
line.long 0x08 "INFORM2,SLEEP Mode Information Register 2"
hexmask.long 0x08 0.--31. 1. " DATA ,User Specfic Information"
line.long 0x0c "INFORM3,SLEEP Mode Information Register 3"
hexmask.long 0x0c 0.--31. 1. " DATA ,User Specfic Information"
width 9.
group.long 0x80++0x03 "USB Control Registers"
line.long 0x00 "PHYCTRL,USB2.0 PHY Control Register"
bitfld.long 0x00 2. 5. " CLK_ON_OFF ,Clock Input On Off At Pad Input area" "Crystal enabled,Oscillator enabled,Reserved,Crystal/Oscillator disabled"
bitfld.long 0x00 3.--4. " CLK_SEL ,Reference Clock Freuqency Select" "48MHz,Reserved,12MHz,24MHz"
textline " "
bitfld.long 0x00 1. " INt_PLL_SEL ,host 1.1 Uses Which PLL Clock" "EPLL,USB internal"
bitfld.long 0x00 0. " DOWNSTREAM_PORT ,Downstream Ports Select" "Device mode,Host mode"
group.long 0x84++0x0b
line.long 0x00 "PHYPWR,USB2.0 PHY Power Control Register"
bitfld.long 0x00 0. " FORCE_SUSPEND ,Aplly Suspend Signal For Power Save" "Disabled,Enabled"
line.long 0x04 "URSTCON,USB Reset Control Register"
bitfld.long 0x04 2. " FUNC_RESET ,Function 2.0 S/W Reset" "No reset,Reset"
bitfld.long 0x04 1. " HOST_RESET ,Host 1.1 S/W Reset" "No reset,Reset"
textline " "
bitfld.long 0x04 0. " PHY_RESET ,PHY 2.0 S/W Reset" "No reset,Reset"
line.long 0x08 "UCLKCON,USB Clock Control Register"
bitfld.long 0x08 31. " DETECT_BUS ,Enable Pull-up Resistance On The Line D+" "Disabled,Enabled"
bitfld.long 0x08 2. " FUNC_CLK_EN ,USB 2.0 Function Clock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 1. " HOST_CLK_EN ,USB 1.1 Host Clock Enable" "Disabled,Enabled"
width 0xb
tree.end
tree "MATRIX & EBI"
base ad:0x4e800000
width 12.
group.long 0x00++0x0b
line.long 0x00 "BPRIORITY0,Matrix Core 0 Priority Control Register"
bitfld.long 0x00 2. " PRI_TYP ,Priority Type" "Fixed,Rotation"
textline " "
bitfld.long 0x00 0. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "AHB_S>AHB_I,AHB_I>AHB_S"
line.long 0x04 "BPRIORITY1,Matrix Core 1 Priority Control Register"
bitfld.long 0x04 2. " PRI_TYP ,Priority Type" "Fixed,Rotation"
textline " "
bitfld.long 0x04 0. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "AHB_S>AHB_I,AHB_I>AHB_S"
line.long 0x08 "EBICON,EBI Control Register"
sif (cpu()=="S3C2450")
bitfld.long 0x08 10. " BANK3_CFG ,Bank3 Configuration" "SROM,CF"
textline " "
bitfld.long 0x08 9. " BANK2_CFG ,Bank2 Configuration" "SROM,CF"
textline " "
bitfld.long 0x08 8. " BANK1_CFG ,Bank1 Configuration" "SROM,NAND"
textline " "
bitfld.long 0x08 2. " PRI_TYP ,Priority Type" "Fixed,Rotation"
textline " "
bitfld.long 0x08 0.--1. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "SSMC>NFCON>CFCON>ExtBusMaster,SSMC>CFCON>NFCON>ExtBusMaster,SSMC>ExtBusMaster>NFCON>CFCON,ExtBusMaster>SSMC>NFCON>CFCON"
else
bitfld.long 0x08 8. " BANK1_CFG ,Bank1 Configuiration" "SROM,NAND"
textline " "
bitfld.long 0x08 2. " PRI_TYP ,Priority Type" "Fixed,Rotation"
textline " "
bitfld.long 0x08 0.--1. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "SSMC>NFCON>ExtBusMaster,SSMC>NFCON>ExtBusMaster,SSMC>ExtBusMaster>NFCON,ExtBusMaster>SSMC>NFCON"
endif
width 0xb
tree.end
tree.open "SMC (Static Memory Controller)"
base ad:0x4f000000
width 13.
tree "Bank 0"
group.long 0x0++0x3
line.long 0x00 "SMBIDCYR0,Bank0 Idle Cycle Control Register"
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x0+0x4)++0x3
line.long 0x00 "SMBWSTRDR0,Bank0 Read Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x0+0x8)++0x3
line.long 0x00 "SMBWSTWRR0,Bank0 Write Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x0+0xc)++0x3
line.long 0x00 "SMBWSTOENR0,Bank0 Output Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x0+0x10)++0x3
line.long 0x00 "SMBWSTWENR0,Bank0 Write Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((d.l(ad:(0x4f000000+0x0+0x14)))&0x80)==0x80)
group.long (0x0+0x14)++0x3
line.long 0x00 "SMBCR0,Bank0 Control Register"
bitfld.long 0x00 22.--25. " DELAYnCS ,Control The Delay Between ADDR Signal And nCS Signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
textline " "
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
textline " "
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
textline " "
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
else
group.long (0x0+0x14)++0x3
line.long 0x00 "SMBCR0,Bank0 Control Register"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
textline " "
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
textline " "
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
textline " "
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
textline " "
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
endif
tree.end
tree "Bank 1"
group.long 0x20++0x3
line.long 0x00 "SMBIDCYR1,Bank1 Idle Cycle Control Register"
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x20+0x4)++0x3
line.long 0x00 "SMBWSTRDR1,Bank1 Read Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x20+0x8)++0x3
line.long 0x00 "SMBWSTWRR1,Bank1 Write Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x20+0xc)++0x3
line.long 0x00 "SMBWSTOENR1,Bank1 Output Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x20+0x10)++0x3
line.long 0x00 "SMBWSTWENR1,Bank1 Write Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((d.l(ad:(0x4f000000+0x20+0x14)))&0x80)==0x80)
group.long (0x20+0x14)++0x3
line.long 0x00 "SMBCR1,Bank1 Control Register"
bitfld.long 0x00 22.--25. " DELAYnCS ,Control The Delay Between ADDR Signal And nCS Signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
textline " "
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
textline " "
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
textline " "
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
else
group.long (0x20+0x14)++0x3
line.long 0x00 "SMBCR1,Bank1 Control Register"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
textline " "
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
textline " "
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
textline " "
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
textline " "
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
endif
tree.end
tree "Bank 2"
group.long 0x40++0x3
line.long 0x00 "SMBIDCYR2,Bank2 Idle Cycle Control Register"
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x40+0x4)++0x3
line.long 0x00 "SMBWSTRDR2,Bank2 Read Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x40+0x8)++0x3
line.long 0x00 "SMBWSTWRR2,Bank2 Write Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x40+0xc)++0x3
line.long 0x00 "SMBWSTOENR2,Bank2 Output Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x40+0x10)++0x3
line.long 0x00 "SMBWSTWENR2,Bank2 Write Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((d.l(ad:(0x4f000000+0x40+0x14)))&0x80)==0x80)
group.long (0x40+0x14)++0x3
line.long 0x00 "SMBCR2,Bank2 Control Register"
bitfld.long 0x00 22.--25. " DELAYnCS ,Control The Delay Between ADDR Signal And nCS Signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
textline " "
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
textline " "
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
textline " "
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
else
group.long (0x40+0x14)++0x3
line.long 0x00 "SMBCR2,Bank2 Control Register"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
textline " "
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
textline " "
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
textline " "
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
textline " "
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
endif
tree.end
tree "Bank 3"
group.long 0x60++0x3
line.long 0x00 "SMBIDCYR3,Bank3 Idle Cycle Control Register"
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x60+0x4)++0x3
line.long 0x00 "SMBWSTRDR3,Bank3 Read Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x60+0x8)++0x3
line.long 0x00 "SMBWSTWRR3,Bank3 Write Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x60+0xc)++0x3
line.long 0x00 "SMBWSTOENR3,Bank3 Output Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x60+0x10)++0x3
line.long 0x00 "SMBWSTWENR3,Bank3 Write Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((d.l(ad:(0x4f000000+0x60+0x14)))&0x80)==0x80)
group.long (0x60+0x14)++0x3
line.long 0x00 "SMBCR3,Bank3 Control Register"
bitfld.long 0x00 22.--25. " DELAYnCS ,Control The Delay Between ADDR Signal And nCS Signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
textline " "
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
textline " "
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
textline " "
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
else
group.long (0x60+0x14)++0x3
line.long 0x00 "SMBCR3,Bank3 Control Register"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
textline " "
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
textline " "
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
textline " "
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
textline " "
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
endif
tree.end
tree "Bank 4"
group.long 0x80++0x3
line.long 0x00 "SMBIDCYR4,Bank4 Idle Cycle Control Register"
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x80+0x4)++0x3
line.long 0x00 "SMBWSTRDR4,Bank4 Read Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x80+0x8)++0x3
line.long 0x00 "SMBWSTWRR4,Bank4 Write Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0x80+0xc)++0x3
line.long 0x00 "SMBWSTOENR4,Bank4 Output Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x80+0x10)++0x3
line.long 0x00 "SMBWSTWENR4,Bank4 Write Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((d.l(ad:(0x4f000000+0x80+0x14)))&0x80)==0x80)
group.long (0x80+0x14)++0x3
line.long 0x00 "SMBCR4,Bank4 Control Register"
bitfld.long 0x00 22.--25. " DELAYnCS ,Control The Delay Between ADDR Signal And nCS Signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
textline " "
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
textline " "
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
textline " "
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
else
group.long (0x80+0x14)++0x3
line.long 0x00 "SMBCR4,Bank4 Control Register"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
textline " "
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
textline " "
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
textline " "
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
textline " "
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
endif
tree.end
tree "Bank 5"
group.long 0xA0++0x3
line.long 0x00 "SMBIDCYR5,Bank5 Idle Cycle Control Register"
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xA0+0x4)++0x3
line.long 0x00 "SMBWSTRDR5,Bank5 Read Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0xA0+0x8)++0x3
line.long 0x00 "SMBWSTWRR5,Bank5 Write Wait State Control Register"
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long (0xA0+0xc)++0x3
line.long 0x00 "SMBWSTOENR5,Bank5 Output Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xA0+0x10)++0x3
line.long 0x00 "SMBWSTWENR5,Bank5 Write Enable Assertion Delay Control Register"
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((d.l(ad:(0x4f000000+0xA0+0x14)))&0x80)==0x80)
group.long (0xA0+0x14)++0x3
line.long 0x00 "SMBCR5,Bank5 Control Register"
bitfld.long 0x00 22.--25. " DELAYnCS ,Control The Delay Between ADDR Signal And nCS Signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
textline " "
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
textline " "
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
textline " "
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
else
group.long (0xA0+0x14)++0x3
line.long 0x00 "SMBCR5,Bank5 Control Register"
bitfld.long 0x00 20. " AddrValdWriteEn ,Control RSMAVD during write operations" "High,Active for sync/async write access"
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,?..."
textline " "
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
textline " "
bitfld.long 0x00 15. " DRnOWE ,Get The Delay Between nCS Signal And nOE/nWE Signal" "No Delay,Delay"
bitfld.long 0x00 12. " AddrValdReadEn ,Control RSMAVD during read operations" "High,Active for sync/async write access"
textline " "
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,?..."
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
bitfld.long 0x00 7. " DRnCS ,Get The Delay Between ADDR Signal And nCS Signal" "No Delay,Delay"
textline " "
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,?..."
textline " "
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
textline " "
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
endif
tree.end
tree "Control And Status"
width 13.
group.long 0x100++0x03
line.long 0x00 "SMBONETYPER,SMC Bank OneNAND Type Selection Register"
bitfld.long 0x00 5. " BANK5TYPE ,Bank 5 OneNAND Type Slection" "DEMUXED,MUXED"
bitfld.long 0x00 4. " BANK4TYPE ,Bank 4 OneNAND Type Slection" "DEMUXED,MUXED"
textline " "
bitfld.long 0x00 3. " BANK3TYPE ,Bank 3 OneNAND Type Slection" "DEMUXED,MUXED"
bitfld.long 0x00 2. " BANK2TYPE ,Bank 2 OneNAND Type Slection" "DEMUXED,MUXED"
textline " "
bitfld.long 0x00 1. " BANK1TYPE ,Bank 1 OneNAND Type Slection" "DEMUXED,MUXED"
rgroup.long 0x200++0x3
line.long 0x00 "SMCSR,SROMC Status Register"
bitfld.long 0x00 0. " WaitStatus ,External wait status" "Deasserted,Asserted"
group.long 0x204++0x3
line.long 0x00 "SMCCR,SMC Control Register"
bitfld.long 0x00 1. " MemClkRatio ,SMCLK to HCLK ratio" "HCLK,HCLK/2"
bitfld.long 0x00 0. " SMClockEn ,SMCLK Enable" "Disabled,Enabled"
tree.end
width 0xb
tree.end
tree "DRAMC (Mobile DRAM Controller)"
base ad:0x48000000
width 10.
if (((d.l(ad:(0x48000000+0x04)))&0x80000000)==0)
group.long 0x00++0x3
line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register"
bitfld.long 0x00 17.--18. " RASBW0 ,Bit width of RAS address of Bank 0" "11-bit,12-bit,13-bit,14-bit"
bitfld.long 0x00 14.--15. " RASBW1 ,Bit width of RAS address of Bank 1" "11-bit,12-bit,13-bit,14-bit"
textline " "
bitfld.long 0x00 11.--12. " CASBW0 ,Bit width of CAS address of Bank 0" "8-bit,9-bit,10-bit,11-bit"
bitfld.long 0x00 8.--9. " CASBW1 ,Bit width of CAS address of Bank 1" "8-bit,9-bit,10-bit,11-bit"
textline " "
bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
textline " "
bitfld.long 0x00 1.--3. " MEMCFG ,External memory configuration" "SDR,DDR2,mSDR,Reserved,Reserved,Reserved,mDDR,?..."
bitfld.long 0x00 0. " BW ,External memory data bus width" "32-bit,16-bit"
else
rgroup.long 0x00++0x3
line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register"
bitfld.long 0x00 17.--18. " RASBW0 ,Bit width of RAS address of Bank 0" "11-bit,12-bit,13-bit,14-bit"
bitfld.long 0x00 14.--15. " RASBW1 ,Bit width of RAS address of Bank 1" "11-bit,12-bit,13-bit,14-bit"
textline " "
bitfld.long 0x00 11.--12. " CASBW0 ,Bit width of CAS address of Bank 0" "8-bit,9-bit,10-bit,11-bit"
bitfld.long 0x00 8.--9. " CASBW1 ,Bit width of CAS address of Bank 1" "8-bit,9-bit,10-bit,11-bit"
textline " "
bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
textline " "
bitfld.long 0x00 1.--3. " MEMCFG ,External memory configuration" "SDR,DDR2,mSDR,Reserved,Reserved,Reserved,mDDR,?..."
bitfld.long 0x00 0. " BW ,External memory data bus width" "32-bit,16-bit"
endif
group.long 0x04++0x3
line.long 0x00 "BANKCON1,Mobile DRAM Control Register"
bitfld.long 0x00 31. " BUSY ,DRAM controller status" "IDLE,BUSY"
bitfld.long 0x00 28.--30. " DQSInDLL ,DDQSIn Delay selection" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 7. " BStop ,Read Burst stop control" "Not supported,Supported"
bitfld.long 0x00 6. " WBUF ,Write buffer control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 5. " AP ,Auto pre-charge control" "Enabled,Disabled"
bitfld.long 0x00 4. " PWRDN ,DRAM power down control" "Not supported,Supported"
textline " "
bitfld.long 0x00 0.--1. " INIT ,DRAM initialization control" "Normal,PALL,MRS,EMRS"
group.long 0x08++0x3
line.long 0x00 "BANKCON2,Mobile DRAM Timing Control Register"
bitfld.long 0x00 20.--23. " tRAS ,Row active time" "1-clock,2-clock,3-clock,4-clock,5-clock,6-clock,7-clock,8-clock,9-clock,10-clock,11-clock,12-clock,13-clock,14-clock,15-clock,16-clock"
bitfld.long 0x00 16.--19. " tAFRC ,Row cycle time" "1-clock,2-clock,3-clock,4-clock,5-clock,6-clock,7-clock,8-clock,9-clock,10-clock,11-clock,12-clock,13-clock,14-clock,15-clock,16-clock"
textline " "
bitfld.long 0x00 4.--5. " CASLAT ,CAS latency control" "Reserved,1-clock,2-clock,3-clock"
bitfld.long 0x00 2.--3. " tRCD ,RAS to CAS delay" "1-clock,2-clock,3-clock,4-clock"
textline " "
bitfld.long 0x00 0.--1. " tRP ,Row pre-charge time" "1-clock,2-clock,3-clock,4-clock"
if (((d.l(ad:(0x48000000)))&0xe)==0x2)
group.long 0x0c++0x3
line.long 0x00 "BANKCON3,Mobile DRAM (E)MRS Register"
bitfld.long 0x00 30.--31. " BA ,Bank address for EMRS" "00,01,10,11"
bitfld.long 0x00 28. " QOFF ,Output buffer disable" "No,Yes"
textline " "
bitfld.long 0x00 27. " RDQS ,RDQS enable" "Disabled,Enabled"
bitfld.long 0x00 26. " nDQS ,nDQS enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 23.--25. " OCD ,OCD program" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--22. " Rtt ,Rtt funcion" "ODT disable,75 Ohm,150 Ohm,50 Ohm,?..."
textline " "
bitfld.long 0x00 17. " D.I.C. ,D.I.C. strength" "Full,Reduced"
bitfld.long 0x00 16. " DLL. ,DLL enable" "Enabled,Disabled"
textline " "
bitfld.long 0x00 12. " ACT_PW_DWN_EX_TIM ,Active Power down exit time" "Fast,Slow"
bitfld.long 0x00 8. " DLL_RST ,DLL reset" "No reset,"
textline " "
bitfld.long 0x00 7. " TM ,Test mode" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " CASLAT ,CAS latency for MRS" "Reserved,1-clock,2-clock,3-clock,?..."
textline " "
bitfld.long 0x00 3. " BRTYPE ,DRAM burst type" "Sequential,?..."
bitfld.long 0x00 0.--2. " BRLEN ,Burst length" "0,1,2,3,4,5,6,7"
else
group.long 0x0c++0x3
line.long 0x00 "BANKCON3,Mobile DRAM (E)MRS Register"
bitfld.long 0x00 30.--31. " BA ,Bank address for EMRS" "00,01,10,11"
bitfld.long 0x00 21.--22. " DS ,DS(Drive Strength) for EMRS" "0,1,2,3"
textline " "
bitfld.long 0x00 16.--18. " PASR ,PASR(Partial Array Self Refresh) for EMRS" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--15. " BA ,Bank address for MRS" "00,01,10,11"
textline " "
bitfld.long 0x00 4.--6. " CASLAT ,CAS latency for MRS" "Reserved,1-clock,2-clock,3-clock,?..."
bitfld.long 0x00 3. " BRTYPE ,DRAM burst type" "Sequential,?..."
textline " "
bitfld.long 0x00 0.--2. " BRLEN ,Burst length" "0,1,2,3,4,5,6,7"
endif
group.long 0x10++0x3
line.long 0x00 "REFRESH,Mobile DRAM Refresh Control Register"
hexmask.long.word 0x00 0.--15. 1. " REFCYC ,DRAM refresh cycle"
group.long 0x14++0x3
line.long 0x00 "TIMEOUT,Write Buffer Time Out Control Register"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Write buffer time-out delay time"
width 0xb
tree.end
tree "NAND Flash Controller"
base ad:0x4e000000
width 14.
if (((d.l(ad:0x4e000000))&0x4)==0x0)
group.long 0x00++0x3
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
bitfld.long 0x00 25. " MsgLength ,Message Length For 4/bit ECC" "512-byte,24-byte"
bitfld.long 0x00 23.--24. " ECCType ,ECC Type Selection" "1-bit,8-bit,4-bit,?..."
textline " "
bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. " PageSize ,Page size of NAND flash memory" "2048 Bytes/page,4096 Bytes/page"
textline " "
bitfld.long 0x00 2. " PageSize_Ext ,NAND flash memory page size" "Large,Small"
bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for NAND flash memory" "4 cycle,5 cycle"
textline " "
bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width of NAND flash memory" "8-bit,?..."
elif (((d.l(ad:0x4e000000))&0x8)==0x0)
group.long 0x00++0x3
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
bitfld.long 0x00 25. " MsgLength ,Message Length For 4/bit ECC" "512-byte,24-byte"
bitfld.long 0x00 23.--24. " ECCType ,ECC Type Selection" "1-bit,8-bit,4-bit,?..."
textline " "
bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. " PageSize ,Page size of NAND flash memory" "512 Bytes/page,2048 Bytes/page"
textline " "
bitfld.long 0x00 2. " PageSize_Ext ,NAND flash memory page size" "Large,Small"
bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for NAND flash memory" "3 cycle,4 cycle"
textline " "
bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width of NAND flash memory" "8-bit,?..."
else
group.long 0x00++0x3
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
bitfld.long 0x00 25. " MsgLength ,Message Length For 4/bit ECC" "512-byte,24-byte"
bitfld.long 0x00 23.--24. " ECCType ,ECC Type Selection" "1-bit,8-bit,4-bit,?..."
textline " "
bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. " PageSize ,Page size of NAND flash memory" "2048 Bytes/page,4096 Bytes/page"
textline " "
bitfld.long 0x00 2. " PageSize_Ext ,NAND flash memory page size" "Large,Small"
bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for NAND flash memory" "4 cycle,5 cycle"
textline " "
bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width of NAND flash memory" "8-bit,?..."
endif
if (((d.l(ad:(0x4e000000+0x4)))&0x01)==0x01)
group.long 0x04++0x3
line.long 0x00 "NFCONT,NAND Flash Control Register"
bitfld.long 0x00 18. " ECCDir ,4-bit,8-bit ECC encoding/decoding control" "Decoding,Encoding"
bitfld.long 0x00 17. " LockTight ,Lock-tight configuration" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SoftLock ,Soft lock configuration" "Disabled,Enabled"
bitfld.long 0x00 12. " EnbECCDecINT ,4-bit,8-bit ECC decoding completion interrupt control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " 8bit_STOP ,8-bit ECC encoding/decoding operation intialization" "Disabled,Enabled"
bitfld.long 0x00 10. " EnbIllegalAccINT ,Illegal access interrupt control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " EnbRnBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled"
bitfld.long 0x00 8. " RnB_TransMode ,RnB transition detection configuration" "Rising edge,Falling edge"
textline " "
bitfld.long 0x00 7. " MainECCLock ,Lock main area ECC generation" "Unlocked,Locked"
bitfld.long 0x00 6. " SpareECCLock ,Lock spare area ECC generation" "Ulocked,Locked"
textline " "
bitfld.long 0x00 5. " InitMECC ,Initialized main area ECC decoder/encoder" "Not initialized,Initialized"
bitfld.long 0x00 4. " InitSECC ,Initialized spare area ECC decoder/encoder" "Not initialized,Initialized"
textline " "
bitfld.long 0x00 2. " Reg_nCE1 ,NAND flash memory nRCS[1] signal control" "Low,High"
bitfld.long 0x00 1. " Reg_nCE0 ,NAND flash memory nFCE signal control" "Low,High"
textline " "
bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled"
else
group.long 0x04++0x3
line.long 0x00 "NFCONT,NAND Flash Control Register"
bitfld.long 0x00 18. " ECCDir ,4-bit,8-bit ECC encoding/decoding control" "Decoding,Encoding"
bitfld.long 0x00 17. " LockTight ,Lock-tight configuration" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SoftLock ,Soft lock configuration" "Disabled,Enabled"
bitfld.long 0x00 12. " EnbECCDecINT ,4-bit,8-bit ECC decoding completion interrupt control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " 8bit_STOP ,8-bit ECC encoding/decoding operation intialization" "Disabled,Enabled"
bitfld.long 0x00 10. " EnbIllegalAccINT ,Illegal access interrupt control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " EnbRnBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled"
bitfld.long 0x00 8. " RnB_TransMode ,RnB transition detection configuration" "Rising edge,Falling edge"
textline " "
bitfld.long 0x00 7. " MainECCLock ,Lock main area ECC generation" "Unlocked,Locked"
bitfld.long 0x00 6. " SpareECCLock ,Lock spare area ECC generation" "Ulocked,Locked"
textline " "
bitfld.long 0x00 5. " InitMECC ,Initialized main area ECC decoder/encoder" "Not initialized,Initialized"
bitfld.long 0x00 4. " InitSECC ,Initialized spare area ECC decoder/encoder" "Not initialized,Initialized"
textline " "
bitfld.long 0x00 2. " Reg_nCE1 ,NAND flash memory nRCS[1] signal control" "Low,High"
bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled"
endif
group.long 0x08++0x1f
line.long 0x00 "NFCMMD,NAND Flash Command Set Register"
hexmask.long.byte 0x00 0.--7. 1. " NFCMMD ,NAND flash memory command value"
line.long 0x04 "NFADDR,NAND Flash Address Set Register"
hexmask.long.byte 0x04 0.--7. 1. " NFADDR ,NAND flash memory address value"
line.long 0x08 "NFDATA,NAND Flash Data Register"
hexmask.long 0x08 0.--31. 1. " NFDATA ,NAND flash read/program data value for I/O"
line.long 0x0c "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read"
hexmask.long.byte 0x0c 16.--23. 1. " ECCData1 ,ECC1 for I/O[7:0]"
hexmask.long.byte 0x0c 0.--7. 1. " ECCData0 ,ECC0 for I/O[7:0]"
line.long 0x10 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read"
hexmask.long.byte 0x10 16.--23. 1. " ECCData3 ,ECC3 for I/O[7:0]"
hexmask.long.byte 0x10 0.--7. 1. " ECCData2 ,ECC2 for I/O[7:0]"
line.long 0x14 "NFSECCD,NAND Flash ECC Register For Spare Area Data Data Read"
hexmask.long.byte 0x14 16.--23. 1. " SECCData1 ,2nd spare area ECC for I/O[7:0]"
hexmask.long.byte 0x14 0.--7. 1. " SECCData0 ,1st spare area ECC for I/O[7:0]"
if (((d.l(ad:(0x4e000000+0x4)))&0x20000)==0x0)
group.long 0x20++0x7
line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address"
hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of block erase operation"
hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of block erase operation"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " SBLK_ADDR0 ,1st block address of block erase operation"
line.long 0x04 "NFEBLK,NAND Flash Programmable End Block Address"
hexmask.long.byte 0x04 16.--23. 1. " EBLK_ADDR2 ,3rd block address of block erase operation"
hexmask.long.byte 0x04 8.--15. 1. " EBLK_ADDR1 ,2nd block address of block erase operation"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " EBLK_ADDR0 ,1st block address of block erase operation"
else
rgroup.long 0x20++0x7
line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address"
hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of block erase operation"
hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of block erase operation"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " SBLK_ADDR0 ,1st block address of block erase operation"
line.long 0x04 "NFEBLK,NAND Flash Programmable End Block Address"
hexmask.long.byte 0x04 16.--23. 1. " EBLK_ADDR2 ,3rd block address of block erase operation"
hexmask.long.byte 0x04 8.--15. 1. " EBLK_ADDR1 ,2nd block address of block erase operation"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " EBLK_ADDR0 ,1st block address of block erase operation"
endif
group.long 0x28++0x3
line.long 0x00 "NFSTAT,NAND Flash Operation Status Register"
eventfld.long 0x00 6. " ECCDecDone ,4-bit ECC decoding finished" "Not finished,Finished"
bitfld.long 0x00 5. " IllegalAccess ,Illegal access" "Not detected,Detected"
textline " "
eventfld.long 0x00 4. " RnB_TransDetect ,RnB low to high transition occurred" "Not occurred,Occurred"
bitfld.long 0x00 3. " NCE[1] ,nCE[1] output status" "Low,High"
textline " "
bitfld.long 0x00 2. " NCE[0] ,nCE[0] output status" "Low,High"
bitfld.long 0x00 0. " RnB ,RnB input status" "Busy,Ready"
if (((d.l(ad:0x4e000000))&0x1800000)==0x00)
rgroup.long 0x2c++0x3
line.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
bitfld.long 0x00 21.--24. " SErrorDataNo ,Number of error data in spare area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--20. " SErrorBitNo ,Number of error bit in spare area" "0,1,2,3,4,5,6,7"
textline " "
hexmask.long.word 0x00 7.--17. 1. " MErrorDataNo ,Number of error data in main area"
bitfld.long 0x00 4.--6. " MErrorBitNo ,Number of error bit in data area" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 2.--3. " SpareError ,Spare area bit fail error occurred" "No error,1-bit,Multiple,Area"
bitfld.long 0x00 0.--1. " MainError ,Main area data fail error occurred" "No error,1-bit,Multiple,Area"
hgroup.long 0x30++0x03
hide.long 0x00 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [7:0]"
rgroup.long 0x34++0x3
line.long 0x00 "NFMECC0,SLC NAND Flash ECC Status Register 0"
hexmask.long.byte 0x00 24.--31. 1. " MECC0_3 ,ECC3 for data[7:0]"
hexmask.long.byte 0x00 16.--23. 1. " MECC0_2 ,ECC2 for data[7:0]"
textline " "
hexmask.long.byte 0x00 8.--15. 1. " MECC0_1 ,ECC1 for data[7:0]"
hexmask.long.byte 0x00 0.--7. 1. " MECC0_0 ,ECC0 for data[7:0]"
hgroup.long 0x38++0x03
hide.long 0x00 "NFMECC1,MLC NAND Flash ECC Status Register 1"
elif (((d.l(ad:0x4e000000))&0x1800000)==0x1000000)
rgroup.long 0x2c++0xf
line.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
bitfld.long 0x00 31. " ECCBusy ,ECC busy" "Idle,Busy"
bitfld.long 0x00 30. " ECCReady ,ECC ready" "Not ready,Ready"
textline " "
bitfld.long 0x00 26.--28. " MLC_MECCError ,4-bit ECC decoding result" "No error,1-bit,2-bit,3-bit,4-bit,Uncorrectable,?..."
textline " "
hexmask.long.word 0x00 16.--25. 1. " 2ndBitErrLoc ,Error byte location of 2nd bit error"
hexmask.long.word 0x00 0.--9. 1. " 1stBitErrLoc ,Error byte location of 1st bit error"
line.long 0x04 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [15:8]"
hexmask.long.word 0x04 16.--25. 1. " 4thBitErrLoc ,Error byte location of 4th bit error"
hexmask.long.word 0x04 0.--9. 1. " 3rdBitErrLoc ,Error byte location of 3rd bit error"
line.long 0x08 "NFMECC0,MLC NAND Flash ECC Status Register 0"
hexmask.long.byte 0x08 24.--31. 1. " 4thPar ,4th check parity generated from main area"
hexmask.long.byte 0x08 16.--23. 1. " 3thPar ,3th check parity generated from main area"
textline " "
hexmask.long.byte 0x08 8.--15. 1. " 2thPar ,2th check parity generated from main area"
hexmask.long.byte 0x08 0.--7. 1. " 1thPar ,1th check parity generated from main area"
line.long 0x0c "NFMECC1,MLC NAND Flash ECC Status Register 1"
hexmask.long.byte 0x0c 16.--23. 1. " 7thPar ,7th check parity generated from main area"
textline " "
hexmask.long.byte 0x0c 8.--15. 1. " 6thPar ,6th check parity generated from main area"
hexmask.long.byte 0x0c 0.--7. 1. " 5thPar ,5th check parity generated from main area"
else
hgroup.long 0x2c++0xf
hide.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
hide.long 0x04 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [15:8]"
hide.long 0x08 "NFMECC0,MLC NAND Flash ECC Status Register 0"
hide.long 0x0c "NFMECC1,MLC NAND Flash ECC Status Register 1"
endif
rgroup.long 0x3c++0x7
line.long 0x00 "NFSECC,NAND Flash ECC Register For I/O[15:0]"
hexmask.long.byte 0x00 8.--15. 1. " SECC0_1 ,Spare area ECC1 status for I/O[15:8]"
hexmask.long.byte 0x00 0.--7. 1. " SECC0_0 ,Spare area ECC0 status for I/O[7:0]"
line.long 0x04 "NFMLCBITPT,NAND Flash 4-bit ECC error pattern register for data[7:0]"
hexmask.long.byte 0x04 24.--31. 1. " 4thErrBitPat ,4th error bit pattern"
hexmask.long.byte 0x04 16.--23. 1. " 3rdErrBitPat ,3rd error bit pattern"
textline " "
hexmask.long.byte 0x04 8.--15. 1. " 2ndErrBitPat ,2nd error bit pattern"
hexmask.long.byte 0x04 0.--7. 1. " 1stErrBitPat ,1st error bit pattern"
rgroup.long 0x44++0xb
line.long 0x00 "NF8ECCERR0,NAND Flash ECC Error Status Register"
bitfld.long 0x00 31. " MLC8ECCBusy ,Indicate the 8-bit ECC decoding enginr is busy" "Idle,Busy"
bitfld.long 0x00 30. " MLC8ECCReady ,ECC ready bit" "Not Ready,Ready"
textline " "
bitfld.long 0x00 25.--28. " MLC8ECCErr ,8-bit ECC decoding result" "No error,1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,Uncorrectable,?..."
hexmask.long.word 0x00 15.--24. 1. " MLC8ECCLoc2 ,Error byte location of 2nd bit error"
textline " "
hexmask.long.word 0x00 0.--9. 1. " MLC8ECCLoc1 ,Error byte location of 1st bit error"
line.long 0x04 "NF8ECCERR1,NAND Flash ECC Error Status Register"
hexmask.long.word 0x04 22.--31. 1. " MLC8ECCLoc5 ,Error byte location of 5th bit error"
hexmask.long.word 0x04 11.--20. 1. " MLC8ECCLoc4 ,Error byte location of 4th bit error"
textline " "
hexmask.long.word 0x04 0.--9. 1. " MLC8ECCLoc3 ,Error byte location of 3rd bit error"
line.long 0x08 "NF8ECCERR2,NAND Flash ECC Error Status Register"
hexmask.long.word 0x08 22.--31. 1. " MLC8ECCLoc8 ,Error byte location of 8th bit error"
hexmask.long.word 0x08 11.--20. 1. " MLC8ECCLoc7 ,Error byte location of 7th bit error"
textline " "
hexmask.long.word 0x08 0.--9. 1. " MLC8ECCLoc6 ,Error byte location of 6th bit error"
rgroup.long 0x50++0x0f
line.long 0x00 "NFM8ECC0,8bit ECC Status Register"
hexmask.long.byte 0x00 24.--31. 1. " 4thParity ,4th check parity generated from main area"
hexmask.long.byte 0x00 16.--23. 1. " 3rdParity ,3rd check parity generated from main area"
textline " "
hexmask.long.byte 0x00 8.--15. 1. " 2ndParity ,2nd check parity generated from main area"
hexmask.long.byte 0x00 0.--7. 1. " 1stParity ,1st check parity generated from main area"
line.long 0x04 "NFM8ECC1,8bit ECC Status Register"
hexmask.long.byte 0x04 24.--31. 1. " 8thParity ,8th check parity generated from main area"
hexmask.long.byte 0x04 16.--23. 1. " 7thParity ,7th check parity generated from main area"
textline " "
hexmask.long.byte 0x04 8.--15. 1. " 6thParity ,6th check parity generated from main area"
hexmask.long.byte 0x04 0.--7. 1. " 5thParity ,5th check parity generated from main area"
line.long 0x08 "NFM8ECC2,8bit ECC Status Register"
hexmask.long.byte 0x08 24.--31. 1. " 12thParity ,12th check parity generated from main area"
hexmask.long.byte 0x08 16.--23. 1. " 11thParity ,11th check parity generated from main area"
textline " "
hexmask.long.byte 0x08 8.--15. 1. " 10thParity ,10th check parity generated from main area"
hexmask.long.byte 0x08 0.--7. 1. " 9thParity ,9th check parity generated from main area"
line.long 0x0c "NFM8ECC3,8bit ECC Status Register"
hexmask.long.byte 0x0c 0.--7. 1. " 13thParity ,13th check parity generated from main area"
rgroup.long 0x60++0x07
line.long 0x00 "NFMLC8BITPT0,NAND Flash 8bit ECC Error Pattern Register 0"
hexmask.long.byte 0x00 24.--31. 1. " 4thErrBitPat ,4th error bit pattern"
hexmask.long.byte 0x00 16.--23. 1. " 3rdErrBitPat ,3rd error bit pattern"
textline " "
hexmask.long.byte 0x00 8.--15. 1. " 2ndErrBitPat ,2nd error bit pattern"
hexmask.long.byte 0x00 0.--7. 1. " 1stErrBitPat ,1st error bit pattern"
line.long 0x04 "NFMLC8BITPT1,NAND Flash 8bit ECC Error Pattern Register 1"
hexmask.long.byte 0x04 24.--31. 1. " 8thErrBitPat ,8th error bit pattern"
hexmask.long.byte 0x04 16.--23. 1. " 7thErrBitPat ,7th error bit pattern"
textline " "
hexmask.long.byte 0x04 8.--15. 1. " 6thErrBitPat ,6th error bit pattern"
hexmask.long.byte 0x04 0.--7. 1. " 5thErrBitPat ,5th error bit pattern"
width 0xb
tree.end
tree.open "DMA Controller"
base ad:0x4b000000
width 12.
tree "Channel 0"
group.long 0x0++0xf
line.long 0x00 "DISRC0,DMA0 Initial Source Register"
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
line.long 0x04 "DISRCC0,DMA0 Initial Source Control Register"
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
line.long 0x08 "DIDST0,DMA0 Initial Destination Register"
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
line.long 0x0c "DIDSTC0,DMA0 Initial Destination Control Register"
bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC reached 0,After auto-reload"
textline " "
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
if (((d.l(ad:(0x4b000000+0x0+0x10)))&0x10000000)==0x10000000)
group.long (0x0+0x10)++0x3
line.long 0x00 "DCON0,DMA0 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 24. " PADDRFIX ,APB address fix control" "Incremented,Fixed"
textline " "
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
textline " "
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
else
group.long (0x0+0x10)++0x3
line.long 0x00 "DCON0,DMA0 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
textline " "
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
endif
rgroup.long (0x0+0x14)++0xb
line.long 0x00 "DSTAT0,DMA0 Count Register"
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
line.long 0x04 "DCSRC0,DMA0 Current Source Register"
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA0"
line.long 0x08 "DCDST0,DMA0 Current Destination Register"
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA0"
group.long (0x0+0x20)++0x7
line.long 0x00 "DMASKTRIG0,DMA0 Mask Trigger Register"
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
textline " "
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
line.long 0x04 "DMAREQSEL0,DMA0 Request Selection Register"
sif (cpu()=="S3C2450")
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,I2S1_TX,I2S1_RX,Reserved,PWM,Reserved,Reserved,PCM0_TX,PCM0_RX,PCM1_TX,PCM1_RX,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
else
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_TX,SPI_RX,Reserved,Reserved,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,Reserved,Reserved,PCM_TX,PCM_RX,Reserved,Reserved,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
endif
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
tree.end
tree "Channel 1"
group.long 0x100++0xf
line.long 0x00 "DISRC1,DMA1 Initial Source Register"
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
line.long 0x04 "DISRCC1,DMA1 Initial Source Control Register"
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
line.long 0x08 "DIDST1,DMA1 Initial Destination Register"
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
line.long 0x0c "DIDSTC1,DMA1 Initial Destination Control Register"
bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC reached 0,After auto-reload"
textline " "
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
if (((d.l(ad:(0x4b000000+0x100+0x10)))&0x10000000)==0x10000000)
group.long (0x100+0x10)++0x3
line.long 0x00 "DCON1,DMA1 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 24. " PADDRFIX ,APB address fix control" "Incremented,Fixed"
textline " "
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
textline " "
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
else
group.long (0x100+0x10)++0x3
line.long 0x00 "DCON1,DMA1 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
textline " "
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
endif
rgroup.long (0x100+0x14)++0xb
line.long 0x00 "DSTAT1,DMA1 Count Register"
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
line.long 0x04 "DCSRC1,DMA1 Current Source Register"
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA1"
line.long 0x08 "DCDST1,DMA1 Current Destination Register"
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA1"
group.long (0x100+0x20)++0x7
line.long 0x00 "DMASKTRIG1,DMA1 Mask Trigger Register"
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
textline " "
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
line.long 0x04 "DMAREQSEL1,DMA1 Request Selection Register"
sif (cpu()=="S3C2450")
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,I2S1_TX,I2S1_RX,Reserved,PWM,Reserved,Reserved,PCM0_TX,PCM0_RX,PCM1_TX,PCM1_RX,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
else
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_TX,SPI_RX,Reserved,Reserved,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,Reserved,Reserved,PCM_TX,PCM_RX,Reserved,Reserved,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
endif
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
tree.end
tree "Channel 2"
group.long 0x200++0xf
line.long 0x00 "DISRC2,DMA2 Initial Source Register"
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
line.long 0x04 "DISRCC2,DMA2 Initial Source Control Register"
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
line.long 0x08 "DIDST2,DMA2 Initial Destination Register"
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
line.long 0x0c "DIDSTC2,DMA2 Initial Destination Control Register"
bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC reached 0,After auto-reload"
textline " "
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
if (((d.l(ad:(0x4b000000+0x200+0x10)))&0x10000000)==0x10000000)
group.long (0x200+0x10)++0x3
line.long 0x00 "DCON2,DMA2 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 24. " PADDRFIX ,APB address fix control" "Incremented,Fixed"
textline " "
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
textline " "
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
else
group.long (0x200+0x10)++0x3
line.long 0x00 "DCON2,DMA2 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
textline " "
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
endif
rgroup.long (0x200+0x14)++0xb
line.long 0x00 "DSTAT2,DMA2 Count Register"
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
line.long 0x04 "DCSRC2,DMA2 Current Source Register"
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA2"
line.long 0x08 "DCDST2,DMA2 Current Destination Register"
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA2"
group.long (0x200+0x20)++0x7
line.long 0x00 "DMASKTRIG2,DMA2 Mask Trigger Register"
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
textline " "
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
line.long 0x04 "DMAREQSEL2,DMA2 Request Selection Register"
sif (cpu()=="S3C2450")
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,I2S1_TX,I2S1_RX,Reserved,PWM,Reserved,Reserved,PCM0_TX,PCM0_RX,PCM1_TX,PCM1_RX,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
else
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_TX,SPI_RX,Reserved,Reserved,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,Reserved,Reserved,PCM_TX,PCM_RX,Reserved,Reserved,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
endif
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
tree.end
tree "Channel 3"
group.long 0x300++0xf
line.long 0x00 "DISRC3,DMA3 Initial Source Register"
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
line.long 0x04 "DISRCC3,DMA3 Initial Source Control Register"
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
line.long 0x08 "DIDST3,DMA3 Initial Destination Register"
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
line.long 0x0c "DIDSTC3,DMA3 Initial Destination Control Register"
bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC reached 0,After auto-reload"
textline " "
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
if (((d.l(ad:(0x4b000000+0x300+0x10)))&0x10000000)==0x10000000)
group.long (0x300+0x10)++0x3
line.long 0x00 "DCON3,DMA3 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 24. " PADDRFIX ,APB address fix control" "Incremented,Fixed"
textline " "
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
textline " "
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
else
group.long (0x300+0x10)++0x3
line.long 0x00 "DCON3,DMA3 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
textline " "
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
endif
rgroup.long (0x300+0x14)++0xb
line.long 0x00 "DSTAT3,DMA3 Count Register"
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
line.long 0x04 "DCSRC3,DMA3 Current Source Register"
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA3"
line.long 0x08 "DCDST3,DMA3 Current Destination Register"
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA3"
group.long (0x300+0x20)++0x7
line.long 0x00 "DMASKTRIG3,DMA3 Mask Trigger Register"
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
textline " "
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
line.long 0x04 "DMAREQSEL3,DMA3 Request Selection Register"
sif (cpu()=="S3C2450")
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,I2S1_TX,I2S1_RX,Reserved,PWM,Reserved,Reserved,PCM0_TX,PCM0_RX,PCM1_TX,PCM1_RX,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
else
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_TX,SPI_RX,Reserved,Reserved,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,Reserved,Reserved,PCM_TX,PCM_RX,Reserved,Reserved,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
endif
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
tree.end
tree "Channel 4"
group.long 0x400++0xf
line.long 0x00 "DISRC4,DMA4 Initial Source Register"
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
line.long 0x04 "DISRCC4,DMA4 Initial Source Control Register"
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
line.long 0x08 "DIDST4,DMA4 Initial Destination Register"
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
line.long 0x0c "DIDSTC4,DMA4 Initial Destination Control Register"
bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC reached 0,After auto-reload"
textline " "
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
if (((d.l(ad:(0x4b000000+0x400+0x10)))&0x10000000)==0x10000000)
group.long (0x400+0x10)++0x3
line.long 0x00 "DCON4,DMA4 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 24. " PADDRFIX ,APB address fix control" "Incremented,Fixed"
textline " "
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
textline " "
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
else
group.long (0x400+0x10)++0x3
line.long 0x00 "DCON4,DMA4 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
textline " "
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
endif
rgroup.long (0x400+0x14)++0xb
line.long 0x00 "DSTAT4,DMA4 Count Register"
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
line.long 0x04 "DCSRC4,DMA4 Current Source Register"
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA4"
line.long 0x08 "DCDST4,DMA4 Current Destination Register"
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA4"
group.long (0x400+0x20)++0x7
line.long 0x00 "DMASKTRIG4,DMA4 Mask Trigger Register"
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
textline " "
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
line.long 0x04 "DMAREQSEL4,DMA4 Request Selection Register"
sif (cpu()=="S3C2450")
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,I2S1_TX,I2S1_RX,Reserved,PWM,Reserved,Reserved,PCM0_TX,PCM0_RX,PCM1_TX,PCM1_RX,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
else
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_TX,SPI_RX,Reserved,Reserved,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,Reserved,Reserved,PCM_TX,PCM_RX,Reserved,Reserved,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
endif
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
tree.end
tree "Channel 5"
group.long 0x500++0xf
line.long 0x00 "DISRC5,DMA5 Initial Source Register"
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
line.long 0x04 "DISRCC5,DMA5 Initial Source Control Register"
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
line.long 0x08 "DIDST5,DMA5 Initial Destination Register"
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
line.long 0x0c "DIDSTC5,DMA5 Initial Destination Control Register"
bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC reached 0,After auto-reload"
textline " "
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
if (((d.l(ad:(0x4b000000+0x500+0x10)))&0x10000000)==0x10000000)
group.long (0x500+0x10)++0x3
line.long 0x00 "DCON5,DMA5 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 24. " PADDRFIX ,APB address fix control" "Incremented,Fixed"
textline " "
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
textline " "
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
else
group.long (0x500+0x10)++0x3
line.long 0x00 "DCON5,DMA5 Control Register"
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
textline " "
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
textline " "
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
textline " "
bitfld.long 0x00 20.--21. " DSZ ,Data size" "Byte,Half word,Word,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
endif
rgroup.long (0x500+0x14)++0xb
line.long 0x00 "DSTAT5,DMA5 Count Register"
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
line.long 0x04 "DCSRC5,DMA5 Current Source Register"
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA5"
line.long 0x08 "DCDST5,DMA5 Current Destination Register"
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA5"
group.long (0x500+0x20)++0x7
line.long 0x00 "DMASKTRIG5,DMA5 Mask Trigger Register"
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
textline " "
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
line.long 0x04 "DMAREQSEL5,DMA5 Request Selection Register"
sif (cpu()=="S3C2450")
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,I2S1_TX,I2S1_RX,Reserved,PWM,Reserved,Reserved,PCM0_TX,PCM0_RX,PCM1_TX,PCM1_RX,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
else
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_TX,SPI_RX,Reserved,Reserved,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,Reserved,Reserved,PCM_TX,PCM_RX,Reserved,Reserved,Reserved,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],UART_3[0],UART_3[1],PCMOUT,PCMIN,MICIN,?..."
endif
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
tree.end
width 0xb
tree.end
tree "INTC (Interrupt Controller)"
base ad:0x4a000000
width 12.
group.long 0x00++0x03
line.long 0x00 "SRCPND1,Source Pending Register 1"
bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
endif
textline " "
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 27. " INT_IIC0 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 24. " INT_NAND ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 21. " INT_SDI0 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 20. " INT_SDI1 ,Interrupt request status" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 19. " INT_CFCON ,Interrupt request status" "Not requested,Requested"
endif
bitfld.long 0x00 18. " INT_UART3 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 17. " INT_DMA ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 9. " INT_WDT/AC97 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 8. " INT_TICK ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request status" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 6. " INT_CAM ,Interrupt request status" "Not requested,Requested"
endif
bitfld.long 0x00 5. " EINT8_15 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " EINT4_7 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 3. " EINT3 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 2. " EINT2 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 1. " EINT1 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 0. " EINT0 ,Interrupt request status" "Not requested,Requested"
group.long 0x40++0x03
line.long 0x00 "SRCPND2,Source Pending Register 2"
sif (cpu()=="S3C2450")
bitfld.long 0x00 7. " INT_I2S1 ,Interrupt request status" "Not requested,Requested"
textline " "
endif
bitfld.long 0x00 6. " INT_I2S0 ,Interrupt request status" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 5. " INT_PCM1 ,Interrupt request status" "Not requested,Requested"
endif
bitfld.long 0x00 4. " INT_PCM0 ,Interrupt request status" "Not requested,Requested"
textline " "
sif (cpu()=="S3C2450")
bitfld.long 0x00 1. " INT_IIC1 ,Interrupt request status" "Not requested,Requested"
textline " "
endif
bitfld.long 0x00 0. " INT_2D ,Interrupt request status" "Not requested,Requested"
group.long 0x04++0x03
line.long 0x00 "INTMOD1,Interrupt Mode Register 1"
bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ"
endif
textline " "
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 27. " INT_IIC0 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 24. " INT_NAND ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 21. " INT_SDI0 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 20. " INT_SDI1 ,Interrupt mode" "IRQ,FIQ"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 19. " INT_CFCON ,Interrupt mode" "IRQ,FIQ"
endif
bitfld.long 0x00 18. " INT_UART2 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 17. " INT_DMA ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 9. " INT_WDT/AC97 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 8. " INT_TICK ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 6. " INT_CAM ,Interrupt mode" "IRQ,FIQ"
endif
bitfld.long 0x00 5. " EINT8_15 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 4. " EINT4_7 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 3. " EINT3 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 2. " EINT2 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x00 1. " EINT1 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x00 0. " EINT0 ,Interrupt mode" "IRQ,FIQ"
group.long 0x44++0x03
line.long 0x00 "INTMOD2,Interrupt Mode Register 2"
sif (cpu()=="S3C2450")
bitfld.long 0x00 7. " INT_I2S1 ,Interrupt mode" "IRQ,FIQ"
textline " "
endif
bitfld.long 0x00 6. " INT_I2S0 ,Interrupt mode" "IRQ,FIQ"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 5. " INT_PCM1 ,Interrupt mode" "IRQ,FIQ"
endif
bitfld.long 0x00 4. " INT_PCM0 ,Interrupt mode" "IRQ,FIQ"
textline " "
sif (cpu()=="S3C2450")
bitfld.long 0x00 1. " INT_IIC1 ,Interrupt mode" "IRQ,FIQ"
textline " "
endif
bitfld.long 0x00 0. " INT_2D ,Interrupt mode" "IRQ,FIQ"
group.long 0x08++0x03
line.long 0x00 "INTMSK1,Interrupt Mask Register 1"
bitfld.long 0x00 31. " INT_ADC ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 30. " INT_RTC ,Interrupt mask" "Not masked,Masked"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mask" "Not masked,Masked"
endif
textline " "
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 27. " INT_IIC0 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 26. " INT_USBH ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 25. " INT_USBD ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 24. " INT_NAND ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 21. " INT_SDI0 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 20. " INT_SDI1 ,Interrupt mask" "Not masked,Masked"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 19. " INT_CFCON ,Interrupt mask" "Not masked,Masked"
endif
bitfld.long 0x00 18. " INT_UART3 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 17. " INT_DMA ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 16. " INT_LCD ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 9. " INT_WDT/AC97 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 8. " INT_TICK ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mask" "Not masked,Masked"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 6. " INT_CAM ,Interrupt mask" "Not masked,Masked"
endif
bitfld.long 0x00 5. " EINT8_15 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 4. " EINT4_7 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 3. " EINT3 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 2. " EINT2 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 1. " EINT1 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 0. " EINT0 ,Interrupt mask" "Not masked,Masked"
group.long 0x48++0x03
line.long 0x00 "INTMSK2,Interrupt Mask Register 2"
sif (cpu()=="S3C2450")
bitfld.long 0x00 7. " INT_I2S1 ,Interrupt mask" "Not masked,Masked"
textline " "
endif
bitfld.long 0x00 6. " INT_I2S0 ,Interrupt mask" "Not masked,Masked"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 5. " INT_PCM1 ,Interrupt mask" "Not masked,Masked"
endif
bitfld.long 0x00 4. " INT_PCM0 ,Interrupt mask" "Not masked,Masked"
textline " "
sif (cpu()=="S3C2450")
bitfld.long 0x00 1. " INT_IIC1 ,Interrupt mask" "Not masked,Masked"
textline " "
endif
bitfld.long 0x00 0. " INT_2D ,Interrupt mask" "Not masked,Masked"
group.long 0x10++0x3
line.long 0x00 "INTPND1,Interrupt Request Status Register 1"
bitfld.long 0x00 31. " INT_ADC ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 30. " INT_RTC ,Interrupt request" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request" "Not requested,Requested"
endif
textline " "
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 27. " INT_IIC0 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 26. " INT_USBH ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 25. " INT_USBD ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 24. " INT_NAND ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 21. " INT_SDI0 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 20. " INT_SDI1 ,Interrupt request" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 19. " INT_CFCON ,Interrupt request" "Not requested,Requested"
endif
bitfld.long 0x00 18. " INT_UART3 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 17. " INT_DMA ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 16. " INT_LCD ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 9. " INT_WDT/AC97 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 8. " INT_TICK ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request" "Not requested,Requested"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 6. " INT_CAM ,Interrupt request" "Not requested,Requested"
endif
bitfld.long 0x00 5. " EINT8_15 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " EINT4_7 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 3. " EINT3 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 2. " EINT2 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 1. " EINT1 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 0. " EINT0 ,Interrupt request" "Not requested,Requested"
group.long 0x50++0x3
line.long 0x00 "INTPND2,Interrupt Request Status Register 2"
bitfld.long 0x00 7. " INT_I2S1 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 6. " INT_I2S1 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 5. " INT_PCM1 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 4. " INT_PCM0 ,Interrupt request" "Not requested,Requested"
textline " "
bitfld.long 0x00 1. " INT_IIC1 ,Interrupt request" "Not requested,Requested"
bitfld.long 0x00 0. " INT_2D ,Interrupt request" "Not requested,Requested"
rgroup.long 0x14++0x3
line.long 0x00 "INTOFFSET1,Interrupt Offset Register 1"
bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "Low,High"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "Low,High"
endif
textline " "
bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 27. " INT_IIC0 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 24. " INT_NAND ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 21. " INT_SDI0 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 20. " INT_SDI1 ,IRQ interrupt request source" "Low,High"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 19. " INT_CFCON ,IRQ interrupt request source" "Low,High"
endif
bitfld.long 0x00 18. " INT_UART3 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 17. " INT_DMA ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 9. " INT_WDT/AC97 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 8. " INT_TICK ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 7. " nBATT_FLT ,IRQ interrupt request source" "Low,High"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 6. " INT_CAM ,IRQ interrupt request source" "Low,High"
endif
bitfld.long 0x00 5. " EINT8_15 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 4. " EINT4_7 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 3. " EINT3 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 2. " EINT2 ,IRQ interrupt request source" "Low,High"
bitfld.long 0x00 1. " EINT1 ,IRQ interrupt request source" "Low,High"
textline " "
bitfld.long 0x00 0. " EINT0 ,IRQ interrupt request source" "Low,High"
rgroup.long 0x54++0x3
line.long 0x00 "INTOFFSET2,Interrupt Offset Register 2"
sif (cpu()=="S3C2450")
bitfld.long 0x00 7. " INT_I2S1 ,IRQ interrupt request source" "Low,High"
textline " "
endif
bitfld.long 0x00 6. " INT_I2S0 ,IRQ interrupt request source" "Low,High"
sif (cpu()=="S3C2450")
textline " "
bitfld.long 0x00 5. " INT_PCM1 ,IRQ interrupt request source" "Low,High"
endif
bitfld.long 0x00 4. " INT_PCM0 ,IRQ interrupt request source" "Low,High"
textline " "
sif (cpu()=="S3C2450")
bitfld.long 0x00 1. " INT_IIC1 ,IRQ interrupt request source" "Low,High"
textline " "
endif
bitfld.long 0x00 0. " INT_2D ,IRQ interrupt request source" "Low,High"
group.long 0x18++0x3
line.long 0x00 "SUBSRCPND,Sub Source Pending Register"
sif (cpu()=="S3C2450")
bitfld.long 0x00 30. " SUBINT_DMA7 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 29. " SUBINT_DMA6 ,Interrupt request status" "Not requested,Requested"
textline " "
endif
bitfld.long 0x00 28. " SUBINT_AC97 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 27. " SUBINT_WDT ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 26. " SUBINT_ERR3 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 25. " SUBINT_TXD3 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 24. " SUBINT_RXD3 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 23. " SUBINT_DMA5 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 22. " SUBINT_DMA4 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 21. " SUBINT_DMA3 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 20. " SUBINT_DMA2 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 19. " SUBINT_DMA1 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " SUBINT_DMA0 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 17. " SUBINT_LCD4 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " SUBINT_LCD3 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 15. " SUBINT_LCD2 ,Interrupt request status" "Not requested,Requested"
textline " "
sif (cpu()=="S3C2450")
bitfld.long 0x00 12. " SUBINT_CAM_P ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 11. " SUBINT_CAM_C,Interrupt request status" "Not requested,Requested"
textline " "
endif
bitfld.long 0x00 10. " SUBINT_ADC ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 9. " SUBINT_TC ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 8. " SUBINT_ERR2 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 7. " SUBINT_TXD2 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 6. " SUBINT_RXD2 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 5. " SUBINT_ERR1 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " SUBINT_TXD1 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 3. " SUBINT_RXD1 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 2. " SUBINT_ERR0 ,Interrupt request status" "Not requested,Requested"
bitfld.long 0x00 1. " SUBINT_TXD0 ,Interrupt request status" "Not requested,Requested"
textline " "
bitfld.long 0x00 0. " SUBINT_RXD0 ,Interrupt request status" "Not requested,Requested"
group.long 0x1c++0x3
line.long 0x00 "INTSUBMSK,Interrupt Sub Mask Register"
sif (cpu()=="S3C2450")
bitfld.long 0x00 30. " SUBINT_DMA7 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 29. " SUBINT_DMA6 ,Interrupt mask" "Not masked,Masked"
textline " "
endif
bitfld.long 0x00 28. " SUBINT_AC97 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 27. " SUBINT_WDT ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 26. " SUBINT_ERR3 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 25. " SUBINT_TXD3 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 24. " SUBINT_RXD3 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 23. " SUBINT_DMA5 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 22. " SUBINT_DMA4 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 21. " SUBINT_DMA3 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 20. " SUBINT_DMA2 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 19. " SUBINT_DMA1 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 18. " SUBINT_DMA0 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 17. " SUBINT_LCD4 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 16. " SUBINT_LCD3 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 15. " SUBINT_LCD2 ,Interrupt mask" "Not masked,Masked"
textline " "
sif (cpu()=="S3C2450")
bitfld.long 0x00 12. " SUBINT_CAM_P ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 11. " SUBINT_CAM_C,Interrupt mask" "Not masked,Masked"
textline " "
endif
bitfld.long 0x00 10. " SUBINT_ADC ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 9. " SUBINT_TC ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 8. " SUBINT_ERR2 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 7. " SUBINT_TXD2 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 6. " SUBINT_RXD2 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 5. " SUBINT_ERR1 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 4. " SUBINT_TXD1 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 3. " SUBINT_RXD1 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 2. " SUBINT_ERR0 ,Interrupt mask" "Not masked,Masked"
bitfld.long 0x00 1. " SUBINT_TXD0 ,Interrupt mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 0. " SUBINT_RXD0 ,Interrupt mask" "Not masked,Masked"
width 16.
group.long 0x30++0x03
line.long 0x00 "PRIORITY_MODE1,IRQ Priority Control Register 1"
bitfld.long 0x00 27. " ARB_MODE6 ,Arbiter 6 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 24.--26. " ARB_SEL6 ,Arbiter 6 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 23. " ARB_MODE5 ,Arbiter 5 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 20.--22. " ARB_SEL5 ,Arbiter 5 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 19. " ARB_MODE4 ,Arbiter 5 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 16.--18. " ARB_SEL4 ,Arbiter 4 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 15. " ARB_MODE3 ,Arbiter 3 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 12.--14. " ARB_SEL3 ,Arbiter 3 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 11. " ARB_MODE2 ,Arbiter 2 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 8.--10. " ARB_SEL2 ,Arbiter 2 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 7. " ARB_MODE1 ,Arbiter 1 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 4.--6. " ARB_SEL1 ,Arbiter 1 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 3. " ARB_MODE0 ,Arbiter 0 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 0.--2. " ARB_SEL0 ,Arbiter 0 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
group.long 0x70++0x03
line.long 0x00 "PRIORITY_MODE2,IRQ Priority Control Register 2"
bitfld.long 0x00 27. " ARB_MODE13 ,Arbiter 13 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 24.--26. " ARB_SEL13 ,Arbiter 13 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 23. " ARB_MODE12 ,Arbiter 12 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 20.--22. " ARB_SEL12 ,Arbiter 12 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 19. " ARB_MODE11 ,Arbiter 11 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 16.--18. " ARB_SEL11 ,Arbiter 11 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 15. " ARB_MODE10 ,Arbiter 10 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 12.--14. " ARB_SEL10 ,Arbiter 10 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 11. " ARB_MODE9 ,Arbiter 9 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 8.--10. " ARB_SEL9 ,Arbiter 9 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 7. " ARB_MODE8 ,Arbiter 8 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 4.--6. " ARB_SEL8 ,Arbiter 8 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
textline " "
bitfld.long 0x00 3. " ARB_MODE7 ,Arbiter 7 group priority mode selection" "Fixed ends,Rotate all"
bitfld.long 0x00 0.--2. " ARB_SEL7 ,Arbiter 7 group priority order set (Fixed ends/Rotate all)" "REQ 0-1-2-3-4-5/0-1-2-3-4-5,REQ 0-2-3-4-1-5/1-2-3-4-5-0,REQ 0-3-4-1-2-5/2-3-4-5-0-1,REQ 0-4-1-2-3-5/3-4-5-0-1-2,Reserved/REQ 4-5-0-1-2-3,Reserved/REQ 5-0-1-2-3-4,?..."
width 18.
group.long 0x34++0x03
line.long 0x00 "PRIORITY_UPDATE1,IRQ Priority Update Register 1"
bitfld.long 0x00 6. " ARB_UPDATE6 ,Arbiter 6 group priority rotate enable" "Disabled,Enabled"
bitfld.long 0x00 5. " ARB_UPDATE5 ,Arbiter 5 group priority rotate enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ARB_UPDATE4 ,Arbiter 4 group priority rotate enable" "Disabled,Enabled"
bitfld.long 0x00 3. " ARB_UPDATE3 ,Arbiter 3 group priority rotate enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " ARB_UPDATE2 ,Arbiter 2 group priority rotate enable" "Disabled,Enabled"
bitfld.long 0x00 1. " ARB_UPDATE1 ,Arbiter 1 group priority rotate enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " ARB_UPDATE0 ,Arbiter 0 group priority rotate enable" "Disabled,Enabled"
group.long 0x74++0x03
line.long 0x00 "PRIORITY_UPDATE2,IRQ Priority Update Register 2"
bitfld.long 0x00 6. " ARB_UPDATE13 ,Arbiter 13 group priority rotate enable" "Disabled,Enabled"
bitfld.long 0x00 5. " ARB_UPDATE13 ,Arbiter 13 group priority rotate enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ARB_UPDATE11 ,Arbiter 11 group priority rotate enable" "Disabled,Enabled"
bitfld.long 0x00 3. " ARB_UPDATE10 ,Arbiter 10 group priority rotate enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " ARB_UPDATE9 ,Arbiter 9 group priority rotate enable" "Disabled,Enabled"
bitfld.long 0x00 1. " ARB_UPDATE8 ,Arbiter 8 group priority rotate enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " ARB_UPDATE7 ,Arbiter 7 group priority rotate enable" "Disabled,Enabled"
width 0xb
tree.end
tree.open "I/O Ports"
base ad:0x56000000
tree "Port A"
width 8.
group.long 0x00++0x7
line.long 0x00 "GPACON,Port A Control Register"
bitfld.long 0x0 26. " GPA26 ,Pin26 mode" "Output,DQM3"
bitfld.long 0x0 25. " GPA25 ,Pin25 mode" "Output,DQM2"
bitfld.long 0x0 24. " GPA24 ,Pin24 mode" "Output,RSMAVD"
textline " "
bitfld.long 0x0 23. " GPA23 ,Pin23 mode" "Output,RSMCLK"
bitfld.long 0x0 22. " GPA22 ,Pin22 mode" "Output,nFCE"
bitfld.long 0x0 21. " GPA21 ,Pin21 mode" "Output,nRSTOUT"
textline " "
bitfld.long 0x0 20. " GPA20 ,Pin20 mode" "Output,nFRE"
bitfld.long 0x0 19. " GPA19 ,Pin19 mode" "Output,nFWE"
bitfld.long 0x0 18. " GPA18 ,Pin18 mode" "Output,ALE"
textline " "
bitfld.long 0x0 17. " GPA17 ,Pin17 mode" "Output,CLE"
bitfld.long 0x0 16. " GPA16 ,Pin16 mode" "Output,nRCS5"
bitfld.long 0x0 15. " GPA15 ,Pin15 mode" "Output,nRCS4"
textline " "
bitfld.long 0x0 14. " GPA14 ,Pin14 mode" "Output,nRCS3"
bitfld.long 0x0 13. " GPA13 ,Pin13 mode" "Output,nRCS2"
bitfld.long 0x0 12. " GPA12 ,Pin12 mode" "Output,nRCS1"
textline " "
bitfld.long 0x0 10. " GPA10 ,Pin10 mode" "Reserved,RADDR25"
bitfld.long 0x0 9. " GPA9 ,Pin9 mode" "Output,RADDR24"
bitfld.long 0x0 8. " GPA8 ,Pin8 mode" "Output,RADDR23"
textline " "
bitfld.long 0x0 7. " GPA7 ,Pin7 mode" "Output,RADDR22"
bitfld.long 0x0 6. " GPA6 ,Pin6 mode" "Output,RADDR21"
bitfld.long 0x0 5. " GPA5 ,Pin5 mode" "Output,RADDR20"
textline " "
bitfld.long 0x0 4. " GPA4 ,Pin4 mode" "Output,RADDR19"
bitfld.long 0x0 3. " GPA3 ,Pin3 mode" "Output,RADDR18"
bitfld.long 0x0 2. " GPA2 ,Pin2 mode" "Output,RADDR17"
textline " "
bitfld.long 0x0 1. " GPA1 ,Pin1 mode" "Output,RADDR16"
bitfld.long 0x0 0. " GPA0 ,Pin0 mode" "Output,RADDR0"
line.long 0x04 "GPDAT,Port A Data Register"
bitfld.long 0x4 26. " GPA26 ,Pin state" "Low,High"
bitfld.long 0x4 25. " GPA25 ,Pin state" "Low,High"
bitfld.long 0x4 24. " GPA24 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 23. " GPA23 ,Pin state" "Low,High"
bitfld.long 0x4 22. " GPA22 ,Pin state" "Low,High"
bitfld.long 0x4 21. " GPA21 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 20. " GPA20 ,Pin state" "Low,High"
bitfld.long 0x4 19. " GPA19 ,Pin state" "Low,High"
bitfld.long 0x4 18. " GPA18 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 17. " GPA17 ,Pin state" "Low,High"
bitfld.long 0x4 16. " GPA16 ,Pin state" "Low,High"
bitfld.long 0x4 15. " GPA15 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 14. " GPA14 ,Pin state" "Low,High"
bitfld.long 0x4 13. " GPA13 ,Pin state" "Low,High"
bitfld.long 0x4 12. " GPA12 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 9. " GPA9 ,Pin state" "Low,High"
bitfld.long 0x4 8. " GPA8 ,Pin state" "Low,High"
bitfld.long 0x4 7. " GPA7 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 6. " GPA6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPA5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPA4 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 3. " GPA3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPA2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPA1 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 0. " GPA0 ,Pin state" "Low,High"
tree.end
tree "Port B"
width 8.
group.long 0x10++0xf
line.long 0x00 "GPBCON,Port B Control Register"
bitfld.long 0x0 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,XDREQ0"
bitfld.long 0x0 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,XDACK0"
bitfld.long 0x0 12.--13. " GPB6 ,Pin6 mode" "Input,Output,nXBREQ,XBREQ"
textline " "
bitfld.long 0x0 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,XBACK"
bitfld.long 0x0 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK,?..."
bitfld.long 0x0 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..."
textline " "
bitfld.long 0x0 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..."
bitfld.long 0x0 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..."
bitfld.long 0x0 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..."
line.long 0x04 "GPBDAT,Port B Data Register"
bitfld.long 0x4 10. " GPB10 ,Pin state" "Low,High"
bitfld.long 0x4 9. " GPB9 ,Pin state" "Low,High"
bitfld.long 0x4 6. " GPB6 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 5. " GPB5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPB4 ,Pin state" "Low,High"
bitfld.long 0x4 3. " GPB3 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 2. " GPB2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPB1 ,Pin state" "Low,High"
bitfld.long 0x4 0. " GPB0 ,Pin state" "Low,High"
line.long 0x08 "GPBUDP,Port B Pull-up/down Control Register"
bitfld.long 0x08 20.--21. " GPBUDP10 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 18.--19. " GPBUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 12.--13. " GPBUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 10.--11. " GPBUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 8.--9. " GPBUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 6.--7. " GPBUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 4.--5. " GPBUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 2.--3. " GPBUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 0.--1. " GPBUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
line.long 0x0c "GPBSEL,Selects The Function Of Port B"
bitfld.long 0xc 4. " GPB10SEL ,Pin 10 function" "GPB10,I2SSDO_2"
bitfld.long 0xc 3. " GPB9SEL ,Pin 9 function" "GPB9,I2SSDO_1"
bitfld.long 0xc 0. " GPB6SEL ,Pin 6 function" "GPB6,RTCK"
tree.end
tree "Port C"
width 8.
group.long 0x20++0x0b
line.long 0x00 "GPCCON,Port C Control Register"
bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,RGB/SYS_VD[7],?..."
bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,RGB/SYS_VD[6],?..."
bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,RGB/SYS_VD[5],?..."
textline " "
bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,RGB/SYS_VD[4],?..."
bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,RGB/SYS_VD[3],?..."
bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,RGB/SYS_VD[2],?..."
textline " "
bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,RGB/SYS_VD[1],?..."
bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,RGB/SYS_VD[0],?..."
bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,?..."
textline " "
bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,?..."
bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,?..."
bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,RGB_VDEN/SYS_RS,?..."
textline " "
bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,RGB_VSYN/SYS_CS1,?..."
bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,RGB_HSYN/SYS_CS0,?..."
bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,RGB_VCLK/SYS_WR,?..."
textline " "
bitfld.long 0x00 0.--1. " GPC0 ,Pin0 mode" "Input,Output,RGB_LEND/SYS_OE,?..."
line.long 0x04 "GPCDAT,Port C Data Register"
bitfld.long 0x4 15. " GPC15 ,Pin state" "Low,High"
bitfld.long 0x4 14. " GPC14 ,Pin state" "Low,High"
bitfld.long 0x4 13. " GPC13 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 12. " GPC12 ,Pin state" "Low,High"
bitfld.long 0x4 11. " GPC11 ,Pin state" "Low,High"
bitfld.long 0x4 10. " GPC10 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 9. " GPC9 ,Pin state" "Low,High"
bitfld.long 0x4 8. " GPC8 ,Pin state" "Low,High"
bitfld.long 0x4 7. " GPC7 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 6. " GPC6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPC5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPC4 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 3. " GPC3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPC2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPC1 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 0. " GPC0 ,Pin state" "Low,High"
line.long 0x08 "GPCUDP,Port C Pull-up/down Control Register"
bitfld.long 0x08 30.--31. " GPCUDP15 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 28.--29. " GPCUDP14 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 26.--27. " GPCUDP13 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 24.--25. " GPCUDP12 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 22.--23. " GPCUDP11 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 20.--21. " GPCUDP10 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 18.--19. " GPCUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 16.--17. " GPCUDP8 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 14.--15. " GPCUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 12.--13. " GPCUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 10.--11. " GPCUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 8.--9. " GPCUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 6.--7. " GPCUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 4.--5. " GPCUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 2.--3. " GPCUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 0.--1. " GPCUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port D"
width 8.
group.long 0x30++0x0b
line.long 0x00 "GPDCON,Port D Control Register"
bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,RGB_VD23,?..."
bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,RGB_VD22,?..."
bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,RGB_VD21,?..."
textline " "
bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,RGB_VD20,?..."
bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,RGB_VD19,?..."
bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,RGB_VD18,?..."
textline " "
bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,RGB/SYS_VD17,?..."
bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,RGB/SYS_VD16,?..."
bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,RGB/SYS_VD15,?..."
textline " "
bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,RGB/SYS_VD14,?..."
bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,RGB/SYS_VD13,?..."
bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,RGB/SYS_VD12,?..."
textline " "
bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,RGB/SYS_VD11,?..."
bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,RGB/SYS_VD10,?..."
bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,RGB/SYS_VD9,?..."
textline " "
bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,RGB/SYS_VD8,?..."
line.long 0x04 "GPDDAT,Port D Data Register"
bitfld.long 0x4 15. " GPD15 ,Pin state" "Low,High"
bitfld.long 0x4 14. " GPD14 ,Pin state" "Low,High"
bitfld.long 0x4 13. " GPD13 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 12. " GPD12 ,Pin state" "Low,High"
bitfld.long 0x4 11. " GPD11 ,Pin state" "Low,High"
bitfld.long 0x4 10. " GPD10 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 9. " GPD9 ,Pin state" "Low,High"
bitfld.long 0x4 8. " GPD8 ,Pin state" "Low,High"
bitfld.long 0x4 7. " GPD7 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 6. " GPD6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPD5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPD4 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 3. " GPD3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPD2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPD1 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 0. " GPD0 ,Pin state" "Low,High"
line.long 0x08 "GPDUDP,Port D Pull-up/down Control Register"
bitfld.long 0x08 30.--31. " GPDUDP15 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 28.--29. " GPDUDP14 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 26.--27. " GPDUDP13 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 24.--25. " GPDUDP12 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 22.--23. " GPDUDP11 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 20.--21. " GPDUDP10 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 18.--19. " GPDUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 16.--17. " GPDUDP8 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 14.--15. " GPDUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 12.--13. " GPDUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 10.--11. " GPDUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 8.--9. " GPDUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 6.--7. " GPDUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 4.--5. " GPDUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x08 2.--3. " GPDUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x08 0.--1. " GPDUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port E"
width 8.
group.long 0x40++0xf
line.long 0x00 "GPECON,Port E Control Register"
bitfld.long 0x00 30.--31. " GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..."
bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..."
bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..."
textline " "
bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..."
bitfld.long 0x00 22.--23. " GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..."
bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SD0_DAT3,?..."
textline " "
bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SD0_DAT2,?..."
bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SD0_DAT1,?..."
bitfld.long 0x00 14.--15. " GPE7 ,Pin7 mode" "Input,Output,SD0_DAT0,?..."
textline " "
bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SD0_CMD,?..."
bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SD0_CLK,?..."
bitfld.long 0x00 8.--9. " GPE4 ,Pin4 mode" "Input,Output,I2SDO,AC_SDO"
textline " "
bitfld.long 0x00 6.--7. " GPE3 ,Pin3 mode" "Input,Output,I2SDI,AC_SDI"
bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,AC_BIT_CLK"
bitfld.long 0x00 2.--3. " GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,AC_SYNC"
textline " "
bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,AC_nRESET"
line.long 0x04 "GPEDAT,Port E Data Register"
bitfld.long 0x4 15. " GPE15 ,Pin state" "Low,High"
bitfld.long 0x4 14. " GPE14 ,Pin state" "Low,High"
bitfld.long 0x4 13. " GPE13 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 12. " GPE12 ,Pin state" "Low,High"
bitfld.long 0x4 11. " GPE11 ,Pin state" "Low,High"
bitfld.long 0x4 10. " GPE10 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 9. " GPE9 ,Pin state" "Low,High"
bitfld.long 0x4 8. " GPE8 ,Pin state" "Low,High"
bitfld.long 0x4 7. " GPE7 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 6. " GPE6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPE5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPE4 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 3. " GPE3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPE2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPE1 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 0. " GPE0 ,Pin state" "Low,High"
line.long 0x08 "GPEUDP,Port E Pull-up/down Control Register"
bitfld.long 0x8 30.--31. " GPEUDP15 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 28.--29. " GPEUDP14 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 26.--27. " GPEUDP13 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 24.--25. " GPEUDP12 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 22.--23. " GPEUDP11 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 20.--21. " GPEUDP10 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 18.--19. " GPEUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 16.--17. " GPEUDP8 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 14.--15. " GPEUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 12.--13. " GPEUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 10.--11. " GPEUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 8.--9. " GPEUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 6.--7. " GPEUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 4.--5. " GPEUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 2.--3. " GPEUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 0.--1. " GPEUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
line.long 0x0c "GPESEL,Selects The Function Of Port E"
bitfld.long 0xc 4. " GPE4SEL ,Pin 4 function" "GPE4,PCM_SDO"
bitfld.long 0xc 3. " GPE3SEL ,Pin 3 function" "GPE3,PCM_SDI"
bitfld.long 0xc 0. " GPE2SEL ,Pin 2 function" "GPE2,PCM_CDCLK"
textline " "
bitfld.long 0xc 1. " GPE1SEL ,Pin 1 function" "GPE1,PCM_SCLK"
bitfld.long 0xc 0. " GPE0SEL ,Pin 0 function" "GPE0,PCM_FSYNC"
tree.end
tree "Port F"
width 8.
group.long 0x50++0xb
line.long 0x00 "GPFCON,Port F Control Register"
bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..."
bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..."
bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..."
textline " "
bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..."
bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..."
bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..."
textline " "
bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..."
bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..."
line.long 0x04 "GPFDAT,Port F Data Register"
bitfld.long 0x4 7. " GPF7 ,Pin state" "Low,High"
bitfld.long 0x4 6. " GPF6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPF5 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 4. " GPF4 ,Pin state" "Low,High"
bitfld.long 0x4 3. " GPF3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPF2 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 1. " GPF1 ,Pin state" "Low,High"
bitfld.long 0x4 0. " GPF0 ,Pin state" "Low,High"
line.long 0x08 "GPFUDP,Port F Pull-up/down Control Register"
bitfld.long 0x8 14.--15. " GPFUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 12.--13. " GPFUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 10.--11. " GPFUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 8.--9. " GPFUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 6.--7. " GPFUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 4.--5. " GPFUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 2.--3. " GPFUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 0.--1. " GPFUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port G"
width 8.
group.long 0x60++0xb
line.long 0x00 "GPGCON,Port G Control Register"
bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,?..."
bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,?..."
bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,?..."
textline " "
bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,?..."
bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,?..."
bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,?..."
textline " "
bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,?..."
bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,?..."
line.long 0x04 "GPGDAT,Port G Data Register"
bitfld.long 0x4 7. " GPG7 ,Pin state" "Low,High"
bitfld.long 0x4 6. " GPG6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPG5 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 4. " GPG4 ,Pin state" "Low,High"
bitfld.long 0x4 3. " GPG3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPG2 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 1. " GPG1 ,Pin state" "Low,High"
bitfld.long 0x4 0. " GPG0 ,Pin state" "Low,High"
line.long 0x08 "GPGDN,Port G Pull-up/down Control Register"
bitfld.long 0x8 14.--15. " GPGUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 12.--13. " GPGUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 10.--11. " GPGUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 8.--9. " GPGUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 6.--7. " GPGUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 4.--5. " GPGUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 2.--3. " GPGUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 0.--1. " GPGUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port H"
width 8.
group.long 0x70++0xb
line.long 0x00 "GPHCON,Port H Control Register"
bitfld.long 0x00 28.--29. " GPH14 ,Pin14 mode" "Input,Output,CLKOUT1,?..."
bitfld.long 0x00 26.--27. " GPH13 ,Pin13 mode" "Input,Output,CLKOUT0,?..."
bitfld.long 0x00 24.--25. " GPH12 ,Pin12 mode" "Input,Output,EXTUARTCLK,?..."
textline " "
bitfld.long 0x00 22.--23. " GPH11 ,Pin11 mode" "Input,Output,nRST1,?..."
bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,nCTS1,?..."
bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,nRST0,?..."
textline " "
bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,nCTS0,?..."
bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD3,?..."
bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD3,?..."
textline " "
bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD2,?..."
bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD2,?..."
bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD1,?..."
textline " "
bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD1,?..."
bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,RXD0,?..."
bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,TXD0,?..."
line.long 0x04 "GPHDAT,Port H Data Register"
bitfld.long 0x4 14. " GPH14 ,Pin state" "Low,High"
bitfld.long 0x4 13. " GPH13 ,Pin state" "Low,High"
bitfld.long 0x4 12. " GPH12 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 11. " GPH11 ,Pin state" "Low,High"
bitfld.long 0x4 10. " GPH10 ,Pin state" "Low,High"
bitfld.long 0x4 9. " GPH9 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 8. " GPH8 ,Pin state" "Low,High"
bitfld.long 0x4 7. " GPH7 ,Pin state" "Low,High"
bitfld.long 0x4 6. " GPH6 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 5. " GPH5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPH4 ,Pin state" "Low,High"
bitfld.long 0x4 3. " GPH3 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 2. " GPH2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPH1 ,Pin state" "Low,High"
bitfld.long 0x4 0. " GPH0 ,Pin state" "Low,High"
line.long 0x08 "GPHUDP,Port H Pull-up/down Control Register"
bitfld.long 0x8 28.--29. " GPFUDP14 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 26.--27. " GPFUDP13 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 24.--25. " GPFUDP12 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 22.--23. " GPFUDP11 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 20.--21. " GPFUDP10 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 18.--19. " GPFUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 16.--17. " GPFUDP8 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 14.--15. " GPFUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 12.--13. " GPFUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 10.--11. " GPFUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 8.--9. " GPFUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 6.--7. " GPFUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 4.--5. " GPFUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 2.--3. " GPFUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port K"
width 8.
group.long 0xe0++0xb
line.long 0x00 "GPKCON,Port K Control Register"
bitfld.long 0x00 30.--31. " GPK15 ,Pin15 mode" "Input,Output,Sdata31,?..."
bitfld.long 0x00 28.--29. " GPK14 ,Pin14 mode" "Input,Output,Sdata30,?..."
bitfld.long 0x00 26.--27. " GPK13 ,Pin13 mode" "Input,Output,Sdata29,?..."
textline " "
bitfld.long 0x00 24.--25. " GPK12 ,Pin12 mode" "Input,Output,Sdata28,?..."
bitfld.long 0x00 22.--23. " GPK11 ,Pin11 mode" "Input,Output,Sdata27,?..."
bitfld.long 0x00 20.--21. " GPK10 ,Pin10 mode" "Input,Output,Sdata26,?..."
textline " "
bitfld.long 0x00 18.--19. " GPK9 ,Pin9 mode" "Input,Output,Sdata25,?..."
bitfld.long 0x00 16.--17. " GPK8 ,Pin8 mode" "Input,Output,Sdata24,?..."
bitfld.long 0x00 14.--15. " GPK7 ,Pin7 mode" "Input,Output,Sdata23,?..."
textline " "
bitfld.long 0x00 12.--13. " GPK6 ,Pin6 mode" "Input,Output,Sdata22,?..."
bitfld.long 0x00 10.--11. " GPK5 ,Pin5 mode" "Input,Output,Sdata21,?..."
bitfld.long 0x00 8.--9. " GPK4 ,Pin4 mode" "Input,Output,Sdata20,?..."
textline " "
bitfld.long 0x00 6.--7. " GPK3 ,Pin3 mode" "Input,Output,Sdata19,?..."
bitfld.long 0x00 4.--5. " GPK2 ,Pin2 mode" "Input,Output,Sdata18,?..."
bitfld.long 0x00 2.--3. " GPK1 ,Pin1 mode" "Input,Output,Sdata17,?..."
textline " "
bitfld.long 0x00 0.--1. " GPK0 ,Pin0 mode" "Input,Output,Sdata16,?..."
line.long 0x04 "GPKDAT,Port K Data Register"
bitfld.long 0x4 15. " GPK15 ,Pin state" "Low,High"
bitfld.long 0x4 14. " GPK14 ,Pin state" "Low,High"
bitfld.long 0x4 13. " GPK13 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 12. " GPK12 ,Pin state" "Low,High"
bitfld.long 0x4 11. " GPK11 ,Pin state" "Low,High"
bitfld.long 0x4 10. " GPK10 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 9. " GPK9 ,Pin state" "Low,High"
bitfld.long 0x4 8. " GPK8 ,Pin state" "Low,High"
bitfld.long 0x4 7. " GPK7 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 6. " GPK6 ,Pin state" "Low,High"
bitfld.long 0x4 5. " GPK5 ,Pin state" "Low,High"
bitfld.long 0x4 4. " GPK4 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 3. " GPK3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPK2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPK1 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 0. " GPK0 ,Pin state" "Low,High"
line.long 0x08 "GPKUDP,Port K Pull-up/down Control Register"
bitfld.long 0x8 30.--31. " GPKUDP15 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 28.--29. " GPKUDP14 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 26.--27. " GPKUDP13 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 24.--25. " GPKUDP12 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 22.--23. " GPKUDP11 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 20.--21. " GPKUDP10 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 18.--19. " GPKUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 16.--17. " GPKUDP8 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 14.--15. " GPKUDP7 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 12.--13. " GPKUDP6 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 10.--11. " GPKUDP5 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 8.--9. " GPKUDP4 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 6.--7. " GPKUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 4.--5. " GPKUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 2.--3. " GPKUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 0.--1. " GPKUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port L"
width 8.
group.long 0xf0++0xb
line.long 0x00 "GPLCON,Port L Control Register"
bitfld.long 0x00 26.--27. " GPL13 ,Pin13 mode" "Input,Output,SS,?..."
bitfld.long 0x00 18.--19. " GPL9 ,Pin9 mode" "Input,Output,SD1_CLK,?..."
bitfld.long 0x00 16.--17. " GPL8 ,Pin8 mode" "Input,Output,SD1_CMD,?..."
textline " "
bitfld.long 0x00 6.--7. " GPL3 ,Pin3 mode" "Input,Output,SD1_DAT3,?..."
bitfld.long 0x00 4.--5. " GPL2 ,Pin2 mode" "Input,Output,SD1_DAT2,?..."
bitfld.long 0x00 2.--3. " GPL1 ,Pin1 mode" "Input,Output,SD1_DAT1,?..."
textline " "
bitfld.long 0x00 0.--1. " GPL0 ,Pin0 mode" "Input,Output,SD1_DAT0,?..."
line.long 0x04 "GPLDAT,Port L Data Register"
bitfld.long 0x4 13. " GPL13 ,Pin state" "Low,High"
bitfld.long 0x4 9. " GPL9 ,Pin state" "Low,High"
bitfld.long 0x4 8. " GPL8 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 3. " GPL3 ,Pin state" "Low,High"
bitfld.long 0x4 2. " GPL2 ,Pin state" "Low,High"
bitfld.long 0x4 1. " GPL1 ,Pin state" "Low,High"
textline " "
bitfld.long 0x4 0. " GPL0 ,Pin state" "Low,High"
line.long 0x08 "GPLUDP,Port L Pull-up/down Control Register"
bitfld.long 0x8 26.--27. " GPLUDP13 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 18.--19. " GPLUDP9 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 16.--17. " GPLUDP8 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 6.--7. " GPLUDP3 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 4.--5. " GPLUDP2 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 2.--3. " GPLUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
textline " "
bitfld.long 0x8 0.--1. " GPLUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
tree.end
tree "Port M"
width 8.
group.long 0x100++0xb
line.long 0x00 "GPMCON,Port M Control Register"
bitfld.long 0x00 2.--3. " GPM1 ,Pin1 mode" "GPM Input,GPM Input,FRnB,GPM Input"
bitfld.long 0x00 0.--1. " GPM0 ,Pin0 mode" "GPM Input,GPM Input,RSMBWAIT,GPM Input"
line.long 0x04 "GPMDAT,Port M Data Register"
bitfld.long 0x4 1. " GPM1 ,Pin state" "Low,High"
bitfld.long 0x4 0. " GPM0 ,Pin state" "Low,High"
line.long 0x08 "GPMUDP,Port M Pull-up/down Control Register"
bitfld.long 0x8 4.--5. " nWAIT ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 2.--3. " GPMUDP1 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
bitfld.long 0x8 0.--1. " GPMUDP0 ,Pull-up/down function enable" "Disabled,Pull-down,Pull-up,?..."
width 11.
tree.end
tree "Miscellaneous Registers"
width 10.
group.long 0x80++0x7 "Miscellaneous Registers"
line.long 0x00 "MISCCR,Miscellaneous control register"
bitfld.long 0x00 31. " HSSPI_EN2 ,Must be set 1" "0,1"
bitfld.long 0x00 24. " FLT_I2C ,Clock noise filter enable for IIC" "Disabled,Enabled"
bitfld.long 0x00 12. " SEL_SUSPND ,USB port suspend mode" "Normal,Suspended"
textline " "
bitfld.long 0x00 8.--10. " CLKSEL1 ,CLKOUT1 output signal source" "Reserved,EPLL,RTC,HCLK,PCLK,DCLK1,?..."
bitfld.long 0x00 4.--6. " CLKSEL0 ,CLKOUT0 output signal source" "MPLL,EPLL,FCLK,HCLK,PCLK,DCLK0,OSC,?..."
line.long 0x04 "DCLKCON,DCLK0/1 Control Register"
bitfld.long 0x04 24.--27. " DCLK1CMP ,DCLK1 compare value clock toggle value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 20.--23. " DCLK1DIV ,DCLK1 divide value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x04 17. " DCLK1SelCK ,Select DCLK1 source clock" "PCLK,EPLL"
textline " "
bitfld.long 0x04 16. " DCLK1EN ,DCLK1 enable" "Disabled,Enabled"
bitfld.long 0x04 8.--11. " DCLK0CMP ,DCLK0 compare value clock toggle value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. " DCLK0DIV ,DCLK0 divide value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x04 1. " DCLK0SelCK ,Select DCLK0 source clock" "PCLK,EPLL"
bitfld.long 0x04 0. " DCLK0EN ,DCLK0 enable" "Disabled,Enabled"
group.long 0x88++0x7 "External Interrupt Control Registers"
line.long 0x00 "EXTINT0,External Interrupt Control Register 0"
bitfld.long 0x00 28.--30. " EINT7 ,Signalling method of EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x00 24.--26. " EINT6 ,Signalling method of EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x00 20.--22. " EINT5 ,Signalling method of EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
textline " "
bitfld.long 0x00 16.--18. " EINT4 ,Signalling method of EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x00 12.--14. " EINT3 ,Signalling method of EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x00 8.--10. " EINT2 ,Signalling method of EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
textline " "
bitfld.long 0x00 4.--6. " EINT1 ,Signalling method of EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x00 0.--2. " EINT0 ,Signalling method of EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
line.long 0x04 "EXTINT1,External Interrupt Control Register 1"
bitfld.long 0x04 28.--30. " EINT15 ,Signalling method of EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x04 24.--26. " EINT14 ,Signalling method of EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x04 20.--22. " EINT13 ,Signalling method of EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
textline " "
bitfld.long 0x04 16.--18. " EINT12 ,Signalling method of EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x04 12.--14. " EINT11 ,Signalling method of EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x04 8.--10. " EINT10 ,Signalling method of EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
textline " "
bitfld.long 0x04 4.--6. " EINT9 ,Signalling method of EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
bitfld.long 0x04 0.--2. " EINT8 ,Signalling method of EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
group.long 0xa4++0x3 "External Interrupt Mask Register"
line.long 0x00 "EINTMASK,External Interrupt Mask Register"
bitfld.long 0x00 15. " EINT15 ,External interrupt 15 mask" "Not masked,Masked"
bitfld.long 0x00 14. " EINT14 ,External interrupt 14 mask" "Not masked,Masked"
bitfld.long 0x00 13. " EINT13 ,External interrupt 13 mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 12. " EINT12 ,External interrupt 12 mask" "Not masked,Masked"
bitfld.long 0x00 11. " EINT11 ,External interrupt 11 mask" "Not masked,Masked"
bitfld.long 0x00 10. " EINT10 ,External interrupt 10 mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 9. " EINT9 ,External interrupt 9 mask" "Not masked,Masked"
bitfld.long 0x00 8. " EINT8 ,External interrupt 8 mask" "Not masked,Masked"
bitfld.long 0x00 7. " EINT7 ,External interrupt 7 mask" "Not masked,Masked"
textline " "
bitfld.long 0x00 6. " EINT6 ,External interrupt 6 mask" "Not masked,Masked"
bitfld.long 0x00 5. " EINT5 ,External interrupt 5 mask" "Not masked,Masked"
bitfld.long 0x00 4. " EINT4 ,External interrupt 4 mask" "Not masked,Masked"
group.long 0xa8++0x3 "External Interrupt Pending Register"
line.long 0x00 "EINTPEND,External Interrupt Pending Register"
bitfld.long 0x00 15. " EINT15 ,External interrupt 15 request" "Not occurred,Occurred"
bitfld.long 0x00 14. " EINT14 ,External interrupt 14 request" "Not occurred,Occurred"
bitfld.long 0x00 13. " EINT13 ,External interrupt 13 request" "Not occurred,Occured"
textline " "
bitfld.long 0x00 12. " EINT12 ,External interrupt 12 request" "Not occurred,Occurred"
bitfld.long 0x00 11. " EINT11 ,External interrupt 11 request" "Not occurred,Occurred"
bitfld.long 0x00 10. " EINT10 ,External interrupt 10 request" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 9. " EINT9 ,External interrupt 9 request" "Not occurred,Occurred"
bitfld.long 0x00 8. " EINT8 ,External interrupt 8 request" "Not occurred,Occurred"
bitfld.long 0x00 7. " EINT7 ,External interrupt 7 request" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 6. " EINT6 ,External interrupt 6 request" "Not occurred,Occurred"
bitfld.long 0x00 5. " EINT5 ,External interrupt 5 request" "Not occurred,Occurred"
bitfld.long 0x00 4. " EINT4 ,External interrupt 4 request" "Not occurred,Occurred"
rgroup.long 0xac++0x7 "General Status Registers"
line.long 0x00 "GSTATUS0,External Pin Status Register"
bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High"
bitfld.long 0x00 2. " NCON ,Status of NCON pin" "Low,High"
bitfld.long 0x00 1. " RnB ,Status of RnB pin" "Low,High"
textline " "
bitfld.long 0x00 0. " BATT_FLT ,Status of BATT_FLT pin" "Low,High"
line.long 0x04 "GSTATUS1,Software Platform ID Register"
hexmask.long 0x04 0.--31. 1. " SF_ID ,Software Platform ID"
group.long 0xc0++0x3 "Drive Strength Control Registers"
line.long 0x00 "DSC0,Strength Control Register 0"
bitfld.long 0x00 26.--27. " DSC_nRBE ,nRBE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 24.--25. " DSC_nROE ,nROE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 22.--23. " DSC_nRWE ,nRWE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
textline " "
bitfld.long 0x00 20.--21. " DSC_nRCS5 ,nRCS5 adress bus drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 18.--19. " DSC_nRCS4 ,nRCS4 adress bus drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 16.--17. " DSC_nRCS3 ,nRCS3 adress bus drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
textline " "
bitfld.long 0x00 14.--15. " DSC_nRCS2 ,nRCS2 adress bus drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 12.--13. " DSC_nRCS1 ,nRCS1 adress bus drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 10.--11. " DSC_nRCS0 ,nRCS0 adress bus drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
textline " "
bitfld.long 0x00 8.--9. " DSC_RADDRH ,ROM adress bus[25:16] drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 6.--7. " DSC_RADDRL ,ROM adress bus[15:1] drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 4.--5. " DSC_RADDR0 ,ROM adress bus[0] drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
textline " "
bitfld.long 0x00 2.--3. " DSC_RDATA1 ,ROM data[15:8] I/O drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 0.--1. " DSC_RDATA0 ,ROM data[7:0] I/O drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
group.long 0xc4++0x3
line.long 0x00 "DSC1,Strength Control Register 1"
bitfld.long 0x00 26.--27. " DSC_nSCLK ,nSCLK drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 24.--25. " DSC_SCLK ,SCLK drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 22.--23. " DSC_SCKE ,SCKE drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
textline " "
bitfld.long 0x00 18.--19. " DSC_nSWE ,nSWE drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 16.--17. " DSC_nSCAS ,nSCAS drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 14.--15. " DSC_nSRAS ,nSRAS drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
textline " "
bitfld.long 0x00 12.--13. " DSC_nSCS1 ,nSCS1 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 10.--11. " DSC_nSCS0 ,nSCS0 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 8.--9. " DSC_SADDR ,SADDR drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
textline " "
bitfld.long 0x00 6.--7. " DSC_SDATA3 ,SDATA[31:24] drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 4.--5. " DSC_SDATA2 ,SDATA[23:16] drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 2.--3. " DSC_SDATA1 ,SDATA[15:8] drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
textline " "
bitfld.long 0x00 0.--1. " DSC_SDATA0 ,SDATA[7:0] drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
group.long 0xc8++0x3
line.long 0x00 "DSC2,Strength Control Register 2"
bitfld.long 0x00 26.--27. " DSC_nFCE ,nFCE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 24.--25. " DSC_nFRE ,nFRE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 22.--23. " DSC_nFWE ,nFWE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
textline " "
bitfld.long 0x00 20.--21. " DSC_ALE ,ALE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 18.--19. " DSC_CLE ,CLE drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 14.--15. " DSC_RSMAVD ,RSMAVD drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
textline " "
bitfld.long 0x00 12.--13. " DSC_RSMCLK ,RSMCLK drive strength" "5.2mA,10.5mA,15.7mA,21.0mA"
bitfld.long 0x00 10.--11. " DSC_DQM3 ,DQM3 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 8.--9. " DSC_DQM2 ,DQM2 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
textline " "
bitfld.long 0x00 6.--7. " DSC_DQM1 ,DQM1 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 4.--5. " DSC_DQM0 ,DQM0 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
bitfld.long 0x00 2.--3. " DSC_DQS1 ,DQS1 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
textline " "
bitfld.long 0x00 0.--1. " DSC_DQS0 ,DQS0 drive strength" "4.9mA,9.8mA,14.8mA,19.7mA"
group.long 0x110++0x3
line.long 0x00 "DSC3,Strength Control Register 3"
bitfld.long 0x00 8.--9. " DSC_LCD2 ,LCD_VD[23:16] drive strength" "2.6mA,5.2mA,7.8mA,10.5mA"
bitfld.long 0x00 6.--7. " DSC_LCD1 ,LCD_VD[15:8] drive strength" "2.6mA,5.2mA,7.8mA,10.5mA"
bitfld.long 0x00 4.--5. " DSC_LCD0 ,LCD_VD[7:0] drive strength" "2.6mA,5.2mA,7.8mA,10.5mA"
textline " "
bitfld.long 0x00 2.--3. " DSC_HS_MMC ,HS_MMC drive strength" "2.6mA,5.2mA,7.8mA,10.5mA"
bitfld.long 0x00 0.--1. " DSC_HS_SPI ,HS_SPI drive strength" "2.6mA,5.2mA,7.8mA,10.5mA"
group.long 0x114++0x7 "Power Down RAM Control Registers"
line.long 0x00 "PDDMCON,Power Down SDRAM Control Register"
bitfld.long 0x00 22.--23. " PSC_nSCLK ,nSCLK pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 20.--21. " PSC_SCK ,SCLK/SCKE pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 18.--19. " PSC_DQMH ,DQM[3:2]/GPA[26:25] pin status" "0,1,Hi-Z,?..."
textline " "
bitfld.long 0x00 16.--17. " PSC_DQML ,DQM[1:0] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 14.--15. " PSC_DQS ,DQS[1:0] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 12.--13. " PSC_nSWE ,nSWE pin status" "0,1,Hi-Z,?..."
textline " "
bitfld.long 0x00 10.--11. " PSC_SDR ,nSCAS/nSRAS pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 8.--9. " PSC_nSCS1 ,nSCS1 pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 6.--7. " PSC_nSCS0 ,nSCS0 pin status" "0,1,Hi-Z,?..."
textline " "
bitfld.long 0x00 4.--5. " PSC_SDATAH ,SDATA[31:16]/GPK[15:0] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 2.--3. " PSC_SDATAL ,SDATA[15:0] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x00 0.--1. " PSC_SADDR ,SADDR[15:0] pin status" "0,1,Hi-Z,?..."
line.long 0x04 "PDSMCON,Power Down SRAM Control Register"
bitfld.long 0x04 22.--23. " PSC_NF1 ,nFCE/GPA22 and nFRE/GPA20 and nFWE/GPA19 pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 20.--21. " PSC_NF0 ,ALC/GPA18 and CLE/GPA17 pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 18.--19. " PSC_nRWE ,nRWE pin status" "0,1,Hi-Z,?..."
textline " "
bitfld.long 0x04 16.--17. " PSC_nROE ,nROE pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 14.--15. " PSC_RSM ,RSMCLK/GPA23 and RSMAVD/GPA14 pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 12.--13. " PSC_nRBE ,nRBE[1:0] pin status" "0,1,Hi-Z,?..."
textline " "
bitfld.long 0x04 10.--11. " PSC_nRCS51 ,nRCS[5:1]/GPA[16:12] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 8.--9. " PSC_nRCS0 ,nRCS0 pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 6.--7. " PSC_RDATA ,RDATA[15:0] pin status" "0,1,Hi-Z,?..."
textline " "
bitfld.long 0x04 4.--5. " PSC_RADDRH ,RADDR[25:16]/GPA[10:1] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 2.--3. " PSC_RADDRL ,RADDR[15:1] pin status" "0,1,Hi-Z,?..."
bitfld.long 0x04 0.--1. " PSC_RADDR0 ,RADDR0/GPA0 pin status" "0,1,Hi-Z,?..."
tree.end
width 0xb
tree.end
tree "WDT (Watchdog Timer)"
base ad:0x53000000
width 7.
group.long 0x00++0x3
line.word 0x00 "WTCON,Watchdog Timer Control Register"
hexmask.word.byte 0x00 8.--15. 1. " PV ,Prescaler Value"
bitfld.word 0x00 5. " WDT ,Watchdog timer enable" "Disabled,Enabled"
bitfld.word 0x00 3.--4. " CLKSEL ,Clock division factor" "16,32,64,128"
textline " "
bitfld.word 0x00 2. " INTGEN ,Interrupt generation" "Disabled,Enabled"
bitfld.word 0x00 0. " RSTEN ,Reset enable" "Disabled,Enabled"
group.long 0x04++0x3
line.word 0x00 "WTDAT,Watchdog Timer Data Register"
hexmask.word 0x00 0.--15. 1. " CNTRL ,Count reload value"
group.long 0x08++0x3
line.word 0x00 "WTCNT,Watchdog Timer Count Register"
hexmask.word 0x00 0.--15. 1. " CNTVAL ,Count value"
width 0xb
tree.end
tree "PWM (Pulse Width Modulation Timer)"
base ad:0x51000000
width 8.
group.long 0x00++0x7
line.long 0x00 "TCFG0,Timer Configuration Register 0"
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2 3 and 4"
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
line.long 0x04 "TCFG1,Timer Configuration Register 1"
bitfld.long 0x04 20.--23. " DMA_MODE ,Select DMA request channel" "Not selected,Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,?..."
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
textline " "
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..."
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..."
group.long 0x08++0x3
line.long 0x00 "TCON,Timer Control Register"
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
textline " "
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
textline " "
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
textline " "
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
textline " "
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
textline " "
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
textline " "
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
group.long 0xC++0x7 "Timer 0"
line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register"
hexmask.long.word 0x00 0.--15. 1. " T0CNT ,Count buffer value for Timer 0"
line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register"
hexmask.long.word 0x04 0.--15. 1. " T0COM ,Compare buffer value for Timer 0"
rgroup.long (0xC+0x8)++0x3
line.long 0x00 "TCNTO0,Timer 0 Count Observation Register"
hexmask.long.word 0x00 0.--15. 1. " T0OBS ,Count observation value for Timer 0"
group.long 0x18++0x7 "Timer 1"
line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register"
hexmask.long.word 0x00 0.--15. 1. " T1CNT ,Count buffer value for Timer 1"
line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register"
hexmask.long.word 0x04 0.--15. 1. " T1COM ,Compare buffer value for Timer 1"
rgroup.long (0x18+0x8)++0x3
line.long 0x00 "TCNTO1,Timer 1 Count Observation Register"
hexmask.long.word 0x00 0.--15. 1. " T1OBS ,Count observation value for Timer 1"
group.long 0x24++0x7 "Timer 2"
line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register"
hexmask.long.word 0x00 0.--15. 1. " T2CNT ,Count buffer value for Timer 2"
line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register"
hexmask.long.word 0x04 0.--15. 1. " T2COM ,Compare buffer value for Timer 2"
rgroup.long (0x24+0x8)++0x3
line.long 0x00 "TCNTO2,Timer 2 Count Observation Register"
hexmask.long.word 0x00 0.--15. 1. " T2OBS ,Count observation value for Timer 2"
group.long 0x30++0x7 "Timer 3"
line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register"
hexmask.long.word 0x00 0.--15. 1. " T3CNT ,Count buffer value for Timer 3"
line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register"
hexmask.long.word 0x04 0.--15. 1. " T3COM ,Compare buffer value for Timer 3"
rgroup.long (0x30+0x8)++0x3
line.long 0x00 "TCNTO3,Timer 3 Count Observation Register"
hexmask.long.word 0x00 0.--15. 1. " T3OBS ,Count observation value for Timer 3"
group.long 0x3c++0x3 "Timer 4"
line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register"
hexmask.long.word 0x00 0.--15. 1. " T4CNT ,Count buffer value for Timer 4"
rgroup.long 0x40++0x3
line.long 0x00 "TCNTO4,Timer 4 Count Observation Register"
hexmask.long.word 0x00 0.--15. 1. " T4OBS ,Count observation value for Timer 4"
width 0xb
tree.end
tree "RTC (Real Time Clock)"
base ad:0x57000000
width 9.
group.word 0x40++0x01
line.word 0x00 "RTCCON,RTC Control Register"
bitfld.word 0x00 5.--8. " TICsel2 ,Tick Time clock select2" "1/16384 second,1/8192 second,1/4096 second,1/2048 second,1/128 second,1 second,1/1024 second,1/512 second,1/256 second,1/64 second,1/32 second,1/16 second,1/8 second,1/4 second,1/2 second,?..."
bitfld.word 0x00 4. " TICsel ,Tick Time clock select1" "TICsel2,1/32768 second"
bitfld.word 0x00 3. " CLRST ,RTC clock count reset" "No reset,Reset"
textline " "
bitfld.word 0x00 2. " CNTSEL ,BCD count select" "Merged,?..."
bitfld.word 0x00 1. " CLKSEL ,BCD clock select" "XTAL 1/215,?..."
bitfld.word 0x00 0. " RTCEN ,RTC control enable" "Disabled,Enabled"
group.byte 0x44++0x00
line.byte 0x00 "TICNT0,Tick Time Count Register 0"
bitfld.byte 0x00 7. " TICK_INT_EN ,Tick time interrupt enable" "Disabled,Enabled"
hexmask.byte 0x00 0.--6. 1. " TICK_TIME_CNT0 ,[14:8] bits of 32-bit tick time count value"
group.byte 0x4c++0x00
line.byte 0x00 "TICNT1,Tick Time Count Register 1"
hexmask.byte 0x00 0.--7. 1. " TICK_TIME_CNT1 ,Lower 8bits of 32-bit tick time count value"
group.long 0x48++0x03
line.long 0x00 "TICNT2,Tick Time Count Register 2"
hexmask.long.tbyte 0x00 0.--16. 1. " TICK_TIME_CNT2 ,High 17bits of 32-bit tick time count value"
group.byte 0x50++0x00
line.byte 0x00 "RTCALM,RTC Alarm Control Register"
bitfld.byte 0x00 6. " ALMEN ,Alarm global enable" "Disabled,Enabled"
bitfld.byte 0x00 5. " YEAREN ,Year alarm enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " MONREN ,Month alarm enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " DATEEN ,Date alarm enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " HOUREN ,Hour alarm enable" "Disabled,Enabled"
bitfld.byte 0x00 1. " MINEN ,Minute alarm enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " SECEN ,Second alarm enable" "Disabled,Enabled"
width 9.
if (((d.b(ad:(0x57000000+0x50)))&0x41)==0x41)
group.byte 0x54++0x00
line.byte 0x00 "ALMSEC,Alarm Second Data Register"
bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,-,-"
bitfld.byte 0x00 0.--3. ",BCD value for alarm second" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
hgroup.byte 0x54++0x00
hide.byte 0x00 "ALMSEC,Alarm Second Data Register"
endif
if (((d.b(ad:(0x57000000+0x50)))&0x42)==0x42)
group.byte 0x58++0x00
line.byte 0x00 "ALMMIN,Alarm Minute Data Register"
bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,-,-"
bitfld.byte 0x00 0.--3. ",BCD value for alarm minute" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
hgroup.byte 0x58++0x00
hide.byte 0x00 "ALMMIN,Alarm Minute Data Register"
endif
if ((((d.b(ad:(0x57000000+0x50)))&0x44)==0x44)&&(((d.b(ad:(0x57000000+0x5c)))&0x30)==0x20))
group.byte 0x5c++0x00
line.byte 0x00 "ALMHOUR,Alarm Hour Data Register"
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for alarm hour" "0,1,2,-"
bitfld.byte 0x00 0.--3. ",BCD value for alarm hour" "0,1,2,3,-,-,-,-,-,-,-,?..."
elif ((((d.b(ad:(0x57000000+0x50)))&0x44)==0x44)&&(((d.b(ad:(0x57000000+0x5c)))&0x30)!=0x20))
group.byte 0x5c++0x00
line.byte 0x00 "ALMHOUR,Alarm hour data register"
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for alarm hour" "0,1,2,-"
bitfld.byte 0x00 0.--3. ",BCD value for alarm hour" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
hgroup.byte 0x5c++0x00
hide.byte 0x00 "ALMHOUR,Alarm Hour Data Register"
endif
if ((((d.b(ad:(0x57000000+0x50)))&0x48)==0x48)&&(((d.b(ad:(0x57000000+0x60)))&0x30)==0x30))
group.byte 0x60++0x00
line.byte 0x00 "ALMDATE,Alarm Date Data Register"
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3"
bitfld.byte 0x00 0.--3. ",BCD value for alarm date" "0,1,-,-,-,-,-,-,-,-,-,?..."
elif ((((d.b(ad:(0x57000000+0x50)))&0x48)==0x48)&&(((d.b(ad:(0x57000000+0x60)))&0x30)!=0x30))
group.byte 0x60++0x00
line.byte 0x00 "ALMDATE,Alarm Date Data Register"
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3"
bitfld.byte 0x00 0.--3. ",BCD value for alarm date" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
hgroup.byte 0x60++0x00
hide.byte 0x00 "ALMDATE,Alarm Date Data Register"
endif
if ((((d.b(ad:(0x57000000+0x50)))&0x50)==0x50)&&(((d.b(ad:(0x57000000+0x64)))&0x10)==0x10))
group.byte 0x64++0x00
line.byte 0x00 "ALMMON,Alarm Month Data Register"
bitfld.byte 0x00 4. " MONDATA ,BCD value for alarm month" "0,1"
bitfld.byte 0x00 0.--3. ",BCD value for alarm month" "0,1,2,-,-,-,-,-,-,-,-,?..."
elif ((((d.b(ad:(0x57000000+0x50)))&0x50)==0x50)&&(((d.b(ad:(0x57000000+0x64)))&0x10)!=0x10))
group.byte 0x64++0x00
line.byte 0x00 "ALMMON,Alarm Month Data Register"
bitfld.byte 0x00 4. " MONDATA ,BCD value for alarm month" "0,1"
bitfld.byte 0x00 0.--3. ",BCD value for alarm month" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
hgroup.byte 0x64++0x00
hide.byte 0x00 "ALMMON,Alarm Month Data Register"
endif
if (((d.b(ad:(0x57000000+0x50)))&0x60)==0x60)
group.byte 0x68++0x00
line.byte 0x00 "ALMYEAR,Alarm Year Data Register"
hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year"
else
hgroup.byte 0x68++0x00
hide.byte 0x00 "ALMYEAR,Alarm Year Data Register"
endif
if (((d.b(ad:(0x57000000+0x70)))&0x70)<0x60)
group.byte 0x70++0x00
line.byte 0x00 "BCDSEC,BCD Second Register"
bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for second" "0,1,2,3,4,5,-,-"
bitfld.byte 0x00 0.--3. ",BCD value for second" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
group.byte 0x70++0x00
line.byte 0x00 "BCDSEC,BCD Second Register"
bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for second" "0,1,2,3,4,5,-,-"
bitfld.byte 0x00 0.--3. ",BCD value for second" "-,-,-,-,-,-,-,-,-,-,-,?..."
endif
if (((d.b(ad:(0x57000000+0x74)))&0x70)<0x60)
group.byte 0x74++0x00
line.byte 0x00 "BCDMIN,BCD Minute Register"
bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,-,-"
bitfld.byte 0x00 0.--3. ",BCD value for minute" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
group.byte 0x74++0x00
line.byte 0x00 "BCDMIN,BCD Minute Register"
bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,-,-"
bitfld.byte 0x00 0.--3. ",BCD value for minute" "-,-,-,-,-,-,-,-,-,-,-,?..."
endif
if (((d.b(ad:(0x57000000+0x78)))&0x30)==0x20)
group.byte 0x78++0x00
line.byte 0x00 "BCDHOUR,BCD Hour Register"
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-"
bitfld.byte 0x00 0.--3. ",BCD value for hour" "0,1,2,3,-,-,-,-,-,-,-,?..."
elif ((((d.b(ad:(0x57000000+0x78)))&0x30)==0x00)||(((d.b(ad:(0x57000000+0x78)))&0x30)==0x10))
group.byte 0x78++0x00
line.byte 0x00 "BCDHOUR,BCD Hour Register"
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-"
bitfld.byte 0x00 0.--3. ",BCD value for hour" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
group.byte 0x78++0x00
line.byte 0x00 "BCDHOUR,BCD Hour Register"
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-"
bitfld.byte 0x00 0.--3. ",BCD value for hour" "-,-,-,-,-,-,-,-,-,-,-,?..."
endif
if (((d.b(ad:(0x57000000+0x7c)))&0x30)==0x30)
group.byte 0x7c++0x00
line.byte 0x00 "BCDDATE,BCD Date Register"
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for date" "0,1,2,3"
bitfld.byte 0x00 0.--3. ",BCD value for date" "0,1,-,-,-,-,-,-,-,-,-,?..."
else
group.byte 0x7c++0x00
line.byte 0x00 "BCDDATE,BCD Date Register"
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for date" "0,1,2,3"
bitfld.byte 0x00 0.--3. ",BCD value for date" "0,1,2,3,4,5,6,7,8,9,-,?..."
endif
group.byte 0x80++0x00
line.byte 0x00 "BCDDAY,BCD A Day Of The Week Register"
bitfld.byte 0x00 0.--2. " DAYDATA ,BCD value for a day of the week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
if (((d.b(ad:(0x57000000+0x84)))&0x10)==0x00)
group.byte 0x84++0x00
line.byte 0x00 "BCDMON,BCD Month Register"
bitfld.byte 0x00 4. " MONDATA ,BCD value for month" "0,1"
bitfld.byte 0x00 0.--3. ",BCD value for month" "0,1,2,3,4,5,6,7,8,9,-,?..."
else
group.byte 0x84++0x00
line.byte 0x00 "BCDMON,BCD Month Register"
bitfld.byte 0x00 4. " MONDATA ,BCD value for month" "0,1"
bitfld.byte 0x00 0.--3. ",BCD value for month" "0,1,2,-,-,-,-,-,-,-,-,?..."
endif
group.byte 0x88++0x00
line.byte 0x00 "BCDYEAR,BCD year register"
hexmask.byte.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year"
rgroup.long 0x90++0x03
line.long 0x00 "TICKCNT,TICK Counter Register"
hexmask.long 0x00 0.--31. 1. " TICKCNT ,Internal tick counter"
width 0xb
tree.end
tree.open "UART (Universal Asynchronous Receiver and Transmitter)"
tree "UART 0"
base ad:0x50000000
width 11.
group.long 0x00++0x3
line.long 0x00 "ULCON0,UART Channel 0 Line Control Register"
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
textline " "
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
group.long 0x04++0x3
line.long 0x00 "UCON0,UART Channel 0 Control Register"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,EXTUARTCLK,PCLK,EPLL"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
else
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
endif
textline " "
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
textline " "
bitfld.long 0x00 4. " SBS ,Send break" "Normal,Break"
endif
textline " "
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
group.long 0x08++0x3
line.long 0x00 "UFCON0,UART Channel 0 FIFO Control Register"
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte"
else
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
endif
textline " "
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
textline " "
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
if (((d.l(ad:(0x50000000+0xc)))&0x10)==0x00)
group.long 0x0c++0x3
line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register"
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active"
else
group.long 0x0c++0x3
line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register"
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
textline " "
endif
rgroup.long 0x10++0x3
line.long 0x00 "UTRSTAT0,UART Channel 0 Tx/Rx Status Register"
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
hgroup.long 0x14++0x3
hide.long 0x00 "UERSTAT0,UART Channel 0 Rx Error Status Register"
in
rgroup.long 0x18++0x3
line.long 0x00 "UFSTAT0,UART Channel 0 FIFO Status Register"
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
textline " "
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
rgroup.long 0x1c++0x3
line.long 0x00 "UMSTAT0,UART Channel 0 Modem Status Register"
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
wgroup.byte 0x20++0x0
line.byte 0x00 "UTXH0,UART Channel 0 Transmit Buffer Register"
hexmask.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data for UART0"
hgroup.byte 0x24++0x0
hide.byte 0x00 "URXH0,UART Channel 0 Receive Buffer Register"
in
group.long 0x28++0x3
line.long 0x00 "UBRDIV0,Baud Rate Divisor Register 0"
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
group.long 0x2c++0x3
line.long 0x00 "UDIVSLOT0,Baud Rate Divisor Divisor Register 0"
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
width 0xb
tree.end
tree "UART 1"
base ad:0x50004000
width 11.
group.long 0x00++0x3
line.long 0x00 "ULCON1,UART Channel 1 Line Control Register"
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
textline " "
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
group.long 0x04++0x3
line.long 0x00 "UCON1,UART Channel 1 Control Register"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,EXTUARTCLK,PCLK,EPLL"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
else
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
endif
textline " "
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
textline " "
bitfld.long 0x00 4. " SBS ,Send break" "Normal,Break"
endif
textline " "
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
group.long 0x08++0x3
line.long 0x00 "UFCON1,UART Channel 1 FIFO Control Register"
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte"
else
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
endif
textline " "
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
textline " "
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
if (((d.l(ad:(0x50004000+0xc)))&0x10)==0x00)
group.long 0x0c++0x3
line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register"
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active"
else
group.long 0x0c++0x3
line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register"
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
textline " "
endif
rgroup.long 0x10++0x3
line.long 0x00 "UTRSTAT1,UART Channel 1 Tx/Rx Status Register"
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
hgroup.long 0x14++0x3
hide.long 0x00 "UERSTAT1,UART Channel 1 Rx Error Status Register"
in
rgroup.long 0x18++0x3
line.long 0x00 "UFSTAT1,UART Channel 1 FIFO Status Register"
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
textline " "
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
rgroup.long 0x1c++0x3
line.long 0x00 "UMSTAT1,UART Channel 1 Modem Status Register"
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
wgroup.byte 0x20++0x0
line.byte 0x00 "UTXH1,UART Channel 1 Transmit Buffer Register"
hexmask.byte 0x00 0.--7. 1. " TXDATA1 ,Transmit data for UART1"
hgroup.byte 0x24++0x0
hide.byte 0x00 "URXH1,UART Channel 1 Receive Buffer Register"
in
group.long 0x28++0x3
line.long 0x00 "UBRDIV1,Baud Rate Divisor Register 1"
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
group.long 0x2c++0x3
line.long 0x00 "UDIVSLOT1,Baud Rate Divisor Divisor Register 1"
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
width 0xb
tree.end
tree "UART 2"
base ad:0x50008000
width 11.
group.long 0x00++0x3
line.long 0x00 "ULCON2,UART Channel 2 Line Control Register"
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
textline " "
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
group.long 0x04++0x3
line.long 0x00 "UCON2,UART Channel 2 Control Register"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,EXTUARTCLK,PCLK,EPLL"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
else
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
endif
textline " "
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
textline " "
bitfld.long 0x00 4. " SBS ,Send break" "Normal,Break"
endif
textline " "
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
group.long 0x08++0x3
line.long 0x00 "UFCON2,UART Channel 2 FIFO Control Register"
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte"
else
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
endif
textline " "
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
textline " "
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
if (((d.l(ad:(0x50008000+0xc)))&0x10)==0x00)
group.long 0x0c++0x3
line.long 0x00 "UMCON2,UART Channel 2 Modem Control Register"
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active"
else
group.long 0x0c++0x3
line.long 0x00 "UMCON2,UART Channel 2 Modem Control Register"
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
textline " "
endif
rgroup.long 0x10++0x3
line.long 0x00 "UTRSTAT2,UART Channel 2 Tx/Rx Status Register"
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
hgroup.long 0x14++0x3
hide.long 0x00 "UERSTAT2,UART Channel 2 Rx Error Status Register"
in
rgroup.long 0x18++0x3
line.long 0x00 "UFSTAT2,UART Channel 2 FIFO Status Register"
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
textline " "
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
rgroup.long 0x1c++0x3
line.long 0x00 "UMSTAT2,UART Channel 2 Modem Status Register"
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
wgroup.byte 0x20++0x0
line.byte 0x00 "UTXH2,UART Channel 2 Transmit Buffer Register"
hexmask.byte 0x00 0.--7. 1. " TXDATA2 ,Transmit data for UART2"
hgroup.byte 0x24++0x0
hide.byte 0x00 "URXH2,UART Channel 2 Receive Buffer Register"
in
group.long 0x28++0x3
line.long 0x00 "UBRDIV2,Baud Rate Divisor Register 2"
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
group.long 0x2c++0x3
line.long 0x00 "UDIVSLOT2,Baud Rate Divisor Divisor Register 2"
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
width 0xb
tree.end
tree "UART 3"
base ad:0x5000c000
width 11.
group.long 0x00++0x3
line.long 0x00 "ULCON3,UART Channel 3 Line Control Register"
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
textline " "
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
group.long 0x04++0x3
line.long 0x00 "UCON3,UART Channel 3 Control Register"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,EXTUARTCLK,PCLK,EPLL"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
else
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
endif
textline " "
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
textline " "
bitfld.long 0x00 4. " SBS ,Send break" "Normal,Break"
endif
textline " "
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
group.long 0x08++0x3
line.long 0x00 "UFCON3,UART Channel 3 FIFO Control Register"
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte"
else
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
endif
textline " "
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
textline " "
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
rgroup.long 0x10++0x3
line.long 0x00 "UTRSTAT3,UART Channel 3 Tx/Rx Status Register"
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
hgroup.long 0x14++0x3
hide.long 0x00 "UERSTAT3,UART Channel 3 Rx Error Status Register"
in
rgroup.long 0x18++0x3
line.long 0x00 "UFSTAT3,UART Channel 3 FIFO Status Register"
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
textline " "
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
wgroup.byte 0x20++0x0
line.byte 0x00 "UTXH3,UART Channel 3 Transmit Buffer Register"
hexmask.byte 0x00 0.--7. 1. " TXDATA3 ,Transmit data for UART3"
hgroup.byte 0x24++0x0
hide.byte 0x00 "URXH3,UART Channel 3 Receive Buffer Register"
in
group.long 0x28++0x3
line.long 0x00 "UBRDIV3,Baud Rate Divisor Register 3"
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
group.long 0x2c++0x3
line.long 0x00 "UDIVSLOT3,Baud Rate Divisor Divisor Register 3"
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
width 0xb
tree.end
tree.end
tree.open "USB (Universal Serial Bus)"
tree "USB Host Controller"
base ad:0x49000000
width 22.
rgroup.long 0x00++0x3 "Control And Status Group"
line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register"
hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification"
group.long 0x04++0x13
line.long 0x0 "HcControl,HC Operating Modes Register"
bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected"
textline " "
bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management"
bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend"
textline " "
bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled"
bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1"
line.long 0x4 "HcCommandStatus,HC Status Register"
bitfld.long 0x4 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
bitfld.long 0x4 3. " OCR ,Ownership Change Request" "Not requested,Requested"
textline " "
bitfld.long 0x4 2. " BLF ,Bulk List Filled" "Not filled,Filled"
bitfld.long 0x4 1. " CLF ,Control List Filled" "Not filled,Filled"
textline " "
bitfld.long 0x4 0. " HCR ,Host Controller Reset" "No effect,Reset"
line.long 0x8 "HcInterruptStatus,HC Interrupt Status Register"
bitfld.long 0x8 30. " OC ,Ownership Change" "No interrupt,Interrupt"
bitfld.long 0x8 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt"
textline " "
bitfld.long 0x8 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt"
bitfld.long 0x8 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt"
textline " "
bitfld.long 0x8 3. " RD ,Resume Detected" "No interrupt,Interrupt"
bitfld.long 0x8 2. " SF ,Start of Frame" "No interrupt,Interrupt"
textline " "
bitfld.long 0x8 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt"
bitfld.long 0x8 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt"
line.long 0xC "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register"
setclrfld.long 0xC 31. 0xC 31. 0x10 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 30. 0xC 30. 0x10 30. " OCMIE_set/clr ,Ownership Change" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 6. 0xC 6. 0x10 6. " RHSCMIE_set/clr ,Root Hub Status Change" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 5. 0xC 5. 0x10 5. " FNOMIE_set/clr ,Frame Number Overflow" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 4. 0xC 4. 0x10 4. " UEMIE_set/clr ,Unrecoverable Error" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 3. 0xC 3. 0x10 3. " RDMIE_set/clr ,Resume Detected" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 2. 0xC 2. 0x10 2. " SFMIE_set/clr ,Start of Frame" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 1. 0xC 1. 0x10 1. " WDHMIE_set/clr ,Writeback Done Head" "Disabled,Enabled"
textline " "
setclrfld.long 0xC 0. 0xC 0. 0x10 0. " SOMIE_set/clr ,Scheduling Overrun" "Disabled,Enabled"
group.long 0x18++0x3 "Memory Pointer Group"
line.long 0x0 "HcHCCA,Host Controller Communication Area Physical Address Register"
hexmask.long 0x0 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address"
rgroup.long 0x1C++0x3
line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register"
hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED"
group.long 0x20++0xF
line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register"
hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED"
line.long 0x4 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register"
hexmask.long 0x4 4.--31. 0x10 " CCED ,Control Current ED"
line.long 0x8 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register"
hexmask.long 0x8 4.--31. 0x10 " BHED ,Bulk Head ED"
line.long 0xC "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register"
hexmask.long 0xC 4.--31. 0x10 " BCED ,Bulk Current ED"
rgroup.long 0x30++0x3
line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register"
hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head"
group.long 0x34++0x3 "Frame Counter Group"
line.long 0x0 "HcFmInterval,HC Frame Interval Register"
bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled"
hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet"
hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval"
rgroup.long 0x38++0x7
line.long 0x0 "HcFmRemaining,HC Frame Remaining Register"
bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled"
hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining"
line.long 0x4 "HcFmNumber,HC Frame Number Register"
hexmask.long.word 0x4 0.--15. 1. " FN ,Frame Number"
group.long 0x40++0x7
line.long 0x0 "HcPeriodicStart,HC Periodic Start Register"
hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start"
line.long 0x4 "HcLSThreshold,HC LS Threshold Register"
hexmask.long.word 0x4 0.--11. 1. " LST ,LS Threshold"
group.long 0x48++0x13 "Root Hub Group"
line.long 0x0 "HcRhDescriptorA,HC Root Hub Descriptor A Register"
hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,Power On To Power Good Time"
bitfld.long 0x0 12. " NOCP ,No Over Current Protection" "Protection,No protection"
textline " "
bitfld.long 0x0 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis"
bitfld.long 0x0 10. " DT ,Device Type" "Not compound,Compound"
textline " "
bitfld.long 0x0 9. " PSM ,Power Switching Mode" "Global,Individual"
bitfld.long 0x0 8. " NPS ,No Power Switching" "Switched,Not switched"
textline " "
hexmask.long.byte 0x0 0.--7. 1. " NDP ,Number Downstream Ports"
line.long 0x4 "HcRhDescriptorB,HC Root Hub Descriptor B Register"
hexmask.long.word 0x4 16.--31. 1. " PPCM ,Port Power Control Mask"
hexmask.long.word 0x4 0.--15. 1. " DR ,Device Removable"
line.long 0x8 "HcRhStatus,HC Root Hub Status Register"
bitfld.long 0x8 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared"
textline " "
eventfld.long 0x8 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred"
textline " "
bitfld.long 0x8 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on"
textline " "
bitfld.long 0x8 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set"
textline " "
bitfld.long 0x8 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent"
textline " "
bitfld.long 0x8 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off"
line.long 0xc "HcRhPortStatus[1],HC Root Hub Port Status 1 Register"
eventfld.long 0xc 20. " PRSC ,Port Reset Status Change" "Not changed,Changed"
textline " "
eventfld.long 0xc 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed"
textline " "
eventfld.long 0xc 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed"
textline " "
eventfld.long 0xc 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
textline " "
eventfld.long 0xc 16. " CSC ,Connect Status Change" "Not changed,Changed"
textline " "
bitfld.long 0xc 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear"
textline " "
bitfld.long 0xc 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set"
textline " "
bitfld.long 0xc 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set"
textline " "
bitfld.long 0xc 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear"
textline " "
bitfld.long 0xc 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set"
textline " "
bitfld.long 0xc 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set"
textline " "
bitfld.long 0xc 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear"
line.long 0x10 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register"
eventfld.long 0x10 20. " PRSC ,Port Reset Status Change" "Not changed,Changed"
textline " "
eventfld.long 0x10 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed"
textline " "
eventfld.long 0x10 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed"
textline " "
eventfld.long 0x10 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
textline " "
eventfld.long 0x10 16. " CSC ,Connect Status Change" "Not changed,Changed"
textline " "
bitfld.long 0x10 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear"
textline " "
bitfld.long 0x10 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set"
textline " "
bitfld.long 0x10 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set"
textline " "
bitfld.long 0x10 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear"
textline " "
bitfld.long 0x10 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set"
textline " "
bitfld.long 0x10 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set"
textline " "
bitfld.long 0x10 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear"
rgroup.long 0xFC++0x3
line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register"
width 0x0B
tree.end
tree "USB Device Controller"
base ad:0x49800000
width 8.
group.word 0x00++0x01
line.word 0x00 "IR,Index Register"
bitfld.word 0x00 0.--3. " INDEX ,Endpoint number select" "Endpoint0,Endpoint1,Endpoint2,Endpoint3,Endpoint4,Endpoint5,Endpoint6,Endpoint6,Endpoint7,Endpoint8,?..."
group.word 0x04++0x01
line.word 0x00 "EIR,Endpoint Interrupt Register"
eventfld.word 0x00 8. " EP8I ,Endpoint 8 interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x00 7. " EP7I ,Endpoint 7 interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x00 6. " EP6I ,Endpoint 6 interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x00 5. " EP5I ,Endpoint 5 interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x00 4. " EP4I ,Endpoint 4 interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x00 3. " EP3I ,Endpoint 3 interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x00 2. " EP2I ,Endpoint 2 interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x00 1. " EP1I ,Endpoint 1 interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x00 0. " EP0I ,Endpoint 0 interrupt flag" "No interrupt,Interrupt"
group.word 0x08++0x01
line.word 0x00 "EIER,Endpoint Interrupt Enable Register"
bitfld.word 0x00 8. " EP8IE ,Endpoint 8 interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 7. " EP7IE ,Endpoint 7 interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 6. " EP6IE ,Endpoint 6 interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 5. " EP5IE ,Endpoint 5 interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 4. " EP4IE ,Endpoint 4 interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. " EP3IE ,Endpoint 3 interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 2. " EP2IE ,Endpoint 2 interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 1. " EP1IE ,Endpoint 1 interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 0. " EP0IE ,Endpoint 0 interrupt enable" "Disabled,Enabled"
rgroup.word 0x0c++0x01
line.word 0x00 "FAR,Function Address Register"
hexmask.word.byte 0x00 0.--6. 1. " FA ,Unique address transferred from USB host"
group.word 0x14++0x01
line.word 0x00 "EDR,Endpoint Direction Register"
bitfld.word 0x00 8. " EP8DS ,Endpoint 8 direction select" "Rx endpoint,Tx endpoint"
bitfld.word 0x00 7. " EP7DS ,Endpoint 7 direction select" "Rx endpoint,Tx endpoint"
textline " "
bitfld.word 0x00 6. " EP6DS ,Endpoint 6 direction select" "Rx endpoint,Tx endpoint"
bitfld.word 0x00 5. " EP5DS ,Endpoint 5 direction select" "Rx endpoint,Tx endpoint"
textline " "
bitfld.word 0x00 4. " EP4DS ,Endpoint 4 direction select" "Rx endpoint,Tx endpoint"
bitfld.word 0x00 3. " EP3DS ,Endpoint 3 direction select" "Rx endpoint,Tx endpoint"
textline " "
bitfld.word 0x00 2. " EP2DS ,Endpoint 2 direction select" "Rx endpoint,Tx endpoint"
bitfld.word 0x00 1. " EP1DS ,Endpoint 1 direction select" "Rx endpoint,Tx endpoint"
if (((d.w(ad:(0x49800000+0x18)))&0x10)==0x10)
group.word 0x18++0x01
line.word 0x00 "TR,Test Register"
bitfld.word 0x00 4. " TMD ,Test mode enable" "Disabled,Enabled"
bitfld.word 0x00 3. " TPS ,Test packets enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 2. " TKS ,Test K enable" "Disabled,Enabled"
bitfld.word 0x00 1. " TJS ,Test J enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 0. " TSNS ,Test SE0 NAK enable" "Disabled,Enabled"
else
group.word 0x18++0x01
line.word 0x00 "TR,Test Register"
bitfld.word 0x00 4. " TMD ,Test mode enable" "Disabled,Enabled"
endif
if (((d.w(ad:(0x49800000+0x20)))&0x100)==0x100)
rgroup.word 0x1c++0x01
line.word 0x00 "SSR,System Status Register"
bitfld.word 0x00 15. " BAERR ,Byte align error" "No error,Error"
bitfld.word 0x00 14. " TMERR ,Timeout error" "No error,Error"
textline " "
bitfld.word 0x00 13. " BSERR ,Bit stuff error" "No error,Error"
bitfld.word 0x00 12. " TCERR ,Token CRCerror" "No error,Error"
textline " "
bitfld.word 0x00 11. " DCERR ,Data CRC error error" "No error,Error"
bitfld.word 0x00 10. " EOERR ,EB OVERRUN error" "No error,Error"
textline " "
bitfld.word 0x00 7. " TBM ,Toggle bit mismatch error" "No error,Error"
bitfld.word 0x00 6. " DP ,DP data line state" "0,1"
textline " "
bitfld.word 0x00 5. " DM ,DM data line state" "0,1"
bitfld.word 0x00 4. " HSP ,Host speed" "Full,High"
textline " "
bitfld.word 0x00 3. " SDE ,Speed datection end" "Not detected,Detected"
bitfld.word 0x00 2. " HFRM ,Host forced resume" "Not resumed,Resumed"
textline " "
bitfld.word 0x00 1. " HFSUSP ,Host forced suspend" "Not suspended,Suspended"
bitfld.word 0x00 0. " HFRES ,Host forced reset" "No reset,Reset"
else
rgroup.word 0x1c++0x01
line.word 0x00 "SSR,System Status Register"
bitfld.word 0x00 6. " DP ,DP data line state" "0,1"
bitfld.word 0x00 5. " DM ,DM data line state" "0,1"
textline " "
bitfld.word 0x00 4. " HSP ,Host speed" "Full,High"
bitfld.word 0x00 3. " SDE ,Speed datection end" "Not detected,Detected"
textline " "
bitfld.word 0x00 2. " HFRM ,Host forced resume" "Not resumed,Resumed"
bitfld.word 0x00 1. " HFSUSP ,Host forced suspend" "Not suspended,Suspended"
textline " "
bitfld.word 0x00 0. " HFRES ,Host forced reset" "No reset,Reset"
endif
group.word 0x20++0x01
line.word 0x00 "SCR,System Control Register"
bitfld.word 0x00 14. " DTZIEN ,DMA total countrer zero interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 12. " DIEN ,DUAL interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 8. " EIE ,Error interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 7. " SPDCEN ,Speed detection control enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 6. " SPDEN ,Speed detect end interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. " SPDC ,Speed detection control" "Disabled,Enabled"
textline " "
bitfld.word 0x00 2. " MFRM ,Resume by MCU" "Disabled,Enabled"
bitfld.word 0x00 1. " HSUSPE ,Suspend enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 0. " HRESE ,Reset enable" "Disabled,Enabled"
group.word 0x24++0x01
line.word 0x00 "EP0SR,EP0 Status Register"
bitfld.word 0x00 6. " LWO ,Last word odd" "Low,High"
eventfld.word 0x00 4. " SHT ,Stall handshake transmitted" "Not sent,Sent"
textline " "
eventfld.word 0x00 1. " TST ,Tx successfully received" "Not received,Received"
eventfld.word 0x00 0. " RSR ,Tx successfully received" "Not received,Received"
group.word 0x28++0x01
line.word 0x00 "EP0CR,EP0 control register"
bitfld.word 0x00 1. " ESS ,Endpoint stall set" "Not sent,Sent"
bitfld.word 0x00 0. " TZLS ,Tx zero length set" "Not sent,Sent"
group.word 0x60++0x01
line.word 0x00 "EP0x60BR,EP0x60 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x64++0x01
line.word 0x00 "EP0x64BR,EP0x64 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x68++0x01
line.word 0x00 "EP0x68BR,EP0x68 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x6C++0x01
line.word 0x00 "EP0x6CBR,EP0x6C Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x70++0x01
line.word 0x00 "EP0x70BR,EP0x70 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x74++0x01
line.word 0x00 "EP0x74BR,EP0x74 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x78++0x01
line.word 0x00 "EP0x78BR,EP0x78 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x7C++0x01
line.word 0x00 "EP0x7CBR,EP0x7C Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x80++0x01
line.word 0x00 "EP0x80BR,EP0x80 Buffer Register"
hexmask.word 0x00 0.--15. 1. " BUFFER ,Hold Tx/Rx data between MCU and the core"
group.word 0x2c++0x01
line.word 0x00 "ESR,Enpoint Status Register"
bitfld.word 0x00 11. " FPID ,First OUT packet interrupt disable in OUT DMA operation" "Disabled,Enabled"
eventfld.word 0x00 10. " OSD ,OUT start DMA operation" "Not received,Received"
textline " "
eventfld.word 0x00 9. " DTCZ ,DMA total count zero" "No,Yes"
eventfld.word 0x00 8. " SPT ,Short packed received" "Not received,Received"
textline " "
bitfld.word 0x00 7. " DOM ,Dual operation mode" "No,Yes"
eventfld.word 0x00 6. " FFS ,FIFO flushed" "Not flushed,Flushed"
textline " "
eventfld.word 0x00 5. " FSC ,Function stall condition" "Not sent,Sent"
eventfld.word 0x00 4. " LWO ,Last word odd" "Low,High"
textline " "
bitfld.word 0x00 2.--3. " PSIF ,Packet status in FIFO" "No packet,One packet,Two packet,?..."
eventfld.word 0x00 1. " TPS ,Tx packet success (received ACK)" "Not received,Received"
textline " "
eventfld.word 0x00 0. " RPS ,Rx packet success (received ACK)" "Not received,Received"
group.word 0x30++0x01
line.word 0x00 "ECR,Enpoint Control Register"
bitfld.word 0x00 12. " INPTHLD ,Controls Tx FIFO status" "Sent data,Not sent data"
bitfld.word 0x00 11. " OUTPTHLD ,Controls Rx FIFO status" "Accept data,Not accept data"
textline " "
bitfld.word 0x00 7. " DUEN ,Dual FIFO mode enable" "Disabled,Enabled"
bitfld.word 0x00 6. " FLUSH ,FIFO flush" "Not flushed,Flushed"
textline " "
bitfld.word 0x00 1. " ESS ,Endpoint stall set" "Not sent,Sent"
bitfld.word 0x00 0. " IEMS ,Interrupt enpoint mode set" "Disabled,Enabled"
rgroup.word 0x34++0x01
line.word 0x00 "BRCR,Byte Read Count Register"
hexmask.word 0x00 0.--9. 1. " RDCNT ,FIFO read byte count [9:0]"
group.word 0x38++0x01
line.word 0x00 "BWCR,Byte Write Count Register"
hexmask.word 0x00 0.--9. 1. " WRCNT ,FIFO write byte count [9:0]"
group.word 0x3c++0x01
line.word 0x00 "MPR,MAX Packet Register"
hexmask.word 0x00 0.--10. 1. " MAXP ,MAX packet [10:0]"
group.word 0x40++0x01
line.word 0x00 "DCR,DMA Control Register"
bitfld.word 0x00 5. " ARDRD ,Auto Rx DMA run set disable" "Enabled,Disabled"
bitfld.word 0x00 4. " FMDE ,Burst mode enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " DMDE ,Demand mode DMA enable" "Disabled,Enabled"
bitfld.word 0x00 2. " TDR ,Tx DMA operation run" "Disabled,Enabled"
textline " "
bitfld.word 0x00 1. " RDR ,Rx DMA operation run" "Disabled,Enabled"
bitfld.word 0x00 0. " DEN ,DMA operation mode enable" "Disabled,Enabled"
group.word 0x44++0x01
line.word 0x00 "DTCR,DMA Transfer Counter Register"
hexmask.word 0x00 0.--10. 1. " DTCR ,Max Tx packet value"
group.word 0x48++0x01
line.word 0x00 "DFCR,DMA FIFO Counter Register"
hexmask.word 0x00 0.--11. 1. " DFCR ,Max packet value"
group.word 0x4c++0x01
line.word 0x00 "DTTCR1,DMA Total Transfer Counter Register 1"
hexmask.word 0x00 0.--15. 1. " DTTCR ,Total byte size to be transfered"
group.word 0x50++0x01
line.word 0x00 "DTTCR2,DMA Total Transfer Counter Register 2"
hexmask.word 0x00 0.--15. 1. " DTTCR ,Total byte size to be transfered"
group.word 0x84++0x01
line.word 0x00 "DICR,DMA Interface Counter Register"
bitfld.word 0x00 4. " REL_MBAR ,Select reload condition" "Every end,Every packet"
bitfld.word 0x00 0.--1. " MAX_BURST ,Max burst length" "Single,4-beat,8-beat,16-beat"
group.long 0x88++0x03
line.long 0x00 "MBAR,Memory Base Address Register"
hexmask.long 0x00 0.--31. 1. " MBAR ,Memory base address"
rgroup.long 0x8c++0x03
line.long 0x00 "MCAR,Memory Current Address Register"
hexmask.long 0x00 0.--31. 1. " MCAR ,Memory current address"
group.long 0x100++0x03
line.long 0x00 "FCON,Burst DMA Transfer Control"
bitfld.long 0x00 8. " DMAEN ,DMA enable" "Disabled,Enabled"
bitfld.long 0x00 4. " TF_XLR ,Tx FIFO clear" "No,Yes"
textline " "
bitfld.long 0x00 0. " RF_CLR ,Rx FIFO clear" "No,Yes"
group.long 0x104++0x03
line.long 0x00 "FSTAT,Burst DMA Transfer Status"
bitfld.long 0x00 13. " TF_FULL ,Tx FIFO full" "Disabled,Enabled"
hexmask.long 0x00 8.--12. 1. " TF_CNT ,Number of data in Tx FIFO"
textline " "
bitfld.long 0x00 5. " RF_FULL ,Rx FIFO full" "No,Yes"
hexmask.long 0x00 0.--4. 1. " RF_CNT ,Number of data in Rx FIFO"
tree.end
tree.end
tree "IIC (Inter-Intergrated Circuit)"
base ad:0x54000000
width 9.
group.long 0x00++0x3
line.byte 0x00 "IICCON,IIC-Bus Control Register"
bitfld.byte 0x00 7. " ACKGEN ,Acknowledge generation" "Disabled,Enabled"
bitfld.byte 0x00 6. " TXCLKSRC ,Tx clock source selection" "fPCLK/16,fPCLK/512"
bitfld.byte 0x00 5. " TXRXINT ,Tx/Rx interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 4. " INTPND ,Interrupt pending flag" "Not pending,Pending"
bitfld.byte 0x00 0.--3. " TCV ,Transmit clock value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
group.long 0x04++0x3
line.byte 0x00 "IICSTAT,IIC-Bus Control/Status Register"
bitfld.byte 0x00 6.--7. " MODE ,Mode selection" "Slave receive,Slave transmit,Master receive,Master transmit"
bitfld.byte 0x00 5. " BUSY ,Busy signal status" "Not busy,Busy"
bitfld.byte 0x00 4. " SOUT ,Data output enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " ARBST ,Arbitration status flag" "Successful,Failed"
bitfld.byte 0x00 2. " ADRSLST ,Address-as-slave status flag" "Cleared,Received"
bitfld.byte 0x00 1. " ADRZRST ,Address zero status flag" "Cleared,Received"
textline " "
bitfld.byte 0x00 0. " LRS ,Last-received bit status flag" "Low,High"
group.long 0x08++0x3
line.byte 0x00 "IICADD,IIC-Bus Address Register"
hexmask.byte 0x00 0.--7. 1. " SLADR , Slave sddress"
group.long 0x0c++0x3
line.byte 0x00 "IICDS,IIC-Bus Transmit/Receive Data Shift Register"
hexmask.byte 0x00 0.--7. 1. " DATASF ,Data shift"
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
group.long 0x10++0x3
line.byte 0x00 "IICLC,IIC Multi-Master Line Control Register"
bitfld.byte 0x00 2. " FLT_EN ,IIC-Bus filter enable bit" "Disabled,Enabled"
bitfld.byte 0x00 0.--1. " SDA_O_D ,IIC-Bus line delay lengthj selection bits" "0 clocks,5 clocks,10 clocks,15 clocks"
endif
width 0xb
tree.end
tree "2D (2D Graphics Accelerator)"
base ad:0x4d408000
width 15.
wgroup.long 0x00++0x03 "General Registers"
line.long 0x00 "CONTROL_REG,Control Register"
bitfld.long 0x00 0. " R ,Software reset" "No reset,Reset"
group.long 0x04++0x07
line.long 0x00 "INTEN_REG,Input Enable Register"
bitfld.long 0x00 10. " CCF ,Current command finished interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 9. " ACF ,All commands finished interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " FIFO_FULL ,Command FIFO full interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. " FIFO_INT_E ,Command FIFO greater or equal FIFO_INT_LEVEL interrupt enable" "Disabled,Enabled"
line.long 0x04 "FIFO_INTC_REG,FIFO Interrupt Control"
hexmask.long.byte 0x04 0.--5. 1. " FIFO_INT_LEVEL ,FIFO interrupt level value"
group.long 0x0c++0x03
line.long 0x00 "INTC_PEND_REG,Interrupt Pending Register"
eventfld.long 0x00 10. " INT_CMD_FIN ,Current command finished interrupt flag" "Not requested,Requested"
eventfld.long 0x00 9. " INT_ALL_CMD ,All commands finished interrupt flag" "Not requested,Requested"
textline " "
eventfld.long 0x00 8. " INTP_FULL ,Command FIFO full interrupt flag" "Not requested,Requested"
eventfld.long 0x00 0. " INTP_FIFO_LEVEL ,FIFO_USED reaches FIFO_INT_LEVEL interrupt flag" "Not requested,Requested"
rgroup.long 0x10++0x03
line.long 0x00 "FIFO_STAT_REG,FIFO Status Register"
bitfld.long 0x00 10. " CMD_FIN ,Current command finished status" "Not finished,Finished"
bitfld.long 0x00 9. " ALL_FIN ,All commands finished status" "Not finished,Finished"
textline " "
bitfld.long 0x00 8. " FIFO_EVERFLOW ,Command FIFO status" "Not full,Full"
bitfld.long 0x00 1.--6. " FIFO_USED ,The number od entries occupied in command FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x00 0. " FIFO_LEVEL_INT ,FIFO_USED compare to FIFO_INT_LEVEL status" "Smaller,Greater"
width 10.
wgroup.long 0x100++0x0b "Command Registers"
line.long 0x00 "CMD0_REG,Line Drawing Register"
bitfld.long 0x00 9. " D ,Draw last point" "Draw,Do no draw"
bitfld.long 0x00 8. " M ,Mayor axis" "Y,X"
textline " "
bitfld.long 0x00 1. " L ,Line drawing" "Do not draw,Draw"
bitfld.long 0x00 0. " P ,Point drawing" "Do not draw,Draw"
line.long 0x04 "CMD1_REG,BitBLT Register"
bitfld.long 0x04 1. " S ,Strech BitBLT operation" "No effect,Stretch"
bitfld.long 0x04 0. " N ,Normal BitBLT operation" "No effect,Normal"
line.long 0x08 "CMD2_REG,Host To Screen Start BitBLT register"
hexmask.long 0x08 0.--31. 1. " DATA ,BitBLT data (Start)"
wgroup.long 0x10c++0x0b
line.long 0x00 "CMD3_REG,Host To Screen Continue BitBLT Register"
hexmask.long 0x00 0.--31. 1. " DATA ,BitBLT data (Continue)"
line.long 0x04 "CMD4_REG,Host To Screen Start Color Expansion Register"
hexmask.long 0x04 0.--31. 1. " DATA ,Color expansion data (Start)"
line.long 0x08 "CMD5_REG,Host To Screen Continue Color Expansion Register"
hexmask.long 0x08 0.--31. 1. " DATA ,Color expansion data (Continue)"
wgroup.long 0x11c++0x03
line.long 0x00 "CMD7_REG,Memory To Screen Color Expansion Register"
hexmask.long 0x00 0.--31. 1. " MEM_ADDR ,Bitmap data base address"
tree "Parameter Setting Registers"
width 18.
group.long 0x200++0x0b "Resolution Registers"
line.long 0x00 "SRC_RES_REG,Source Image Resolution Register"
hexmask.long.word 0x00 16.--26. 1. " VertRes ,Vertical resolution of source image"
hexmask.long.word 0x00 0.--10. 1. " HoriRes ,Horizontal resolution of source image"
line.long 0x04 "SRC_HORI_RES_REG,Source Image Horizontal Resolution Register"
hexmask.long.word 0x04 0.--10. 1. " HoriRes ,Horizontal resolution of source image"
line.long 0x08 "SRC_VERI_RES_REG,Source Image Horizontal Resolution Register"
hexmask.long.word 0x08 0.--10. 1. " VertRes ,Vertical resolution of source image"
group.long 0x210++0x0b
line.long 0x00 "SC_RES_REG,Screen Resolution Register"
hexmask.long.word 0x00 16.--26. 1. " VertRes ,Vertical resolution of the screen"
hexmask.long.word 0x00 0.--10. 1. " HoriRes ,Horizontal resolution of the screen"
line.long 0x04 "SC_HORI_RES_REG,Screen Horizontal Resolution Register"
hexmask.long.word 0x04 0.--10. 1. " HoriRes ,Horizontal resolution of the screen"
line.long 0x08 "SC_VERI_RES_REG,Screen Vertical Resolution Register"
hexmask.long.word 0x08 0.--10. 1. " VertRes ,Vertical resolution of the screen"
width 13.
group.long 0x220++0x0b "Clipping Window Registers"
line.long 0x00 "CW_LT_REG,LeftTop Clipping Window Register"
hexmask.long.word 0x00 16.--26. 1. " TopCW_Y ,Top Y clipping window"
hexmask.long.word 0x00 0.--10. 1. " LeftCW_X ,Left X coordinate of clipping window"
line.long 0x04 "CW_LT_X_REG,Left X Clipping Window Register"
hexmask.long.word 0x04 0.--10. 1. " LeftCW_X ,Left X clipping window"
line.long 0x08 "CW_LT_Y_REG,Top Y Clipping Window Register"
hexmask.long.word 0x08 0.--10. 1. " TopCW_Y ,Top Y clipping window"
group.long 0x230++0x0b
line.long 0x00 "CW_RB_REG,RightBottom Clipping Window Register"
hexmask.long.word 0x00 16.--26. 1. " BottomCW_Y ,Bottom Y clipping window"
hexmask.long.word 0x00 0.--10. 1. " RightCW_X ,Right X clipping window"
line.long 0x04 "CW_RB_X_REG,Right X Clipping Window Register"
hexmask.long.word 0x04 0.--10. 1. " RightCW_X ,Right X clipping window"
line.long 0x08 "CW_RB_Y_REG,Bottom Y Clipping Window Register"
hexmask.long.word 0x08 0.--10. 1. " BottomCW_Y ,Bottom Y clipping window"
width 14.
group.long 0x300++0x0b "Coordinates Registers"
line.long 0x00 "COORD0_REG,Coordinate_0 Register"
hexmask.long.word 0x00 16.--26. 1. " Y ,Coordinate_0 Y"
hexmask.long.word 0x00 0.--10. 1. " X ,Coordinate_0 X"
line.long 0x04 "COORD0_X_REG,Coordinate_0 X Register"
hexmask.long.word 0x04 0.--10. 1. " COORD0_X ,Coordinate_0 X"
line.long 0x08 "COORD0_Y_REG,Coordinate_0 Y Register"
hexmask.long.word 0x08 0.--10. 1. " COORD0_Y ,Coordinate_0 Y"
group.long 0x310++0x0b
line.long 0x00 "COORD1_REG,Coordinate_1 Register"
hexmask.long.word 0x00 16.--26. 1. " Y ,Coordinate_1 Y"
hexmask.long.word 0x00 0.--10. 1. " X ,Coordinate_1 X"
line.long 0x04 "COORD1_X_REG,Coordinate_1 X Register"
hexmask.long.word 0x04 0.--10. 1. " COORD1_X ,Coordinate_1 X"
line.long 0x08 "COORD1_Y_REG,Coordinate_1 Y Register"
hexmask.long.word 0x08 0.--10. 1. " COORD1_Y ,Coordinate_1 Y"
group.long 0x320++0x0b
line.long 0x00 "COORD2_REG,Coordinate_2 Register"
hexmask.long.word 0x00 16.--26. 1. " Y ,Coordinate_2 Y"
hexmask.long.word 0x00 0.--10. 1. " X ,Coordinate_2 X"
line.long 0x04 "COORD2_X_REG,Coordinate_2 X Register"
hexmask.long.word 0x04 0.--10. 1. " COORD2_X ,Coordinate_2 X"
line.long 0x08 "COORD2_Y_REG,Coordinate_2 Y Register"
hexmask.long.word 0x08 0.--10. 1. " COORD2_Y ,Coordinate_2 Y"
group.long 0x330++0x0b
line.long 0x00 "COORD3_REG,Coordinate_3 Register"
hexmask.long.word 0x00 16.--26. 1. " Y ,Coordinate_3 Y"
hexmask.long.word 0x00 0.--10. 1. " X ,Coordinate_3 X"
line.long 0x04 "COORD3_X_REG,Coordinate_3 X Register"
hexmask.long.word 0x04 0.--10. 1. " COORD3_X ,Coordinate_3 X"
line.long 0x08 "COORD3_Y_REG,Coordinate_3 Y Register"
hexmask.long.word 0x08 0.--10. 1. " COORD3_Y ,Coordinate_3 Y"
width 12.
group.long 0x340++0x0b "Rotation Registers"
line.long 0x00 "ROT_OC_REG,Rotation Origin Coordinate Register"
hexmask.long.word 0x00 16.--26. 1. " Y ,Y coordinate of the reference point of rotation"
hexmask.long.word 0x00 0.--10. 1. " X ,X coordinate of the reference point of rotation"
line.long 0x04 "ROT_OC_X,Rotation Origin Coordinate X Register"
hexmask.long.word 0x04 0.--10. 1. " X ,X coordinate of the reference point of rotation"
line.long 0x08 "ROT_OC_Y,Rotation Origin Coordinate Y Register"
hexmask.long.word 0x08 0.--10. 1. " Y ,Y coordinate of the reference point of rotation"
group.long 0x34c++0x03
line.long 0x00 "ROTATE_REG,Rotation Register"
bitfld.long 0x00 5. " FY ,Y-flip" "0,1"
bitfld.long 0x00 4. " FX ,X-flip" "0,1"
textline " "
bitfld.long 0x00 3. " R3 ,270 rotation" "0,1"
bitfld.long 0x00 2. " R2 ,180 rotation" "0,1"
textline " "
bitfld.long 0x00 1. " R1 ,90 rotation" "0,1"
bitfld.long 0x00 0. " R0 ,0 rotation" "0,1"
width 11.
group.long 0x400++0x07 "X,Y Increment Setting Registers"
line.long 0x00 "X_INC_REG,X Increment Register"
hexmask.long.tbyte 0x00 0.--21. 1. " X_INC ,X increment value"
line.long 0x04 "Y_INC_REG,Y Increment Register"
hexmask.long.tbyte 0x04 0.--21. 1. " Y_INC ,Y increment value"
width 11.
group.long 0x410++0x03 "ROP & Alpha Setting Registers"
line.long 0x00 "ROP_REG,Raster Operation Register"
bitfld.long 0x00 13. " OS ,Third operand select" "Pattern,Foreground color"
bitfld.long 0x00 10.--12. " ABM ,Alpha mode" "Disabled,Perpixel,Alpha,Reserved,Fading,?..."
textline " "
bitfld.long 0x00 9. " T ,Raster operation mode" "Opaque,Transparent"
hexmask.long.byte 0x00 0.--7. 1. " ROP_Value ,Raster operation value"
group.long 0x420++0x03
line.long 0x00 "APLHA_REG,Alpha Register"
hexmask.long.byte 0x00 8.--15. 1. " Fading ,Fading offset value"
hexmask.long.byte 0x00 0.--7. 1. " Alpha ,Alpha value"
width 20.
group.long 0x500++0x0b "Color Registers"
line.long 0x00 "FG_COLOR_REG,Foreground Color Register"
hexmask.long 0x00 0.--31. 1. " FG_COLOR ,Foreground color value"
line.long 0x04 "BG_COLOR_REG,Background Color Register"
hexmask.long 0x04 0.--31. 1. " BG_COLOR ,Background color value"
line.long 0x08 "BS_COLOR_REG,BlueScreen Color Register"
hexmask.long 0x08 0.--31. 1. " BS_COLOR ,BlueScreen color value"
group.long 0x510++0x07
line.long 0x00 "SRC_COLOR_MODE_REG,Source Image Color Mode Register"
bitfld.long 0x00 4. " Narrow ,YUV range" "Wide,Narrow"
bitfld.long 0x00 3. " YUV ,Color mode" "RGB,YUV"
textline " "
bitfld.long 0x00 0.--2. " COLOR_S ,Color setting" "RGB_565,RGBA_5551,ARGB_1555,RGBA_8888,ARGB_8888,XRGB_8888,RGBX_8888,?..."
line.long 0x04 "DEST_COLOR_MODE_REG,Destination Image Color Mode Register"
bitfld.long 0x04 0.--2. " COLOR_S ,Color setting" "RGB_565,RGBA_5551,ARGB_1555,RGBA_8888,ARGB_8888,XRGB_8888,RGBX_8888,?..."
width 14.
group.long 0x600++0x7f "Pattern Registers"
line.long 0x0 "PAT_REG0,Pattern Register 0"
hexmask.long 0x0 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x4 "PAT_REG1,Pattern Register 1"
hexmask.long 0x4 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x8 "PAT_REG2,Pattern Register 2"
hexmask.long 0x8 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0xC "PAT_REG3,Pattern Register 3"
hexmask.long 0xC 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x10 "PAT_REG4,Pattern Register 4"
hexmask.long 0x10 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x14 "PAT_REG5,Pattern Register 5"
hexmask.long 0x14 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x18 "PAT_REG6,Pattern Register 6"
hexmask.long 0x18 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x1C "PAT_REG7,Pattern Register 7"
hexmask.long 0x1C 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x20 "PAT_REG8,Pattern Register 8"
hexmask.long 0x20 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x24 "PAT_REG9,Pattern Register 9"
hexmask.long 0x24 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x28 "PAT_REG10,Pattern Register 10"
hexmask.long 0x28 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x2C "PAT_REG11,Pattern Register 11"
hexmask.long 0x2C 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x30 "PAT_REG12,Pattern Register 12"
hexmask.long 0x30 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x34 "PAT_REG13,Pattern Register 13"
hexmask.long 0x34 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x38 "PAT_REG14,Pattern Register 14"
hexmask.long 0x38 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x3C "PAT_REG15,Pattern Register 15"
hexmask.long 0x3C 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x40 "PAT_REG16,Pattern Register 16"
hexmask.long 0x40 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x44 "PAT_REG17,Pattern Register 17"
hexmask.long 0x44 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x48 "PAT_REG18,Pattern Register 18"
hexmask.long 0x48 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x4C "PAT_REG19,Pattern Register 19"
hexmask.long 0x4C 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x50 "PAT_REG20,Pattern Register 20"
hexmask.long 0x50 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x54 "PAT_REG21,Pattern Register 21"
hexmask.long 0x54 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x58 "PAT_REG22,Pattern Register 22"
hexmask.long 0x58 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x5C "PAT_REG23,Pattern Register 23"
hexmask.long 0x5C 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x60 "PAT_REG24,Pattern Register 24"
hexmask.long 0x60 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x64 "PAT_REG25,Pattern Register 25"
hexmask.long 0x64 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x68 "PAT_REG26,Pattern Register 26"
hexmask.long 0x68 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x6C "PAT_REG27,Pattern Register 27"
hexmask.long 0x6C 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x70 "PAT_REG28,Pattern Register 28"
hexmask.long 0x70 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x74 "PAT_REG29,Pattern Register 29"
hexmask.long 0x74 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x78 "PAT_REG30,Pattern Register 30"
hexmask.long 0x78 0.--31. 1. " PAT_REG ,Pattern register"
line.long 0x7C "PAT_REG31,Pattern Register 31"
hexmask.long 0x7C 0.--31. 1. " PAT_REG ,Pattern register"
group.long 0x700++0x0b
line.long 0x00 "PATOFF_REG,Pattern Offset Register"
bitfld.long 0x00 16.--18. " POffsetY ,Pattern OffsetY value" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. " POffsetX ,Pattern OffsetX value" "0,1,2,3,4,5,6,7"
line.long 0x04 "PATOFF_X_REG,Pattern Offset X Register"
bitfld.long 0x04 0.--2. " POffsetX ,Pattern OffsetX value" "0,1,2,3,4,5,6,7"
line.long 0x08 "PATOFF_Y_REG,Pattern Offset Y Register"
bitfld.long 0x08 0.--2. " POffsetY ,Pattern OffsetY value" "0,1,2,3,4,5,6,7"
width 21.
group.long 0x720++0x0b "Stencil Test Registers"
line.long 0x00 "COLORKEY_CTRL_REG,Colorkey Control Register"
bitfld.long 0x00 4. " Stencillnverse ,Stencil test" "Normal,Inversed"
bitfld.long 0x00 3. " StencilOnR ,Stencil test for R value" "Off,On"
textline " "
bitfld.long 0x00 2. " StencilOnG ,Stencil test for G value" "Off,On"
bitfld.long 0x00 1. " StencilOnB ,Stencil test for B value" "Off,On"
textline " "
bitfld.long 0x00 0. " StencilOnA ,Stencil test for A value" "Off,On"
line.long 0x04 "COLORKEY_DR_MIN_REG,Colorkey Decision Reference Minimum Register"
hexmask.long.byte 0x04 24.--31. 1. " A_DR(min) ,Aplha DR MIN value"
hexmask.long.byte 0x04 16.--23. 1. " R_DR(min) ,RED DR MIN value"
textline " "
hexmask.long.byte 0x04 8.--15. 1. " G_DR(min) ,GREEN DR MIN value"
hexmask.long.byte 0x04 0.--7. 1. " B_DR(min) ,BLUE DR MIN value"
line.long 0x08 "COLORKEY_DR_MAX_REG,Colorkey Decision Reference Maximum Register"
hexmask.long.byte 0x08 24.--31. 1. " A_DR(max) ,Aplha DR MAX value"
hexmask.long.byte 0x08 16.--23. 1. " R_DR(max) ,RED DR MAX value"
textline " "
hexmask.long.byte 0x08 8.--15. 1. " G_DR(max) ,GREEN DR MAX value"
hexmask.long.byte 0x08 0.--7. 1. " B_DR(max) ,BLUE DR MAX value"
width 20.
group.long 0x730++0x07 "Image Base Address Registers"
line.long 0x00 "SRC_BASE_ADDR_REG,Source Image Base Address Register"
hexmask.long 0x00 0.--31. 1. " ADDR ,Base address of the source image"
line.long 0x04 "DEST_BASE_ADDR_REG,Destination Image Base Address Register"
hexmask.long 0x04 0.--31. 1. " ADDR ,Base address of the destination image"
tree.end
tree.end
tree "HSSPI (High Speed Serial Peripheral Interface)"
base ad:0x52000000
width 16.
group.long 0x00++0x0b
line.long 0x00 "CH_CFG,HS_SPI Configuration Register"
bitfld.long 0x00 6. " High_speed_en ,High speed enable in slave mode" "Disabled,Enabled"
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
textline " "
bitfld.long 0x00 4. " SLAVE ,Whether HS_SPI channel is Master or Slave" "Master,Slave"
bitfld.long 0x00 3. " CPOL ,Determine an active high or low clock" "High,Low"
textline " "
bitfld.long 0x00 2. " CPHA ,Select transfer format" "A,B"
bitfld.long 0x00 1. " RxChOn ,HS_SPI Rx Channel On" "Off,On"
textline " "
bitfld.long 0x00 0. " TxChOn ,HS_SPI Tx Channel On" "Off,On"
line.long 0x04 "CLK_CFG,Clock Coinfiguration Register"
bitfld.long 0x04 9.--10. " ClkSel ,Clock source selection" "PCLK,USBClk,EPLL,?..."
bitfld.long 0x04 8. " ENCLK ,Clock enable" "Disabled,Enabled"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " PRE_VL ,HS_SPI clock-out division rate"
line.long 0x08 "MODE_CFG,HS_SPI FIFO Control Register"
bitfld.long 0x08 29.--30. " Ch_tran_size ,Channel transafer size" "Byte,Halfword,Word,?..."
hexmask.long.word 0x08 19.--28. 1. " TR_CNT ,Count value from writing the last data in RX FIFO"
textline " "
bitfld.long 0x08 17.--18. " Bus_tran_size ,Bus transafer size" "Byte,Halfword,Word,?..."
bitfld.long 0x08 11.--16. " RxTrigger ,Rx FIFO trigger level in INT mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x08 5.--10. " TxTrigger ,Tx FIFO trigger level in INT mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 2. " RxDMA_ON ,DMA mode enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 1. " TxDMA_ON ,DMA mode enable" "Disabled,Enabled"
bitfld.long 0x08 0. " DMA_tran ,DMA transfer type" "Single,4 burst"
if (((d.w(ad:(0x52000000+0x0c)))&0x2)==0x00)
group.long 0x0c++0x03
line.long 0x00 "SL_SEL_REG,Slave Selection Signal Register"
bitfld.long 0x00 4.--9. " nCS_T_CNT ,nSSout inactive time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
bitfld.long 0x00 1. " AUTO_n_MAN ,Chip select toggle manual or auto selection" "Manual,Auto"
textline " "
bitfld.long 0x00 0. " nSSout ,Slave selection signal" "Active,Inactive"
else
group.long 0x0c++0x03
line.long 0x00 "SL_SEL_REG,Slave Selection Signal Register"
bitfld.long 0x00 4.--9. " nCS_T_CNT ,nSSout inactive time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
bitfld.long 0x00 1. " AUTO_n_MAN ,Chip select toggle manual or auto selection" "Manual,Auto"
endif
group.long 0x10++0x03
line.long 0x00 "HS_SPI_INT_EN,HS_SPI Interrupt Enable Register"
bitfld.long 0x00 6. " IntEnTrailing ,Interrupt enable for trailing count to be zero" "Disabled,Enabled"
bitfld.long 0x00 5. " IntEnRxOverrun ,Interrupt enable for RxOverrun" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " IntEnRxUnderrun ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
bitfld.long 0x00 3. " IntEnTxOverrun ,Interrupt enable for TxOverrun" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " IntEnTxUnderrun ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
bitfld.long 0x00 1. " IntEnRxFifoRdy ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " IntEnTxFifoRdy ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
if (((d.w(ad:(0x52000000+0x00)))&0x10)==0x00)
rgroup.long 0x14++0x03
line.long 0x00 "HS_SPI_STATUS,HS_SPI Status Register"
bitfld.long 0x00 21. " TX_done ,Indication of transfer done in Shift register" "Not empty,Empty"
bitfld.long 0x00 20. " Trailing_Cnt_Done ,Indication that trailing count is zero" "Not zero,Zero"
textline " "
hexmask.long.byte 0x00 13.--19. 1. " RxFifoLvl ,Data level in RX FIFO"
hexmask.long.byte 0x00 6.--12. 1. " TxFifoLvl ,Data level in TX FIFO"
textline " "
bitfld.long 0x00 5. " RxOverrun ,Rx Fifo Overrun error" "No error,Error"
bitfld.long 0x00 4. " RxUnderrun ,Rx Fifo Underrun error" "No error,Error"
textline " "
bitfld.long 0x00 3. " TxOverrun ,Tx Fifo Overrun error" "No error,Error"
bitfld.long 0x00 2. " TxUnderrun ,Tx Fifo Underrun error" "No error,Error"
textline " "
bitfld.long 0x00 1. " RxFifoRdy ,Data level in FIFO compare to trigger level" "Less,More"
bitfld.long 0x00 0. " TxFifoRdy ,Data level in FIFO compare to trigger level" "Less,More"
else
rgroup.long 0x14++0x03
line.long 0x00 "HS_SPI_STATUS,HS_SPI Status Register"
bitfld.long 0x00 20. " Trailing_Cnt_Done ,Indication that trailing count is zero" "Not zero,Zero"
textline " "
hexmask.long.byte 0x00 13.--19. 1. " RxFifoLvl ,Data level in RX FIFO"
hexmask.long.byte 0x00 6.--12. 1. " TxFifoLvl ,Data level in TX FIFO"
textline " "
bitfld.long 0x00 5. " RxOverrun ,Rx Fifo Overrun error" "No error,Error"
bitfld.long 0x00 4. " RxUnderrun ,Rx Fifo Underrun error" "No error,Error"
textline " "
bitfld.long 0x00 3. " TxOverrun ,Tx Fifo Overrun error" "No error,Error"
bitfld.long 0x00 2. " TxUnderrun ,Tx Fifo Underrun error" "No error,Error"
textline " "
bitfld.long 0x00 1. " RxFifoRdy ,Data level in FIFO compare to trigger level" "Less,More"
bitfld.long 0x00 0. " TxFifoRdy ,Data level in FIFO compare to trigger level" "Less,More"
endif
wgroup.long 0x18++0x03
line.long 0x00 "HS_SPI_TX_DATA,HS_SPI TX DATA Register"
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the HS_SPI channel"
rgroup.long 0x1c++0x03
line.long 0x00 "HS_SPI_RX_DATA,HS_SPI RX DATA Register"
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the HS_SPI channel"
group.long 0x20++0xf
line.long 0x00 "PCT_CNT_REG,Packet Count Register"
bitfld.long 0x00 16. " Pct_Cnt_En ,Packet count enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. " Cnt_Val ,Packet count value"
line.long 0x04 "PND_CLR_REG,Pending Clear Register"
bitfld.long 0x04 4. " TX_Underrun_Clr ,Tx Underrun pending bit clear" "No effect,Clear"
bitfld.long 0x04 3. " TX_Overrun_Clr ,Tx Overrun pending bit clear" "No effect,Clear"
textline " "
bitfld.long 0x04 2. " RX_Underrun_Clr ,Rx Underrun pending bit clear" "No effect,Clear"
bitfld.long 0x04 1. " RX_Overrun_Clr ,Rx Overrun pending bit clear" "No effect,Clear"
textline " "
bitfld.long 0x04 0. " Trailing_Clr ,Trailing pending bit clear" "No effect,Clear"
line.long 0x08 "SWAP_CFG,SWAP Config Register"
bitfld.long 0x08 7. " RX_Half-word_Sw ,RX half-word swap" "Off,Swap"
bitfld.long 0x08 6. " RX_Byte_Sw ,RX byte swap" "Off,Swap"
textline " "
bitfld.long 0x08 5. " RX_Bit_Sw ,RX bit swap" "Off,Swap"
bitfld.long 0x08 4. " RX_Sw_En ,RX swap enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 3. " TX_Half-word_Sw ,TX half-word swap" "Off,Swap"
bitfld.long 0x08 2. " TX_Byte_Sw ,TX byte swap" "Off,Swap"
textline " "
bitfld.long 0x08 1. " TX_Bit_Sw ,TX bit swap" "Off,Swap"
bitfld.long 0x08 0. " TX_Sw_En ,TX swap enable" "Disabled,Enabled"
line.long 0x0c "FB_CLK_SEL,Feedback Clock Selecting Register"
bitfld.long 0x0c 0.--1. " FB_Clk_Sel ,Feedback Clock Selection" "0ns,3ns,6ns,9ns"
width 12.
tree.end
tree.open "HSMMC (High-speed MMC)"
tree "HSMMC 0"
base ad:0x4ac00000
width 15.
group.long 0x00++0x03
line.long 0x00 "SYSAD0,System Address Register"
hexmask.long 0x00 0.--31. 1. " SYSAD ,SDMA system address"
group.word 0x04++0x03
line.word 0x00 "BLKSIZE0,Host DMA Buffer Boundary And Transfer Block Size Register"
bitfld.word 0x00 12.--14. " BUFBOUND ,Host DMA buffer boundary" "4K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,512K bytes"
hexmask.word 0x00 0.--11. 1. " BLKSIZE ,Transfer block size"
line.word 0x02 "BLKCNT0,Blocks Count Current Transfer"
hexmask.word 0x02 0.--15. 1. " BLKCNT ,Blocks count for current transfer"
group.long 0x08++0x03
line.long 0x00 "ARGUMENT0,Command Argument Register"
hexmask.long 0x00 0.--31. 1. " ARGUMENT ,Command argument"
group.word 0x0c++0x01
line.word 0x00 "TRNMOD0,Transfer Mode Setting Register"
bitfld.word 0x00 8.--9. " CCSCON ,Command completion setting register" "Disabled,With transfer ECS enabled,Without transfer ECS enabled,ACS"
bitfld.word 0x00 5. " MUL1SIN0 ,Multi/single block select" "Single,Multiple"
textline " "
bitfld.word 0x00 4. " RD1WT0 ,Data transfer direction select" "Write,Read"
bitfld.word 0x00 2. " ENACMD12 ,Auto CMD12 enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 1. " ENBLKCNT ,Block count enable" "Disabled,Enabled"
bitfld.word 0x00 0. " ENDMA ,DMA enable" "Disabled,Enabled"
group.word 0x0e++0x01
line.word 0x00 "CMDREG0,Command Register"
bitfld.word 0x00 8.--13. " CMDIDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.word 0x00 6.--7. " CMDTYP ,Command type" "Normal,Suspend CMD52,Resume CMD52,Abort CMD12"
textline " "
bitfld.word 0x00 5. " DATAPRNT ,Data present select" "No data,Data"
bitfld.word 0x00 4. " ENCMDIDX ,Command index check enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " ENCMDCRC ,Command CRC check enable" "Disabled,Enabled"
bitfld.word 0x00 0.--1. " RSPTYP ,Response type select" "Disabled,Length 136,Length 48,Length 48 Busy"
group.long 0x10++0xf
line.long 0x00 "RSPREG0_0,Response Register 0"
hexmask.long 0x00 0.--31. 1. " CMDRSP ,Command response [31:0]"
line.long 0x04 "RSPREG1_0,Response Register 1"
hexmask.long 0x04 0.--31. 1. " CMDRSP ,Command response [63:32]"
line.long 0x08 "RSPREG2_0,Response Register 2"
hexmask.long 0x08 0.--31. 1. " CMDRSP ,Command response [95:64]"
line.long 0x0c "RSPREG3_0,Response Register 3"
hexmask.long 0x0c 0.--31. 1. " CMDRSP ,Command response [127:96]"
group.long 0x20++0x03
line.long 0x00 "BDATA0,Buffer Data Register"
hexmask.long 0x00 0.--31. 1. " BUFDAT ,Buffer data"
rgroup.long 0x24++0x03
line.long 0x00 "PRINTS0,Present State Register"
bitfld.long 0x00 24. " PRNTCMD ,CMD line signal level" "No error,Error"
bitfld.long 0x00 23. " PRNTDAT3 ,DAT3 line signal level" "Ready,Busy"
textline " "
bitfld.long 0x00 22. " PRNTDAT2 ,DAT2 line signal level" "Ready,Busy"
bitfld.long 0x00 21. " PRNTDAT1 ,DAT1 line signal level" "Ready,Busy"
textline " "
bitfld.long 0x00 20. " PRNTDAT0 ,DAT0 line signal level" "Ready,Busy"
bitfld.long 0x00 19. " PRNTWP ,Write protect switch pin level enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " PRNTCD ,Card detect pin level" "No card,Card present"
bitfld.long 0x00 17. " STBLCARD ,Card state stable" "Not stable,Stable"
textline " "
bitfld.long 0x00 16. " INSCARD ,Card inserted" "No card,Card inserted"
bitfld.long 0x00 13. " DIFF4W ,FIFO Pointer difference 4-word" "Low,High"
textline " "
bitfld.long 0x00 12. " DIFF1W ,FIFO Pointer difference 1-word" "Low,High"
bitfld.long 0x00 11. " BUFRDRDY ,Buffer read enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " BUFWTRDY ,Buffer write enable" "Disabled,Enabled"
bitfld.long 0x00 9. " RDTRANACT ,Read transfer active" "No valid data,Transferring data"
textline " "
bitfld.long 0x00 8. " WTTRANACT ,Write transfer active" "No valid data,Transferring data"
bitfld.long 0x00 2. " DATLINEACT ,DAT line active" "Inactive,Active"
textline " "
bitfld.long 0x00 1. " CMDINHDAT ,Data inhibit" "Can issue command,Cannot issue command"
bitfld.long 0x00 0. " CMDINHCMD ,Command inhibit" "Can issue command,Cannot issue command"
group.byte 0x28++0x00
line.byte 0x00 "HOSTCTL0,Host Control Register"
sif (cpu()=="S3C2450")
endif
bitfld.byte 0x00 3.--4. " DMASEL ,DMA select" "SDMA,Reserved,32-bit ADMA2,64-bit ADMA2"
bitfld.byte 0x00 2. " ENHIGHSPD ,High speed enable" "High speed,Normal speed"
textline " "
bitfld.byte 0x00 1. " WIDE4 ,Data transfer width mode" "1-bit,4-bit"
sif (cpu()=="S3C2450")
bitfld.byte 0x00 0. " ONLED ,LED Control" "Off,On"
endif
group.byte 0x29++0x00
line.byte 0x00 "PWRCON0,Power Control Register"
bitfld.byte 0x00 1.--3. " SELPWRLVL ,SD bus voltage select" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8V,3.0V,3.3V"
bitfld.byte 0x00 0. " PWRON ,SD bus power" "Off,On"
group.byte 0x2a++0x01
line.byte 0x00 "BLKGAP0,Block Gap Control register"
bitfld.byte 0x00 3. " ENINTBGAP ,Interrupt at block gap" "Disabled,Enabled"
bitfld.byte 0x00 2. " ENRWAIT ,Read wait control" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " CONTREQ ,Continue request" "Not affect,Restart"
bitfld.byte 0x00 0. " STOPBGAP ,Stop at block gap request" "Transfer,Stop"
line.byte 0x01 "WAKCON0,Wakeup Control Register"
bitfld.byte 0x01 2. " ENWKUPREM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.byte 0x01 1. " ENWKUPINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
textline " "
bitfld.byte 0x01 0. " ENWKUPINT ,Wakeup event enable on SD card interrupt" "Disabled,Enabled"
group.word 0x2c++0x01
line.word 0x00 "CLKCON0,Clock Control Register"
hexmask.word.byte 0x00 8.--15. 1. " SELFREQ ,SDCLK frequency select"
bitfld.word 0x00 3. " STBLEXTCLK ,External clock stable" "Not ready,Ready"
textline " "
bitfld.word 0x00 2. " ENSDCLK ,SD clock enable" "Disabled,Enabled"
bitfld.word 0x00 1. " STBLINTCLK ,Internal clock stable" "Not ready,Ready"
textline " "
bitfld.word 0x00 0. " ENINTCLK ,Internal clock enable" "Disabled,Enabled"
group.byte 0x2e++0x00
line.byte 0x00 "TIMEOUTCON0,Timeout Control Register"
bitfld.byte 0x00 0.--3. " TIMEOUTCON ,Data timeout counter value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,?..."
group.byte 0x2f++0x00
line.byte 0x00 "SWRST0,Software Reset Register"
bitfld.byte 0x00 2. " RSTDAT ,Software reset for DAT line" "No reset,Reset"
bitfld.byte 0x00 1. " RSTCMD ,Software reset for CMD line" "No reset,Reset"
textline " "
bitfld.byte 0x00 1. " RSTDAT ,Software reset for All" "No reset,Reset"
group.word 0x30++0x01
line.word 0x00 "NORINTSTS0,Normal Interrupt Status Register"
bitfld.word 0x00 15. " STAERR ,Error interrupt" "No error,Error"
eventfld.word 0x00 14. " STAFIA3 ,FIFO SD Address pointer interrupt 3 status" "Occurred,Not ocurred"
textline " "
eventfld.word 0x00 13. " STAFIA2 ,FIFO SD Address pointer interrupt 2 status" "Occurred,Not ocurred"
eventfld.word 0x00 12. " STAFIA1 ,FIFO SD Address pointer interrupt 1 status" "Occurred,Not ocurred"
textline " "
eventfld.word 0x00 11. " STAFIA0 ,FIFO SD Address pointer interrupt 0 status" "Occurred,Not ocurred"
eventfld.word 0x00 10. " STARWAIT ,Read wait interrupt status" "Occurred,Not ocurred"
textline " "
eventfld.word 0x00 9. " STACCS ,CCS interrupt status" "Occurred,Not ocurred"
bitfld.word 0x00 8. " STACARDINT ,Card interrupt" "No interrupt,Interrupt"
textline " "
eventfld.word 0x00 7. " STACARDREM ,Card removal" "Card stable,Card removed"
eventfld.word 0x00 6. " STACARDINS ,Card insertion" "Card stable,Card inserted"
textline " "
eventfld.word 0x00 5. " STABUFRDRDY ,Buffer read ready" "Not ready,ready"
eventfld.word 0x00 4. " STABUFWTRDY ,Buffer write ready" "Not ready,ready"
textline " "
eventfld.word 0x00 3. " STADMAINT ,DMA interrupt" "No interrupt,Interrupt"
eventfld.word 0x00 2. " STABLKGAP ,Block gap event" "No event,Event occurred"
textline " "
eventfld.word 0x00 1. " STATRANCMPLT ,Transfer complete" "Not completed,Completed"
eventfld.word 0x00 0. " STACMDCMPLT ,Command complete" "Not completed,Completed"
group.word 0x32++0x01
line.word 0x00 "ERRINTSTS0,Error Interrupt Status Register"
eventfld.word 0x00 9. " ADMAERR ,ADMA error" "No error,Error"
eventfld.word 0x00 8. " STAACMDERR ,Auto CMD12 error" "No error,Error"
textline " "
eventfld.word 0x00 6. " STADENDERR ,Data end bit error" "No error,Error"
eventfld.word 0x00 5. " STADATCRCERR ,Data CRC error" "No error,Error"
textline " "
eventfld.word 0x00 4. " STADATTOUTERR ,Data timeout error" "No error,Error"
eventfld.word 0x00 3. " STACMIDIDXERR ,Command index error" "No error,Error"
textline " "
eventfld.word 0x00 2. " CMDEBITERR ,Command end bit error" "No error,Error"
eventfld.word 0x00 1. " STACMDCRCERR ,Command CRC error" "No error,Error"
textline " "
eventfld.word 0x00 0. " STACMDTOUTERR ,Command timeout error" "No error,Error"
group.word 0x34++0x01
line.word 0x00 "NORINTSTSEN0,Normal Interrupt Status Register"
bitfld.word 0x00 14. " ENSTAFIA3 ,FIFO SD address pointer interrupt 3 status enable" "Masked,Not masked"
bitfld.word 0x00 13. " ENSTAFIA2 ,FIFO SD address pointer interrupt 2 status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 12. " ENSTAFIA1 ,FIFO SD address pointer interrupt 1 status enable" "Masked,Not masked"
bitfld.word 0x00 11. " ENSTAFIA0 ,FIFO SD address pointer interrupt 0 status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 10. " ENSTARWAIT ,Read wait interrupt status enable" "Masked,Not masked"
bitfld.word 0x00 9. " ENSTACCS ,CCS interrupt status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 8. " ENSTACARDINT ,Card interrupt status enable" "Masked,Not masked"
bitfld.word 0x00 7. " ENSTACARDREM ,Card removal status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSTACARDNS ,Card insertion status enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSTABUFRDRDY ,Buffer read ready status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSTABUFWTRDY ,Buffer write ready status enable " "Masked,Not masked"
bitfld.word 0x00 3. " ENSTADMAINT ,DMA interrupt status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSTABLKGAP ,Block gap event status enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSTATRANCMPLT ,Transfer complete status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSTACMDCMPLT ,Command complete status enable" "Masked,Not masked"
group.word 0x36++0x01
line.word 0x00 "ERRINTSTSEN0,Error Interrupt Status Enable Register"
bitfld.word 0x00 9. " ADMAERR ,ADMA error status enable" "Masked,Not masked"
bitfld.word 0x00 8. " ENSTAACMDERR ,Auto CMD12 error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSTADENDERR ,Data end bit error status enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSTADATCRCERR ,Data CRC error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSTADATTOUTERR ,Data timeout error status enable" "Masked,Not masked"
bitfld.word 0x00 3. " ENSTACMIDIDXERR ,Command index error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSTACMDEBITERR ,Command end bit error status enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSTACMDCRCERR ,Command CRC error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSTACMDTOUTERR ,Command timeout error status enable" "Masked,Not masked"
group.word 0x38++0x01
line.word 0x00 "NORINTSIGEN0,Normal Interrupt Signal Enable Register"
bitfld.word 0x00 14. " ENSIGFIA3 ,FIFO SD address pointer interrupt 3 signal enable" "Masked,Not masked"
bitfld.word 0x00 13. " ENSIGFIA2 ,FIFO SD address pointer interrupt 2 signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 12. " ENSIGFIA1 ,FIFO SD address pointer interrupt 1 signal enable" "Masked,Not masked"
bitfld.word 0x00 11. " ENSIGFIA0 ,FIFO SD address pointer interrupt 0 signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 10. " ENSIGRWAIT ,Read wait interrupt signal enable" "Masked,Not masked"
bitfld.word 0x00 9. " ENSIGCCS ,CCS interrupt signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 8. " ENSIGCARDINT ,Card interrupt signal enable" "Masked,Not masked"
bitfld.word 0x00 7. " ENSIGCARDREM ,Card removal signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSIGCARDNS ,Card insertion signal enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSIGBUFRDRDY ,Buffer read ready signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSIGBUFWTRDY ,Buffer write ready signal enable " "Masked,Not masked"
bitfld.word 0x00 3. " ENSIGDMA ,DMA interrupt signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSIGBLKGAP ,Block gap event signal enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSIGTRANCMPLT ,Transfer complete signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSIGCMDCMPLT ,Command complete signal enable" "Masked,Not masked"
group.word 0x3a++0x01
line.word 0x00 "ERRINTSIGEN0,Error Interrupt Signal Enable Register"
bitfld.word 0x00 9. " ENSIGADMAERR ,ADMA error signal enable" "Masked,Not masked"
bitfld.word 0x00 8. " ENSIGACMDERR ,Auto CMD12 error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSIGDENDERR ,Data end bit error signal enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSIGDATCRCERR ,Data CRC error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSIGDATTOUTERR ,Data timeout error signal enable" "Masked,Not masked"
bitfld.word 0x00 3. " ENSIGCMIDIDXERR ,Command index error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSIGCMDEBITERR ,Command end bit error signal enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSIGCMDCRCERR ,Command CRC error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSIGCMDTOUTERR ,Command timeout error signal enable" "Masked,Not masked"
if ((((d.w(ad:0x4ac00000+0x32))&0x100)==0x00))
hgroup.word 0x3c++0x01
hide.word 0x00 "ACMD12ERRSTS0,Auto CMD 12 Status Register"
else
group.word 0x3c++0x01
line.word 0x00 "ACMD12ERRSTS0,Auto CMD 12 Status Register"
bitfld.word 0x00 7. " STACMDAER ,Command Not Issued By Auto CMD12 Error" "No error,Error"
bitfld.word 0x00 4. " STACMDIDXERR ,Auto CMD12 Index Error" "No error,Error"
textline " "
bitfld.word 0x00 3. " STACMDEBITAER ,Auto CMD12 End Bit Error" "No error,Error"
bitfld.word 0x00 2. " STACMDCRCAER ,Auto CMD12 CRC Error" "No error,Error"
textline " "
bitfld.word 0x00 1. " STACMDTOUTAER ,Auto CMD12 Timeout Error" "No error,Error"
bitfld.word 0x00 0. " STANACMDAER ,Auto CMD12 Not Executed" "Executed,Not executed"
endif
group.long 0x40++0x03
line.long 0x00 "CAPAREG0,Capabilities Register"
bitfld.long 0x00 26. " CAPAV18 ,Voltage Support 1.8V" "Not supported,Supported"
bitfld.long 0x00 25. " CAPAV30 ,Voltage Support 3.0V" "Not supported,Supported"
textline " "
bitfld.long 0x00 24. " CAPAV33 ,Voltage Support 3.3V" "Not supported,Supported"
bitfld.long 0x00 23. " CAPASUSRES ,Suspend/Resume Support" "Not supported,Supported"
textline " "
bitfld.long 0x00 22. " CAPADMA ,DMA Support" "Not supported,Supported"
bitfld.long 0x00 21. " CAPAHSPD ,High Speed Support" "Not supported,Supported"
textline " "
bitfld.long 0x00 16.--17. " CAPAMAXBLKLEN ,Max Block Length" "512-byte,1024-byte,2048-byte,?..."
bitfld.long 0x00 8.--13. " CAPABASECLK ,Base Clock Frequency For SD Clock" "Another method,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x00 7. " CAPATOUTUNIT ,Timeout Clock Unit" "kHz,MHz"
bitfld.long 0x00 0.--5. " CAPATOUTCLK ,Timeout Clock Frequency" "Another method,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x48++0x03
line.long 0x00 "MAXCURR0,Maximum Current Capabilities Register"
hexmask.long.byte 0x00 16.--23. 1. " MAXCURR18 ,Maximum Current for 1.8V"
hexmask.long.byte 0x00 8.--15. 1. " MAXCURR30 ,Maximum Current for 3.0V"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " MAXCURR33 ,Maximum Current for 3.3V"
group.long 0x80++0xf
line.long 0x00 "CONTROL2_0,Control Register 2"
bitfld.long 0x00 31. " WRSTACLASMDEN ,Write Status Clear Async Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 30. " CDINVRXD3 ,Command Conflict Mask Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 29. " CDINVRXD3 ,Card Detect signal inversion for RX_DAT[3]" "Disabled,Enabled"
bitfld.long 0x00 28. " SELCARDOUT ,Card Removed Condition Selection" "Not card insert,Card out"
textline " "
bitfld.long 0x00 24.--27. " FLTCLKSEL ,Filter Clock (iFLTCLK) Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--23. 1. " LVLDAT ,DAT line level"
textline " "
bitfld.long 0x00 15. " ENFBCLKTX ,Feedback Clock Enable for Tx Data/Command Clock" "Disabled,Enabled"
bitfld.long 0x00 14. " ENFBCLKRX ,Feedback Clock Enable for Rx Data/Command Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " SDCDSEL ,SD Card Detect Signal Selection" "nSDCD,DAT[3]"
bitfld.long 0x00 12. " CDSYNCSEL ,SD Card Detect Sync Support" "No sync,Sync"
textline " "
bitfld.long 0x00 11. " ENBUSYCHKTXSTART ,CE-ATA I/F mode" "Disabled,Enabled"
bitfld.long 0x00 9.--10. " DFCNT ,Debounce Filter Count" "Disabled,4 iSDCLK,16 iSDCLK,64 iSDCLK"
textline " "
bitfld.long 0x00 8. " ENCLKOUTHOLD ,SDCLK Hold Enable" "Disabled,Enabled"
bitfld.long 0x00 7. " RWAITMODE ,Read Wait Release Control" "Host controller,Host device"
textline " "
bitfld.long 0x00 6. " DISBUFRD ,Buffer Read Disable" "No,Yes"
bitfld.long 0x00 4.--5. " SELBASECLK ,Base Clock Source Select" "HCLK,HCLK,SCLK_HSMMC,External"
textline " "
bitfld.long 0x00 3. " PWRSYNC ,SD OP Power Sync Support with SD Card" "No sync,Sync"
bitfld.long 0x00 1. " ENCLKOUTMSKCON ,SDCLK output clock masking when Card Insert cleared" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " HWINITFIN ,SD Host Controller Hardware Initialization Finish" "Not finished,Finished"
line.long 0x04 "CONTROL3_0,FIFO Interrupt Control Register"
bitfld.long 0x04 23. 31. " FCSEL3_2 ,Feedback Clock Select [3:2]" "Delay 3,Delay 1,Delay 4,Delay 2"
hexmask.long.byte 0x04 24.--30. 1. " FIA3 ,FIFO Interrupt Address register 3"
textline " "
hexmask.long.byte 0x04 16.--22. 1. " FIA2 ,FIFO Interrupt Address register 2"
bitfld.long 0x04 7. 15. " FCSEL1_0 ,Feedback Clock Select [1:0]" "Delay 3,Delay 1,Delay 4,Delay 2"
textline " "
hexmask.long.byte 0x04 8.--14. 1. " FIA1 ,FIFO Interrupt Address register 1"
hexmask.long.byte 0x04 0.--6. 1. " FIA0 ,FIFO Interrupt Address register 0"
line.long 0x08 "DEBUG_0,DEBUG Register"
hexmask.long 0x08 0.--31. 1. " DBREG ,Debug Register"
line.long 0x0c "CONTROL4_0,Control register 4"
bitfld.long 0xc 0. " StaBusy ,Status Busy" "Not busy,Busy"
wgroup.word 0x50++0x03
line.word 0x00 "FEAER0,Force Event Register For Auto CMD12 Error Status"
bitfld.word 0x00 7. " FACMDAER ,Force Event for Command Not Issued By Auto CMD12 Error" "No effect,Interrupt"
bitfld.word 0x00 4. " FACMDIDXERR ,Force Event for Auto CMD12 Index Error" "No effect,Interrupt"
textline " "
bitfld.word 0x00 3. " FACMDEBITAER ,Force Event for Auto CMD12 End Bit Error" "No effect,Interrupt"
bitfld.word 0x00 2. " FACMDCRCAER ,Force Event for Auto CMD12 CRC Error" "No effect,Interrupt"
textline " "
bitfld.word 0x00 1. " FACMDTOUTAER ,Force Event for Auto CMD12 Timeout Error" "No effect,Interrupt"
bitfld.word 0x00 0. " FANACMDAER ,Force Event for Auto CMD12 Not Executed" "No effect,Interrupt"
line.word 0x02 "FEERR0,Force Event Register For Error Interrupt Status"
bitfld.word 0x02 9. " FADMAERR ,Force Event for ADMA error" "No effect,Interrupt"
bitfld.word 0x02 8. " FACMDERR ,Force Event for Auto CMD12 error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 6. " FDENDERR ,Force Event for Data end bit error" "No effect,Interrupt"
bitfld.word 0x02 5. " FDATCRCERR ,Force Event for Data CRC error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 4. " FDATTOUTERR ,Force Event for Data timeout error" "No effect,Interrupt"
bitfld.word 0x02 3. " FCMIDIDXERR ,Force Event for Command index error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 2. " FCMDEBITERR ,Force Event for Command end bit error" "No effect,Interrupt"
bitfld.word 0x02 1. " FCMDCRCERR ,Force Event for Command CRC error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 0. " FCMDTOUTERR ,Force Event for Command timeout error" "No effect,Interrupt"
group.long 0x54++0x07
line.long 0x00 "ADMAERR0,ADMA Error Status Register"
bitfld.long 0x00 10. " ADMAFBT ,ADMA Final Block Transferred" "Not final,Final"
bitfld.long 0x00 9. " ADMACR ,ADMA Continue Request" "No,Yes"
textline " "
eventfld.long 0x00 8. " ADMAIS ,ADMA Interrupt Status" "Low,High"
bitfld.long 0x00 2. " ADMALMERR ,ADMA Length Mismatch Error" "No error,Error"
textline " "
bitfld.long 0x00 0.--1. " ADMAERRS ,ADMA Error State" "ST_STOP,ST_FDS,Reserved,ST_TFR"
line.long 0x04 "ADMASYSADDR0,ADMA System Adress register"
hexmask.long 0x04 0.--31. 1. " SYSADADMA ,ADMA System Adress"
group.word 0xfe++0x01
line.word 0x00 "HCVER0,Host Controller Version Register"
hexmask.word.byte 0x00 8.--15. 1. " VENVER ,Vendor Version Number"
hexmask.word.byte 0x00 0.--7. 1. " SPECVER ,Specification Version Number"
tree.end
tree "HSMMC 1"
base ad:0x4a800000
width 15.
group.long 0x00++0x03
line.long 0x00 "SYSAD1,System Address Register"
hexmask.long 0x00 0.--31. 1. " SYSAD ,SDMA system address"
group.word 0x04++0x03
line.word 0x00 "BLKSIZE1,Host DMA Buffer Boundary And Transfer Block Size Register"
bitfld.word 0x00 12.--14. " BUFBOUND ,Host DMA buffer boundary" "4K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,512K bytes"
hexmask.word 0x00 0.--11. 1. " BLKSIZE ,Transfer block size"
line.word 0x02 "BLKCNT1,Blocks Count Current Transfer"
hexmask.word 0x02 0.--15. 1. " BLKCNT ,Blocks count for current transfer"
group.long 0x08++0x03
line.long 0x00 "ARGUMENT1,Command Argument Register"
hexmask.long 0x00 0.--31. 1. " ARGUMENT ,Command argument"
group.word 0x0c++0x01
line.word 0x00 "TRNMOD1,Transfer Mode Setting Register"
bitfld.word 0x00 8.--9. " CCSCON ,Command completion setting register" "Disabled,With transfer ECS enabled,Without transfer ECS enabled,ACS"
bitfld.word 0x00 5. " MUL1SIN0 ,Multi/single block select" "Single,Multiple"
textline " "
bitfld.word 0x00 4. " RD1WT0 ,Data transfer direction select" "Write,Read"
bitfld.word 0x00 2. " ENACMD12 ,Auto CMD12 enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 1. " ENBLKCNT ,Block count enable" "Disabled,Enabled"
bitfld.word 0x00 0. " ENDMA ,DMA enable" "Disabled,Enabled"
group.word 0x0e++0x01
line.word 0x00 "CMDREG1,Command Register"
bitfld.word 0x00 8.--13. " CMDIDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.word 0x00 6.--7. " CMDTYP ,Command type" "Normal,Suspend CMD52,Resume CMD52,Abort CMD12"
textline " "
bitfld.word 0x00 5. " DATAPRNT ,Data present select" "No data,Data"
bitfld.word 0x00 4. " ENCMDIDX ,Command index check enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " ENCMDCRC ,Command CRC check enable" "Disabled,Enabled"
bitfld.word 0x00 0.--1. " RSPTYP ,Response type select" "Disabled,Length 136,Length 48,Length 48 Busy"
group.long 0x10++0xf
line.long 0x00 "RSPREG0_1,Response Register 0"
hexmask.long 0x00 0.--31. 1. " CMDRSP ,Command response [31:0]"
line.long 0x04 "RSPREG1_1,Response Register 1"
hexmask.long 0x04 0.--31. 1. " CMDRSP ,Command response [63:32]"
line.long 0x08 "RSPREG2_1,Response Register 2"
hexmask.long 0x08 0.--31. 1. " CMDRSP ,Command response [95:64]"
line.long 0x0c "RSPREG3_1,Response Register 3"
hexmask.long 0x0c 0.--31. 1. " CMDRSP ,Command response [127:96]"
group.long 0x20++0x03
line.long 0x00 "BDATA1,Buffer Data Register"
hexmask.long 0x00 0.--31. 1. " BUFDAT ,Buffer data"
rgroup.long 0x24++0x03
line.long 0x00 "PRINTS1,Present State Register"
bitfld.long 0x00 24. " PRNTCMD ,CMD line signal level" "No error,Error"
bitfld.long 0x00 23. " PRNTDAT3 ,DAT3 line signal level" "Ready,Busy"
textline " "
bitfld.long 0x00 22. " PRNTDAT2 ,DAT2 line signal level" "Ready,Busy"
bitfld.long 0x00 21. " PRNTDAT1 ,DAT1 line signal level" "Ready,Busy"
textline " "
bitfld.long 0x00 20. " PRNTDAT0 ,DAT0 line signal level" "Ready,Busy"
bitfld.long 0x00 19. " PRNTWP ,Write protect switch pin level enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " PRNTCD ,Card detect pin level" "No card,Card present"
bitfld.long 0x00 17. " STBLCARD ,Card state stable" "Not stable,Stable"
textline " "
bitfld.long 0x00 16. " INSCARD ,Card inserted" "No card,Card inserted"
bitfld.long 0x00 13. " DIFF4W ,FIFO Pointer difference 4-word" "Low,High"
textline " "
bitfld.long 0x00 12. " DIFF1W ,FIFO Pointer difference 1-word" "Low,High"
bitfld.long 0x00 11. " BUFRDRDY ,Buffer read enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " BUFWTRDY ,Buffer write enable" "Disabled,Enabled"
bitfld.long 0x00 9. " RDTRANACT ,Read transfer active" "No valid data,Transferring data"
textline " "
bitfld.long 0x00 8. " WTTRANACT ,Write transfer active" "No valid data,Transferring data"
bitfld.long 0x00 2. " DATLINEACT ,DAT line active" "Inactive,Active"
textline " "
bitfld.long 0x00 1. " CMDINHDAT ,Data inhibit" "Can issue command,Cannot issue command"
bitfld.long 0x00 0. " CMDINHCMD ,Command inhibit" "Can issue command,Cannot issue command"
group.byte 0x28++0x00
line.byte 0x00 "HOSTCTL1,Host Control Register"
sif (cpu()=="S3C2450")
bitfld.byte 0x00 5. " WIDE8 ,Extended data transfer width mode" "WIDE4,8-bit"
textline " "
endif
bitfld.byte 0x00 3.--4. " DMASEL ,DMA select" "SDMA,Reserved,32-bit ADMA2,64-bit ADMA2"
bitfld.byte 0x00 2. " ENHIGHSPD ,High speed enable" "High speed,Normal speed"
textline " "
bitfld.byte 0x00 1. " WIDE4 ,Data transfer width mode" "1-bit,4-bit"
sif (cpu()=="S3C2450")
bitfld.byte 0x00 0. " ONLED ,LED Control" "Off,On"
endif
group.byte 0x29++0x00
line.byte 0x00 "PWRCON1,Power Control Register"
bitfld.byte 0x00 1.--3. " SELPWRLVL ,SD bus voltage select" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8V,3.0V,3.3V"
bitfld.byte 0x00 0. " PWRON ,SD bus power" "Off,On"
group.byte 0x2a++0x01
line.byte 0x00 "BLKGAP1,Block Gap Control register"
bitfld.byte 0x00 3. " ENINTBGAP ,Interrupt at block gap" "Disabled,Enabled"
bitfld.byte 0x00 2. " ENRWAIT ,Read wait control" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " CONTREQ ,Continue request" "Not affect,Restart"
bitfld.byte 0x00 0. " STOPBGAP ,Stop at block gap request" "Transfer,Stop"
line.byte 0x01 "WAKCON1,Wakeup Control Register"
bitfld.byte 0x01 2. " ENWKUPREM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.byte 0x01 1. " ENWKUPINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
textline " "
bitfld.byte 0x01 0. " ENWKUPINT ,Wakeup event enable on SD card interrupt" "Disabled,Enabled"
group.word 0x2c++0x01
line.word 0x00 "CLKCON1,Clock Control Register"
hexmask.word.byte 0x00 8.--15. 1. " SELFREQ ,SDCLK frequency select"
bitfld.word 0x00 3. " STBLEXTCLK ,External clock stable" "Not ready,Ready"
textline " "
bitfld.word 0x00 2. " ENSDCLK ,SD clock enable" "Disabled,Enabled"
bitfld.word 0x00 1. " STBLINTCLK ,Internal clock stable" "Not ready,Ready"
textline " "
bitfld.word 0x00 0. " ENINTCLK ,Internal clock enable" "Disabled,Enabled"
group.byte 0x2e++0x00
line.byte 0x00 "TIMEOUTCON1,Timeout Control Register"
bitfld.byte 0x00 0.--3. " TIMEOUTCON ,Data timeout counter value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,?..."
group.byte 0x2f++0x00
line.byte 0x00 "SWRST1,Software Reset Register"
bitfld.byte 0x00 2. " RSTDAT ,Software reset for DAT line" "No reset,Reset"
bitfld.byte 0x00 1. " RSTCMD ,Software reset for CMD line" "No reset,Reset"
textline " "
bitfld.byte 0x00 1. " RSTDAT ,Software reset for All" "No reset,Reset"
group.word 0x30++0x01
line.word 0x00 "NORINTSTS1,Normal Interrupt Status Register"
bitfld.word 0x00 15. " STAERR ,Error interrupt" "No error,Error"
eventfld.word 0x00 14. " STAFIA3 ,FIFO SD Address pointer interrupt 3 status" "Occurred,Not ocurred"
textline " "
eventfld.word 0x00 13. " STAFIA2 ,FIFO SD Address pointer interrupt 2 status" "Occurred,Not ocurred"
eventfld.word 0x00 12. " STAFIA1 ,FIFO SD Address pointer interrupt 1 status" "Occurred,Not ocurred"
textline " "
eventfld.word 0x00 11. " STAFIA0 ,FIFO SD Address pointer interrupt 0 status" "Occurred,Not ocurred"
eventfld.word 0x00 10. " STARWAIT ,Read wait interrupt status" "Occurred,Not ocurred"
textline " "
eventfld.word 0x00 9. " STACCS ,CCS interrupt status" "Occurred,Not ocurred"
bitfld.word 0x00 8. " STACARDINT ,Card interrupt" "No interrupt,Interrupt"
textline " "
eventfld.word 0x00 7. " STACARDREM ,Card removal" "Card stable,Card removed"
eventfld.word 0x00 6. " STACARDINS ,Card insertion" "Card stable,Card inserted"
textline " "
eventfld.word 0x00 5. " STABUFRDRDY ,Buffer read ready" "Not ready,ready"
eventfld.word 0x00 4. " STABUFWTRDY ,Buffer write ready" "Not ready,ready"
textline " "
eventfld.word 0x00 3. " STADMAINT ,DMA interrupt" "No interrupt,Interrupt"
eventfld.word 0x00 2. " STABLKGAP ,Block gap event" "No event,Event occurred"
textline " "
eventfld.word 0x00 1. " STATRANCMPLT ,Transfer complete" "Not completed,Completed"
eventfld.word 0x00 0. " STACMDCMPLT ,Command complete" "Not completed,Completed"
group.word 0x32++0x01
line.word 0x00 "ERRINTSTS1,Error Interrupt Status Register"
eventfld.word 0x00 9. " ADMAERR ,ADMA error" "No error,Error"
eventfld.word 0x00 8. " STAACMDERR ,Auto CMD12 error" "No error,Error"
textline " "
eventfld.word 0x00 6. " STADENDERR ,Data end bit error" "No error,Error"
eventfld.word 0x00 5. " STADATCRCERR ,Data CRC error" "No error,Error"
textline " "
eventfld.word 0x00 4. " STADATTOUTERR ,Data timeout error" "No error,Error"
eventfld.word 0x00 3. " STACMIDIDXERR ,Command index error" "No error,Error"
textline " "
eventfld.word 0x00 2. " CMDEBITERR ,Command end bit error" "No error,Error"
eventfld.word 0x00 1. " STACMDCRCERR ,Command CRC error" "No error,Error"
textline " "
eventfld.word 0x00 0. " STACMDTOUTERR ,Command timeout error" "No error,Error"
group.word 0x34++0x01
line.word 0x00 "NORINTSTSEN1,Normal Interrupt Status Register"
bitfld.word 0x00 14. " ENSTAFIA3 ,FIFO SD address pointer interrupt 3 status enable" "Masked,Not masked"
bitfld.word 0x00 13. " ENSTAFIA2 ,FIFO SD address pointer interrupt 2 status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 12. " ENSTAFIA1 ,FIFO SD address pointer interrupt 1 status enable" "Masked,Not masked"
bitfld.word 0x00 11. " ENSTAFIA0 ,FIFO SD address pointer interrupt 0 status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 10. " ENSTARWAIT ,Read wait interrupt status enable" "Masked,Not masked"
bitfld.word 0x00 9. " ENSTACCS ,CCS interrupt status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 8. " ENSTACARDINT ,Card interrupt status enable" "Masked,Not masked"
bitfld.word 0x00 7. " ENSTACARDREM ,Card removal status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSTACARDNS ,Card insertion status enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSTABUFRDRDY ,Buffer read ready status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSTABUFWTRDY ,Buffer write ready status enable " "Masked,Not masked"
bitfld.word 0x00 3. " ENSTADMAINT ,DMA interrupt status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSTABLKGAP ,Block gap event status enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSTATRANCMPLT ,Transfer complete status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSTACMDCMPLT ,Command complete status enable" "Masked,Not masked"
group.word 0x36++0x01
line.word 0x00 "ERRINTSTSEN1,Error Interrupt Status Enable Register"
bitfld.word 0x00 9. " ADMAERR ,ADMA error status enable" "Masked,Not masked"
bitfld.word 0x00 8. " ENSTAACMDERR ,Auto CMD12 error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSTADENDERR ,Data end bit error status enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSTADATCRCERR ,Data CRC error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSTADATTOUTERR ,Data timeout error status enable" "Masked,Not masked"
bitfld.word 0x00 3. " ENSTACMIDIDXERR ,Command index error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSTACMDEBITERR ,Command end bit error status enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSTACMDCRCERR ,Command CRC error status enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSTACMDTOUTERR ,Command timeout error status enable" "Masked,Not masked"
group.word 0x38++0x01
line.word 0x00 "NORINTSIGEN1,Normal Interrupt Signal Enable Register"
bitfld.word 0x00 14. " ENSIGFIA3 ,FIFO SD address pointer interrupt 3 signal enable" "Masked,Not masked"
bitfld.word 0x00 13. " ENSIGFIA2 ,FIFO SD address pointer interrupt 2 signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 12. " ENSIGFIA1 ,FIFO SD address pointer interrupt 1 signal enable" "Masked,Not masked"
bitfld.word 0x00 11. " ENSIGFIA0 ,FIFO SD address pointer interrupt 0 signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 10. " ENSIGRWAIT ,Read wait interrupt signal enable" "Masked,Not masked"
bitfld.word 0x00 9. " ENSIGCCS ,CCS interrupt signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 8. " ENSIGCARDINT ,Card interrupt signal enable" "Masked,Not masked"
bitfld.word 0x00 7. " ENSIGCARDREM ,Card removal signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSIGCARDNS ,Card insertion signal enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSIGBUFRDRDY ,Buffer read ready signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSIGBUFWTRDY ,Buffer write ready signal enable " "Masked,Not masked"
bitfld.word 0x00 3. " ENSIGDMA ,DMA interrupt signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSIGBLKGAP ,Block gap event signal enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSIGTRANCMPLT ,Transfer complete signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSIGCMDCMPLT ,Command complete signal enable" "Masked,Not masked"
group.word 0x3a++0x01
line.word 0x00 "ERRINTSIGEN1,Error Interrupt Signal Enable Register"
bitfld.word 0x00 9. " ENSIGADMAERR ,ADMA error signal enable" "Masked,Not masked"
bitfld.word 0x00 8. " ENSIGACMDERR ,Auto CMD12 error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 6. " ENSIGDENDERR ,Data end bit error signal enable" "Masked,Not masked"
bitfld.word 0x00 5. " ENSIGDATCRCERR ,Data CRC error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 4. " ENSIGDATTOUTERR ,Data timeout error signal enable" "Masked,Not masked"
bitfld.word 0x00 3. " ENSIGCMIDIDXERR ,Command index error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 2. " ENSIGCMDEBITERR ,Command end bit error signal enable" "Masked,Not masked"
bitfld.word 0x00 1. " ENSIGCMDCRCERR ,Command CRC error signal enable" "Masked,Not masked"
textline " "
bitfld.word 0x00 0. " ENSIGCMDTOUTERR ,Command timeout error signal enable" "Masked,Not masked"
if ((((d.w(ad:0x4a800000+0x32))&0x100)==0x00))
hgroup.word 0x3c++0x01
hide.word 0x00 "ACMD12ERRSTS1,Auto CMD 12 Status Register"
else
group.word 0x3c++0x01
line.word 0x00 "ACMD12ERRSTS1,Auto CMD 12 Status Register"
bitfld.word 0x00 7. " STACMDAER ,Command Not Issued By Auto CMD12 Error" "No error,Error"
bitfld.word 0x00 4. " STACMDIDXERR ,Auto CMD12 Index Error" "No error,Error"
textline " "
bitfld.word 0x00 3. " STACMDEBITAER ,Auto CMD12 End Bit Error" "No error,Error"
bitfld.word 0x00 2. " STACMDCRCAER ,Auto CMD12 CRC Error" "No error,Error"
textline " "
bitfld.word 0x00 1. " STACMDTOUTAER ,Auto CMD12 Timeout Error" "No error,Error"
bitfld.word 0x00 0. " STANACMDAER ,Auto CMD12 Not Executed" "Executed,Not executed"
endif
group.long 0x40++0x03
line.long 0x00 "CAPAREG1,Capabilities Register"
bitfld.long 0x00 26. " CAPAV18 ,Voltage Support 1.8V" "Not supported,Supported"
bitfld.long 0x00 25. " CAPAV30 ,Voltage Support 3.0V" "Not supported,Supported"
textline " "
bitfld.long 0x00 24. " CAPAV33 ,Voltage Support 3.3V" "Not supported,Supported"
bitfld.long 0x00 23. " CAPASUSRES ,Suspend/Resume Support" "Not supported,Supported"
textline " "
bitfld.long 0x00 22. " CAPADMA ,DMA Support" "Not supported,Supported"
bitfld.long 0x00 21. " CAPAHSPD ,High Speed Support" "Not supported,Supported"
textline " "
bitfld.long 0x00 16.--17. " CAPAMAXBLKLEN ,Max Block Length" "512-byte,1024-byte,2048-byte,?..."
bitfld.long 0x00 8.--13. " CAPABASECLK ,Base Clock Frequency For SD Clock" "Another method,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x00 7. " CAPATOUTUNIT ,Timeout Clock Unit" "kHz,MHz"
bitfld.long 0x00 0.--5. " CAPATOUTCLK ,Timeout Clock Frequency" "Another method,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x48++0x03
line.long 0x00 "MAXCURR1,Maximum Current Capabilities Register"
hexmask.long.byte 0x00 16.--23. 1. " MAXCURR18 ,Maximum Current for 1.8V"
hexmask.long.byte 0x00 8.--15. 1. " MAXCURR30 ,Maximum Current for 3.0V"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " MAXCURR33 ,Maximum Current for 3.3V"
group.long 0x80++0xf
line.long 0x00 "CONTROL2_1,Control Register 2"
bitfld.long 0x00 31. " WRSTACLASMDEN ,Write Status Clear Async Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 30. " CDINVRXD3 ,Command Conflict Mask Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 29. " CDINVRXD3 ,Card Detect signal inversion for RX_DAT[3]" "Disabled,Enabled"
bitfld.long 0x00 28. " SELCARDOUT ,Card Removed Condition Selection" "Not card insert,Card out"
textline " "
bitfld.long 0x00 24.--27. " FLTCLKSEL ,Filter Clock (iFLTCLK) Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--23. 1. " LVLDAT ,DAT line level"
textline " "
bitfld.long 0x00 15. " ENFBCLKTX ,Feedback Clock Enable for Tx Data/Command Clock" "Disabled,Enabled"
bitfld.long 0x00 14. " ENFBCLKRX ,Feedback Clock Enable for Rx Data/Command Clock" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " SDCDSEL ,SD Card Detect Signal Selection" "nSDCD,DAT[3]"
bitfld.long 0x00 12. " CDSYNCSEL ,SD Card Detect Sync Support" "No sync,Sync"
textline " "
bitfld.long 0x00 11. " ENBUSYCHKTXSTART ,CE-ATA I/F mode" "Disabled,Enabled"
bitfld.long 0x00 9.--10. " DFCNT ,Debounce Filter Count" "Disabled,4 iSDCLK,16 iSDCLK,64 iSDCLK"
textline " "
bitfld.long 0x00 8. " ENCLKOUTHOLD ,SDCLK Hold Enable" "Disabled,Enabled"
bitfld.long 0x00 7. " RWAITMODE ,Read Wait Release Control" "Host controller,Host device"
textline " "
bitfld.long 0x00 6. " DISBUFRD ,Buffer Read Disable" "No,Yes"
bitfld.long 0x00 4.--5. " SELBASECLK ,Base Clock Source Select" "HCLK,HCLK,SCLK_HSMMC,External"
textline " "
bitfld.long 0x00 3. " PWRSYNC ,SD OP Power Sync Support with SD Card" "No sync,Sync"
bitfld.long 0x00 1. " ENCLKOUTMSKCON ,SDCLK output clock masking when Card Insert cleared" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " HWINITFIN ,SD Host Controller Hardware Initialization Finish" "Not finished,Finished"
line.long 0x04 "CONTROL3_1,FIFO Interrupt Control Register"
bitfld.long 0x04 23. 31. " FCSEL3_2 ,Feedback Clock Select [3:2]" "Delay 3,Delay 1,Delay 4,Delay 2"
hexmask.long.byte 0x04 24.--30. 1. " FIA3 ,FIFO Interrupt Address register 3"
textline " "
hexmask.long.byte 0x04 16.--22. 1. " FIA2 ,FIFO Interrupt Address register 2"
bitfld.long 0x04 7. 15. " FCSEL1_0 ,Feedback Clock Select [1:0]" "Delay 3,Delay 1,Delay 4,Delay 2"
textline " "
hexmask.long.byte 0x04 8.--14. 1. " FIA1 ,FIFO Interrupt Address register 1"
hexmask.long.byte 0x04 0.--6. 1. " FIA0 ,FIFO Interrupt Address register 0"
line.long 0x08 "DEBUG_1,DEBUG Register"
hexmask.long 0x08 0.--31. 1. " DBREG ,Debug Register"
line.long 0x0c "CONTROL4_1,Control register 4"
bitfld.long 0xc 0. " StaBusy ,Status Busy" "Not busy,Busy"
wgroup.word 0x50++0x03
line.word 0x00 "FEAER1,Force Event Register For Auto CMD12 Error Status"
bitfld.word 0x00 7. " FACMDAER ,Force Event for Command Not Issued By Auto CMD12 Error" "No effect,Interrupt"
bitfld.word 0x00 4. " FACMDIDXERR ,Force Event for Auto CMD12 Index Error" "No effect,Interrupt"
textline " "
bitfld.word 0x00 3. " FACMDEBITAER ,Force Event for Auto CMD12 End Bit Error" "No effect,Interrupt"
bitfld.word 0x00 2. " FACMDCRCAER ,Force Event for Auto CMD12 CRC Error" "No effect,Interrupt"
textline " "
bitfld.word 0x00 1. " FACMDTOUTAER ,Force Event for Auto CMD12 Timeout Error" "No effect,Interrupt"
bitfld.word 0x00 0. " FANACMDAER ,Force Event for Auto CMD12 Not Executed" "No effect,Interrupt"
line.word 0x02 "FEERR1,Force Event Register For Error Interrupt Status"
bitfld.word 0x02 9. " FADMAERR ,Force Event for ADMA error" "No effect,Interrupt"
bitfld.word 0x02 8. " FACMDERR ,Force Event for Auto CMD12 error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 6. " FDENDERR ,Force Event for Data end bit error" "No effect,Interrupt"
bitfld.word 0x02 5. " FDATCRCERR ,Force Event for Data CRC error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 4. " FDATTOUTERR ,Force Event for Data timeout error" "No effect,Interrupt"
bitfld.word 0x02 3. " FCMIDIDXERR ,Force Event for Command index error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 2. " FCMDEBITERR ,Force Event for Command end bit error" "No effect,Interrupt"
bitfld.word 0x02 1. " FCMDCRCERR ,Force Event for Command CRC error" "No effect,Interrupt"
textline " "
bitfld.word 0x02 0. " FCMDTOUTERR ,Force Event for Command timeout error" "No effect,Interrupt"
group.long 0x54++0x07
line.long 0x00 "ADMAERR1,ADMA Error Status Register"
bitfld.long 0x00 10. " ADMAFBT ,ADMA Final Block Transferred" "Not final,Final"
bitfld.long 0x00 9. " ADMACR ,ADMA Continue Request" "No,Yes"
textline " "
eventfld.long 0x00 8. " ADMAIS ,ADMA Interrupt Status" "Low,High"
bitfld.long 0x00 2. " ADMALMERR ,ADMA Length Mismatch Error" "No error,Error"
textline " "
bitfld.long 0x00 0.--1. " ADMAERRS ,ADMA Error State" "ST_STOP,ST_FDS,Reserved,ST_TFR"
line.long 0x04 "ADMASYSADDR1,ADMA System Adress register"
hexmask.long 0x04 0.--31. 1. " SYSADADMA ,ADMA System Adress"
group.word 0xfe++0x01
line.word 0x00 "HCVER1,Host Controller Version Register"
hexmask.word.byte 0x00 8.--15. 1. " VENVER ,Vendor Version Number"
hexmask.word.byte 0x00 0.--7. 1. " SPECVER ,Specification Version Number"
tree.end
tree.end
tree "LCD Controller"
base ad:0x4c800000
width 14.
if ((((d.l(ad:0x4c800000))&0xc00000)==0xc00000))
group.long 0x00++0x03
line.long 0x00 "VIDCON0,Video Control Register 1"
bitfld.long 0x00 22.--23. " VIDOUT ,Output format of LCD Controller" "RGB I/F,Reserved,Main LDI,Sub LDI"
bitfld.long 0x00 19.--21. " L1_DATA16 ,Select the mode of output data format of i80-System I/F Sub LDI" "16 bpp,16+2 bpp,9+9 bpp,16+8 bpp,18bpp,?..."
textline " "
bitfld.long 0x00 13.--14. " PNRMODE ,Select the display mode" "RGB,?..."
bitfld.long 0x00 12. " CLKVALUP ,Select CLKVAL_F Update timing control" "Always,Start of frame"
textline " "
bitfld.long 0x00 6.--11. " CLKVAL_F ,Determine the rates of VCLK" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
bitfld.long 0x00 5. " VCLKEN ,VCLK Enable Control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " CLKDIR ,Select the clock source as direct or divide using CLKVAL_F register" "Direct,Divided"
bitfld.long 0x00 2.--3. " CLKSEL_F ,Select the Video Clock source" "HCLK,LCD clock,?..."
textline " "
bitfld.long 0x00 0.--1. " ENVID ,Video output and the LCD logics enable/disable control" "Disabled immediately,Reserved,Disabled after frame,Enabled"
elif ((((d.l(ad:0x4c800000))&0xc00000)==0x800000))
group.long 0x00++0x03
line.long 0x00 "VIDCON0,Video Control Register 1"
bitfld.long 0x00 22.--23. " VIDOUT ,Output format of LCD Controller" "RGB I/F,Reserved,Main LDI,Sub LDI"
bitfld.long 0x00 16.--18. " L1_DATA16 ,Select the mode of output data format of i80-System I/F Main LDI" "16 bpp,16+2 bpp,9+9 bpp,16+8 bpp,18bpp,?..."
textline " "
bitfld.long 0x00 13.--14. " PNRMODE ,Select the display mode" "RGB,?..."
bitfld.long 0x00 12. " CLKVALUP ,Select CLKVAL_F Update timing control" "Always,Start of frame"
textline " "
bitfld.long 0x00 6.--11. " CLKVAL_F ,Determine the rates of VCLK" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
bitfld.long 0x00 5. " VCLKEN ,VCLK Enable Control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " CLKDIR ,Select the clock source as direct or divide using CLKVAL_F register" "Direct,Divided"
bitfld.long 0x00 2.--3. " CLKSEL_F ,Select the Video Clock source" "HCLK,LCD clock,?..."
textline " "
bitfld.long 0x00 0.--1. " ENVID ,Video output and the LCD logics enable/disable control" "Disabled immediately,Reserved,Disabled after frame,Enabled"
else
group.long 0x00++0x03
line.long 0x00 "VIDCON0,Video Control Register 1"
bitfld.long 0x00 22.--23. " VIDOUT ,Output format of LCD Controller" "RGB I/F,Reserved,Main LDI,Sub LDI"
bitfld.long 0x00 13.--14. " PNRMODE ,Select the display mode" "RGB,BGR,R->G->B,B->G->R"
textline " "
bitfld.long 0x00 12. " CLKVALUP ,Select CLKVAL_F Update timing control" "Always,Start of frame"
bitfld.long 0x00 6.--11. " CLKVAL_F ,Determine the rates of VCLK" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
textline " "
bitfld.long 0x00 5. " VCLKEN ,VCLK Enable Control" "Disabled,Enabled"
bitfld.long 0x00 4. " CLKDIR ,Select the clock source as direct or divide using CLKVAL_F register" "Direct,Divided"
textline " "
bitfld.long 0x00 2.--3. " CLKSEL_F ,Select the Video Clock source" "HCLK,LCD clock,?..."
bitfld.long 0x00 0.--1. " ENVID ,Video output and the LCD logics enable/disable control" "Disabled immediately,Reserved,Disabled after frame,Enabled"
endif
group.long 0x04++0x07
line.long 0x00 "VIDCON1,Video Control 2 Register"
hexmask.long.word 0x00 16.--26. 1. " LINECNT ,Provide the status of the line counter"
bitfld.long 0x00 13.--14. " VSTATUS ,Vertical Status" "VSYNC,BACK Porch,ACTIVE,FRONT Porch"
textline " "
bitfld.long 0x00 11.--12. " HSTATUS ,Horizontal Status" "HSYNC,BACK Porch,ACTIVE,FRONT Porch"
bitfld.long 0x00 7. " IVCLK ,This bit controls the polarity of the VCLK active edge" "Falling edge,Rising edge"
textline " "
bitfld.long 0x00 6. " IHSYNC ,This bit indicates the HSYNC pulse polarity" "Normal,Inverted"
bitfld.long 0x00 5. " IVSYNC ,This bit indicates the VSYNC pulse polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 4. " IVDEN ,This bit indicates the VDEN signal polarity" "Normal,Inverted"
line.long 0x04 "VIDTCON0,Video Time Control 1 Register"
hexmask.long.byte 0x04 16.--23. 1. " VBPD ,Vertical back porch"
hexmask.long.byte 0x04 8.--15. 1. " VFPD ,Vertical front porch"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " VSPW ,Vertical sync pulse width"
group.long 0x0c++0x07
line.long 0x00 "VIDTCON1,Video Time Control 2 Register"
hexmask.long.byte 0x00 16.--23. 1. " HBPD ,Horizontal back porch"
hexmask.long.byte 0x00 8.--15. 1. " HFPD ,Horizontal front porch"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " HSPW ,Horizontal sync pulse width"
line.long 0x04 "VIDTCON2,Video Time Control 3 Register"
hexmask.long.word 0x04 11.--21. 1. " LINEVAL ,These bits determine the vertical size of display"
hexmask.long.word 0x04 0.--10. 1. " HOZVAL ,These bits determine the horizontal size of display"
if ((((d.l(ad:0x4c800000))&0xc00000)==0x00))
group.long 0x14++0x03
line.long 0x00 "WINCON0,Window 0 Control Register"
bitfld.long 0x00 23. " BUFSEL ,Select Buffer selection control" "Buffer0,Buffer1"
bitfld.long 0x00 18. " BITSWP ,Bit swap control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled"
bitfld.long 0x00 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..."
bitfld.long 0x00 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1 bpp,2 bpp,4 bpp,8 bpp,Reserved,16 bpp R: 5-G:6-B:5,Reserved,16 bpp I :1-R:5-G:5-B:5,Unpacked 18bpp,Reserved,Reserved,Unpacked 24bpp,?..."
textline " "
bitfld.long 0x00 0. " ENWIN_F ,Window0 on/ off control" "Off,On"
else
group.long 0x14++0x03
line.long 0x00 "WINCON0,Window 0 Control Register"
bitfld.long 0x00 24. " BUFSTATUS ,Status of Current display Buffer" "Buffer0,Buffer1"
bitfld.long 0x00 23. " BUFSEL ,Select Buffer selection control" "Buffer0,Buffer1"
textline " "
bitfld.long 0x00 22. " BUFAUTOEN ,Double Buffer Auto-change control bit" "Fixed,Auto changed"
bitfld.long 0x00 18. " BITSWP ,Bit swap control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled"
bitfld.long 0x00 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..."
bitfld.long 0x00 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1 bpp,2 bpp,4 bpp,8 bpp,Reserved,16 bpp R: 5-G:6-B:5,Reserved,16 bpp I :1-R:5-G:5-B:5,Unpacked 18bpp,Reserved,Reserved,Unpacked 24bpp,?..."
textline " "
bitfld.long 0x00 0. " ENWIN_F ,Window0 on/ off control" "Off,On"
endif
if ((((d.l(ad:0x4c800000+0x18))&0x40)==0x00))
group.long 0x18++0x03
line.long 0x00 "WINCON1,Window Control 1 Register"
bitfld.long 0x00 18. " BITSWP ,Bit swap control" "Disabled,Enabled"
bitfld.long 0x00 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled"
bitfld.long 0x00 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..."
textline " "
bitfld.long 0x00 6. " BLD_PIX ,Select blending category" "Per plane,Per pixel"
bitfld.long 0x00 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1 bpp,2 bpp,4 bpp,8 bpp,8 bpp A: 1-R:2-G:3-B:2,16 bpp R:5-G:6-B:5,16 bpp A:1-R:5-G:5-B:5,16 bpp I :1-R:5-G:5-B:5,18 bpp R:6-G:6-B:6,18 bpp A:1-R:6-G:6-B:5,19 bpp A:1-R:6-G:6-B:6,24 bpp R:8-G:8-B:8,24 bpp A:1-R:8-G:8-B:7,25 bpp A:1-R:8-G:8-B:8,?..."
textline " "
bitfld.long 0x00 1. " ALPHA_SEL ,Alpha value selection" "ALPHA0,ALPHA1"
bitfld.long 0x00 0. " ENWIN_F ,Window0 on/ off control" "Off,On"
else
group.long 0x18++0x03
line.long 0x00 "WINCON1,Window Control 1 Register"
bitfld.long 0x00 18. " BITSWP ,Bit swap control" "Disabled,Enabled"
bitfld.long 0x00 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled"
bitfld.long 0x00 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..."
textline " "
bitfld.long 0x00 6. " BLD_PIX ,Select blending category" "Per plane,Per pixel"
bitfld.long 0x00 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1 bpp,2 bpp,4 bpp,8 bpp,8 bpp A: 1-R:2-G:3-B:2,16 bpp R:5-G:6-B:5,16 bpp A:1-R:5-G:5-B:5,16 bpp I :1-R:5-G:5-B:5,18 bpp R:6-G:6-B:6,18 bpp A:1-R:6-G:6-B:5,19 bpp,24 bpp R:8-G:8-B:8,24 bpp A:1-R:8-G:8-B:7,28 bpp A:4-R:8-G:8-B:8,?..."
textline " "
bitfld.long 0x00 1. " ALPHA_SEL ,Alpha value selection" "AEN bit,?..."
endif
group.long 0x28++0x07
line.long 0x00 "VIDOSD0A,Window 0 Position Control A Register"
hexmask.long.word 0x00 11.--21. 1. " OSD_LeftTopX_F ,Horizontal screen coordinate for left top pixel of OSD image"
hexmask.long.word 0x00 0.--10. 1. " OSD_LeftTopY_F ,Vertical screen coordinate for left top pixel of OSD image"
line.long 0x04 "VIDOSD0B,Window 0 Position Control B Register"
hexmask.long.word 0x04 11.--21. 1. " OSD_RightBotX_F ,Horizontal screen coordinate for right bottom pixel of OSD image"
hexmask.long.word 0x04 0.--10. 1. " OSD_RightBotY_F ,Vertical screen coordinate for right bottom pixel of OSD image"
group.long 0x34++0x07
line.long 0x00 "VIDOSD1A,Window 1 Position Control A Register"
hexmask.long.word 0x00 11.--21. 1. " OSD_LeftTopX_F ,Horizontal screen coordinate for left top pixel of OSD image"
hexmask.long.word 0x00 0.--10. 1. " OSD_LeftTopY_F ,Vertical screen coordinate for left top pixel of OSD image"
line.long 0x04 "VIDOSD1B,Window 1 Position Control B Register"
hexmask.long.word 0x04 11.--21. 1. " OSD_RightBotX_F ,Horizontal screen coordinate for right bottom pixel of OSD image"
hexmask.long.word 0x04 0.--10. 1. " OSD_RightBotY_F ,Vertical screen coordinate for right bottom pixel of OSD image"
group.long 0x3c++0x03
line.long 0x00 "VIDOSD1C,Window 1 Alpha Value Register"
bitfld.long 0x00 20.--23. " ALPHA0_R ,Red Alpha0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. " ALPHA0_G ,Green Alpha0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ALPHA0_B ,Blue Alpha0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. " ALPHA1_R ,Red Alpha1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4.--7. " ALPHA1_G ,Green Alpha1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " ALPHA1_B ,Blue Alpha1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x64++0xb
line.long 0x00 "VIDW00ADD0B0,Window 0 Buffer 0 Start Address Register"
hexmask.long.byte 0x00 24.--31. 1. " VBANK_F ,Bank location for the video buffer in the system memory"
hexmask.long.tbyte 0x00 0.--23. 1. " VBASEU_F ,Start address of the Video frame buffer"
line.long 0x04 "VIDW00ADD0B1,Window 0 Buffer 1 Start Address Register"
hexmask.long.byte 0x04 24.--31. 1. " VBANK_F ,Bank location for the video buffer in the system memory"
hexmask.long.tbyte 0x04 0.--23. 1. " VBASEU_F ,Start address of the Video frame buffer"
line.long 0x08 "VIDW01ADD0,Window 1 Buffer Start Address Register"
hexmask.long.byte 0x08 24.--31. 1. " VBANK_F ,Bank location for the video buffer in the system memory"
hexmask.long.tbyte 0x08 0.--23. 1. " VBASEU_F ,Start address of the Video frame buffer"
group.long 0x7c++0xb
line.long 0x00 "VIDW00ADD1B0,Window 0 Buffer 0 End Address Register"
hexmask.long.tbyte 0x00 0.--23. 1. " VBASEL_F ,End address of the Video frame buffer"
line.long 0x04 "VIDW00ADD1B1,Window 0 Buffer 1 End Address Register"
hexmask.long.tbyte 0x04 0.--23. 1. " VBASEL_F ,End address of the Video frame buffer"
line.long 0x08 "VIDW01ADD1,Window 1 Buffer End Address Register"
hexmask.long.tbyte 0x08 0.--23. 1. " VBASEL_F ,End address of the Video frame buffer"
group.long 0x94++0xb
line.long 0x00 "VIDW00ADD2B0,Window 0 Buffer 0 End Address Register"
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
line.long 0x04 "VIDW00ADD2B1,Window 0 Buffer 1 End Address Register"
hexmask.long.word 0x04 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
hexmask.long.word 0x04 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
line.long 0x08 "VIDW01ADD2,Window 1 Buffer End Address Register"
hexmask.long.word 0x08 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
hexmask.long.word 0x08 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
if (((((d.l(ad:0x4c800000))&0xc00000)==0xc00000)||((((d.l(ad:0x4c800000))&0xc00000)==0x800000))))
group.long 0xac++0x3
line.long 0x00 "VIDINTCON,VIDEO interrupt Control Register"
bitfld.long 0x00 20.--25. " FIFOINTERVAL ,These bits control the interval of the FIFO interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 19. " SYSMAINCON ,Sending complete interrupt enable bit to Main LCD" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " SYSSUBCON ,Sending complete interrupt enable bit to Sub LCD" "Disabled,Enabled"
bitfld.long 0x00 17. " SYSIFDONE ,i80-System Interface Interrupt Enable control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1" "Disabled,BACK Porch,VSYNC,FRONT Porch"
textline " "
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupts (SUBINT_LCD3) Enable control bit" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--11. 1. " FIFOSEL ,FIFO Interrupt control bit"
textline " "
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO Interrupt (SUBINT_LCD2) Level Select" "25% left,50% left,75% left,Empty,Full,?..."
bitfld.long 0x00 1. " INTFIFOEN ,LCD FIFO interrupt (SUBINT_LCD2) Enable control bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " INTEN ,LCD interrupt (INT_LCD) Enable control bit" "Disabled,Enabled"
else
group.long 0xac++0x3
line.long 0x00 "VIDINTCON,VIDEO interrupt Control Register"
bitfld.long 0x00 20.--25. " FIFOINTERVAL ,These bits control the interval of the FIFO interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 19. " SYSMAINCON ,Sending complete interrupt enable bit to Main LCD" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " SYSSUBCON ,Sending complete interrupt enable bit to Sub LCD" "Disabled,Enabled"
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
textline " "
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1" "Disabled,BACK Porch,VSYNC,FRONT Porch"
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupts (SUBINT_LCD3) Enable control bit" "Disabled,Enabled"
textline " "
hexmask.long.byte 0x00 5.--11. 1. " FIFOSEL ,FIFO Interrupt control bit"
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO Interrupt (SUBINT_LCD2) Level Select" "25% left,50% left,75% left,Empty,Full,?..."
textline " "
bitfld.long 0x00 1. " INTFIFOEN ,LCD FIFO interrupt (SUBINT_LCD2) Enable control bit" "Disabled,Enabled"
bitfld.long 0x00 0. " INTEN ,LCD interrupt (INT_LCD) Enable control bit" "Disabled,Enabled"
endif
group.long 0xb0++0x1f
line.long 0x00 "W1KEYCON0,Win1 Color Key 0 Register"
bitfld.long 0x00 26. " KEYBLEN ,Alpha value control for Key area or Non-Key area" "AEN bit,ALPHA0/1_R/G/B"
bitfld.long 0x00 25. " KEYEN_F ,Color Key (Chroma key ) Enable control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 24. " DIRCON ,Color key (Chroma key) direction control" "Fore-ground,Back-ground"
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY ,Each bit is corespond to the COLVAL[23:0]"
line.long 0x04 "W1KEYCON1,Win1 Color Key 1 Register"
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL ,Color key value for the transparent pixel effect"
line.long 0x08 "W2KEYCON0,Win2 Color Key 0 Register"
bitfld.long 0x08 26. " KEYBLEN ,Alpha value control for Key area or Non-Key area" "AEN bit,ALPHA0/1_R/G/B"
bitfld.long 0x08 25. " KEYEN_F ,Color Key (Chroma key ) Enable control" "Disabled,Enabled"
textline " "
bitfld.long 0x08 24. " DIRCON ,Color key (Chroma key) direction control" "Fore-ground,Back-ground"
hexmask.long.tbyte 0x08 0.--23. 1. " COMPKEY ,Each bit is corespond to the COLVAL[23:0]"
line.long 0xc "W2KEYCON1,Win2 Color Key 1 Register"
hexmask.long.tbyte 0x0c 0.--23. 1. " COLVAL ,Color key value for the transparent pixel effect"
line.long 0x10 "W3KEYCON0,Win3 Color Key 0 Register"
bitfld.long 0x10 26. " KEYBLEN ,Alpha value control for Key area or Non-Key area" "AEN bit,ALPHA0/1_R/G/B"
bitfld.long 0x10 25. " KEYEN_F ,Color Key (Chroma key ) Enable control" "Disabled,Enabled"
textline " "
bitfld.long 0x10 24. " DIRCON ,Color key (Chroma key) direction control" "Fore-ground,Back-ground"
hexmask.long.tbyte 0x10 0.--23. 1. " COMPKEY ,Each bit is corespond to the COLVAL[23:0]"
line.long 0x14 "W3KEYCON1,Win3 Color Key 1 Register"
hexmask.long.tbyte 0x014 0.--23. 1. " COLVAL ,Color key value for the transparent pixel effect"
line.long 0x18 "W4KEYCON0,Win4 Color Key 0 Register"
bitfld.long 0x18 26. " KEYBLEN ,Alpha value control for Key area or Non-Key area" "AEN bit,ALPHA0/1_R/G/B"
bitfld.long 0x18 25. " KEYEN_F ,Color Key (Chroma key ) Enable control" "Disabled,Enabled"
textline " "
bitfld.long 0x18 24. " DIRCON ,Color key (Chroma key) direction control" "Fore-ground,Back-ground"
hexmask.long.tbyte 0x18 0.--23. 1. " COMPKEY ,Each bit is corespond to the COLVAL[23:0]"
line.long 0x1c "W4KEYCON1,Win4 Color Key 1 Register"
hexmask.long.tbyte 0x1c 0.--23. 1. " COLVAL ,Color key value for the transparent pixel effect"
group.long 0xd0++0x7
line.long 0x00 "WIN0MAP,WIN0 Color MAP Register"
bitfld.long 0x00 24. " MAPCOLEN_F ,Window color maping control bit" "Disabled,Enabled"
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color Value"
line.long 0x04 "WIN1MAP,WIN1 Color MAP Register"
bitfld.long 0x04 24. " MAPCOLEN_F ,Window color maping control bit" "Disabled,Enabled"
hexmask.long.tbyte 0x04 0.--23. 1. " MAPCOLOR ,Color Value"
group.long 0xe4++0x03
line.long 0x00 "WPALCON,Window Palette Control Register"
bitfld.long 0x00 9. " PALUPDATEEN ,Palette memory access-right control bit" "LCD access,ARM access"
bitfld.long 0x00 3.--5. " W1PAL ,Size of the palette data format of Window 1" "25-bit A:8:8:8,24-bit 8:8:8,19-bit A:6:6:6,18-bit A:6:6:5,18-bit 6:6:6,16-bit A:5:5:5,16-bit 5:6:5,?..."
textline " "
bitfld.long 0x00 0.--2. " W0PAL ,Size of the palette data format of Window 0" "25-bit A:8:8:8,24-bit 8:8:8,19-bit A:6:6:6,18-bit A:6:6:5,18-bit 6:6:6,16-bit A:5:5:5,16-bit 5:6:5,?..."
group.long 0x130++0xb
line.long 0x00 "SYSIFCON0,i80-System Interface Control For Main LDI"
bitfld.long 0x00 16.--19. " LCD_CS_SETUP ,Numbers of clock cycles for the active period of the address signal enable to the chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. " LCD_WR_SETUP ,Numbers of clock cycles for the active period of the CS signal enable to the write signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 8.--11. " LCD_WR_ACT ,Numbers of clock cycles for the active period of the chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. " LCD_WR_HOLD ,Numbers of clock cycles for the active period of the chip select disable to the write signal disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 2. " RSPOL ,The polarity of the RS Signal" "Low,High"
bitfld.long 0x00 1. " SUCCEUP ,SUCCEUP mode" "Reserved,Triggered"
textline " "
bitfld.long 0x00 0. " SYSIFEN ,LCD i80-System Interface control" "Disabled,Enabled"
line.long 0x04 "SYSIFCON1,i80-System Interface Control For Sub LDI"
bitfld.long 0x04 16.--19. " LCD_CS_SETUP ,Numbers of clock cycles for the active period of the address signal enable to the chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. " LCD_WR_SETUP ,Numbers of clock cycles for the active period of the CS signal enable to the write signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x04 8.--11. " LCD_WR_ACT ,Numbers of clock cycles for the active period of the chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. " LCD_WR_HOLD ,Numbers of clock cycles for the active period of the chip select disable to the write signal disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x04 2. " RSPOL ,The polarity of the RS Signal" "Low,High"
bitfld.long 0x04 1. " SUCCEUP ,SUCCEUP mode" "Reserved,Triggered"
textline " "
bitfld.long 0x04 0. " SYSIFEN ,LCD i80-System Interface control" "Disabled,Enabled"
line.long 0x08 "DITHMODE,Dithering Mode Register"
bitfld.long 0x08 5.--6. " RDithPos ,Red Dither bit control" "5-bit,6-bit,8-bit,?..."
bitfld.long 0x08 3.--4. " GDithPos ,Green Dither bit control" "5-bit,6-bit,8-bit,?..."
textline " "
bitfld.long 0x08 1.--2. " BDithPos ,Blue Dither bit control" "5-bit,6-bit,8-bit,?..."
bitfld.long 0x08 0. " DITHEN_F ,Dithering Enable bit" "Disabled,Enabled"
group.long 0x13c++0xb
line.long 0x00 "SIFCCON0,i80-System Interface Command Control 0"
bitfld.long 0x00 9. " SYS_CS0_CON ,LCD i80-System Interface SYS_CS0 (main) Signal control" "Disabled,Enabled"
bitfld.long 0x00 8. " SYS_CS1_CON ,LCD i80-System Interface SYS_CS1 (sub) Signal control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " SYS_OE_CON ,LCD i80-System Interface SYS_OE Signal control" "Disabled,Enabled"
bitfld.long 0x00 6. " SYS_WR_CON ,LCD i80-System Interface SYS_WR Signal control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " SYS_RS_CON ,LCD i80-System Interface SYS_RS Signal control" "Low,High"
bitfld.long 0x00 0. " SCOMEN ,LCD i80-System Interface Command Mode Enable" "Disabled,Enabled"
line.long 0x04 "SIFCCON1,i80-System Interface Command Control 1"
hexmask.long.tbyte 0x04 0.--17. 1. " SYS_WDATA ,LCD i80-System Interface Write Data"
line.long 0x08 "SIFCCON2,i80-System Interface Command Control 2"
hexmask.long.tbyte 0x08 0.--17. 1. " SYS_RDATA ,LCD i80-System Interface Read Data"
group.long 0x160++0x03
line.long 0x00 "CPUTRIGCON2,i80-System I/F TRIGGER CONTROL 2 Register"
bitfld.long 0x00 0. " SWTRIG ,Software-Based Transmission Trigger" "No effect,Trigerred"
tree "WIN0 Palette RAM Access Address"
width 18.
group.long 0x400++0x3ff
line.long 0x0 "WIN0_PALENTRY0 ,Window 0 Palette entry 0 address"
hexmask.long 0x0 0.--31. 1. " WIN0_PALENTRY0 ,Window 0 Palette entry 0 address"
line.long 0x4 "WIN0_PALENTRY1 ,Window 0 Palette entry 1 address"
hexmask.long 0x4 0.--31. 1. " WIN0_PALENTRY1 ,Window 0 Palette entry 1 address"
line.long 0x8 "WIN0_PALENTRY2 ,Window 0 Palette entry 2 address"
hexmask.long 0x8 0.--31. 1. " WIN0_PALENTRY2 ,Window 0 Palette entry 2 address"
line.long 0xC "WIN0_PALENTRY3 ,Window 0 Palette entry 3 address"
hexmask.long 0xC 0.--31. 1. " WIN0_PALENTRY3 ,Window 0 Palette entry 3 address"
line.long 0x10 "WIN0_PALENTRY4 ,Window 0 Palette entry 4 address"
hexmask.long 0x10 0.--31. 1. " WIN0_PALENTRY4 ,Window 0 Palette entry 4 address"
line.long 0x14 "WIN0_PALENTRY5 ,Window 0 Palette entry 5 address"
hexmask.long 0x14 0.--31. 1. " WIN0_PALENTRY5 ,Window 0 Palette entry 5 address"
line.long 0x18 "WIN0_PALENTRY6 ,Window 0 Palette entry 6 address"
hexmask.long 0x18 0.--31. 1. " WIN0_PALENTRY6 ,Window 0 Palette entry 6 address"
line.long 0x1C "WIN0_PALENTRY7 ,Window 0 Palette entry 7 address"
hexmask.long 0x1C 0.--31. 1. " WIN0_PALENTRY7 ,Window 0 Palette entry 7 address"
line.long 0x20 "WIN0_PALENTRY8 ,Window 0 Palette entry 8 address"
hexmask.long 0x20 0.--31. 1. " WIN0_PALENTRY8 ,Window 0 Palette entry 8 address"
line.long 0x24 "WIN0_PALENTRY9 ,Window 0 Palette entry 9 address"
hexmask.long 0x24 0.--31. 1. " WIN0_PALENTRY9 ,Window 0 Palette entry 9 address"
line.long 0x28 "WIN0_PALENTRY10 ,Window 0 Palette entry 10 address"
hexmask.long 0x28 0.--31. 1. " WIN0_PALENTRY10 ,Window 0 Palette entry 10 address"
line.long 0x2C "WIN0_PALENTRY11 ,Window 0 Palette entry 11 address"
hexmask.long 0x2C 0.--31. 1. " WIN0_PALENTRY11 ,Window 0 Palette entry 11 address"
line.long 0x30 "WIN0_PALENTRY12 ,Window 0 Palette entry 12 address"
hexmask.long 0x30 0.--31. 1. " WIN0_PALENTRY12 ,Window 0 Palette entry 12 address"
line.long 0x34 "WIN0_PALENTRY13 ,Window 0 Palette entry 13 address"
hexmask.long 0x34 0.--31. 1. " WIN0_PALENTRY13 ,Window 0 Palette entry 13 address"
line.long 0x38 "WIN0_PALENTRY14 ,Window 0 Palette entry 14 address"
hexmask.long 0x38 0.--31. 1. " WIN0_PALENTRY14 ,Window 0 Palette entry 14 address"
line.long 0x3C "WIN0_PALENTRY15 ,Window 0 Palette entry 15 address"
hexmask.long 0x3C 0.--31. 1. " WIN0_PALENTRY15 ,Window 0 Palette entry 15 address"
line.long 0x40 "WIN0_PALENTRY16 ,Window 0 Palette entry 16 address"
hexmask.long 0x40 0.--31. 1. " WIN0_PALENTRY16 ,Window 0 Palette entry 16 address"
line.long 0x44 "WIN0_PALENTRY17 ,Window 0 Palette entry 17 address"
hexmask.long 0x44 0.--31. 1. " WIN0_PALENTRY17 ,Window 0 Palette entry 17 address"
line.long 0x48 "WIN0_PALENTRY18 ,Window 0 Palette entry 18 address"
hexmask.long 0x48 0.--31. 1. " WIN0_PALENTRY18 ,Window 0 Palette entry 18 address"
line.long 0x4C "WIN0_PALENTRY19 ,Window 0 Palette entry 19 address"
hexmask.long 0x4C 0.--31. 1. " WIN0_PALENTRY19 ,Window 0 Palette entry 19 address"
line.long 0x50 "WIN0_PALENTRY20 ,Window 0 Palette entry 20 address"
hexmask.long 0x50 0.--31. 1. " WIN0_PALENTRY20 ,Window 0 Palette entry 20 address"
line.long 0x54 "WIN0_PALENTRY21 ,Window 0 Palette entry 21 address"
hexmask.long 0x54 0.--31. 1. " WIN0_PALENTRY21 ,Window 0 Palette entry 21 address"
line.long 0x58 "WIN0_PALENTRY22 ,Window 0 Palette entry 22 address"
hexmask.long 0x58 0.--31. 1. " WIN0_PALENTRY22 ,Window 0 Palette entry 22 address"
line.long 0x5C "WIN0_PALENTRY23 ,Window 0 Palette entry 23 address"
hexmask.long 0x5C 0.--31. 1. " WIN0_PALENTRY23 ,Window 0 Palette entry 23 address"
line.long 0x60 "WIN0_PALENTRY24 ,Window 0 Palette entry 24 address"
hexmask.long 0x60 0.--31. 1. " WIN0_PALENTRY24 ,Window 0 Palette entry 24 address"
line.long 0x64 "WIN0_PALENTRY25 ,Window 0 Palette entry 25 address"
hexmask.long 0x64 0.--31. 1. " WIN0_PALENTRY25 ,Window 0 Palette entry 25 address"
line.long 0x68 "WIN0_PALENTRY26 ,Window 0 Palette entry 26 address"
hexmask.long 0x68 0.--31. 1. " WIN0_PALENTRY26 ,Window 0 Palette entry 26 address"
line.long 0x6C "WIN0_PALENTRY27 ,Window 0 Palette entry 27 address"
hexmask.long 0x6C 0.--31. 1. " WIN0_PALENTRY27 ,Window 0 Palette entry 27 address"
line.long 0x70 "WIN0_PALENTRY28 ,Window 0 Palette entry 28 address"
hexmask.long 0x70 0.--31. 1. " WIN0_PALENTRY28 ,Window 0 Palette entry 28 address"
line.long 0x74 "WIN0_PALENTRY29 ,Window 0 Palette entry 29 address"
hexmask.long 0x74 0.--31. 1. " WIN0_PALENTRY29 ,Window 0 Palette entry 29 address"
line.long 0x78 "WIN0_PALENTRY30 ,Window 0 Palette entry 30 address"
hexmask.long 0x78 0.--31. 1. " WIN0_PALENTRY30 ,Window 0 Palette entry 30 address"
line.long 0x7C "WIN0_PALENTRY31 ,Window 0 Palette entry 31 address"
hexmask.long 0x7C 0.--31. 1. " WIN0_PALENTRY31 ,Window 0 Palette entry 31 address"
line.long 0x80 "WIN0_PALENTRY32 ,Window 0 Palette entry 32 address"
hexmask.long 0x80 0.--31. 1. " WIN0_PALENTRY32 ,Window 0 Palette entry 32 address"
line.long 0x84 "WIN0_PALENTRY33 ,Window 0 Palette entry 33 address"
hexmask.long 0x84 0.--31. 1. " WIN0_PALENTRY33 ,Window 0 Palette entry 33 address"
line.long 0x88 "WIN0_PALENTRY34 ,Window 0 Palette entry 34 address"
hexmask.long 0x88 0.--31. 1. " WIN0_PALENTRY34 ,Window 0 Palette entry 34 address"
line.long 0x8C "WIN0_PALENTRY35 ,Window 0 Palette entry 35 address"
hexmask.long 0x8C 0.--31. 1. " WIN0_PALENTRY35 ,Window 0 Palette entry 35 address"
line.long 0x90 "WIN0_PALENTRY36 ,Window 0 Palette entry 36 address"
hexmask.long 0x90 0.--31. 1. " WIN0_PALENTRY36 ,Window 0 Palette entry 36 address"
line.long 0x94 "WIN0_PALENTRY37 ,Window 0 Palette entry 37 address"
hexmask.long 0x94 0.--31. 1. " WIN0_PALENTRY37 ,Window 0 Palette entry 37 address"
line.long 0x98 "WIN0_PALENTRY38 ,Window 0 Palette entry 38 address"
hexmask.long 0x98 0.--31. 1. " WIN0_PALENTRY38 ,Window 0 Palette entry 38 address"
line.long 0x9C "WIN0_PALENTRY39 ,Window 0 Palette entry 39 address"
hexmask.long 0x9C 0.--31. 1. " WIN0_PALENTRY39 ,Window 0 Palette entry 39 address"
line.long 0xA0 "WIN0_PALENTRY40 ,Window 0 Palette entry 40 address"
hexmask.long 0xA0 0.--31. 1. " WIN0_PALENTRY40 ,Window 0 Palette entry 40 address"
line.long 0xA4 "WIN0_PALENTRY41 ,Window 0 Palette entry 41 address"
hexmask.long 0xA4 0.--31. 1. " WIN0_PALENTRY41 ,Window 0 Palette entry 41 address"
line.long 0xA8 "WIN0_PALENTRY42 ,Window 0 Palette entry 42 address"
hexmask.long 0xA8 0.--31. 1. " WIN0_PALENTRY42 ,Window 0 Palette entry 42 address"
line.long 0xAC "WIN0_PALENTRY43 ,Window 0 Palette entry 43 address"
hexmask.long 0xAC 0.--31. 1. " WIN0_PALENTRY43 ,Window 0 Palette entry 43 address"
line.long 0xB0 "WIN0_PALENTRY44 ,Window 0 Palette entry 44 address"
hexmask.long 0xB0 0.--31. 1. " WIN0_PALENTRY44 ,Window 0 Palette entry 44 address"
line.long 0xB4 "WIN0_PALENTRY45 ,Window 0 Palette entry 45 address"
hexmask.long 0xB4 0.--31. 1. " WIN0_PALENTRY45 ,Window 0 Palette entry 45 address"
line.long 0xB8 "WIN0_PALENTRY46 ,Window 0 Palette entry 46 address"
hexmask.long 0xB8 0.--31. 1. " WIN0_PALENTRY46 ,Window 0 Palette entry 46 address"
line.long 0xBC "WIN0_PALENTRY47 ,Window 0 Palette entry 47 address"
hexmask.long 0xBC 0.--31. 1. " WIN0_PALENTRY47 ,Window 0 Palette entry 47 address"
line.long 0xC0 "WIN0_PALENTRY48 ,Window 0 Palette entry 48 address"
hexmask.long 0xC0 0.--31. 1. " WIN0_PALENTRY48 ,Window 0 Palette entry 48 address"
line.long 0xC4 "WIN0_PALENTRY49 ,Window 0 Palette entry 49 address"
hexmask.long 0xC4 0.--31. 1. " WIN0_PALENTRY49 ,Window 0 Palette entry 49 address"
line.long 0xC8 "WIN0_PALENTRY50 ,Window 0 Palette entry 50 address"
hexmask.long 0xC8 0.--31. 1. " WIN0_PALENTRY50 ,Window 0 Palette entry 50 address"
line.long 0xCC "WIN0_PALENTRY51 ,Window 0 Palette entry 51 address"
hexmask.long 0xCC 0.--31. 1. " WIN0_PALENTRY51 ,Window 0 Palette entry 51 address"
line.long 0xD0 "WIN0_PALENTRY52 ,Window 0 Palette entry 52 address"
hexmask.long 0xD0 0.--31. 1. " WIN0_PALENTRY52 ,Window 0 Palette entry 52 address"
line.long 0xD4 "WIN0_PALENTRY53 ,Window 0 Palette entry 53 address"
hexmask.long 0xD4 0.--31. 1. " WIN0_PALENTRY53 ,Window 0 Palette entry 53 address"
line.long 0xD8 "WIN0_PALENTRY54 ,Window 0 Palette entry 54 address"
hexmask.long 0xD8 0.--31. 1. " WIN0_PALENTRY54 ,Window 0 Palette entry 54 address"
line.long 0xDC "WIN0_PALENTRY55 ,Window 0 Palette entry 55 address"
hexmask.long 0xDC 0.--31. 1. " WIN0_PALENTRY55 ,Window 0 Palette entry 55 address"
line.long 0xE0 "WIN0_PALENTRY56 ,Window 0 Palette entry 56 address"
hexmask.long 0xE0 0.--31. 1. " WIN0_PALENTRY56 ,Window 0 Palette entry 56 address"
line.long 0xE4 "WIN0_PALENTRY57 ,Window 0 Palette entry 57 address"
hexmask.long 0xE4 0.--31. 1. " WIN0_PALENTRY57 ,Window 0 Palette entry 57 address"
line.long 0xE8 "WIN0_PALENTRY58 ,Window 0 Palette entry 58 address"
hexmask.long 0xE8 0.--31. 1. " WIN0_PALENTRY58 ,Window 0 Palette entry 58 address"
line.long 0xEC "WIN0_PALENTRY59 ,Window 0 Palette entry 59 address"
hexmask.long 0xEC 0.--31. 1. " WIN0_PALENTRY59 ,Window 0 Palette entry 59 address"
line.long 0xF0 "WIN0_PALENTRY60 ,Window 0 Palette entry 60 address"
hexmask.long 0xF0 0.--31. 1. " WIN0_PALENTRY60 ,Window 0 Palette entry 60 address"
line.long 0xF4 "WIN0_PALENTRY61 ,Window 0 Palette entry 61 address"
hexmask.long 0xF4 0.--31. 1. " WIN0_PALENTRY61 ,Window 0 Palette entry 61 address"
line.long 0xF8 "WIN0_PALENTRY62 ,Window 0 Palette entry 62 address"
hexmask.long 0xF8 0.--31. 1. " WIN0_PALENTRY62 ,Window 0 Palette entry 62 address"
line.long 0xFC "WIN0_PALENTRY63 ,Window 0 Palette entry 63 address"
hexmask.long 0xFC 0.--31. 1. " WIN0_PALENTRY63 ,Window 0 Palette entry 63 address"
line.long 0x100 "WIN0_PALENTRY64 ,Window 0 Palette entry 64 address"
hexmask.long 0x100 0.--31. 1. " WIN0_PALENTRY64 ,Window 0 Palette entry 64 address"
line.long 0x104 "WIN0_PALENTRY65 ,Window 0 Palette entry 65 address"
hexmask.long 0x104 0.--31. 1. " WIN0_PALENTRY65 ,Window 0 Palette entry 65 address"
line.long 0x108 "WIN0_PALENTRY66 ,Window 0 Palette entry 66 address"
hexmask.long 0x108 0.--31. 1. " WIN0_PALENTRY66 ,Window 0 Palette entry 66 address"
line.long 0x10C "WIN0_PALENTRY67 ,Window 0 Palette entry 67 address"
hexmask.long 0x10C 0.--31. 1. " WIN0_PALENTRY67 ,Window 0 Palette entry 67 address"
line.long 0x110 "WIN0_PALENTRY68 ,Window 0 Palette entry 68 address"
hexmask.long 0x110 0.--31. 1. " WIN0_PALENTRY68 ,Window 0 Palette entry 68 address"
line.long 0x114 "WIN0_PALENTRY69 ,Window 0 Palette entry 69 address"
hexmask.long 0x114 0.--31. 1. " WIN0_PALENTRY69 ,Window 0 Palette entry 69 address"
line.long 0x118 "WIN0_PALENTRY70 ,Window 0 Palette entry 70 address"
hexmask.long 0x118 0.--31. 1. " WIN0_PALENTRY70 ,Window 0 Palette entry 70 address"
line.long 0x11C "WIN0_PALENTRY71 ,Window 0 Palette entry 71 address"
hexmask.long 0x11C 0.--31. 1. " WIN0_PALENTRY71 ,Window 0 Palette entry 71 address"
line.long 0x120 "WIN0_PALENTRY72 ,Window 0 Palette entry 72 address"
hexmask.long 0x120 0.--31. 1. " WIN0_PALENTRY72 ,Window 0 Palette entry 72 address"
line.long 0x124 "WIN0_PALENTRY73 ,Window 0 Palette entry 73 address"
hexmask.long 0x124 0.--31. 1. " WIN0_PALENTRY73 ,Window 0 Palette entry 73 address"
line.long 0x128 "WIN0_PALENTRY74 ,Window 0 Palette entry 74 address"
hexmask.long 0x128 0.--31. 1. " WIN0_PALENTRY74 ,Window 0 Palette entry 74 address"
line.long 0x12C "WIN0_PALENTRY75 ,Window 0 Palette entry 75 address"
hexmask.long 0x12C 0.--31. 1. " WIN0_PALENTRY75 ,Window 0 Palette entry 75 address"
line.long 0x130 "WIN0_PALENTRY76 ,Window 0 Palette entry 76 address"
hexmask.long 0x130 0.--31. 1. " WIN0_PALENTRY76 ,Window 0 Palette entry 76 address"
line.long 0x134 "WIN0_PALENTRY77 ,Window 0 Palette entry 77 address"
hexmask.long 0x134 0.--31. 1. " WIN0_PALENTRY77 ,Window 0 Palette entry 77 address"
line.long 0x138 "WIN0_PALENTRY78 ,Window 0 Palette entry 78 address"
hexmask.long 0x138 0.--31. 1. " WIN0_PALENTRY78 ,Window 0 Palette entry 78 address"
line.long 0x13C "WIN0_PALENTRY79 ,Window 0 Palette entry 79 address"
hexmask.long 0x13C 0.--31. 1. " WIN0_PALENTRY79 ,Window 0 Palette entry 79 address"
line.long 0x140 "WIN0_PALENTRY80 ,Window 0 Palette entry 80 address"
hexmask.long 0x140 0.--31. 1. " WIN0_PALENTRY80 ,Window 0 Palette entry 80 address"
line.long 0x144 "WIN0_PALENTRY81 ,Window 0 Palette entry 81 address"
hexmask.long 0x144 0.--31. 1. " WIN0_PALENTRY81 ,Window 0 Palette entry 81 address"
line.long 0x148 "WIN0_PALENTRY82 ,Window 0 Palette entry 82 address"
hexmask.long 0x148 0.--31. 1. " WIN0_PALENTRY82 ,Window 0 Palette entry 82 address"
line.long 0x14C "WIN0_PALENTRY83 ,Window 0 Palette entry 83 address"
hexmask.long 0x14C 0.--31. 1. " WIN0_PALENTRY83 ,Window 0 Palette entry 83 address"
line.long 0x150 "WIN0_PALENTRY84 ,Window 0 Palette entry 84 address"
hexmask.long 0x150 0.--31. 1. " WIN0_PALENTRY84 ,Window 0 Palette entry 84 address"
line.long 0x154 "WIN0_PALENTRY85 ,Window 0 Palette entry 85 address"
hexmask.long 0x154 0.--31. 1. " WIN0_PALENTRY85 ,Window 0 Palette entry 85 address"
line.long 0x158 "WIN0_PALENTRY86 ,Window 0 Palette entry 86 address"
hexmask.long 0x158 0.--31. 1. " WIN0_PALENTRY86 ,Window 0 Palette entry 86 address"
line.long 0x15C "WIN0_PALENTRY87 ,Window 0 Palette entry 87 address"
hexmask.long 0x15C 0.--31. 1. " WIN0_PALENTRY87 ,Window 0 Palette entry 87 address"
line.long 0x160 "WIN0_PALENTRY88 ,Window 0 Palette entry 88 address"
hexmask.long 0x160 0.--31. 1. " WIN0_PALENTRY88 ,Window 0 Palette entry 88 address"
line.long 0x164 "WIN0_PALENTRY89 ,Window 0 Palette entry 89 address"
hexmask.long 0x164 0.--31. 1. " WIN0_PALENTRY89 ,Window 0 Palette entry 89 address"
line.long 0x168 "WIN0_PALENTRY90 ,Window 0 Palette entry 90 address"
hexmask.long 0x168 0.--31. 1. " WIN0_PALENTRY90 ,Window 0 Palette entry 90 address"
line.long 0x16C "WIN0_PALENTRY91 ,Window 0 Palette entry 91 address"
hexmask.long 0x16C 0.--31. 1. " WIN0_PALENTRY91 ,Window 0 Palette entry 91 address"
line.long 0x170 "WIN0_PALENTRY92 ,Window 0 Palette entry 92 address"
hexmask.long 0x170 0.--31. 1. " WIN0_PALENTRY92 ,Window 0 Palette entry 92 address"
line.long 0x174 "WIN0_PALENTRY93 ,Window 0 Palette entry 93 address"
hexmask.long 0x174 0.--31. 1. " WIN0_PALENTRY93 ,Window 0 Palette entry 93 address"
line.long 0x178 "WIN0_PALENTRY94 ,Window 0 Palette entry 94 address"
hexmask.long 0x178 0.--31. 1. " WIN0_PALENTRY94 ,Window 0 Palette entry 94 address"
line.long 0x17C "WIN0_PALENTRY95 ,Window 0 Palette entry 95 address"
hexmask.long 0x17C 0.--31. 1. " WIN0_PALENTRY95 ,Window 0 Palette entry 95 address"
line.long 0x180 "WIN0_PALENTRY96 ,Window 0 Palette entry 96 address"
hexmask.long 0x180 0.--31. 1. " WIN0_PALENTRY96 ,Window 0 Palette entry 96 address"
line.long 0x184 "WIN0_PALENTRY97 ,Window 0 Palette entry 97 address"
hexmask.long 0x184 0.--31. 1. " WIN0_PALENTRY97 ,Window 0 Palette entry 97 address"
line.long 0x188 "WIN0_PALENTRY98 ,Window 0 Palette entry 98 address"
hexmask.long 0x188 0.--31. 1. " WIN0_PALENTRY98 ,Window 0 Palette entry 98 address"
line.long 0x18C "WIN0_PALENTRY99 ,Window 0 Palette entry 99 address"
hexmask.long 0x18C 0.--31. 1. " WIN0_PALENTRY99 ,Window 0 Palette entry 99 address"
line.long 0x190 "WIN0_PALENTRY100,Window 0 Palette entry 100 address"
hexmask.long 0x190 0.--31. 1. " WIN0_PALENTRY100 ,Window 0 Palette entry 100 address"
line.long 0x194 "WIN0_PALENTRY101,Window 0 Palette entry 101 address"
hexmask.long 0x194 0.--31. 1. " WIN0_PALENTRY101 ,Window 0 Palette entry 101 address"
line.long 0x198 "WIN0_PALENTRY102,Window 0 Palette entry 102 address"
hexmask.long 0x198 0.--31. 1. " WIN0_PALENTRY102 ,Window 0 Palette entry 102 address"
line.long 0x19C "WIN0_PALENTRY103,Window 0 Palette entry 103 address"
hexmask.long 0x19C 0.--31. 1. " WIN0_PALENTRY103 ,Window 0 Palette entry 103 address"
line.long 0x1A0 "WIN0_PALENTRY104,Window 0 Palette entry 104 address"
hexmask.long 0x1A0 0.--31. 1. " WIN0_PALENTRY104 ,Window 0 Palette entry 104 address"
line.long 0x1A4 "WIN0_PALENTRY105,Window 0 Palette entry 105 address"
hexmask.long 0x1A4 0.--31. 1. " WIN0_PALENTRY105 ,Window 0 Palette entry 105 address"
line.long 0x1A8 "WIN0_PALENTRY106,Window 0 Palette entry 106 address"
hexmask.long 0x1A8 0.--31. 1. " WIN0_PALENTRY106 ,Window 0 Palette entry 106 address"
line.long 0x1AC "WIN0_PALENTRY107,Window 0 Palette entry 107 address"
hexmask.long 0x1AC 0.--31. 1. " WIN0_PALENTRY107 ,Window 0 Palette entry 107 address"
line.long 0x1B0 "WIN0_PALENTRY108,Window 0 Palette entry 108 address"
hexmask.long 0x1B0 0.--31. 1. " WIN0_PALENTRY108 ,Window 0 Palette entry 108 address"
line.long 0x1B4 "WIN0_PALENTRY109,Window 0 Palette entry 109 address"
hexmask.long 0x1B4 0.--31. 1. " WIN0_PALENTRY109 ,Window 0 Palette entry 109 address"
line.long 0x1B8 "WIN0_PALENTRY110,Window 0 Palette entry 110 address"
hexmask.long 0x1B8 0.--31. 1. " WIN0_PALENTRY110 ,Window 0 Palette entry 110 address"
line.long 0x1BC "WIN0_PALENTRY111,Window 0 Palette entry 111 address"
hexmask.long 0x1BC 0.--31. 1. " WIN0_PALENTRY111 ,Window 0 Palette entry 111 address"
line.long 0x1C0 "WIN0_PALENTRY112,Window 0 Palette entry 112 address"
hexmask.long 0x1C0 0.--31. 1. " WIN0_PALENTRY112 ,Window 0 Palette entry 112 address"
line.long 0x1C4 "WIN0_PALENTRY113,Window 0 Palette entry 113 address"
hexmask.long 0x1C4 0.--31. 1. " WIN0_PALENTRY113 ,Window 0 Palette entry 113 address"
line.long 0x1C8 "WIN0_PALENTRY114,Window 0 Palette entry 114 address"
hexmask.long 0x1C8 0.--31. 1. " WIN0_PALENTRY114 ,Window 0 Palette entry 114 address"
line.long 0x1CC "WIN0_PALENTRY115,Window 0 Palette entry 115 address"
hexmask.long 0x1CC 0.--31. 1. " WIN0_PALENTRY115 ,Window 0 Palette entry 115 address"
line.long 0x1D0 "WIN0_PALENTRY116,Window 0 Palette entry 116 address"
hexmask.long 0x1D0 0.--31. 1. " WIN0_PALENTRY116 ,Window 0 Palette entry 116 address"
line.long 0x1D4 "WIN0_PALENTRY117,Window 0 Palette entry 117 address"
hexmask.long 0x1D4 0.--31. 1. " WIN0_PALENTRY117 ,Window 0 Palette entry 117 address"
line.long 0x1D8 "WIN0_PALENTRY118,Window 0 Palette entry 118 address"
hexmask.long 0x1D8 0.--31. 1. " WIN0_PALENTRY118 ,Window 0 Palette entry 118 address"
line.long 0x1DC "WIN0_PALENTRY119,Window 0 Palette entry 119 address"
hexmask.long 0x1DC 0.--31. 1. " WIN0_PALENTRY119 ,Window 0 Palette entry 119 address"
line.long 0x1E0 "WIN0_PALENTRY120,Window 0 Palette entry 120 address"
hexmask.long 0x1E0 0.--31. 1. " WIN0_PALENTRY120 ,Window 0 Palette entry 120 address"
line.long 0x1E4 "WIN0_PALENTRY121,Window 0 Palette entry 121 address"
hexmask.long 0x1E4 0.--31. 1. " WIN0_PALENTRY121 ,Window 0 Palette entry 121 address"
line.long 0x1E8 "WIN0_PALENTRY122,Window 0 Palette entry 122 address"
hexmask.long 0x1E8 0.--31. 1. " WIN0_PALENTRY122 ,Window 0 Palette entry 122 address"
line.long 0x1EC "WIN0_PALENTRY123,Window 0 Palette entry 123 address"
hexmask.long 0x1EC 0.--31. 1. " WIN0_PALENTRY123 ,Window 0 Palette entry 123 address"
line.long 0x1F0 "WIN0_PALENTRY124,Window 0 Palette entry 124 address"
hexmask.long 0x1F0 0.--31. 1. " WIN0_PALENTRY124 ,Window 0 Palette entry 124 address"
line.long 0x1F4 "WIN0_PALENTRY125,Window 0 Palette entry 125 address"
hexmask.long 0x1F4 0.--31. 1. " WIN0_PALENTRY125 ,Window 0 Palette entry 125 address"
line.long 0x1F8 "WIN0_PALENTRY126,Window 0 Palette entry 126 address"
hexmask.long 0x1F8 0.--31. 1. " WIN0_PALENTRY126 ,Window 0 Palette entry 126 address"
line.long 0x1FC "WIN0_PALENTRY127,Window 0 Palette entry 127 address"
hexmask.long 0x1FC 0.--31. 1. " WIN0_PALENTRY127 ,Window 0 Palette entry 127 address"
line.long 0x200 "WIN0_PALENTRY128,Window 0 Palette entry 128 address"
hexmask.long 0x200 0.--31. 1. " WIN0_PALENTRY128 ,Window 0 Palette entry 128 address"
line.long 0x204 "WIN0_PALENTRY129,Window 0 Palette entry 129 address"
hexmask.long 0x204 0.--31. 1. " WIN0_PALENTRY129 ,Window 0 Palette entry 129 address"
line.long 0x208 "WIN0_PALENTRY130,Window 0 Palette entry 130 address"
hexmask.long 0x208 0.--31. 1. " WIN0_PALENTRY130 ,Window 0 Palette entry 130 address"
line.long 0x20C "WIN0_PALENTRY131,Window 0 Palette entry 131 address"
hexmask.long 0x20C 0.--31. 1. " WIN0_PALENTRY131 ,Window 0 Palette entry 131 address"
line.long 0x210 "WIN0_PALENTRY132,Window 0 Palette entry 132 address"
hexmask.long 0x210 0.--31. 1. " WIN0_PALENTRY132 ,Window 0 Palette entry 132 address"
line.long 0x214 "WIN0_PALENTRY133,Window 0 Palette entry 133 address"
hexmask.long 0x214 0.--31. 1. " WIN0_PALENTRY133 ,Window 0 Palette entry 133 address"
line.long 0x218 "WIN0_PALENTRY134,Window 0 Palette entry 134 address"
hexmask.long 0x218 0.--31. 1. " WIN0_PALENTRY134 ,Window 0 Palette entry 134 address"
line.long 0x21C "WIN0_PALENTRY135,Window 0 Palette entry 135 address"
hexmask.long 0x21C 0.--31. 1. " WIN0_PALENTRY135 ,Window 0 Palette entry 135 address"
line.long 0x220 "WIN0_PALENTRY136,Window 0 Palette entry 136 address"
hexmask.long 0x220 0.--31. 1. " WIN0_PALENTRY136 ,Window 0 Palette entry 136 address"
line.long 0x224 "WIN0_PALENTRY137,Window 0 Palette entry 137 address"
hexmask.long 0x224 0.--31. 1. " WIN0_PALENTRY137 ,Window 0 Palette entry 137 address"
line.long 0x228 "WIN0_PALENTRY138,Window 0 Palette entry 138 address"
hexmask.long 0x228 0.--31. 1. " WIN0_PALENTRY138 ,Window 0 Palette entry 138 address"
line.long 0x22C "WIN0_PALENTRY139,Window 0 Palette entry 139 address"
hexmask.long 0x22C 0.--31. 1. " WIN0_PALENTRY139 ,Window 0 Palette entry 139 address"
line.long 0x230 "WIN0_PALENTRY140,Window 0 Palette entry 140 address"
hexmask.long 0x230 0.--31. 1. " WIN0_PALENTRY140 ,Window 0 Palette entry 140 address"
line.long 0x234 "WIN0_PALENTRY141,Window 0 Palette entry 141 address"
hexmask.long 0x234 0.--31. 1. " WIN0_PALENTRY141 ,Window 0 Palette entry 141 address"
line.long 0x238 "WIN0_PALENTRY142,Window 0 Palette entry 142 address"
hexmask.long 0x238 0.--31. 1. " WIN0_PALENTRY142 ,Window 0 Palette entry 142 address"
line.long 0x23C "WIN0_PALENTRY143,Window 0 Palette entry 143 address"
hexmask.long 0x23C 0.--31. 1. " WIN0_PALENTRY143 ,Window 0 Palette entry 143 address"
line.long 0x240 "WIN0_PALENTRY144,Window 0 Palette entry 144 address"
hexmask.long 0x240 0.--31. 1. " WIN0_PALENTRY144 ,Window 0 Palette entry 144 address"
line.long 0x244 "WIN0_PALENTRY145,Window 0 Palette entry 145 address"
hexmask.long 0x244 0.--31. 1. " WIN0_PALENTRY145 ,Window 0 Palette entry 145 address"
line.long 0x248 "WIN0_PALENTRY146,Window 0 Palette entry 146 address"
hexmask.long 0x248 0.--31. 1. " WIN0_PALENTRY146 ,Window 0 Palette entry 146 address"
line.long 0x24C "WIN0_PALENTRY147,Window 0 Palette entry 147 address"
hexmask.long 0x24C 0.--31. 1. " WIN0_PALENTRY147 ,Window 0 Palette entry 147 address"
line.long 0x250 "WIN0_PALENTRY148,Window 0 Palette entry 148 address"
hexmask.long 0x250 0.--31. 1. " WIN0_PALENTRY148 ,Window 0 Palette entry 148 address"
line.long 0x254 "WIN0_PALENTRY149,Window 0 Palette entry 149 address"
hexmask.long 0x254 0.--31. 1. " WIN0_PALENTRY149 ,Window 0 Palette entry 149 address"
line.long 0x258 "WIN0_PALENTRY150,Window 0 Palette entry 150 address"
hexmask.long 0x258 0.--31. 1. " WIN0_PALENTRY150 ,Window 0 Palette entry 150 address"
line.long 0x25C "WIN0_PALENTRY151,Window 0 Palette entry 151 address"
hexmask.long 0x25C 0.--31. 1. " WIN0_PALENTRY151 ,Window 0 Palette entry 151 address"
line.long 0x260 "WIN0_PALENTRY152,Window 0 Palette entry 152 address"
hexmask.long 0x260 0.--31. 1. " WIN0_PALENTRY152 ,Window 0 Palette entry 152 address"
line.long 0x264 "WIN0_PALENTRY153,Window 0 Palette entry 153 address"
hexmask.long 0x264 0.--31. 1. " WIN0_PALENTRY153 ,Window 0 Palette entry 153 address"
line.long 0x268 "WIN0_PALENTRY154,Window 0 Palette entry 154 address"
hexmask.long 0x268 0.--31. 1. " WIN0_PALENTRY154 ,Window 0 Palette entry 154 address"
line.long 0x26C "WIN0_PALENTRY155,Window 0 Palette entry 155 address"
hexmask.long 0x26C 0.--31. 1. " WIN0_PALENTRY155 ,Window 0 Palette entry 155 address"
line.long 0x270 "WIN0_PALENTRY156,Window 0 Palette entry 156 address"
hexmask.long 0x270 0.--31. 1. " WIN0_PALENTRY156 ,Window 0 Palette entry 156 address"
line.long 0x274 "WIN0_PALENTRY157,Window 0 Palette entry 157 address"
hexmask.long 0x274 0.--31. 1. " WIN0_PALENTRY157 ,Window 0 Palette entry 157 address"
line.long 0x278 "WIN0_PALENTRY158,Window 0 Palette entry 158 address"
hexmask.long 0x278 0.--31. 1. " WIN0_PALENTRY158 ,Window 0 Palette entry 158 address"
line.long 0x27C "WIN0_PALENTRY159,Window 0 Palette entry 159 address"
hexmask.long 0x27C 0.--31. 1. " WIN0_PALENTRY159 ,Window 0 Palette entry 159 address"
line.long 0x280 "WIN0_PALENTRY160,Window 0 Palette entry 160 address"
hexmask.long 0x280 0.--31. 1. " WIN0_PALENTRY160 ,Window 0 Palette entry 160 address"
line.long 0x284 "WIN0_PALENTRY161,Window 0 Palette entry 161 address"
hexmask.long 0x284 0.--31. 1. " WIN0_PALENTRY161 ,Window 0 Palette entry 161 address"
line.long 0x288 "WIN0_PALENTRY162,Window 0 Palette entry 162 address"
hexmask.long 0x288 0.--31. 1. " WIN0_PALENTRY162 ,Window 0 Palette entry 162 address"
line.long 0x28C "WIN0_PALENTRY163,Window 0 Palette entry 163 address"
hexmask.long 0x28C 0.--31. 1. " WIN0_PALENTRY163 ,Window 0 Palette entry 163 address"
line.long 0x290 "WIN0_PALENTRY164,Window 0 Palette entry 164 address"
hexmask.long 0x290 0.--31. 1. " WIN0_PALENTRY164 ,Window 0 Palette entry 164 address"
line.long 0x294 "WIN0_PALENTRY165,Window 0 Palette entry 165 address"
hexmask.long 0x294 0.--31. 1. " WIN0_PALENTRY165 ,Window 0 Palette entry 165 address"
line.long 0x298 "WIN0_PALENTRY166,Window 0 Palette entry 166 address"
hexmask.long 0x298 0.--31. 1. " WIN0_PALENTRY166 ,Window 0 Palette entry 166 address"
line.long 0x29C "WIN0_PALENTRY167,Window 0 Palette entry 167 address"
hexmask.long 0x29C 0.--31. 1. " WIN0_PALENTRY167 ,Window 0 Palette entry 167 address"
line.long 0x2A0 "WIN0_PALENTRY168,Window 0 Palette entry 168 address"
hexmask.long 0x2A0 0.--31. 1. " WIN0_PALENTRY168 ,Window 0 Palette entry 168 address"
line.long 0x2A4 "WIN0_PALENTRY169,Window 0 Palette entry 169 address"
hexmask.long 0x2A4 0.--31. 1. " WIN0_PALENTRY169 ,Window 0 Palette entry 169 address"
line.long 0x2A8 "WIN0_PALENTRY170,Window 0 Palette entry 170 address"
hexmask.long 0x2A8 0.--31. 1. " WIN0_PALENTRY170 ,Window 0 Palette entry 170 address"
line.long 0x2AC "WIN0_PALENTRY171,Window 0 Palette entry 171 address"
hexmask.long 0x2AC 0.--31. 1. " WIN0_PALENTRY171 ,Window 0 Palette entry 171 address"
line.long 0x2B0 "WIN0_PALENTRY172,Window 0 Palette entry 172 address"
hexmask.long 0x2B0 0.--31. 1. " WIN0_PALENTRY172 ,Window 0 Palette entry 172 address"
line.long 0x2B4 "WIN0_PALENTRY173,Window 0 Palette entry 173 address"
hexmask.long 0x2B4 0.--31. 1. " WIN0_PALENTRY173 ,Window 0 Palette entry 173 address"
line.long 0x2B8 "WIN0_PALENTRY174,Window 0 Palette entry 174 address"
hexmask.long 0x2B8 0.--31. 1. " WIN0_PALENTRY174 ,Window 0 Palette entry 174 address"
line.long 0x2BC "WIN0_PALENTRY175,Window 0 Palette entry 175 address"
hexmask.long 0x2BC 0.--31. 1. " WIN0_PALENTRY175 ,Window 0 Palette entry 175 address"
line.long 0x2C0 "WIN0_PALENTRY176,Window 0 Palette entry 176 address"
hexmask.long 0x2C0 0.--31. 1. " WIN0_PALENTRY176 ,Window 0 Palette entry 176 address"
line.long 0x2C4 "WIN0_PALENTRY177,Window 0 Palette entry 177 address"
hexmask.long 0x2C4 0.--31. 1. " WIN0_PALENTRY177 ,Window 0 Palette entry 177 address"
line.long 0x2C8 "WIN0_PALENTRY178,Window 0 Palette entry 178 address"
hexmask.long 0x2C8 0.--31. 1. " WIN0_PALENTRY178 ,Window 0 Palette entry 178 address"
line.long 0x2CC "WIN0_PALENTRY179,Window 0 Palette entry 179 address"
hexmask.long 0x2CC 0.--31. 1. " WIN0_PALENTRY179 ,Window 0 Palette entry 179 address"
line.long 0x2D0 "WIN0_PALENTRY180,Window 0 Palette entry 180 address"
hexmask.long 0x2D0 0.--31. 1. " WIN0_PALENTRY180 ,Window 0 Palette entry 180 address"
line.long 0x2D4 "WIN0_PALENTRY181,Window 0 Palette entry 181 address"
hexmask.long 0x2D4 0.--31. 1. " WIN0_PALENTRY181 ,Window 0 Palette entry 181 address"
line.long 0x2D8 "WIN0_PALENTRY182,Window 0 Palette entry 182 address"
hexmask.long 0x2D8 0.--31. 1. " WIN0_PALENTRY182 ,Window 0 Palette entry 182 address"
line.long 0x2DC "WIN0_PALENTRY183,Window 0 Palette entry 183 address"
hexmask.long 0x2DC 0.--31. 1. " WIN0_PALENTRY183 ,Window 0 Palette entry 183 address"
line.long 0x2E0 "WIN0_PALENTRY184,Window 0 Palette entry 184 address"
hexmask.long 0x2E0 0.--31. 1. " WIN0_PALENTRY184 ,Window 0 Palette entry 184 address"
line.long 0x2E4 "WIN0_PALENTRY185,Window 0 Palette entry 185 address"
hexmask.long 0x2E4 0.--31. 1. " WIN0_PALENTRY185 ,Window 0 Palette entry 185 address"
line.long 0x2E8 "WIN0_PALENTRY186,Window 0 Palette entry 186 address"
hexmask.long 0x2E8 0.--31. 1. " WIN0_PALENTRY186 ,Window 0 Palette entry 186 address"
line.long 0x2EC "WIN0_PALENTRY187,Window 0 Palette entry 187 address"
hexmask.long 0x2EC 0.--31. 1. " WIN0_PALENTRY187 ,Window 0 Palette entry 187 address"
line.long 0x2F0 "WIN0_PALENTRY188,Window 0 Palette entry 188 address"
hexmask.long 0x2F0 0.--31. 1. " WIN0_PALENTRY188 ,Window 0 Palette entry 188 address"
line.long 0x2F4 "WIN0_PALENTRY189,Window 0 Palette entry 189 address"
hexmask.long 0x2F4 0.--31. 1. " WIN0_PALENTRY189 ,Window 0 Palette entry 189 address"
line.long 0x2F8 "WIN0_PALENTRY190,Window 0 Palette entry 190 address"
hexmask.long 0x2F8 0.--31. 1. " WIN0_PALENTRY190 ,Window 0 Palette entry 190 address"
line.long 0x2FC "WIN0_PALENTRY191,Window 0 Palette entry 191 address"
hexmask.long 0x2FC 0.--31. 1. " WIN0_PALENTRY191 ,Window 0 Palette entry 191 address"
line.long 0x300 "WIN0_PALENTRY192,Window 0 Palette entry 192 address"
hexmask.long 0x300 0.--31. 1. " WIN0_PALENTRY192 ,Window 0 Palette entry 192 address"
line.long 0x304 "WIN0_PALENTRY193,Window 0 Palette entry 193 address"
hexmask.long 0x304 0.--31. 1. " WIN0_PALENTRY193 ,Window 0 Palette entry 193 address"
line.long 0x308 "WIN0_PALENTRY194,Window 0 Palette entry 194 address"
hexmask.long 0x308 0.--31. 1. " WIN0_PALENTRY194 ,Window 0 Palette entry 194 address"
line.long 0x30C "WIN0_PALENTRY195,Window 0 Palette entry 195 address"
hexmask.long 0x30C 0.--31. 1. " WIN0_PALENTRY195 ,Window 0 Palette entry 195 address"
line.long 0x310 "WIN0_PALENTRY196,Window 0 Palette entry 196 address"
hexmask.long 0x310 0.--31. 1. " WIN0_PALENTRY196 ,Window 0 Palette entry 196 address"
line.long 0x314 "WIN0_PALENTRY197,Window 0 Palette entry 197 address"
hexmask.long 0x314 0.--31. 1. " WIN0_PALENTRY197 ,Window 0 Palette entry 197 address"
line.long 0x318 "WIN0_PALENTRY198,Window 0 Palette entry 198 address"
hexmask.long 0x318 0.--31. 1. " WIN0_PALENTRY198 ,Window 0 Palette entry 198 address"
line.long 0x31C "WIN0_PALENTRY199,Window 0 Palette entry 199 address"
hexmask.long 0x31C 0.--31. 1. " WIN0_PALENTRY199 ,Window 0 Palette entry 199 address"
line.long 0x320 "WIN0_PALENTRY200,Window 0 Palette entry 200 address"
hexmask.long 0x320 0.--31. 1. " WIN0_PALENTRY200 ,Window 0 Palette entry 200 address"
line.long 0x324 "WIN0_PALENTRY201,Window 0 Palette entry 201 address"
hexmask.long 0x324 0.--31. 1. " WIN0_PALENTRY201 ,Window 0 Palette entry 201 address"
line.long 0x328 "WIN0_PALENTRY202,Window 0 Palette entry 202 address"
hexmask.long 0x328 0.--31. 1. " WIN0_PALENTRY202 ,Window 0 Palette entry 202 address"
line.long 0x32C "WIN0_PALENTRY203,Window 0 Palette entry 203 address"
hexmask.long 0x32C 0.--31. 1. " WIN0_PALENTRY203 ,Window 0 Palette entry 203 address"
line.long 0x330 "WIN0_PALENTRY204,Window 0 Palette entry 204 address"
hexmask.long 0x330 0.--31. 1. " WIN0_PALENTRY204 ,Window 0 Palette entry 204 address"
line.long 0x334 "WIN0_PALENTRY205,Window 0 Palette entry 205 address"
hexmask.long 0x334 0.--31. 1. " WIN0_PALENTRY205 ,Window 0 Palette entry 205 address"
line.long 0x338 "WIN0_PALENTRY206,Window 0 Palette entry 206 address"
hexmask.long 0x338 0.--31. 1. " WIN0_PALENTRY206 ,Window 0 Palette entry 206 address"
line.long 0x33C "WIN0_PALENTRY207,Window 0 Palette entry 207 address"
hexmask.long 0x33C 0.--31. 1. " WIN0_PALENTRY207 ,Window 0 Palette entry 207 address"
line.long 0x340 "WIN0_PALENTRY208,Window 0 Palette entry 208 address"
hexmask.long 0x340 0.--31. 1. " WIN0_PALENTRY208 ,Window 0 Palette entry 208 address"
line.long 0x344 "WIN0_PALENTRY209,Window 0 Palette entry 209 address"
hexmask.long 0x344 0.--31. 1. " WIN0_PALENTRY209 ,Window 0 Palette entry 209 address"
line.long 0x348 "WIN0_PALENTRY210,Window 0 Palette entry 210 address"
hexmask.long 0x348 0.--31. 1. " WIN0_PALENTRY210 ,Window 0 Palette entry 210 address"
line.long 0x34C "WIN0_PALENTRY211,Window 0 Palette entry 211 address"
hexmask.long 0x34C 0.--31. 1. " WIN0_PALENTRY211 ,Window 0 Palette entry 211 address"
line.long 0x350 "WIN0_PALENTRY212,Window 0 Palette entry 212 address"
hexmask.long 0x350 0.--31. 1. " WIN0_PALENTRY212 ,Window 0 Palette entry 212 address"
line.long 0x354 "WIN0_PALENTRY213,Window 0 Palette entry 213 address"
hexmask.long 0x354 0.--31. 1. " WIN0_PALENTRY213 ,Window 0 Palette entry 213 address"
line.long 0x358 "WIN0_PALENTRY214,Window 0 Palette entry 214 address"
hexmask.long 0x358 0.--31. 1. " WIN0_PALENTRY214 ,Window 0 Palette entry 214 address"
line.long 0x35C "WIN0_PALENTRY215,Window 0 Palette entry 215 address"
hexmask.long 0x35C 0.--31. 1. " WIN0_PALENTRY215 ,Window 0 Palette entry 215 address"
line.long 0x360 "WIN0_PALENTRY216,Window 0 Palette entry 216 address"
hexmask.long 0x360 0.--31. 1. " WIN0_PALENTRY216 ,Window 0 Palette entry 216 address"
line.long 0x364 "WIN0_PALENTRY217,Window 0 Palette entry 217 address"
hexmask.long 0x364 0.--31. 1. " WIN0_PALENTRY217 ,Window 0 Palette entry 217 address"
line.long 0x368 "WIN0_PALENTRY218,Window 0 Palette entry 218 address"
hexmask.long 0x368 0.--31. 1. " WIN0_PALENTRY218 ,Window 0 Palette entry 218 address"
line.long 0x36C "WIN0_PALENTRY219,Window 0 Palette entry 219 address"
hexmask.long 0x36C 0.--31. 1. " WIN0_PALENTRY219 ,Window 0 Palette entry 219 address"
line.long 0x370 "WIN0_PALENTRY220,Window 0 Palette entry 220 address"
hexmask.long 0x370 0.--31. 1. " WIN0_PALENTRY220 ,Window 0 Palette entry 220 address"
line.long 0x374 "WIN0_PALENTRY221,Window 0 Palette entry 221 address"
hexmask.long 0x374 0.--31. 1. " WIN0_PALENTRY221 ,Window 0 Palette entry 221 address"
line.long 0x378 "WIN0_PALENTRY222,Window 0 Palette entry 222 address"
hexmask.long 0x378 0.--31. 1. " WIN0_PALENTRY222 ,Window 0 Palette entry 222 address"
line.long 0x37C "WIN0_PALENTRY223,Window 0 Palette entry 223 address"
hexmask.long 0x37C 0.--31. 1. " WIN0_PALENTRY223 ,Window 0 Palette entry 223 address"
line.long 0x380 "WIN0_PALENTRY224,Window 0 Palette entry 224 address"
hexmask.long 0x380 0.--31. 1. " WIN0_PALENTRY224 ,Window 0 Palette entry 224 address"
line.long 0x384 "WIN0_PALENTRY225,Window 0 Palette entry 225 address"
hexmask.long 0x384 0.--31. 1. " WIN0_PALENTRY225 ,Window 0 Palette entry 225 address"
line.long 0x388 "WIN0_PALENTRY226,Window 0 Palette entry 226 address"
hexmask.long 0x388 0.--31. 1. " WIN0_PALENTRY226 ,Window 0 Palette entry 226 address"
line.long 0x38C "WIN0_PALENTRY227,Window 0 Palette entry 227 address"
hexmask.long 0x38C 0.--31. 1. " WIN0_PALENTRY227 ,Window 0 Palette entry 227 address"
line.long 0x390 "WIN0_PALENTRY228,Window 0 Palette entry 228 address"
hexmask.long 0x390 0.--31. 1. " WIN0_PALENTRY228 ,Window 0 Palette entry 228 address"
line.long 0x394 "WIN0_PALENTRY229,Window 0 Palette entry 229 address"
hexmask.long 0x394 0.--31. 1. " WIN0_PALENTRY229 ,Window 0 Palette entry 229 address"
line.long 0x398 "WIN0_PALENTRY230,Window 0 Palette entry 230 address"
hexmask.long 0x398 0.--31. 1. " WIN0_PALENTRY230 ,Window 0 Palette entry 230 address"
line.long 0x39C "WIN0_PALENTRY231,Window 0 Palette entry 231 address"
hexmask.long 0x39C 0.--31. 1. " WIN0_PALENTRY231 ,Window 0 Palette entry 231 address"
line.long 0x3A0 "WIN0_PALENTRY232,Window 0 Palette entry 232 address"
hexmask.long 0x3A0 0.--31. 1. " WIN0_PALENTRY232 ,Window 0 Palette entry 232 address"
line.long 0x3A4 "WIN0_PALENTRY233,Window 0 Palette entry 233 address"
hexmask.long 0x3A4 0.--31. 1. " WIN0_PALENTRY233 ,Window 0 Palette entry 233 address"
line.long 0x3A8 "WIN0_PALENTRY234,Window 0 Palette entry 234 address"
hexmask.long 0x3A8 0.--31. 1. " WIN0_PALENTRY234 ,Window 0 Palette entry 234 address"
line.long 0x3AC "WIN0_PALENTRY235,Window 0 Palette entry 235 address"
hexmask.long 0x3AC 0.--31. 1. " WIN0_PALENTRY235 ,Window 0 Palette entry 235 address"
line.long 0x3B0 "WIN0_PALENTRY236,Window 0 Palette entry 236 address"
hexmask.long 0x3B0 0.--31. 1. " WIN0_PALENTRY236 ,Window 0 Palette entry 236 address"
line.long 0x3B4 "WIN0_PALENTRY237,Window 0 Palette entry 237 address"
hexmask.long 0x3B4 0.--31. 1. " WIN0_PALENTRY237 ,Window 0 Palette entry 237 address"
line.long 0x3B8 "WIN0_PALENTRY238,Window 0 Palette entry 238 address"
hexmask.long 0x3B8 0.--31. 1. " WIN0_PALENTRY238 ,Window 0 Palette entry 238 address"
line.long 0x3BC "WIN0_PALENTRY239,Window 0 Palette entry 239 address"
hexmask.long 0x3BC 0.--31. 1. " WIN0_PALENTRY239 ,Window 0 Palette entry 239 address"
line.long 0x3C0 "WIN0_PALENTRY240,Window 0 Palette entry 240 address"
hexmask.long 0x3C0 0.--31. 1. " WIN0_PALENTRY240 ,Window 0 Palette entry 240 address"
line.long 0x3C4 "WIN0_PALENTRY241,Window 0 Palette entry 241 address"
hexmask.long 0x3C4 0.--31. 1. " WIN0_PALENTRY241 ,Window 0 Palette entry 241 address"
line.long 0x3C8 "WIN0_PALENTRY242,Window 0 Palette entry 242 address"
hexmask.long 0x3C8 0.--31. 1. " WIN0_PALENTRY242 ,Window 0 Palette entry 242 address"
line.long 0x3CC "WIN0_PALENTRY243,Window 0 Palette entry 243 address"
hexmask.long 0x3CC 0.--31. 1. " WIN0_PALENTRY243 ,Window 0 Palette entry 243 address"
line.long 0x3D0 "WIN0_PALENTRY244,Window 0 Palette entry 244 address"
hexmask.long 0x3D0 0.--31. 1. " WIN0_PALENTRY244 ,Window 0 Palette entry 244 address"
line.long 0x3D4 "WIN0_PALENTRY245,Window 0 Palette entry 245 address"
hexmask.long 0x3D4 0.--31. 1. " WIN0_PALENTRY245 ,Window 0 Palette entry 245 address"
line.long 0x3D8 "WIN0_PALENTRY246,Window 0 Palette entry 246 address"
hexmask.long 0x3D8 0.--31. 1. " WIN0_PALENTRY246 ,Window 0 Palette entry 246 address"
line.long 0x3DC "WIN0_PALENTRY247,Window 0 Palette entry 247 address"
hexmask.long 0x3DC 0.--31. 1. " WIN0_PALENTRY247 ,Window 0 Palette entry 247 address"
line.long 0x3E0 "WIN0_PALENTRY248,Window 0 Palette entry 248 address"
hexmask.long 0x3E0 0.--31. 1. " WIN0_PALENTRY248 ,Window 0 Palette entry 248 address"
line.long 0x3E4 "WIN0_PALENTRY249,Window 0 Palette entry 249 address"
hexmask.long 0x3E4 0.--31. 1. " WIN0_PALENTRY249 ,Window 0 Palette entry 249 address"
line.long 0x3E8 "WIN0_PALENTRY250,Window 0 Palette entry 250 address"
hexmask.long 0x3E8 0.--31. 1. " WIN0_PALENTRY250 ,Window 0 Palette entry 250 address"
line.long 0x3EC "WIN0_PALENTRY251,Window 0 Palette entry 251 address"
hexmask.long 0x3EC 0.--31. 1. " WIN0_PALENTRY251 ,Window 0 Palette entry 251 address"
line.long 0x3F0 "WIN0_PALENTRY252,Window 0 Palette entry 252 address"
hexmask.long 0x3F0 0.--31. 1. " WIN0_PALENTRY252 ,Window 0 Palette entry 252 address"
line.long 0x3F4 "WIN0_PALENTRY253,Window 0 Palette entry 253 address"
hexmask.long 0x3F4 0.--31. 1. " WIN0_PALENTRY253 ,Window 0 Palette entry 253 address"
line.long 0x3F8 "WIN0_PALENTRY254,Window 0 Palette entry 254 address"
hexmask.long 0x3F8 0.--31. 1. " WIN0_PALENTRY254 ,Window 0 Palette entry 254 address"
line.long 0x3FC "WIN0_PALENTRY255,Window 0 Palette entry 255 address"
hexmask.long 0x3FC 0.--31. 1. " WIN0_PALENTRY255 ,Window 0 Palette entry 255 address"
tree.end
tree "WIN1 Palette RAM Access Address"
width 18.
group.long 0x800++0x3ff
line.long 0x0 "WIN1_PALENTRY0 ,Window 1 Palette entry 0 address"
hexmask.long 0x0 0.--31. 1. " WIN1_PALENTRY0 ,Window 1 Palette entry 0 address"
line.long 0x4 "WIN1_PALENTRY1 ,Window 1 Palette entry 1 address"
hexmask.long 0x4 0.--31. 1. " WIN1_PALENTRY1 ,Window 1 Palette entry 1 address"
line.long 0x8 "WIN1_PALENTRY2 ,Window 1 Palette entry 2 address"
hexmask.long 0x8 0.--31. 1. " WIN1_PALENTRY2 ,Window 1 Palette entry 2 address"
line.long 0xC "WIN1_PALENTRY3 ,Window 1 Palette entry 3 address"
hexmask.long 0xC 0.--31. 1. " WIN1_PALENTRY3 ,Window 1 Palette entry 3 address"
line.long 0x10 "WIN1_PALENTRY4 ,Window 1 Palette entry 4 address"
hexmask.long 0x10 0.--31. 1. " WIN1_PALENTRY4 ,Window 1 Palette entry 4 address"
line.long 0x14 "WIN1_PALENTRY5 ,Window 1 Palette entry 5 address"
hexmask.long 0x14 0.--31. 1. " WIN1_PALENTRY5 ,Window 1 Palette entry 5 address"
line.long 0x18 "WIN1_PALENTRY6 ,Window 1 Palette entry 6 address"
hexmask.long 0x18 0.--31. 1. " WIN1_PALENTRY6 ,Window 1 Palette entry 6 address"
line.long 0x1C "WIN1_PALENTRY7 ,Window 1 Palette entry 7 address"
hexmask.long 0x1C 0.--31. 1. " WIN1_PALENTRY7 ,Window 1 Palette entry 7 address"
line.long 0x20 "WIN1_PALENTRY8 ,Window 1 Palette entry 8 address"
hexmask.long 0x20 0.--31. 1. " WIN1_PALENTRY8 ,Window 1 Palette entry 8 address"
line.long 0x24 "WIN1_PALENTRY9 ,Window 1 Palette entry 9 address"
hexmask.long 0x24 0.--31. 1. " WIN1_PALENTRY9 ,Window 1 Palette entry 9 address"
line.long 0x28 "WIN1_PALENTRY10 ,Window 1 Palette entry 10 address"
hexmask.long 0x28 0.--31. 1. " WIN1_PALENTRY10 ,Window 1 Palette entry 10 address"
line.long 0x2C "WIN1_PALENTRY11 ,Window 1 Palette entry 11 address"
hexmask.long 0x2C 0.--31. 1. " WIN1_PALENTRY11 ,Window 1 Palette entry 11 address"
line.long 0x30 "WIN1_PALENTRY12 ,Window 1 Palette entry 12 address"
hexmask.long 0x30 0.--31. 1. " WIN1_PALENTRY12 ,Window 1 Palette entry 12 address"
line.long 0x34 "WIN1_PALENTRY13 ,Window 1 Palette entry 13 address"
hexmask.long 0x34 0.--31. 1. " WIN1_PALENTRY13 ,Window 1 Palette entry 13 address"
line.long 0x38 "WIN1_PALENTRY14 ,Window 1 Palette entry 14 address"
hexmask.long 0x38 0.--31. 1. " WIN1_PALENTRY14 ,Window 1 Palette entry 14 address"
line.long 0x3C "WIN1_PALENTRY15 ,Window 1 Palette entry 15 address"
hexmask.long 0x3C 0.--31. 1. " WIN1_PALENTRY15 ,Window 1 Palette entry 15 address"
line.long 0x40 "WIN1_PALENTRY16 ,Window 1 Palette entry 16 address"
hexmask.long 0x40 0.--31. 1. " WIN1_PALENTRY16 ,Window 1 Palette entry 16 address"
line.long 0x44 "WIN1_PALENTRY17 ,Window 1 Palette entry 17 address"
hexmask.long 0x44 0.--31. 1. " WIN1_PALENTRY17 ,Window 1 Palette entry 17 address"
line.long 0x48 "WIN1_PALENTRY18 ,Window 1 Palette entry 18 address"
hexmask.long 0x48 0.--31. 1. " WIN1_PALENTRY18 ,Window 1 Palette entry 18 address"
line.long 0x4C "WIN1_PALENTRY19 ,Window 1 Palette entry 19 address"
hexmask.long 0x4C 0.--31. 1. " WIN1_PALENTRY19 ,Window 1 Palette entry 19 address"
line.long 0x50 "WIN1_PALENTRY20 ,Window 1 Palette entry 20 address"
hexmask.long 0x50 0.--31. 1. " WIN1_PALENTRY20 ,Window 1 Palette entry 20 address"
line.long 0x54 "WIN1_PALENTRY21 ,Window 1 Palette entry 21 address"
hexmask.long 0x54 0.--31. 1. " WIN1_PALENTRY21 ,Window 1 Palette entry 21 address"
line.long 0x58 "WIN1_PALENTRY22 ,Window 1 Palette entry 22 address"
hexmask.long 0x58 0.--31. 1. " WIN1_PALENTRY22 ,Window 1 Palette entry 22 address"
line.long 0x5C "WIN1_PALENTRY23 ,Window 1 Palette entry 23 address"
hexmask.long 0x5C 0.--31. 1. " WIN1_PALENTRY23 ,Window 1 Palette entry 23 address"
line.long 0x60 "WIN1_PALENTRY24 ,Window 1 Palette entry 24 address"
hexmask.long 0x60 0.--31. 1. " WIN1_PALENTRY24 ,Window 1 Palette entry 24 address"
line.long 0x64 "WIN1_PALENTRY25 ,Window 1 Palette entry 25 address"
hexmask.long 0x64 0.--31. 1. " WIN1_PALENTRY25 ,Window 1 Palette entry 25 address"
line.long 0x68 "WIN1_PALENTRY26 ,Window 1 Palette entry 26 address"
hexmask.long 0x68 0.--31. 1. " WIN1_PALENTRY26 ,Window 1 Palette entry 26 address"
line.long 0x6C "WIN1_PALENTRY27 ,Window 1 Palette entry 27 address"
hexmask.long 0x6C 0.--31. 1. " WIN1_PALENTRY27 ,Window 1 Palette entry 27 address"
line.long 0x70 "WIN1_PALENTRY28 ,Window 1 Palette entry 28 address"
hexmask.long 0x70 0.--31. 1. " WIN1_PALENTRY28 ,Window 1 Palette entry 28 address"
line.long 0x74 "WIN1_PALENTRY29 ,Window 1 Palette entry 29 address"
hexmask.long 0x74 0.--31. 1. " WIN1_PALENTRY29 ,Window 1 Palette entry 29 address"
line.long 0x78 "WIN1_PALENTRY30 ,Window 1 Palette entry 30 address"
hexmask.long 0x78 0.--31. 1. " WIN1_PALENTRY30 ,Window 1 Palette entry 30 address"
line.long 0x7C "WIN1_PALENTRY31 ,Window 1 Palette entry 31 address"
hexmask.long 0x7C 0.--31. 1. " WIN1_PALENTRY31 ,Window 1 Palette entry 31 address"
line.long 0x80 "WIN1_PALENTRY32 ,Window 1 Palette entry 32 address"
hexmask.long 0x80 0.--31. 1. " WIN1_PALENTRY32 ,Window 1 Palette entry 32 address"
line.long 0x84 "WIN1_PALENTRY33 ,Window 1 Palette entry 33 address"
hexmask.long 0x84 0.--31. 1. " WIN1_PALENTRY33 ,Window 1 Palette entry 33 address"
line.long 0x88 "WIN1_PALENTRY34 ,Window 1 Palette entry 34 address"
hexmask.long 0x88 0.--31. 1. " WIN1_PALENTRY34 ,Window 1 Palette entry 34 address"
line.long 0x8C "WIN1_PALENTRY35 ,Window 1 Palette entry 35 address"
hexmask.long 0x8C 0.--31. 1. " WIN1_PALENTRY35 ,Window 1 Palette entry 35 address"
line.long 0x90 "WIN1_PALENTRY36 ,Window 1 Palette entry 36 address"
hexmask.long 0x90 0.--31. 1. " WIN1_PALENTRY36 ,Window 1 Palette entry 36 address"
line.long 0x94 "WIN1_PALENTRY37 ,Window 1 Palette entry 37 address"
hexmask.long 0x94 0.--31. 1. " WIN1_PALENTRY37 ,Window 1 Palette entry 37 address"
line.long 0x98 "WIN1_PALENTRY38 ,Window 1 Palette entry 38 address"
hexmask.long 0x98 0.--31. 1. " WIN1_PALENTRY38 ,Window 1 Palette entry 38 address"
line.long 0x9C "WIN1_PALENTRY39 ,Window 1 Palette entry 39 address"
hexmask.long 0x9C 0.--31. 1. " WIN1_PALENTRY39 ,Window 1 Palette entry 39 address"
line.long 0xA0 "WIN1_PALENTRY40 ,Window 1 Palette entry 40 address"
hexmask.long 0xA0 0.--31. 1. " WIN1_PALENTRY40 ,Window 1 Palette entry 40 address"
line.long 0xA4 "WIN1_PALENTRY41 ,Window 1 Palette entry 41 address"
hexmask.long 0xA4 0.--31. 1. " WIN1_PALENTRY41 ,Window 1 Palette entry 41 address"
line.long 0xA8 "WIN1_PALENTRY42 ,Window 1 Palette entry 42 address"
hexmask.long 0xA8 0.--31. 1. " WIN1_PALENTRY42 ,Window 1 Palette entry 42 address"
line.long 0xAC "WIN1_PALENTRY43 ,Window 1 Palette entry 43 address"
hexmask.long 0xAC 0.--31. 1. " WIN1_PALENTRY43 ,Window 1 Palette entry 43 address"
line.long 0xB0 "WIN1_PALENTRY44 ,Window 1 Palette entry 44 address"
hexmask.long 0xB0 0.--31. 1. " WIN1_PALENTRY44 ,Window 1 Palette entry 44 address"
line.long 0xB4 "WIN1_PALENTRY45 ,Window 1 Palette entry 45 address"
hexmask.long 0xB4 0.--31. 1. " WIN1_PALENTRY45 ,Window 1 Palette entry 45 address"
line.long 0xB8 "WIN1_PALENTRY46 ,Window 1 Palette entry 46 address"
hexmask.long 0xB8 0.--31. 1. " WIN1_PALENTRY46 ,Window 1 Palette entry 46 address"
line.long 0xBC "WIN1_PALENTRY47 ,Window 1 Palette entry 47 address"
hexmask.long 0xBC 0.--31. 1. " WIN1_PALENTRY47 ,Window 1 Palette entry 47 address"
line.long 0xC0 "WIN1_PALENTRY48 ,Window 1 Palette entry 48 address"
hexmask.long 0xC0 0.--31. 1. " WIN1_PALENTRY48 ,Window 1 Palette entry 48 address"
line.long 0xC4 "WIN1_PALENTRY49 ,Window 1 Palette entry 49 address"
hexmask.long 0xC4 0.--31. 1. " WIN1_PALENTRY49 ,Window 1 Palette entry 49 address"
line.long 0xC8 "WIN1_PALENTRY50 ,Window 1 Palette entry 50 address"
hexmask.long 0xC8 0.--31. 1. " WIN1_PALENTRY50 ,Window 1 Palette entry 50 address"
line.long 0xCC "WIN1_PALENTRY51 ,Window 1 Palette entry 51 address"
hexmask.long 0xCC 0.--31. 1. " WIN1_PALENTRY51 ,Window 1 Palette entry 51 address"
line.long 0xD0 "WIN1_PALENTRY52 ,Window 1 Palette entry 52 address"
hexmask.long 0xD0 0.--31. 1. " WIN1_PALENTRY52 ,Window 1 Palette entry 52 address"
line.long 0xD4 "WIN1_PALENTRY53 ,Window 1 Palette entry 53 address"
hexmask.long 0xD4 0.--31. 1. " WIN1_PALENTRY53 ,Window 1 Palette entry 53 address"
line.long 0xD8 "WIN1_PALENTRY54 ,Window 1 Palette entry 54 address"
hexmask.long 0xD8 0.--31. 1. " WIN1_PALENTRY54 ,Window 1 Palette entry 54 address"
line.long 0xDC "WIN1_PALENTRY55 ,Window 1 Palette entry 55 address"
hexmask.long 0xDC 0.--31. 1. " WIN1_PALENTRY55 ,Window 1 Palette entry 55 address"
line.long 0xE0 "WIN1_PALENTRY56 ,Window 1 Palette entry 56 address"
hexmask.long 0xE0 0.--31. 1. " WIN1_PALENTRY56 ,Window 1 Palette entry 56 address"
line.long 0xE4 "WIN1_PALENTRY57 ,Window 1 Palette entry 57 address"
hexmask.long 0xE4 0.--31. 1. " WIN1_PALENTRY57 ,Window 1 Palette entry 57 address"
line.long 0xE8 "WIN1_PALENTRY58 ,Window 1 Palette entry 58 address"
hexmask.long 0xE8 0.--31. 1. " WIN1_PALENTRY58 ,Window 1 Palette entry 58 address"
line.long 0xEC "WIN1_PALENTRY59 ,Window 1 Palette entry 59 address"
hexmask.long 0xEC 0.--31. 1. " WIN1_PALENTRY59 ,Window 1 Palette entry 59 address"
line.long 0xF0 "WIN1_PALENTRY60 ,Window 1 Palette entry 60 address"
hexmask.long 0xF0 0.--31. 1. " WIN1_PALENTRY60 ,Window 1 Palette entry 60 address"
line.long 0xF4 "WIN1_PALENTRY61 ,Window 1 Palette entry 61 address"
hexmask.long 0xF4 0.--31. 1. " WIN1_PALENTRY61 ,Window 1 Palette entry 61 address"
line.long 0xF8 "WIN1_PALENTRY62 ,Window 1 Palette entry 62 address"
hexmask.long 0xF8 0.--31. 1. " WIN1_PALENTRY62 ,Window 1 Palette entry 62 address"
line.long 0xFC "WIN1_PALENTRY63 ,Window 1 Palette entry 63 address"
hexmask.long 0xFC 0.--31. 1. " WIN1_PALENTRY63 ,Window 1 Palette entry 63 address"
line.long 0x100 "WIN1_PALENTRY64 ,Window 1 Palette entry 64 address"
hexmask.long 0x100 0.--31. 1. " WIN1_PALENTRY64 ,Window 1 Palette entry 64 address"
line.long 0x104 "WIN1_PALENTRY65 ,Window 1 Palette entry 65 address"
hexmask.long 0x104 0.--31. 1. " WIN1_PALENTRY65 ,Window 1 Palette entry 65 address"
line.long 0x108 "WIN1_PALENTRY66 ,Window 1 Palette entry 66 address"
hexmask.long 0x108 0.--31. 1. " WIN1_PALENTRY66 ,Window 1 Palette entry 66 address"
line.long 0x10C "WIN1_PALENTRY67 ,Window 1 Palette entry 67 address"
hexmask.long 0x10C 0.--31. 1. " WIN1_PALENTRY67 ,Window 1 Palette entry 67 address"
line.long 0x110 "WIN1_PALENTRY68 ,Window 1 Palette entry 68 address"
hexmask.long 0x110 0.--31. 1. " WIN1_PALENTRY68 ,Window 1 Palette entry 68 address"
line.long 0x114 "WIN1_PALENTRY69 ,Window 1 Palette entry 69 address"
hexmask.long 0x114 0.--31. 1. " WIN1_PALENTRY69 ,Window 1 Palette entry 69 address"
line.long 0x118 "WIN1_PALENTRY70 ,Window 1 Palette entry 70 address"
hexmask.long 0x118 0.--31. 1. " WIN1_PALENTRY70 ,Window 1 Palette entry 70 address"
line.long 0x11C "WIN1_PALENTRY71 ,Window 1 Palette entry 71 address"
hexmask.long 0x11C 0.--31. 1. " WIN1_PALENTRY71 ,Window 1 Palette entry 71 address"
line.long 0x120 "WIN1_PALENTRY72 ,Window 1 Palette entry 72 address"
hexmask.long 0x120 0.--31. 1. " WIN1_PALENTRY72 ,Window 1 Palette entry 72 address"
line.long 0x124 "WIN1_PALENTRY73 ,Window 1 Palette entry 73 address"
hexmask.long 0x124 0.--31. 1. " WIN1_PALENTRY73 ,Window 1 Palette entry 73 address"
line.long 0x128 "WIN1_PALENTRY74 ,Window 1 Palette entry 74 address"
hexmask.long 0x128 0.--31. 1. " WIN1_PALENTRY74 ,Window 1 Palette entry 74 address"
line.long 0x12C "WIN1_PALENTRY75 ,Window 1 Palette entry 75 address"
hexmask.long 0x12C 0.--31. 1. " WIN1_PALENTRY75 ,Window 1 Palette entry 75 address"
line.long 0x130 "WIN1_PALENTRY76 ,Window 1 Palette entry 76 address"
hexmask.long 0x130 0.--31. 1. " WIN1_PALENTRY76 ,Window 1 Palette entry 76 address"
line.long 0x134 "WIN1_PALENTRY77 ,Window 1 Palette entry 77 address"
hexmask.long 0x134 0.--31. 1. " WIN1_PALENTRY77 ,Window 1 Palette entry 77 address"
line.long 0x138 "WIN1_PALENTRY78 ,Window 1 Palette entry 78 address"
hexmask.long 0x138 0.--31. 1. " WIN1_PALENTRY78 ,Window 1 Palette entry 78 address"
line.long 0x13C "WIN1_PALENTRY79 ,Window 1 Palette entry 79 address"
hexmask.long 0x13C 0.--31. 1. " WIN1_PALENTRY79 ,Window 1 Palette entry 79 address"
line.long 0x140 "WIN1_PALENTRY80 ,Window 1 Palette entry 80 address"
hexmask.long 0x140 0.--31. 1. " WIN1_PALENTRY80 ,Window 1 Palette entry 80 address"
line.long 0x144 "WIN1_PALENTRY81 ,Window 1 Palette entry 81 address"
hexmask.long 0x144 0.--31. 1. " WIN1_PALENTRY81 ,Window 1 Palette entry 81 address"
line.long 0x148 "WIN1_PALENTRY82 ,Window 1 Palette entry 82 address"
hexmask.long 0x148 0.--31. 1. " WIN1_PALENTRY82 ,Window 1 Palette entry 82 address"
line.long 0x14C "WIN1_PALENTRY83 ,Window 1 Palette entry 83 address"
hexmask.long 0x14C 0.--31. 1. " WIN1_PALENTRY83 ,Window 1 Palette entry 83 address"
line.long 0x150 "WIN1_PALENTRY84 ,Window 1 Palette entry 84 address"
hexmask.long 0x150 0.--31. 1. " WIN1_PALENTRY84 ,Window 1 Palette entry 84 address"
line.long 0x154 "WIN1_PALENTRY85 ,Window 1 Palette entry 85 address"
hexmask.long 0x154 0.--31. 1. " WIN1_PALENTRY85 ,Window 1 Palette entry 85 address"
line.long 0x158 "WIN1_PALENTRY86 ,Window 1 Palette entry 86 address"
hexmask.long 0x158 0.--31. 1. " WIN1_PALENTRY86 ,Window 1 Palette entry 86 address"
line.long 0x15C "WIN1_PALENTRY87 ,Window 1 Palette entry 87 address"
hexmask.long 0x15C 0.--31. 1. " WIN1_PALENTRY87 ,Window 1 Palette entry 87 address"
line.long 0x160 "WIN1_PALENTRY88 ,Window 1 Palette entry 88 address"
hexmask.long 0x160 0.--31. 1. " WIN1_PALENTRY88 ,Window 1 Palette entry 88 address"
line.long 0x164 "WIN1_PALENTRY89 ,Window 1 Palette entry 89 address"
hexmask.long 0x164 0.--31. 1. " WIN1_PALENTRY89 ,Window 1 Palette entry 89 address"
line.long 0x168 "WIN1_PALENTRY90 ,Window 1 Palette entry 90 address"
hexmask.long 0x168 0.--31. 1. " WIN1_PALENTRY90 ,Window 1 Palette entry 90 address"
line.long 0x16C "WIN1_PALENTRY91 ,Window 1 Palette entry 91 address"
hexmask.long 0x16C 0.--31. 1. " WIN1_PALENTRY91 ,Window 1 Palette entry 91 address"
line.long 0x170 "WIN1_PALENTRY92 ,Window 1 Palette entry 92 address"
hexmask.long 0x170 0.--31. 1. " WIN1_PALENTRY92 ,Window 1 Palette entry 92 address"
line.long 0x174 "WIN1_PALENTRY93 ,Window 1 Palette entry 93 address"
hexmask.long 0x174 0.--31. 1. " WIN1_PALENTRY93 ,Window 1 Palette entry 93 address"
line.long 0x178 "WIN1_PALENTRY94 ,Window 1 Palette entry 94 address"
hexmask.long 0x178 0.--31. 1. " WIN1_PALENTRY94 ,Window 1 Palette entry 94 address"
line.long 0x17C "WIN1_PALENTRY95 ,Window 1 Palette entry 95 address"
hexmask.long 0x17C 0.--31. 1. " WIN1_PALENTRY95 ,Window 1 Palette entry 95 address"
line.long 0x180 "WIN1_PALENTRY96 ,Window 1 Palette entry 96 address"
hexmask.long 0x180 0.--31. 1. " WIN1_PALENTRY96 ,Window 1 Palette entry 96 address"
line.long 0x184 "WIN1_PALENTRY97 ,Window 1 Palette entry 97 address"
hexmask.long 0x184 0.--31. 1. " WIN1_PALENTRY97 ,Window 1 Palette entry 97 address"
line.long 0x188 "WIN1_PALENTRY98 ,Window 1 Palette entry 98 address"
hexmask.long 0x188 0.--31. 1. " WIN1_PALENTRY98 ,Window 1 Palette entry 98 address"
line.long 0x18C "WIN1_PALENTRY99 ,Window 1 Palette entry 99 address"
hexmask.long 0x18C 0.--31. 1. " WIN1_PALENTRY99 ,Window 1 Palette entry 99 address"
line.long 0x190 "WIN1_PALENTRY100,Window 1 Palette entry 100 address"
hexmask.long 0x190 0.--31. 1. " WIN1_PALENTRY100 ,Window 1 Palette entry 100 address"
line.long 0x194 "WIN1_PALENTRY101,Window 1 Palette entry 101 address"
hexmask.long 0x194 0.--31. 1. " WIN1_PALENTRY101 ,Window 1 Palette entry 101 address"
line.long 0x198 "WIN1_PALENTRY102,Window 1 Palette entry 102 address"
hexmask.long 0x198 0.--31. 1. " WIN1_PALENTRY102 ,Window 1 Palette entry 102 address"
line.long 0x19C "WIN1_PALENTRY103,Window 1 Palette entry 103 address"
hexmask.long 0x19C 0.--31. 1. " WIN1_PALENTRY103 ,Window 1 Palette entry 103 address"
line.long 0x1A0 "WIN1_PALENTRY104,Window 1 Palette entry 104 address"
hexmask.long 0x1A0 0.--31. 1. " WIN1_PALENTRY104 ,Window 1 Palette entry 104 address"
line.long 0x1A4 "WIN1_PALENTRY105,Window 1 Palette entry 105 address"
hexmask.long 0x1A4 0.--31. 1. " WIN1_PALENTRY105 ,Window 1 Palette entry 105 address"
line.long 0x1A8 "WIN1_PALENTRY106,Window 1 Palette entry 106 address"
hexmask.long 0x1A8 0.--31. 1. " WIN1_PALENTRY106 ,Window 1 Palette entry 106 address"
line.long 0x1AC "WIN1_PALENTRY107,Window 1 Palette entry 107 address"
hexmask.long 0x1AC 0.--31. 1. " WIN1_PALENTRY107 ,Window 1 Palette entry 107 address"
line.long 0x1B0 "WIN1_PALENTRY108,Window 1 Palette entry 108 address"
hexmask.long 0x1B0 0.--31. 1. " WIN1_PALENTRY108 ,Window 1 Palette entry 108 address"
line.long 0x1B4 "WIN1_PALENTRY109,Window 1 Palette entry 109 address"
hexmask.long 0x1B4 0.--31. 1. " WIN1_PALENTRY109 ,Window 1 Palette entry 109 address"
line.long 0x1B8 "WIN1_PALENTRY110,Window 1 Palette entry 110 address"
hexmask.long 0x1B8 0.--31. 1. " WIN1_PALENTRY110 ,Window 1 Palette entry 110 address"
line.long 0x1BC "WIN1_PALENTRY111,Window 1 Palette entry 111 address"
hexmask.long 0x1BC 0.--31. 1. " WIN1_PALENTRY111 ,Window 1 Palette entry 111 address"
line.long 0x1C0 "WIN1_PALENTRY112,Window 1 Palette entry 112 address"
hexmask.long 0x1C0 0.--31. 1. " WIN1_PALENTRY112 ,Window 1 Palette entry 112 address"
line.long 0x1C4 "WIN1_PALENTRY113,Window 1 Palette entry 113 address"
hexmask.long 0x1C4 0.--31. 1. " WIN1_PALENTRY113 ,Window 1 Palette entry 113 address"
line.long 0x1C8 "WIN1_PALENTRY114,Window 1 Palette entry 114 address"
hexmask.long 0x1C8 0.--31. 1. " WIN1_PALENTRY114 ,Window 1 Palette entry 114 address"
line.long 0x1CC "WIN1_PALENTRY115,Window 1 Palette entry 115 address"
hexmask.long 0x1CC 0.--31. 1. " WIN1_PALENTRY115 ,Window 1 Palette entry 115 address"
line.long 0x1D0 "WIN1_PALENTRY116,Window 1 Palette entry 116 address"
hexmask.long 0x1D0 0.--31. 1. " WIN1_PALENTRY116 ,Window 1 Palette entry 116 address"
line.long 0x1D4 "WIN1_PALENTRY117,Window 1 Palette entry 117 address"
hexmask.long 0x1D4 0.--31. 1. " WIN1_PALENTRY117 ,Window 1 Palette entry 117 address"
line.long 0x1D8 "WIN1_PALENTRY118,Window 1 Palette entry 118 address"
hexmask.long 0x1D8 0.--31. 1. " WIN1_PALENTRY118 ,Window 1 Palette entry 118 address"
line.long 0x1DC "WIN1_PALENTRY119,Window 1 Palette entry 119 address"
hexmask.long 0x1DC 0.--31. 1. " WIN1_PALENTRY119 ,Window 1 Palette entry 119 address"
line.long 0x1E0 "WIN1_PALENTRY120,Window 1 Palette entry 120 address"
hexmask.long 0x1E0 0.--31. 1. " WIN1_PALENTRY120 ,Window 1 Palette entry 120 address"
line.long 0x1E4 "WIN1_PALENTRY121,Window 1 Palette entry 121 address"
hexmask.long 0x1E4 0.--31. 1. " WIN1_PALENTRY121 ,Window 1 Palette entry 121 address"
line.long 0x1E8 "WIN1_PALENTRY122,Window 1 Palette entry 122 address"
hexmask.long 0x1E8 0.--31. 1. " WIN1_PALENTRY122 ,Window 1 Palette entry 122 address"
line.long 0x1EC "WIN1_PALENTRY123,Window 1 Palette entry 123 address"
hexmask.long 0x1EC 0.--31. 1. " WIN1_PALENTRY123 ,Window 1 Palette entry 123 address"
line.long 0x1F0 "WIN1_PALENTRY124,Window 1 Palette entry 124 address"
hexmask.long 0x1F0 0.--31. 1. " WIN1_PALENTRY124 ,Window 1 Palette entry 124 address"
line.long 0x1F4 "WIN1_PALENTRY125,Window 1 Palette entry 125 address"
hexmask.long 0x1F4 0.--31. 1. " WIN1_PALENTRY125 ,Window 1 Palette entry 125 address"
line.long 0x1F8 "WIN1_PALENTRY126,Window 1 Palette entry 126 address"
hexmask.long 0x1F8 0.--31. 1. " WIN1_PALENTRY126 ,Window 1 Palette entry 126 address"
line.long 0x1FC "WIN1_PALENTRY127,Window 1 Palette entry 127 address"
hexmask.long 0x1FC 0.--31. 1. " WIN1_PALENTRY127 ,Window 1 Palette entry 127 address"
line.long 0x200 "WIN1_PALENTRY128,Window 1 Palette entry 128 address"
hexmask.long 0x200 0.--31. 1. " WIN1_PALENTRY128 ,Window 1 Palette entry 128 address"
line.long 0x204 "WIN1_PALENTRY129,Window 1 Palette entry 129 address"
hexmask.long 0x204 0.--31. 1. " WIN1_PALENTRY129 ,Window 1 Palette entry 129 address"
line.long 0x208 "WIN1_PALENTRY130,Window 1 Palette entry 130 address"
hexmask.long 0x208 0.--31. 1. " WIN1_PALENTRY130 ,Window 1 Palette entry 130 address"
line.long 0x20C "WIN1_PALENTRY131,Window 1 Palette entry 131 address"
hexmask.long 0x20C 0.--31. 1. " WIN1_PALENTRY131 ,Window 1 Palette entry 131 address"
line.long 0x210 "WIN1_PALENTRY132,Window 1 Palette entry 132 address"
hexmask.long 0x210 0.--31. 1. " WIN1_PALENTRY132 ,Window 1 Palette entry 132 address"
line.long 0x214 "WIN1_PALENTRY133,Window 1 Palette entry 133 address"
hexmask.long 0x214 0.--31. 1. " WIN1_PALENTRY133 ,Window 1 Palette entry 133 address"
line.long 0x218 "WIN1_PALENTRY134,Window 1 Palette entry 134 address"
hexmask.long 0x218 0.--31. 1. " WIN1_PALENTRY134 ,Window 1 Palette entry 134 address"
line.long 0x21C "WIN1_PALENTRY135,Window 1 Palette entry 135 address"
hexmask.long 0x21C 0.--31. 1. " WIN1_PALENTRY135 ,Window 1 Palette entry 135 address"
line.long 0x220 "WIN1_PALENTRY136,Window 1 Palette entry 136 address"
hexmask.long 0x220 0.--31. 1. " WIN1_PALENTRY136 ,Window 1 Palette entry 136 address"
line.long 0x224 "WIN1_PALENTRY137,Window 1 Palette entry 137 address"
hexmask.long 0x224 0.--31. 1. " WIN1_PALENTRY137 ,Window 1 Palette entry 137 address"
line.long 0x228 "WIN1_PALENTRY138,Window 1 Palette entry 138 address"
hexmask.long 0x228 0.--31. 1. " WIN1_PALENTRY138 ,Window 1 Palette entry 138 address"
line.long 0x22C "WIN1_PALENTRY139,Window 1 Palette entry 139 address"
hexmask.long 0x22C 0.--31. 1. " WIN1_PALENTRY139 ,Window 1 Palette entry 139 address"
line.long 0x230 "WIN1_PALENTRY140,Window 1 Palette entry 140 address"
hexmask.long 0x230 0.--31. 1. " WIN1_PALENTRY140 ,Window 1 Palette entry 140 address"
line.long 0x234 "WIN1_PALENTRY141,Window 1 Palette entry 141 address"
hexmask.long 0x234 0.--31. 1. " WIN1_PALENTRY141 ,Window 1 Palette entry 141 address"
line.long 0x238 "WIN1_PALENTRY142,Window 1 Palette entry 142 address"
hexmask.long 0x238 0.--31. 1. " WIN1_PALENTRY142 ,Window 1 Palette entry 142 address"
line.long 0x23C "WIN1_PALENTRY143,Window 1 Palette entry 143 address"
hexmask.long 0x23C 0.--31. 1. " WIN1_PALENTRY143 ,Window 1 Palette entry 143 address"
line.long 0x240 "WIN1_PALENTRY144,Window 1 Palette entry 144 address"
hexmask.long 0x240 0.--31. 1. " WIN1_PALENTRY144 ,Window 1 Palette entry 144 address"
line.long 0x244 "WIN1_PALENTRY145,Window 1 Palette entry 145 address"
hexmask.long 0x244 0.--31. 1. " WIN1_PALENTRY145 ,Window 1 Palette entry 145 address"
line.long 0x248 "WIN1_PALENTRY146,Window 1 Palette entry 146 address"
hexmask.long 0x248 0.--31. 1. " WIN1_PALENTRY146 ,Window 1 Palette entry 146 address"
line.long 0x24C "WIN1_PALENTRY147,Window 1 Palette entry 147 address"
hexmask.long 0x24C 0.--31. 1. " WIN1_PALENTRY147 ,Window 1 Palette entry 147 address"
line.long 0x250 "WIN1_PALENTRY148,Window 1 Palette entry 148 address"
hexmask.long 0x250 0.--31. 1. " WIN1_PALENTRY148 ,Window 1 Palette entry 148 address"
line.long 0x254 "WIN1_PALENTRY149,Window 1 Palette entry 149 address"
hexmask.long 0x254 0.--31. 1. " WIN1_PALENTRY149 ,Window 1 Palette entry 149 address"
line.long 0x258 "WIN1_PALENTRY150,Window 1 Palette entry 150 address"
hexmask.long 0x258 0.--31. 1. " WIN1_PALENTRY150 ,Window 1 Palette entry 150 address"
line.long 0x25C "WIN1_PALENTRY151,Window 1 Palette entry 151 address"
hexmask.long 0x25C 0.--31. 1. " WIN1_PALENTRY151 ,Window 1 Palette entry 151 address"
line.long 0x260 "WIN1_PALENTRY152,Window 1 Palette entry 152 address"
hexmask.long 0x260 0.--31. 1. " WIN1_PALENTRY152 ,Window 1 Palette entry 152 address"
line.long 0x264 "WIN1_PALENTRY153,Window 1 Palette entry 153 address"
hexmask.long 0x264 0.--31. 1. " WIN1_PALENTRY153 ,Window 1 Palette entry 153 address"
line.long 0x268 "WIN1_PALENTRY154,Window 1 Palette entry 154 address"
hexmask.long 0x268 0.--31. 1. " WIN1_PALENTRY154 ,Window 1 Palette entry 154 address"
line.long 0x26C "WIN1_PALENTRY155,Window 1 Palette entry 155 address"
hexmask.long 0x26C 0.--31. 1. " WIN1_PALENTRY155 ,Window 1 Palette entry 155 address"
line.long 0x270 "WIN1_PALENTRY156,Window 1 Palette entry 156 address"
hexmask.long 0x270 0.--31. 1. " WIN1_PALENTRY156 ,Window 1 Palette entry 156 address"
line.long 0x274 "WIN1_PALENTRY157,Window 1 Palette entry 157 address"
hexmask.long 0x274 0.--31. 1. " WIN1_PALENTRY157 ,Window 1 Palette entry 157 address"
line.long 0x278 "WIN1_PALENTRY158,Window 1 Palette entry 158 address"
hexmask.long 0x278 0.--31. 1. " WIN1_PALENTRY158 ,Window 1 Palette entry 158 address"
line.long 0x27C "WIN1_PALENTRY159,Window 1 Palette entry 159 address"
hexmask.long 0x27C 0.--31. 1. " WIN1_PALENTRY159 ,Window 1 Palette entry 159 address"
line.long 0x280 "WIN1_PALENTRY160,Window 1 Palette entry 160 address"
hexmask.long 0x280 0.--31. 1. " WIN1_PALENTRY160 ,Window 1 Palette entry 160 address"
line.long 0x284 "WIN1_PALENTRY161,Window 1 Palette entry 161 address"
hexmask.long 0x284 0.--31. 1. " WIN1_PALENTRY161 ,Window 1 Palette entry 161 address"
line.long 0x288 "WIN1_PALENTRY162,Window 1 Palette entry 162 address"
hexmask.long 0x288 0.--31. 1. " WIN1_PALENTRY162 ,Window 1 Palette entry 162 address"
line.long 0x28C "WIN1_PALENTRY163,Window 1 Palette entry 163 address"
hexmask.long 0x28C 0.--31. 1. " WIN1_PALENTRY163 ,Window 1 Palette entry 163 address"
line.long 0x290 "WIN1_PALENTRY164,Window 1 Palette entry 164 address"
hexmask.long 0x290 0.--31. 1. " WIN1_PALENTRY164 ,Window 1 Palette entry 164 address"
line.long 0x294 "WIN1_PALENTRY165,Window 1 Palette entry 165 address"
hexmask.long 0x294 0.--31. 1. " WIN1_PALENTRY165 ,Window 1 Palette entry 165 address"
line.long 0x298 "WIN1_PALENTRY166,Window 1 Palette entry 166 address"
hexmask.long 0x298 0.--31. 1. " WIN1_PALENTRY166 ,Window 1 Palette entry 166 address"
line.long 0x29C "WIN1_PALENTRY167,Window 1 Palette entry 167 address"
hexmask.long 0x29C 0.--31. 1. " WIN1_PALENTRY167 ,Window 1 Palette entry 167 address"
line.long 0x2A0 "WIN1_PALENTRY168,Window 1 Palette entry 168 address"
hexmask.long 0x2A0 0.--31. 1. " WIN1_PALENTRY168 ,Window 1 Palette entry 168 address"
line.long 0x2A4 "WIN1_PALENTRY169,Window 1 Palette entry 169 address"
hexmask.long 0x2A4 0.--31. 1. " WIN1_PALENTRY169 ,Window 1 Palette entry 169 address"
line.long 0x2A8 "WIN1_PALENTRY170,Window 1 Palette entry 170 address"
hexmask.long 0x2A8 0.--31. 1. " WIN1_PALENTRY170 ,Window 1 Palette entry 170 address"
line.long 0x2AC "WIN1_PALENTRY171,Window 1 Palette entry 171 address"
hexmask.long 0x2AC 0.--31. 1. " WIN1_PALENTRY171 ,Window 1 Palette entry 171 address"
line.long 0x2B0 "WIN1_PALENTRY172,Window 1 Palette entry 172 address"
hexmask.long 0x2B0 0.--31. 1. " WIN1_PALENTRY172 ,Window 1 Palette entry 172 address"
line.long 0x2B4 "WIN1_PALENTRY173,Window 1 Palette entry 173 address"
hexmask.long 0x2B4 0.--31. 1. " WIN1_PALENTRY173 ,Window 1 Palette entry 173 address"
line.long 0x2B8 "WIN1_PALENTRY174,Window 1 Palette entry 174 address"
hexmask.long 0x2B8 0.--31. 1. " WIN1_PALENTRY174 ,Window 1 Palette entry 174 address"
line.long 0x2BC "WIN1_PALENTRY175,Window 1 Palette entry 175 address"
hexmask.long 0x2BC 0.--31. 1. " WIN1_PALENTRY175 ,Window 1 Palette entry 175 address"
line.long 0x2C0 "WIN1_PALENTRY176,Window 1 Palette entry 176 address"
hexmask.long 0x2C0 0.--31. 1. " WIN1_PALENTRY176 ,Window 1 Palette entry 176 address"
line.long 0x2C4 "WIN1_PALENTRY177,Window 1 Palette entry 177 address"
hexmask.long 0x2C4 0.--31. 1. " WIN1_PALENTRY177 ,Window 1 Palette entry 177 address"
line.long 0x2C8 "WIN1_PALENTRY178,Window 1 Palette entry 178 address"
hexmask.long 0x2C8 0.--31. 1. " WIN1_PALENTRY178 ,Window 1 Palette entry 178 address"
line.long 0x2CC "WIN1_PALENTRY179,Window 1 Palette entry 179 address"
hexmask.long 0x2CC 0.--31. 1. " WIN1_PALENTRY179 ,Window 1 Palette entry 179 address"
line.long 0x2D0 "WIN1_PALENTRY180,Window 1 Palette entry 180 address"
hexmask.long 0x2D0 0.--31. 1. " WIN1_PALENTRY180 ,Window 1 Palette entry 180 address"
line.long 0x2D4 "WIN1_PALENTRY181,Window 1 Palette entry 181 address"
hexmask.long 0x2D4 0.--31. 1. " WIN1_PALENTRY181 ,Window 1 Palette entry 181 address"
line.long 0x2D8 "WIN1_PALENTRY182,Window 1 Palette entry 182 address"
hexmask.long 0x2D8 0.--31. 1. " WIN1_PALENTRY182 ,Window 1 Palette entry 182 address"
line.long 0x2DC "WIN1_PALENTRY183,Window 1 Palette entry 183 address"
hexmask.long 0x2DC 0.--31. 1. " WIN1_PALENTRY183 ,Window 1 Palette entry 183 address"
line.long 0x2E0 "WIN1_PALENTRY184,Window 1 Palette entry 184 address"
hexmask.long 0x2E0 0.--31. 1. " WIN1_PALENTRY184 ,Window 1 Palette entry 184 address"
line.long 0x2E4 "WIN1_PALENTRY185,Window 1 Palette entry 185 address"
hexmask.long 0x2E4 0.--31. 1. " WIN1_PALENTRY185 ,Window 1 Palette entry 185 address"
line.long 0x2E8 "WIN1_PALENTRY186,Window 1 Palette entry 186 address"
hexmask.long 0x2E8 0.--31. 1. " WIN1_PALENTRY186 ,Window 1 Palette entry 186 address"
line.long 0x2EC "WIN1_PALENTRY187,Window 1 Palette entry 187 address"
hexmask.long 0x2EC 0.--31. 1. " WIN1_PALENTRY187 ,Window 1 Palette entry 187 address"
line.long 0x2F0 "WIN1_PALENTRY188,Window 1 Palette entry 188 address"
hexmask.long 0x2F0 0.--31. 1. " WIN1_PALENTRY188 ,Window 1 Palette entry 188 address"
line.long 0x2F4 "WIN1_PALENTRY189,Window 1 Palette entry 189 address"
hexmask.long 0x2F4 0.--31. 1. " WIN1_PALENTRY189 ,Window 1 Palette entry 189 address"
line.long 0x2F8 "WIN1_PALENTRY190,Window 1 Palette entry 190 address"
hexmask.long 0x2F8 0.--31. 1. " WIN1_PALENTRY190 ,Window 1 Palette entry 190 address"
line.long 0x2FC "WIN1_PALENTRY191,Window 1 Palette entry 191 address"
hexmask.long 0x2FC 0.--31. 1. " WIN1_PALENTRY191 ,Window 1 Palette entry 191 address"
line.long 0x300 "WIN1_PALENTRY192,Window 1 Palette entry 192 address"
hexmask.long 0x300 0.--31. 1. " WIN1_PALENTRY192 ,Window 1 Palette entry 192 address"
line.long 0x304 "WIN1_PALENTRY193,Window 1 Palette entry 193 address"
hexmask.long 0x304 0.--31. 1. " WIN1_PALENTRY193 ,Window 1 Palette entry 193 address"
line.long 0x308 "WIN1_PALENTRY194,Window 1 Palette entry 194 address"
hexmask.long 0x308 0.--31. 1. " WIN1_PALENTRY194 ,Window 1 Palette entry 194 address"
line.long 0x30C "WIN1_PALENTRY195,Window 1 Palette entry 195 address"
hexmask.long 0x30C 0.--31. 1. " WIN1_PALENTRY195 ,Window 1 Palette entry 195 address"
line.long 0x310 "WIN1_PALENTRY196,Window 1 Palette entry 196 address"
hexmask.long 0x310 0.--31. 1. " WIN1_PALENTRY196 ,Window 1 Palette entry 196 address"
line.long 0x314 "WIN1_PALENTRY197,Window 1 Palette entry 197 address"
hexmask.long 0x314 0.--31. 1. " WIN1_PALENTRY197 ,Window 1 Palette entry 197 address"
line.long 0x318 "WIN1_PALENTRY198,Window 1 Palette entry 198 address"
hexmask.long 0x318 0.--31. 1. " WIN1_PALENTRY198 ,Window 1 Palette entry 198 address"
line.long 0x31C "WIN1_PALENTRY199,Window 1 Palette entry 199 address"
hexmask.long 0x31C 0.--31. 1. " WIN1_PALENTRY199 ,Window 1 Palette entry 199 address"
line.long 0x320 "WIN1_PALENTRY200,Window 1 Palette entry 200 address"
hexmask.long 0x320 0.--31. 1. " WIN1_PALENTRY200 ,Window 1 Palette entry 200 address"
line.long 0x324 "WIN1_PALENTRY201,Window 1 Palette entry 201 address"
hexmask.long 0x324 0.--31. 1. " WIN1_PALENTRY201 ,Window 1 Palette entry 201 address"
line.long 0x328 "WIN1_PALENTRY202,Window 1 Palette entry 202 address"
hexmask.long 0x328 0.--31. 1. " WIN1_PALENTRY202 ,Window 1 Palette entry 202 address"
line.long 0x32C "WIN1_PALENTRY203,Window 1 Palette entry 203 address"
hexmask.long 0x32C 0.--31. 1. " WIN1_PALENTRY203 ,Window 1 Palette entry 203 address"
line.long 0x330 "WIN1_PALENTRY204,Window 1 Palette entry 204 address"
hexmask.long 0x330 0.--31. 1. " WIN1_PALENTRY204 ,Window 1 Palette entry 204 address"
line.long 0x334 "WIN1_PALENTRY205,Window 1 Palette entry 205 address"
hexmask.long 0x334 0.--31. 1. " WIN1_PALENTRY205 ,Window 1 Palette entry 205 address"
line.long 0x338 "WIN1_PALENTRY206,Window 1 Palette entry 206 address"
hexmask.long 0x338 0.--31. 1. " WIN1_PALENTRY206 ,Window 1 Palette entry 206 address"
line.long 0x33C "WIN1_PALENTRY207,Window 1 Palette entry 207 address"
hexmask.long 0x33C 0.--31. 1. " WIN1_PALENTRY207 ,Window 1 Palette entry 207 address"
line.long 0x340 "WIN1_PALENTRY208,Window 1 Palette entry 208 address"
hexmask.long 0x340 0.--31. 1. " WIN1_PALENTRY208 ,Window 1 Palette entry 208 address"
line.long 0x344 "WIN1_PALENTRY209,Window 1 Palette entry 209 address"
hexmask.long 0x344 0.--31. 1. " WIN1_PALENTRY209 ,Window 1 Palette entry 209 address"
line.long 0x348 "WIN1_PALENTRY210,Window 1 Palette entry 210 address"
hexmask.long 0x348 0.--31. 1. " WIN1_PALENTRY210 ,Window 1 Palette entry 210 address"
line.long 0x34C "WIN1_PALENTRY211,Window 1 Palette entry 211 address"
hexmask.long 0x34C 0.--31. 1. " WIN1_PALENTRY211 ,Window 1 Palette entry 211 address"
line.long 0x350 "WIN1_PALENTRY212,Window 1 Palette entry 212 address"
hexmask.long 0x350 0.--31. 1. " WIN1_PALENTRY212 ,Window 1 Palette entry 212 address"
line.long 0x354 "WIN1_PALENTRY213,Window 1 Palette entry 213 address"
hexmask.long 0x354 0.--31. 1. " WIN1_PALENTRY213 ,Window 1 Palette entry 213 address"
line.long 0x358 "WIN1_PALENTRY214,Window 1 Palette entry 214 address"
hexmask.long 0x358 0.--31. 1. " WIN1_PALENTRY214 ,Window 1 Palette entry 214 address"
line.long 0x35C "WIN1_PALENTRY215,Window 1 Palette entry 215 address"
hexmask.long 0x35C 0.--31. 1. " WIN1_PALENTRY215 ,Window 1 Palette entry 215 address"
line.long 0x360 "WIN1_PALENTRY216,Window 1 Palette entry 216 address"
hexmask.long 0x360 0.--31. 1. " WIN1_PALENTRY216 ,Window 1 Palette entry 216 address"
line.long 0x364 "WIN1_PALENTRY217,Window 1 Palette entry 217 address"
hexmask.long 0x364 0.--31. 1. " WIN1_PALENTRY217 ,Window 1 Palette entry 217 address"
line.long 0x368 "WIN1_PALENTRY218,Window 1 Palette entry 218 address"
hexmask.long 0x368 0.--31. 1. " WIN1_PALENTRY218 ,Window 1 Palette entry 218 address"
line.long 0x36C "WIN1_PALENTRY219,Window 1 Palette entry 219 address"
hexmask.long 0x36C 0.--31. 1. " WIN1_PALENTRY219 ,Window 1 Palette entry 219 address"
line.long 0x370 "WIN1_PALENTRY220,Window 1 Palette entry 220 address"
hexmask.long 0x370 0.--31. 1. " WIN1_PALENTRY220 ,Window 1 Palette entry 220 address"
line.long 0x374 "WIN1_PALENTRY221,Window 1 Palette entry 221 address"
hexmask.long 0x374 0.--31. 1. " WIN1_PALENTRY221 ,Window 1 Palette entry 221 address"
line.long 0x378 "WIN1_PALENTRY222,Window 1 Palette entry 222 address"
hexmask.long 0x378 0.--31. 1. " WIN1_PALENTRY222 ,Window 1 Palette entry 222 address"
line.long 0x37C "WIN1_PALENTRY223,Window 1 Palette entry 223 address"
hexmask.long 0x37C 0.--31. 1. " WIN1_PALENTRY223 ,Window 1 Palette entry 223 address"
line.long 0x380 "WIN1_PALENTRY224,Window 1 Palette entry 224 address"
hexmask.long 0x380 0.--31. 1. " WIN1_PALENTRY224 ,Window 1 Palette entry 224 address"
line.long 0x384 "WIN1_PALENTRY225,Window 1 Palette entry 225 address"
hexmask.long 0x384 0.--31. 1. " WIN1_PALENTRY225 ,Window 1 Palette entry 225 address"
line.long 0x388 "WIN1_PALENTRY226,Window 1 Palette entry 226 address"
hexmask.long 0x388 0.--31. 1. " WIN1_PALENTRY226 ,Window 1 Palette entry 226 address"
line.long 0x38C "WIN1_PALENTRY227,Window 1 Palette entry 227 address"
hexmask.long 0x38C 0.--31. 1. " WIN1_PALENTRY227 ,Window 1 Palette entry 227 address"
line.long 0x390 "WIN1_PALENTRY228,Window 1 Palette entry 228 address"
hexmask.long 0x390 0.--31. 1. " WIN1_PALENTRY228 ,Window 1 Palette entry 228 address"
line.long 0x394 "WIN1_PALENTRY229,Window 1 Palette entry 229 address"
hexmask.long 0x394 0.--31. 1. " WIN1_PALENTRY229 ,Window 1 Palette entry 229 address"
line.long 0x398 "WIN1_PALENTRY230,Window 1 Palette entry 230 address"
hexmask.long 0x398 0.--31. 1. " WIN1_PALENTRY230 ,Window 1 Palette entry 230 address"
line.long 0x39C "WIN1_PALENTRY231,Window 1 Palette entry 231 address"
hexmask.long 0x39C 0.--31. 1. " WIN1_PALENTRY231 ,Window 1 Palette entry 231 address"
line.long 0x3A0 "WIN1_PALENTRY232,Window 1 Palette entry 232 address"
hexmask.long 0x3A0 0.--31. 1. " WIN1_PALENTRY232 ,Window 1 Palette entry 232 address"
line.long 0x3A4 "WIN1_PALENTRY233,Window 1 Palette entry 233 address"
hexmask.long 0x3A4 0.--31. 1. " WIN1_PALENTRY233 ,Window 1 Palette entry 233 address"
line.long 0x3A8 "WIN1_PALENTRY234,Window 1 Palette entry 234 address"
hexmask.long 0x3A8 0.--31. 1. " WIN1_PALENTRY234 ,Window 1 Palette entry 234 address"
line.long 0x3AC "WIN1_PALENTRY235,Window 1 Palette entry 235 address"
hexmask.long 0x3AC 0.--31. 1. " WIN1_PALENTRY235 ,Window 1 Palette entry 235 address"
line.long 0x3B0 "WIN1_PALENTRY236,Window 1 Palette entry 236 address"
hexmask.long 0x3B0 0.--31. 1. " WIN1_PALENTRY236 ,Window 1 Palette entry 236 address"
line.long 0x3B4 "WIN1_PALENTRY237,Window 1 Palette entry 237 address"
hexmask.long 0x3B4 0.--31. 1. " WIN1_PALENTRY237 ,Window 1 Palette entry 237 address"
line.long 0x3B8 "WIN1_PALENTRY238,Window 1 Palette entry 238 address"
hexmask.long 0x3B8 0.--31. 1. " WIN1_PALENTRY238 ,Window 1 Palette entry 238 address"
line.long 0x3BC "WIN1_PALENTRY239,Window 1 Palette entry 239 address"
hexmask.long 0x3BC 0.--31. 1. " WIN1_PALENTRY239 ,Window 1 Palette entry 239 address"
line.long 0x3C0 "WIN1_PALENTRY240,Window 1 Palette entry 240 address"
hexmask.long 0x3C0 0.--31. 1. " WIN1_PALENTRY240 ,Window 1 Palette entry 240 address"
line.long 0x3C4 "WIN1_PALENTRY241,Window 1 Palette entry 241 address"
hexmask.long 0x3C4 0.--31. 1. " WIN1_PALENTRY241 ,Window 1 Palette entry 241 address"
line.long 0x3C8 "WIN1_PALENTRY242,Window 1 Palette entry 242 address"
hexmask.long 0x3C8 0.--31. 1. " WIN1_PALENTRY242 ,Window 1 Palette entry 242 address"
line.long 0x3CC "WIN1_PALENTRY243,Window 1 Palette entry 243 address"
hexmask.long 0x3CC 0.--31. 1. " WIN1_PALENTRY243 ,Window 1 Palette entry 243 address"
line.long 0x3D0 "WIN1_PALENTRY244,Window 1 Palette entry 244 address"
hexmask.long 0x3D0 0.--31. 1. " WIN1_PALENTRY244 ,Window 1 Palette entry 244 address"
line.long 0x3D4 "WIN1_PALENTRY245,Window 1 Palette entry 245 address"
hexmask.long 0x3D4 0.--31. 1. " WIN1_PALENTRY245 ,Window 1 Palette entry 245 address"
line.long 0x3D8 "WIN1_PALENTRY246,Window 1 Palette entry 246 address"
hexmask.long 0x3D8 0.--31. 1. " WIN1_PALENTRY246 ,Window 1 Palette entry 246 address"
line.long 0x3DC "WIN1_PALENTRY247,Window 1 Palette entry 247 address"
hexmask.long 0x3DC 0.--31. 1. " WIN1_PALENTRY247 ,Window 1 Palette entry 247 address"
line.long 0x3E0 "WIN1_PALENTRY248,Window 1 Palette entry 248 address"
hexmask.long 0x3E0 0.--31. 1. " WIN1_PALENTRY248 ,Window 1 Palette entry 248 address"
line.long 0x3E4 "WIN1_PALENTRY249,Window 1 Palette entry 249 address"
hexmask.long 0x3E4 0.--31. 1. " WIN1_PALENTRY249 ,Window 1 Palette entry 249 address"
line.long 0x3E8 "WIN1_PALENTRY250,Window 1 Palette entry 250 address"
hexmask.long 0x3E8 0.--31. 1. " WIN1_PALENTRY250 ,Window 1 Palette entry 250 address"
line.long 0x3EC "WIN1_PALENTRY251,Window 1 Palette entry 251 address"
hexmask.long 0x3EC 0.--31. 1. " WIN1_PALENTRY251 ,Window 1 Palette entry 251 address"
line.long 0x3F0 "WIN1_PALENTRY252,Window 1 Palette entry 252 address"
hexmask.long 0x3F0 0.--31. 1. " WIN1_PALENTRY252 ,Window 1 Palette entry 252 address"
line.long 0x3F4 "WIN1_PALENTRY253,Window 1 Palette entry 253 address"
hexmask.long 0x3F4 0.--31. 1. " WIN1_PALENTRY253 ,Window 1 Palette entry 253 address"
line.long 0x3F8 "WIN1_PALENTRY254,Window 1 Palette entry 254 address"
hexmask.long 0x3F8 0.--31. 1. " WIN1_PALENTRY254 ,Window 1 Palette entry 254 address"
line.long 0x3FC "WIN1_PALENTRY255,Window 1 Palette entry 255 address"
hexmask.long 0x3FC 0.--31. 1. " WIN1_PALENTRY255 ,Window 1 Palette entry 255 address"
tree.end
width 0xb
tree.end
tree "ADC & Touch Screen Interface"
base ad:0x58000000
width 9.
group.long 0x00++0x3
line.word 0x00 "ADCCON,ADC Control Register"
bitfld.word 0x00 15. " ECFLG ,End of conversion flag" "In progress,Ended"
bitfld.word 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled"
hexmask.word.byte 0x00 6.--13. 1. " PRSCVL ,A/D converter prescaler value"
textline " "
bitfld.word 0x00 3. " RESSEL ,A/D converter resolution selection" "10-bit,12-bit"
bitfld.word 0x00 2. " STDBM ,Standby mode select" "Normal,Standby"
bitfld.word 0x00 1. " READ_START ,A/D conversion start by read" "Disabled,Enabled"
textline " "
bitfld.word 0x00 0. " ENABLE_START ,A/D conversion start" "No operation,Started"
group.long 0x04++0x3
line.word 0x00 "ADCTSC,ADC Touch Screen Control Register"
bitfld.word 0x00 8. " UD_SEN ,Select interrupt source Stylus Up or Down" "Down,Up"
bitfld.word 0x00 7. " YM_SEN ,YM to GND Switch Enable" "Disabled,Enabled"
bitfld.word 0x00 6. " YP_SEN ,YP to VDD Switch Enable" "Enabled,Disabled"
textline " "
bitfld.word 0x00 5. " XM_SEN ,XM to GND Switch Enable" "Disabled,Enabled"
bitfld.word 0x00 4. " XP_SEN ,XP to VDD Switch Enable" "Enabled,Disabled"
bitfld.word 0x00 3. " PULL_UP ,XP Pull-up Switch Enable" "Enabled,Disabled"
textline " "
bitfld.word 0x00 2. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential"
bitfld.word 0x00 0.--1. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
group.long 0x08++0x3
line.word 0x00 "ADCDLY,ADC Start Or Interval Delay Register"
hexmask.word 0x00 0.--15. 1. " DELAY ,Delay value"
if ((((d.l(ad:0x58000000))&0x8)==0x8))
rgroup.long 0x0c++0x3
line.word 0x00 "ADCDAT0,ADC Conversion Data Register 0"
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
bitfld.word 0x00 14. " AUTO_PST ,Automatic sequencing conversion of X-position and Y-position" "Normal,Sequential"
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
textline " "
hexmask.word 0x00 0.--11. 1. " XPDATA ,X-position conversion data value"
else
rgroup.long 0x0c++0x3
line.word 0x00 "ADCDAT0,ADC Conversion Data Register 0"
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
bitfld.word 0x00 14. " AUTO_PST ,Automatic sequencing conversion of X-position and Y-position" "Normal,Sequential"
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
textline " "
hexmask.word 0x00 0.--9. 1. " XPDATA ,X-position conversion data value"
endif
if ((((d.l(ad:0x58000000))&0x8)==0x8))
rgroup.long 0x10++0x3
line.word 0x00 "ADCDAT1,ADC Conversion Data Register 1"
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
bitfld.word 0x00 14. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential"
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
textline " "
hexmask.word 0x00 0.--11. 1. " YPDATA ,Y-position conversion data value"
else
rgroup.long 0x10++0x3
line.word 0x00 "ADCDAT1,ADC Conversion Data Register 1"
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
bitfld.word 0x00 14. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential"
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
textline " "
hexmask.word 0x00 0.--9. 1. " YPDATA ,Y-position conversion data value"
endif
group.long 0x14++0x07
line.word 0x00 "ADCUPDN,ADC Touch Screen Up-down Int Check register"
bitfld.word 0x00 1. " TSC_UP ,Stylus Up Interrupt history." "Not occurred,Occurred"
bitfld.word 0x00 0. " TSC_DN ,Stylus Down Interrupt history." "Not occurred,Occurred"
line.word 0x04 "ADCMUX,ADC Channel MUX Register"
bitfld.word 0x04 0.--3. " ADCMUX ,Analog input channel select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7,AIN8,AIN9,?..."
width 0xb
tree.end
tree "IIS Multi Audio Interface"
base ad:0x55000000
width 8.
if ((((d.l(ad:0x55000000+0x4))&0x80)==0x0))
group.long 0x00++0x3
line.long 0x00 "IISCON,IIS Interface Control Register"
eventfld.long 0x00 17. " FTXURSTATUS ,TX FIFO under-run interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 16. " FTXURINTEN ,TX FIFO Under-run Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " FTX2EMPT ,Tx FIFO2 empty status" "Not empty,Empty"
bitfld.long 0x00 14. " FTX1EMPT ,Tx FIFO1 empty status" "Not empty,Empty"
textline " "
bitfld.long 0x00 13. " FTX2FULL ,Tx FIFO2 full status" "Not full,Full"
bitfld.long 0x00 12. " FTX1FULL ,Tx FIFO1 full status" "Not full,Full"
textline " "
bitfld.long 0x00 11. " LRI ,Left/Right channel clock indication" "Left,Right"
bitfld.long 0x00 10. " FTX0EMPT ,Tx FIFO0 empty status" "Not empty,Empty"
textline " "
bitfld.long 0x00 9. " FRXEMPT ,Rx FIFO empty status" "Not empty,Empty"
bitfld.long 0x00 8. " FTX0FULL ,Tx FIFO0 full status" "Not full,Full"
textline " "
bitfld.long 0x00 7. " FRXFULL ,Rx FIFO full status" "Not full,Full"
bitfld.long 0x00 6. " TXDMAPAUSE ,Tx DMA operation pause command" "Not paused,Paused"
textline " "
bitfld.long 0x00 5. " RXDMAPAUSE ,Rx DMA operation pause command" "Not paused,Paused"
bitfld.long 0x00 4. " TXCHPAUSE ,Tx channel operation pause command" "Not paused,Paused"
textline " "
bitfld.long 0x00 3. " RXCHPAUSE ,Rx channel operation pause command" "Not paused,Paused"
bitfld.long 0x00 2. " TXDMAACTIVE ,Tx DMA active" "Inactive,Active"
textline " "
bitfld.long 0x00 1. " RXDMAACTIVE ,Rx DMA active" "Inactive,Active"
bitfld.long 0x00 0. " IISACTIVE ,IIS interface active" "Inactive,Active"
else
group.long 0x00++0x3
line.long 0x00 "IISCON,IIS Interface Control Register"
eventfld.long 0x00 17. " FTXURSTATUS ,TX FIFO under-run interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 16. " FTXURINTEN ,TX FIFO Under-run Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " FTX2EMPT ,Tx FIFO2 empty status" "Not empty,Empty"
bitfld.long 0x00 14. " FTX1EMPT ,Tx FIFO1 empty status" "Not empty,Empty"
textline " "
bitfld.long 0x00 13. " FTX2FULL ,Tx FIFO2 full status" "Not full,Full"
bitfld.long 0x00 12. " FTX1FULL ,Tx FIFO1 full status" "Not full,Full"
textline " "
bitfld.long 0x00 11. " LRI ,Left/Right channel clock indication" "Right,Left"
bitfld.long 0x00 10. " FTX0EMPT ,Tx FIFO0 empty status" "Not empty,Empty"
textline " "
bitfld.long 0x00 9. " FRXEMPT ,Rx FIFO empty status" "Not empty,Empty"
bitfld.long 0x00 8. " FTX0FULL ,Tx FIFO0 full status" "Not full,Full"
textline " "
bitfld.long 0x00 7. " FRXFULL ,Rx FIFO full status" "Not full,Full"
bitfld.long 0x00 6. " TXDMAPAUSE ,Tx DMA operation pause command" "Not paused,Paused"
textline " "
bitfld.long 0x00 5. " RXDMAPAUSE ,Rx DMA operation pause command" "Not paused,Paused"
bitfld.long 0x00 4. " TXCHPAUSE ,Tx channel operation pause command" "Not paused,Paused"
textline " "
bitfld.long 0x00 3. " RXCHPAUSE ,Rx channel operation pause command" "Not paused,Paused"
bitfld.long 0x00 2. " TXDMAACTIVE ,Tx DMA active" "Inactive,Active"
textline " "
bitfld.long 0x00 1. " RXDMAACTIVE ,Rx DMA active" "Inactive,Active"
bitfld.long 0x00 0. " IISACTIVE ,IIS interface active" "Inactive,Active"
endif
group.long 0x04++0x3
line.long 0x00 "IISMOD,IIS Interface Mode Register"
bitfld.long 0x00 20.--21. " CDD2 ,Channel-2 Data Discard" "Disabled,I2STXD[15:0],I2STXD[31:16],?..."
bitfld.long 0x00 18.--19. " CDD1 ,Channel-1 Data Discard" "Disabled,I2STXD[15:0],I2STXD[31:16],?..."
textline " "
bitfld.long 0x00 16.--17. " DCE ,Data Channel Enable" "Disabled,SD1 enabled,SD2 enabled,SD1/SD2 enabled"
bitfld.long 0x00 13.--14. " BLC ,Bit Length Control Bit" "16 bits,8 bits,24 bits,?..."
textline " "
bitfld.long 0x00 12. " CDCLKCON ,Determine direction of codec clock" "Supply codec clock,Get codec clock"
bitfld.long 0x00 10.--11. " IMS ,IIS master/slave mode" "Internal master,External master,Slave,Slave"
textline " "
bitfld.long 0x00 8.--9. " TXR ,Transmit or receive mode" "Transmit,Receive,Both,?..."
bitfld.long 0x00 7. " LRP ,Left/Right channel clock polarity select" "Low-left/High-right,High-left/Low-right"
textline " "
bitfld.long 0x00 5.--6. " SDF ,Serial data format" "IIS,MSB-justified,LSB-justified,?..."
bitfld.long 0x00 3.--4. " RFS ,IIS root clock frequency" "256 fs,512 fs,384 fs,768 fs"
textline " "
bitfld.long 0x00 1.--2. " BFS ,Bit clock frequency" "32 fs,48 fs,16 fs,24 fs"
group.long 0x08++0x3
line.long 0x00 "IISFIC,IIS Interface FIFO Control Register"
bitfld.long 0x00 24.--28. " FTX2CNT ,Tx FIFO2 data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 16.--20. " FTX1CNT ,Tx FIFO1 data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
textline " "
bitfld.long 0x00 15. " TFLUSH ,Tx FIFO flush command" "Not flushed,Flushed"
bitfld.long 0x00 8.--12. " FTX0CNT ,Tx FIFO0 data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
textline " "
bitfld.long 0x00 7. " RFLUSH ,Rx FIFO flush command" "Not flushed,Flushed"
bitfld.long 0x00 0.--4. " FRXCNT ,Rx FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
group.long 0x0c++0x3
line.long 0x00 "IISPSR,IIS Interface Clock Divider Control Register"
bitfld.long 0x00 15. " PSRAEN ,Prescaler active" "Inactive,Active"
bitfld.long 0x00 8.--13. " PSVALA ,Prescaler division value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
if (((d.l(ad:(0x55000000+0x4)))&0x6000)==0x00)
wgroup.long 0x10++0x3
line.long 0x00 "IISTXD,IIS Interface Transmit Data Register"
hexmask.long.word 0x00 16.--31. 1. " IISRXDR ,Right channel Tx FIFO read data"
hexmask.long.word 0x00 0.--15. 1. " IISRXDL ,Left channel Tx FIFO read data"
rgroup.long 0x14++0x3
line.long 0x00 "IISRXD,IIS Interface Receive Data Register"
hexmask.long.word 0x00 16.--31. 1. " IISTXDR ,Right channel Tx FIFO write data"
hexmask.long.word 0x00 0.--15. 1. " IISTXDL ,Left channel Tx FIFO write data"
elif (((d.l(ad:(0x55000000+0x4)))&0x6000)==0x2000)
wgroup.long 0x10++0x3
line.long 0x00 "IISTXD,IIS Interface Transmit Data Register"
hexmask.long.byte 0x00 16.--23. 1. " IISRXDR ,Right channel Tx FIFO read data"
hexmask.long.byte 0x00 0.--7. 1. " IISRXDL ,Left channel Tx FIFO read data"
rgroup.long 0x14++0x3
line.long 0x00 "IISRXD,IIS Interface Receive Data Register"
hexmask.long.byte 0x00 16.--23. 1. " IISTXDR ,Right channel Tx FIFO write data"
hexmask.long.byte 0x00 0.--7. 1. " IISTXDL ,Left channel Tx FIFO write data"
else
wgroup.long 0x10++0x3
line.long 0x00 "IISTXD,IIS Interface Transmit Data Register"
hexmask.long.tbyte 0x00 0.--23. 1. " IISRXDR ,Right channel Tx FIFO read data"
hexmask.long.tbyte 0x00 0.--23. 1. " IISRXDL ,Left channel Tx FIFO read data"
rgroup.long 0x14++0x3
line.long 0x00 "IISRXD,IIS Interface Receive Data Register"
hexmask.long.tbyte 0x00 0.--23. 1. " IISTXDR ,Right channel Tx FIFO write data"
hexmask.long.tbyte 0x00 0.--23. 1. " IISTXDL ,Left channel Tx FIFO write data"
endif
width 0xb
tree.end
tree "AC97 Controller"
base ad:0x5b000000
width 15.
group.long 0x00++0x03
line.long 0x00 "AC_GLBCTRL,AC97 Gloobal Control Register"
bitfld.long 0x00 22. " CD_RDY_INT_EN ,Codec ready interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. " PCM_OUT_CH_UND_INT_EN ,PCM out channel underrun interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 20. " PCM_IN_CH_OV_INT_EN ,PCM in channel overrun interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 19. " MIC_IN_CH_OVR_INT_EN ,Mic in channel overrun interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " PCM_OUT_CH_TRH_INT_EN ,PCM out channel threshold interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 17. " PCM_IN_CH_TRH_INT_EN ,PCM in channel threshold interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " MIC_IN_CH_TRH_INT_EN ,MIC in channel threshold interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12.--13. " PCM_OUT_CH_TRF_MD ,PCM out channel transfer mode" "Off,PIO,DMA,?..."
textline " "
bitfld.long 0x00 10.--11. " PCM_IN_CH_TRF_MD ,PCM in channel transfer mode" "Off,PIO,DMA,?..."
bitfld.long 0x00 8.--9. " MIC_IN_CH_TRF_MD ,MIC in channel transfer mode" "Off,PIO,DMA,?..."
textline " "
bitfld.long 0x00 3. " AC_TRF_DAT_EN ,Transfer data enable using AC-link" "Disabled,Enabled"
bitfld.long 0x00 2. " AC_LNK ,AC-Link on" "Off,Sync"
textline " "
bitfld.long 0x00 1. " WM_RST ,Warm reset" "No reset,Reset"
bitfld.long 0x00 0. " CLD_RST ,Cold reset" "No reset,Reset"
rgroup.long 0x04++0x03
line.long 0x00 "AC_GLBSTAT,AC97 Global Status Register"
bitfld.long 0x00 22. " CD_RDY_INT ,Codec ready interrupt" "Not requested,Requested"
bitfld.long 0x00 21. " PCM_OUT_CH_UND_INT ,PCM out channel underrun interrupt" "Not requested,Requested"
textline " "
bitfld.long 0x00 20. " PCM_IN_CH_OV_INT ,PCM in channel overrun interrupt" "Not requested,Requested"
bitfld.long 0x00 19. " MIC_IN_CH_OVR_INT ,MIC in channel overrun interrupt" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " PCM_OUT_CH_TRH_INT ,PCM out channel threshold interrupt" "Not requested,Requested"
bitfld.long 0x00 17. " PCM_IN_CH_TRH_INT ,PCM in channel threshold interrupt" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " MIC_IN_CH_TRH_INT ,MIC in channel threshold interrupt" "Not requested,Requested"
bitfld.long 0x00 0.--2. " CTR_M_ST ,Controller main state" "Idle,Init,Ready,Active,LP,Warm,?..."
group.long 0x08++0x03
line.long 0x00 "AC_CODEC_CMD,AC97 Command Register"
bitfld.long 0x00 23. " READ_EN ,Status read/write enable" "Write,Read"
hexmask.long.byte 0x00 16.--22. 1. " ADDRESS ,Codec command address"
textline " "
hexmask.long.word 0x00 0.--15. 1. " DATA ,Codec command data"
rgroup.long 0xc++0x0b
line.long 0x00 "AC_CODEC_STAT,AC97 Codec Status Register"
hexmask.long.byte 0x00 16.--22. 1. " ADDRESS ,Codec status address"
hexmask.long.word 0x00 0.--15. 1. " DATA ,Codec status data"
line.long 0x04 "AC_PCMADDR,AC97 PCM OUT/IN Channel FIFO Address Register"
bitfld.long 0x04 24.--27. " OUT_RD_ADDT ,PCM out channel FIFO read address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. " IN_RD_ADDR ,PCM in channel FIFO read address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x04 8.--11. " OUT_WR_ADDR ,PCM out channel FIFO write address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. " IN_WR_ADDR ,PCM in channel FIFO write address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "AC_MICADDR,AC97 MIC IN Channel FIFO Address Register"
bitfld.long 0x08 16.--19. " RD_ADDR ,MIC in channel FIFO read address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. " WR_ADDR ,MIC in channel FIFO write address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x18++0x03
line.long 0x00 "AC_PCMDATA,AC97 PCM OUT/IN Channel FIFO Data Register"
hexmask.long.word 0x00 16.--31. 1. " RIGHT_DATA ,PCM out/in right channel FIFO data"
hexmask.long.word 0x00 0.--15. 1. " LEFT_DATA ,PCM out/in left channel FIFO data"
rgroup.long 0x1c++0x03
line.long 0x00 "AC_MICDATA,AC97 MIC IN Channel FIFO Data Register"
hexmask.long.word 0x00 0.--15. 1. " MONO_DATA ,MIC in mono channel FIFO data"
width 0xb
tree.end
tree "PCM Audio Interface"
base ad:0x5c000000
width 15.
group.long 0x00++0x0b
line.long 0x00 "PCM_CTL,PCM Main Control Register"
bitfld.long 0x00 13.--18. " TXFIFO_DIPSTICK ,Determines when the almost_full, almost_empty flags go active for the TXFIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 7.--12. " RXFIFO_DIPSTICK ,Determines when the almost_full, almost_empty flags go active for the RXFIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
bitfld.long 0x00 6. " PCM_TX_DMA_EN ,Enable the DMA interface for the TXFIFO" "Disabled,Enabled"
bitfld.long 0x00 5. " PCM_RX_DMA_EN ,Enable the DMA interface for the RXFIFO" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " TX_MSB_POS ,Controls the position of the MSB bit in the serial output stream relative to the PCMFSYNC signal" "Same cycle,Next cycle"
bitfld.long 0x00 3. " RX_MSB_POS ,Controls the position of the MSB bit in the serial input stream relative to the PCMFSYNC signal" "Same cycle,Next cycle"
textline " "
bitfld.long 0x00 2. " PCM_TXFIFO_EN ,Enable the TXFIFO" "Disabled,Enabled"
bitfld.long 0x00 1. " PCM_RXFIFO_EN ,Enable the RXFIFO" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " PCM_PCM_ENABLE ,PCM enable signal" "Disabled,Enabled"
line.long 0x04 "PCM_CLKCTL,PCM Clock And Shift Control Register"
bitfld.long 0x04 19. " CTL_SERCLK_EN ,Enable the serial clock division logic" "Disabled,Enabled"
bitfld.long 0x04 18. " CTL_SERCLK_SEL ,Select the source of the PCMSOURCE_CLK" "EXT_CLK,PCLK"
textline " "
hexmask.long.word 0x04 9.--17. 1. " SCLK_DIV ,Controls the divider used to create the PCMSCLK based on the PCMSOURCE_CLK"
hexmask.long.word 0x04 0.--8. 1. " SYNC_DIV ,Controls the frequency of the PCMFSYNC signal based on the PCMSCLK"
line.long 0x08 "PCMTXFIFO,PCM TxFIFO Write Port Register"
bitfld.long 0x08 16. " TXFIFO_DVALID ,TXFIFO data is valid" "Invalid,Valid"
hexmask.long.word 0x08 0.--15. 1. " TXFIFO_DATA ,PCM data to TXFIFO"
hgroup.long 0x0c++0x03
hide.long 0x00 "PCM_RXFIFO,PCM RxFIFO Read Port Register"
in
group.long 0x10++0x07
line.long 0x0 "PCM_IRQ_CTL,PCM Interrupt Control Register"
bitfld.long 0x0 14. " EN_IRQ_TO_ARM ,Controls whether the PCM interrupt is sent to the ARM or not" "Not forwarded,Forwarded"
bitfld.long 0x0 12. " TRANSFER_DONE ,Interrupt is generated every time the serial shift for a 16bit PCM Data word completes" "Disabled,Enabled"
textline " "
bitfld.long 0x0 11. " TXFIFO_EMPTY ,Interrupt is generated whenever the TxFIFO is empty" "Disabled,Enabled"
bitfld.long 0x0 10. " TXFIFO_ALMOST_EMPTY ,Interrupt is generated whenever the TxFIFO is ALMOST_EMPTY" "Disabled,Enabled"
textline " "
bitfld.long 0x0 9. " TXFIFO_FULL ,Interrupt is generated whenever the TxFIFO is full" "Disabled,Enabled"
bitfld.long 0x0 8. " TXFIFO_ALMOST_FULL ,Interrupt is generated whenever the TxFIFO is ALMOST_FULL" "Disabled,Enabled"
textline " "
bitfld.long 0x0 7. " TXFIFO_ERROR_STARVE ,Interrupt is generated for TxFIFO starve ERROR" "Disabled,Enabled"
bitfld.long 0x0 6. " TXFIFO_ERROR_OVERFLOW ,Interrupt is generated for TxFIFO overflow ERROR" "Disabled,Enabled"
textline " "
bitfld.long 0x0 5. " RXFIFO_EMPTY ,Interrupt is generated whenever the RxFIFO is empty" "Disabled,Enabled"
bitfld.long 0x0 4. " RXFIFO_ALMOST_EMPTY ,Interrupt is generated whenever the RxFIFO is ALMOST_EMPTY" "Disabled,Enabled"
textline " "
bitfld.long 0x0 3. " RX_FIFO_FULL ,Interrupt is generated whenever the RxFIFO is full" "Disabled,Enabled"
bitfld.long 0x0 2. " RX_FIFO_ALMOST_FULL ,Interrupt is generated whenever the RxFIFO is ALMOST_FULL" "Disabled,Enabled"
textline " "
bitfld.long 0x0 1. " RXFIFO_ERROR_STARVE ,Interrupt is generated for RxFIFO starve ERROR" "Disabled,Enabled"
bitfld.long 0x0 0. " RXFIFO_ERROR_OVERFLOW ,Interrupt is generated for RxFIFO overflow ERROR" "Disabled,Enabled"
rgroup.long 0x14++0x07
line.long 0x00 "PCM_IRQ_STAT,PCM Interrupt Status Register"
bitfld.long 0x00 13. " IRQ_PENDING ,PCM IRQ status" "Not occurred,Occurred"
bitfld.long 0x00 12. " TRANSFER_DONE ,Serial shift for a word completes interrupt status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 11. " TXFIFO_EMPTY ,TX FIFO is empty interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 10. " TXFIFO_ALMOST_EMPTY ,TxFIFO is ALMOST empty interrupt status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 9. " TXFIFO_FULL ,TX FIFO is full interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 8. " TXFIFO_ALMOST_FULL ,TX FIFO is ALMOST full interrupt status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " TXFIFO_ERROR_STARVE ,TX FIFO starve ERROR interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 6. " TXFIFO_ERROR_OVERFLOW ,TX FIFO overflow ERROR interrupt status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " RXFIFO_EMPTY ,RX FIFO is empty interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 4. " RXFIFO_ALMOST_EMPTY ,RX FIFO is ALMOST empty interrupt status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " RX_FIFO_FULL ,RX FIFO is full interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 2. " RX_FIFO_ALMOST_FULL ,RX FIFO is ALMOST full interrupt status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " RXFIFO_ERROR_STARVE ,RX FIFO starve ERROR interrupt status" "Not occurred,Occurred"
bitfld.long 0x00 0. " RXFIFO_ERROR_OVERFLOW ,RX FIFO overflow ERROR interrupt status" "Not occurred,Occurred"
line.long 0x04 "PCM_FIFO_STAT,PCM FIFO Status Register"
bitfld.long 0x04 14.--19. " TXFIFO_COUNT ,TX FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
bitfld.long 0x04 13. " TXFIFO_EMPTY ,FIFO status" "Not empty,Empty"
textline " "
bitfld.long 0x04 12. " TXFIFO_ALMOST_EMPTY ,FIFO status" "Not ALMOST_EMPTY,ALMOST_EMPTY"
bitfld.long 0x04 11. " TXFIFO_FULL ,FIFO status" "Not full,Full"
textline " "
bitfld.long 0x04 10. " TXFIFO_ALMOST_FULL ,FIFO status" "Not ALMOST_FULL,ALMOST_FULL"
bitfld.long 0x04 4.--9. " RXFIFO_COUNT ,RX FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
textline " "
bitfld.long 0x04 3. " RXFIFO_EMPTY ,FIFO status" "Not empty,Empty"
bitfld.long 0x04 2. " RXFIFO_ALMOST_EMPTY ,FIFO status" "Not ALMOST_EMPTY,ALMOST_EMPTY"
textline " "
bitfld.long 0x04 1. " RX_FIFO_FULL ,FIFO status" "Not full,Full"
bitfld.long 0x04 0. " RX_FIFO_ALMOST_FULL ,FIFO status" "Not ALMOST_FULL,ALMOST_FULL"
wgroup.long 0x20++0x03
line.long 0x00 "PCM_CLRINT,PCM interrupt Clear Register"
bitfld.long 0x00 0. " CLRINT ,Interrupt Register Clear" "No effect,Clear"
width 0xb
tree.end
textline ""